Solar cell, method for preparing the same, and photovoltaic module

Abstract

To provide, in the field of photovoltaics, a solar cell, a method for preparing the same, and a photovoltaic module.SOLUTION: A solar cell includes a substrate, a first dielectric layer located in an electrode region, and a first doped conductive layer located on the side of the first dielectric layer away from the electrode region. The substrate has first and second surfaces opposite to each other. The first surface includes: electrode regions and non-electrode regions alternately disposed with intervals; and transition regions located between the electrode regions and the non-electrode regions. The transition regions include a first surface structure, and the first surface structure includes multiple prismatic structures that are inclined toward the electrode regions. The prismatic structures are sequentially arranged at least along a first direction, and the first direction is the extension direction of the transition regions. An embodiment of the present disclosure is advantageous at least in improving the photoelectric conversion efficiency of the solar cell.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of photovoltaic power, and in particular, to solar cells and their manufacturing methods, and photovoltaic modules.

Background Art

[0002] Currently, solar cells are being used more and more widely as a new energy alternative. Solar cells utilize the principle of photovoltaic power generation to generate carriers and extract the carriers at the electrodes, thereby contributing to the effective utilization of electrical energy.

[0003] Currently, solar cells mainly include IBC (Interdigitated Back Contact) cells, TOPCON (Tunnel Oxide Passivated Contact) cells, PERC cells (Passivated Emitter and Real Cell), and HJT (Heterojunction with Intrinsic Thinfilm) cells, etc.

[0004] However, currently, the photoelectric conversion efficiency of the designed solar cells needs to be further improved.

Summary of the Invention

Problems to be Solved by the Invention

[0005] Embodiments of the present disclosure provide a solar cell and its manufacturing method, and a photovoltaic module that are at least advantageous for improving the photoelectric conversion efficiency of the solar cell.

Means for Solving the Problems

[0006] According to some embodiments of the present disclosure, in one aspect of the embodiments of the present disclosure, a solar cell is provided, which includes a substrate, a first dielectric layer located in an electrode region, and a first doped conductive layer located on a side of the first dielectric layer away from the electrode region. The substrate has a first surface and a second surface arranged opposite to each other. The first surface includes the electrode region and the non-electrode region arranged alternately with a gap therebetween, and a transition region located between the electrode region and the non-electrode region. The transition region has a first surface structure, and the first surface structure includes a plurality of prism structures inclined toward the electrode region. The plurality of prism structures are sequentially arranged at least along a first direction, and the first direction is the extending direction of the transition region.

[0007] In some embodiments, the prism structure includes a first prism structure and a second prism structure. Along the inclined direction of the prism structure, a first length of the first prism structure is greater than a second length of the second prism structure, and at least a part of the second prism structure is located on a side surface of the first prism structure away from the electrode region.

[0008] In some embodiments, a plurality of the second prism structures are located on a side surface of the same first prism structure away from the electrode region, or the plurality of second prism structures are sequentially arranged along a direction away from the side surface of the first prism structure.

[0009] In some embodiments, the first surface structure further includes a first pyramid structure, at least a part of the first pyramid structure is located in a part of the transition region close to the non-electrode region, and at least a part of the prism structure is located in a part of the transition region close to the electrode region.

[0010] In some embodiments, the first surface structure further includes a plurality of fine protrusion structures, the fine protrusion structures include at least one of a second pyramid structure or a triangular plate-like structure, and a one-dimensional dimension of a bottom portion of the fine protrusion structure is smaller than a one-dimensional dimension of a bottom portion of the first pyramid structure.

[0011] In some embodiments, the solar cell further includes a second dielectric layer covering the second surface and a second doped conductive layer covering the surface of the second dielectric layer on the side away from the substrate, and the type of the doping element in the first doped conductive layer is different from the type of the doping element in the second doped conductive layer.

[0012] In some embodiments, the surface of the first doped conductive layer located in the electrode region has a second surface structure, the second surface structure includes a plurality of third pyramid structures, the non-electrode region has a third surface structure, and the third surface structure includes a plurality of fourth pyramid structures.

[0013] In some embodiments, the one-dimensional dimension of the bottom of the first pyramid structure is larger than the one-dimensional dimension of the bottom of the third pyramid structure, and the one-dimensional dimension of the bottom of the third pyramid structure is larger than the one-dimensional dimension of the bottom of the fourth pyramid structure.

[0014] In some embodiments, the solar cell further includes an intrinsic semiconductor layer covering the second surface, a second doped conductive layer covering the surface of the intrinsic semiconductor layer on the side away from the substrate, and a transparent conductive layer covering the surface of the second doped conductive layer on the side away from the intrinsic semiconductor layer, and the type of the doping element in the first doped conductive layer is different from the type of the doping element in the second doped conductive layer.

[0015] In some embodiments, the electrode region is a positive electrode region or a negative electrode region, the first dielectric layer includes a first sub-dielectric layer located in the positive electrode region and a second sub-dielectric layer located in the negative electrode region, the first doped conductive layer includes a first sub-doped conductive layer located on the side of the first sub-dielectric layer close to the positive electrode region and a second sub-doped conductive layer located on the side of the second sub-dielectric layer close to the negative electrode region, and the type of the doping element in the first sub-doped conductive layer is different from the type of the doping element in the second sub-doped conductive layer.

[0016] In some embodiments, the electrode region has a fourth surface structure, the fourth surface structure includes a plurality of platform ridge structures, the non-electrode region has a fifth surface structure, the fifth surface structure includes a plurality of fifth pyramid structures, and here, the one-dimensional dimension of the bottom of the first pyramid structure is larger than the one-dimensional dimension of the bottom of the fifth pyramid structure.

[0017] In some embodiments, the electrode region has a first upper surface, the non-electrode region has a second upper surface, with reference to the second surface, the first upper surface is higher than the second upper surface, and the height difference between the first upper surface and the second upper surface is 0.5 μm to 10 μm.

[0018] According to some embodiments of the present disclosure, in one aspect of the embodiments of the present disclosure, a method for manufacturing a solar cell is provided. The method for manufacturing the solar cell includes providing an initial substrate, where the initial substrate has an initial first surface and an initial second surface disposed opposite to each other, the initial first surface includes an initial electrode region and an initial non-electrode region alternately disposed at intervals, and an initial transition region located between the initial electrode region and the initial non-electrode region; forming an initial first dielectric layer covering the initial first surface; forming an initial first doping conductive layer covering the surface of the initial first dielectric layer on the side away from the initial substrate; removing the initial first dielectric layer and the initial first doping conductive layer located in the initial transition region and the initial non-electrode region in a laser process to form a substrate with a first surface. Here, after being processed by the laser process, the initial electrode region, the initial transition region, and the initial non-electrode region are respectively an electrode region, a transition region, and a non-electrode region. The transition region has a first surface structure, the first surface structure includes a plurality of prism structures inclined toward the electrode region, and the plurality of prism structures are sequentially arranged at least along a first direction, where the first direction is the extending direction of the transition region. The remaining initial first dielectric layer located in the electrode region is the first dielectric layer, and the remaining initial first doping conductive layer located in the electrode region is the first doping conductive layer.

[0019] In some embodiments, the step of forming the initial first dielectric layer further includes forming a second dielectric layer covering the initial second surface, and the step of forming the initial first doped conductive layer further includes forming a second doped conductive layer covering the surface of the second dielectric layer on the side away from the initial substrate, wherein the type of doping element in the initial first doped conductive layer is different from the type of doping element in the second doped conductive layer.

[0020] In some embodiments, before forming the initial first doped conductive layer, it further includes forming an intrinsic semiconductor layer covering the initial second surface, and the step of forming the initial first doped conductive layer further includes forming a second doped conductive layer covering the surface of the intrinsic semiconductor layer on the side away from the initial substrate, wherein the type of doping element in the initial first doped conductive layer is different from the type of doping element in the second doped conductive layer.

[0021] In some embodiments, before forming the initial first dielectric layer, it further includes performing a first etching process on the initial first surface to provide a first texture structure on the initial first surface. In the step of removing the initial first dielectric layer and the initial first doped conductive layer located in the initial transition region and the initial non-electrode region by a laser process, the first doped conductive layer located in the initial electrode region has a second surface structure, the first texture structure located in the initial transition region is converted into the second surface structure, and the first texture structure located in the initial non-electrode region is converted into a third surface structure. Here, the second surface structure includes a plurality of third pyramid structures, the third surface structure includes a plurality of fourth pyramid structures, the one-dimensional dimension of the bottom of the first pyramid structure is larger than the one-dimensional dimension of the bottom of the third pyramid structure, and the one-dimensional dimension of the bottom of the third pyramid structure is larger than the one-dimensional dimension of the bottom of the fourth pyramid structure.

[0022] In some embodiments, the initial electrode region includes an initial positive electrode region and an initial negative electrode region, the formed first dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer, the first sub-dielectric layer is located in the positive electrode region, the second sub-dielectric layer is located in the negative electrode region, the formed first doped conductive layer includes a first sub-doped conductive layer and a second sub-doped conductive layer, the first sub-doped conductive layer is located on the side of the first sub-dielectric layer close to the positive electrode region, the second sub-doped conductive layer is located on the side of the second sub-dielectric layer close to the negative electrode region, and the type of doping element in the first sub-doped conductive layer is different from the type of doping element in the second sub-doped conductive layer.

[0023] According to some embodiments of the present disclosure, in one aspect of the embodiments of the present disclosure, a photovoltaic module is provided, and this photovoltaic module is formed by connecting a plurality of the above-described solar cells or a plurality of solar cells formed by the above-described manufacturing method into a cell string, a sealing adhesive film for covering the surface of the cell string, and a cover plate for covering the surface of the sealing adhesive film away from the cell string.

Advantages of the Invention

[0024] The technical solution provided in the embodiments of the present disclosure has at least the following advantages.

[0025] The first surface includes an electrode region, a transition region, and a non-electrode region. A stacked first dielectric layer and a first doped conductive layer are disposed in the electrode region, and the first dielectric layer and the first doped conductive layer constitute a passivation contact structure for the electrode region. Thus, due to the chemical passivation effect of the first dielectric layer on the electrode region and the field passivation effect of the first doped conductive layer on the electrode region, the serious carrier recombination problem in the electrode region is improved, which contributes to enhancing the collection efficiency of carriers in the substrate of the electrode formed in the electrode region later. On the other hand, by forming the first dielectric layer and the first doped conductive layer only in the electrode region, it is prevented that the first dielectric layer and the first doped conductive layer reduce the absorption of the non-electrode region and the transition region to the incident light irradiated on the first surface 110, that is, while improving the serious carrier recombination problem in the electrode region, it contributes to ensuring a high absorption rate of the first surface to the incident light.

[0026] Furthermore, the transition region includes a plurality of prismatic structures inclined toward the electrode region, and the plurality of prismatic structures are sequentially arranged at least along a first direction, and the first direction is the extending direction of the transition region. That is, along the extending direction of the transition region, at least one row of prismatic structures is separated between the electrode region and the non-electrode region. By inclining this at least one row of prismatic structures toward the electrode region, the probability that the incident light incident on the transition region at different angles is absorbed by the transition region through the prismatic structures by at least one reflection is increased, and the probability that the incident light is reflected to the non-electrode region through the prismatic structures by at least one reflection and absorbed by the non-electrode region is increased, which contributes to enhancing the absorption rate of the first surface to the incident light.

[0027] Therefore, by improving the serious carrier recombination problem in the electrode region and enhancing the absorption rate of the first surface to the incident light, the photoelectric conversion efficiency of the solar cell is improved.

Brief Description of the Drawings

[0028] One or more embodiments are exemplarily illustrated in the figures in the corresponding accompanying drawings. However, these exemplary illustrations do not limit the embodiments. Components denoted by the same reference numerals in the accompanying drawings are similar components. Unless otherwise specified, the figures in the accompanying drawings are not limited by scale. To more clearly explain the embodiments of the present disclosure or the technical solutions in the prior art, the drawings necessary for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative labor.

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Figure 21

DETAILED DESCRIPTION OF THE INVENTION

[0029] From the background art, it has been found that the photoelectric conversion efficiency of solar cells needs to be improved.

[0030] According to the analysis, currently, the reason for the low photoelectric conversion efficiency of solar cells is that generally, a diffusion process is used on the surface of the substrate to convert a part of the substrate into an emitter, and the emitter contains different types of doping elements from the substrate. Therefore, the emitter and the substrate where the doping elements are not diffused form a PN junction, and the carrier recombination in the electrode region on the substrate surface becomes too large, which may easily affect the open-circuit voltage and photoelectric conversion efficiency of the solar cell.

[0031] Embodiments of the present application provide a solar cell, a manufacturing method thereof, and a photovoltaic module. In the solar cell, a first dielectric layer and a first doped conductive layer are disposed in a stacked manner in the electrode region. By the passivation effect of the first dielectric layer and the first doped conductive layer on the electrode region, the serious carrier recombination problem in the electrode region is improved, and then the collection efficiency of carriers in the substrate of the electrode formed in the electrode region is increased. On the other hand, by forming the first dielectric layer and the first doped conductive layer only in the electrode region, it is prevented that the first dielectric layer and the first doped conductive layer reduce the absorption of the non-electrode region and the transition region to the incident light irradiated on the first surface. Also, since the transition region has at least one row of prismatic structures inclined toward the electrode region, the probability that the incident light incident on the transition region at different angles is absorbed by the transition region through the prismatic structure increases, and the probability that the incident light is reflected by the prismatic structure to the non-electrode region and absorbed by the non-electrode region increases, which contributes to increasing the absorption rate of the incident light on the first surface. Therefore, by improving the serious carrier recombination problem in the electrode region and increasing the absorption rate of the incident light on the first surface, the photoelectric conversion efficiency of the solar cell is increased.

[0032] Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings. However, as those skilled in the art can understand, in order to make the reader better understand the present application, although a large number of technical details are proposed in the embodiments of the present disclosure, the technical solutions claimed by the embodiments of the present disclosure can be realized even without these technical details and various changes and modifications based on the following embodiments.

[0033] One embodiment of the present application provides a solar cell. Hereinafter, with reference to the drawings, the solar cell provided in one embodiment of the present application will be described in detail.

[0034] As shown in FIGS. 1 to 4, the solar cell includes a substrate 100, a first dielectric layer 104 located in the electrode region 101, and a first doped conductive layer 105 located on the side of the first dielectric layer 104 away from the electrode region 101. The substrate 100 has a first surface 110 and a second surface 120 that are oppositely disposed. The first surface 110 includes an electrode region 101 and a non-electrode region 103 that are alternately disposed at intervals, and a transition region 102 located between the electrode region 101 and the non-electrode region 103. The transition region 102 has a first surface structure 112, and the first surface structure 112 includes a plurality of prism structures 122 that are inclined toward the electrode region 101. The plurality of prism structures 122 are sequentially arranged at least along a first direction X, and the first direction X is the extending direction of the transition region 102.

[0035] Note that FIG. 1 is a diagram showing a local cross-sectional structure of the solar cell provided in one embodiment of the present application, FIG. 2 is a local three-dimensional electron microscope schematic diagram of the solar cell provided in one embodiment of the present application, FIG. 3 is an enlarged electron microscope photograph of the frame I portion of FIG. 2, and FIG. 4 is a diagram showing a three-dimensional structure of a prism structure and a fine protrusion structure in the solar cell provided in one embodiment of the present application. In addition, in order to show the approximate positions of the electrode region 101, the transition region 102, the non-electrode region 103, the first dielectric layer 104, and the first doped conductive layer 105, FIG. 1 does not show the surface morphology characteristics of the substrate 100, the first dielectric layer 104, and the first doped conductive layer 105.

[0036] As shown in FIG. 1, the first surface 110 includes a plurality of electrode regions 101, a plurality of transition regions 102, and a plurality of non-electrode regions 103. A stacked first dielectric layer 104 and a first doped conductive layer 105 are provided in the electrode region 101. The first dielectric layer 104 and the first doped conductive layer 105 constitute a passivation contact structure for the electrode region 101. Thus, due to the chemical passivation effect of the first dielectric layer 104 on the electrode region 101 and the field passivation effect of the first doped conductive layer 105 on the electrode region 101, the serious carrier recombination problem in the electrode region 101 is improved, and this contributes to increasing the collection efficiency of the carriers in the substrate 100 of the electrode formed in the electrode region 101 later. On the other hand, by forming the first dielectric layer 104 and the first doped conductive layer 105 only in the electrode region 101, it is possible to prevent the first dielectric layer 104 and the first doped conductive layer 105 from reducing the absorption of the non-electrode region 103 and the transition region 102 with respect to the incident light irradiated on the first surface 110. That is, while improving the serious carrier recombination problem in the electrode region 101, it contributes to ensuring a high absorption rate of the first surface 110 with respect to the incident light.

[0037] Furthermore, as shown in FIG. 3, the first surface structure 112 includes a plurality of prism structures 122 that are inclined toward the electrode region 101, and the plurality of prism structures 122 are sequentially arranged at least along the first direction X, where the first direction X is the extending direction of the transition region 102. Thereby, along the first direction X, at least one row of prism structures 122 is separated between the electrode region 101 and the non-electrode region 103. By inclining this at least one row of prism structures 122 toward the electrode region 101, the probability that the incident light incident on the transition region 102 at different angles is absorbed by the transition region 102 through the prism structures 122 by at least one reflection increases, and the probability that the incident light is reflected to the non-electrode region 103 through the prism structures 122 by at least one reflection and absorbed by the non-electrode region 103 increases, which contributes to increasing the absorption rate of the first surface 110 with respect to the incident light.

[0038] Therefore, by improving the serious carrier recombination problem in the electrode region 101 and increasing the absorption rate of the incident light on the first surface 110, the photoelectric conversion efficiency of the solar cell is improved.

[0039] In some embodiments, as shown in FIG. 3, a plurality of columns of prism structures 122 are arranged along the first direction X. Along the inclination direction of the prism structure 122, the average value of the inclination lengths of the one column of prism structures 122 closest to the electrode region 101 is larger than the average value of the inclination lengths of the other columns of prism structures 122, and the other columns of prism structures 122 are located on the side surfaces of the column of prism structures 122 closest to the electrode region 101. This contributes to further increasing the probability that the incident light incident on the transition region 102 is absorbed by the transition region 102 or the non-electrode region 103.

[0040] In some embodiments, the electrode region 101 refers to a region in the substrate 100 that faces the electrode along the thickness direction of the substrate 100 or a region where the orthographic projection of the electrode on the substrate 100 is located. Also, the transition region 102 and the non-electrode region 103 refer to regions in the substrate 100 that do not face the electrode or regions where the orthographic projection of the region other than the electrode on the substrate 100 is located, and the transition region 102 is located between the electrode region 101 and the non-electrode region 103. In actual applications, the area of the orthographic projection of the electrode region 101 on the substrate 100 may be equal to or larger than the area of the orthographic projection of the electrode on the substrate 100, which contributes to ensuring that the region where the electrode contacts the substrate 100 is entirely the electrode region 101.

[0041] It should be noted that all the above-mentioned electrodes are electrodes facing the first surface 110 of the substrate 100 described later. The definitions of the above-mentioned electrode region 101 and non-electrode region 103 are for the case of a non-IBC cell described later. For two electrodes with different polarities of the solar cell, they are located on two opposite side surfaces of the substrate 100 respectively, and the above-mentioned electrode is the electrode located on the first surface 110. When the solar cell is an IBC cell or when two conductive electrodes with different polarities are located on the same side of the substrate 100, one electrode region 101 refers to a region facing either of the two types of electrodes with different polarities.

[0042] Hereinafter, embodiments of the present application will be described in more detail with reference to the drawings.

[0043] In some embodiments, as shown in FIGS. 3 and 4, the prism structure 122 includes a first prism structure 132 and a second prism structure 142. Along the inclination direction of the prism structure 122, the first length L1 of the first prism structure 132 is greater than the second length L2 of the second prism structure 142, and at least a part of the second prism structure 142 is located on the side surface away from the electrode region 101 of the first prism structure 132. This contributes to further increasing the probability that the incident light incident on the transition region 102 is absorbed by the transition region 102 or the non-electrode region 103.

[0044] As shown in FIG. 4, the first length L1 of the first prism structure 132 is defined as the inclined length of the shortest first prism structure 132 among the plurality of first prism structures 132, and the second length L2 of the second prism structure 142 can be defined as the inclined length of the longest second prism structure 142 among the plurality of second prism structures 142. Based on this, the fact that the first length L1 of the first prism structure 132 is greater than the second length L2 of the second prism structure 142 means that the inclined length of the shortest first prism structure 132 among the plurality of first prism structures 132 is greater than the inclined length of the longest second prism structure 142 among the plurality of second prism structures 142.

[0045] In actual applications, the first length L1 of the first prism structure 132 can be defined as the average value of the inclined lengths of the plurality of first prism structures 132, and the second length L2 of the second prism structure 142 can be defined as the average value of the inclined lengths of the plurality of second prism structures 142. Based on this, the fact that the first length L1 of the first prism structure 132 is greater than the second length L2 of the second prism structure 142 means that the average value of the inclined lengths of the plurality of first prism structures 132 is greater than the average value of the inclined lengths of the plurality of second prism structures 142.

[0046] In addition, in FIG. 3, the boundary line between the first prism structure 132 and the second prism structure 142 is drawn with a thicker and denser dotted line. The prism structure 122 with an inclined length greater than this dotted line is the first prism structure 132, and the prism structure 122 with an inclined length smaller than this dotted line is the second prism structure 142. Note that the definition of the boundary line can be adjusted according to the actual situation.

[0047] In some embodiments, along the inclined direction of the prism structure 122, the first length L1 of the first prism structure 132 may be 1 μm to 9 μm, and the second length L2 of the second prism structure 142 may be 200 nm to 5 μm.

[0048] In some embodiments, as shown in FIG. 3, the arrangement of the second prism structure 142 on the side away from the electrode region 101 of the first prism structure 132 includes the following two situations. In some situations, one second prism structure 142 is located on the side away from the electrode region 101 of the first prism structure 132. In some other situations, a plurality of second prism structures 142 are located on the side surface away from the electrode region 101 of the same first prism structure 132, and each second prism structure 142 is in contact with and connected to the side surface.

[0049] In some other embodiments, as shown in FIG. 3, a plurality of second prism structures 142 are sequentially arranged along the direction away from the side surface of the first prism structure 132. For example, among the plurality of second prism structures 142, only the second prism structure 142 closest to the side surface of the first prism structure 132 is in contact with and connected to the side surface of the first prism structure 132.

[0050] Note that the plurality of prism structures 122 included in the same transition region 102 are at least one of the prism structures 122 in the above two embodiments. That is, the plurality of prism structures 122 included in the same transition region 102 may each have the characteristics of the prism structure 122 in the above two embodiments, or may have the characteristics of the prism structure 122 in any of the above embodiments.

[0051] In some embodiments, as shown in FIGS. 3 and 4, the first surface structure 112 further includes a first pyramid structure 152, and at least a part of the first pyramid structure 152 is located in a part of the transition region 102 close to the non-electrode region 103. In other words, in a part of the transition region 102 close to the non-electrode region 103, there are more typical first pyramid structures 152.

[0052] In some embodiments, as shown in FIGS. 3 and 4, at least a part of the prism structure 122 is located in a part of the transition region 102 close to the electrode region 101. For example, the prism structure 122 is located between the first pyramid structure 152 and the electrode region 101.

[0053] In some embodiments, as shown in FIGS. 3 and 4, the first surface structure 112 may further include a plurality of fine protrusion structures 162, and the fine protrusion structures 162 include at least one of a second pyramid structure 172 or a triangular plate-like structure 182, where the one-dimensional dimension L3 of the bottom of the fine protrusion structure 162 is smaller than the one-dimensional dimension L4 of the bottom of the first pyramid structure 152.

[0054] Note that in FIG. 3, an example is given where the fine protrusion structure 162 includes both the second pyramid structure 172 and the triangular plate-like structure 182. However, in actual applications, for the first surface structure 112 in the same transition region 102, the fine protrusion structure 162 may include only one of the second pyramid structure 172 or the triangular plate-like structure 182. In addition to being one of the second pyramid structure 172 or the triangular plate-like structure 182, the fine protrusion structure 162 may also be an irregular particle-like structure.

[0055] As shown in FIGS. 4 to 6, the one-dimensional dimension L3 of the bottom of the fine protrusion structure 162 is smaller than the one-dimensional dimension L4 of the bottom of the first pyramid structure 152. Here, FIG. 5 is a top view structure of the bottom of the fine protrusion structure 162 provided in an embodiment of the present application, and FIG. 6 is a top view structure of the bottom of the fine protrusion structure 162 provided in an embodiment of the present application. In addition, in order to clearly show the features of the first prism structure 132, the second prism structure 142, the first pyramid structure 152, the second pyramid structure 172, and the triangular plate-like structure 182, the first prism structure 132, the second prism structure 142, the first pyramid structure 152, the second pyramid structure 172, and the triangular plate-like structure 182 in FIG. 4 all adopt the perspective drawing method.

[0056] In addition, as shown in FIG. 5, the one-dimensional dimension L3 of the bottom of the fine protrusion structure 162 includes any one of the length, width, or diagonal length of the orthographic projection pattern of the bottom of the fine protrusion structure 162 on the substrate 100. In FIG. 5, an example is given that the orthographic projection pattern of the bottom of the fine protrusion structure 162 on the substrate 100 is a regular quadrilateral. In this case, the one-dimensional dimension L3 of the bottom of the fine protrusion structure 162 is any one of the length, width, or diagonal length of the regular quadrilateral.

[0057] In actual applications, the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 may be an irregular polygon. In this case, the length, width or diagonal length of the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 is not absolute, but is the one-dimensional dimension L3 artificially defined to represent the bottom of the micro-protrusion structure 162. For example, as shown in FIG. 6, the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 is an irregular quadrilateral. In this case, the length L31 of the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 can be defined as the length of the longest side of the irregular quadrilateral, and the width L32 of the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 can be defined as the length of the shortest side of the irregular quadrilateral. The diagonal length L33 of the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 can be defined as the length of the longest diagonal of the irregular quadrilateral. However, the above is an exemplary description, and it can be understood that it can be flexibly defined according to actual needs specifically.

[0058] In addition to an irregular quadrilateral, the orthographic projection pattern of the bottom of the micro-protrusion structure 162 on the substrate 100 may also be other irregular polygons, circular or irregular shapes similar to a circle. In this case, the one-dimensional dimension L3 of the bottom of the micro-protrusion structure 162 is obtained by selecting a plurality of regions with different specific areas in the bottom of the micro-protrusion structure 162, where the regions with specific areas are flexibly defined according to actual needs, and then the average value of the length, width, diagonal or diameter of the regions with different specific areas can be calculated.

[0059] As shown in FIG. 4, the orthographic projection pattern of the bottom of the first pyramid structure 152 onto the substrate 100 is generally a regular quadrilateral. In this case, the one-dimensional dimension L4 of the bottom of the first pyramid structure 152 is either the length, width, or diagonal length of the regular quadrilateral. In actual applications, the orthographic projection pattern of the bottom of the first pyramid structure 152 onto the substrate 100 may be an irregular quadrilateral. At this time, since it is similar to the definition of the one-dimensional dimension L3 when the orthographic projection pattern of the bottom of the fine protrusion structure 162 onto the substrate 100 is an irregular quadrilateral, there is no need to repeat the explanation here.

[0060] Also, the one-dimensional dimensions L4 of the bottoms of different first pyramid structures 152 may be different or the same, but the one-dimensional dimension L4 of the bottom of the first pyramid structure 152 is within a certain numerical range. The one-dimensional dimensions L3 of the bottoms of different fine protrusion structures 162 may be different or the same, but the one-dimensional dimension L3 of the bottom of the fine protrusion structure 162 is also within a certain numerical range. The fact that the one-dimensional dimension L3 of the bottom of the fine protrusion structure 162 is smaller than the one-dimensional dimension L4 of the bottom of the first pyramid structure 152 means that the average value of the one-dimensional dimensions L3 of the bottoms of the plurality of fine protrusion structures 162 in the transition region 102 is smaller than the average value of the one-dimensional dimensions L4 of the bottoms of the plurality of first pyramid structures 152 in the transition region 102.

[0061] Hereinafter, the specific features of the second pyramid structure 172 will be described in detail.

[0062] In some embodiments, as shown in FIG. 7, FIG. 7 is an example of an arrangement of the second pyramid structure 172 and the first pyramid structure 152 provided in an embodiment of the present application, and the bottom of the second pyramid structure 172 is in contact with and connected to the bottom of the first pyramid structure 152. In some cases, a plurality of second pyramid structures 172 can be surrounded around the bottom of the same first pyramid structure 152, and the bottoms of each of the second pyramid structures 172 are all in contact with and connected to the bottom of this first pyramid structure 152.

[0063] In some other embodiments, as shown in FIG. 8, FIG. 8 is another arrangement example of the second pyramid structure 172 and the first pyramid structure 152 provided in an embodiment of the present application. At least one second pyramid structure 172 is located at the interval between two adjacent first pyramid structures 152. In other words, the bottom of the second pyramid structure 172 is not in contact with and connected to the bottom of the first pyramid structure 152.

[0064] It should be noted that the second pyramid structure 172 included in the same transition region 102 is at least one of the second pyramid structures 172 in the two types of embodiments described above. That is, the plurality of second pyramid structures 172 included in the same transition region 102 may each have the characteristics of the second pyramid structure 172 in the two types of embodiments described above, or may have the characteristics of the second pyramid structure 172 in any one of the above-described embodiments.

[0065] Hereinafter, the specific characteristics of the triangular plate-like structure 182 will be described in detail.

[0066] In some embodiments, as shown in FIG. 3, the triangular plate-like structure 182 is located on the side surface of the first pyramid structure 152. The situation where the triangular plate-like structures 182 are arranged on the side surface of the first pyramid structure 152 includes the case where one triangular plate-like structure 182 is located on the side surface of the first pyramid structure 152, and the case where a plurality of triangular plate-like structures 182 are attached to the same side surface of one first pyramid structure 152, and each triangular plate-like structure 182 is in contact with and connected to this side surface.

[0067] In some other embodiments, as shown in FIG. 3, a plurality of triangular plate-like structures 182 are sequentially arranged along the direction away from the side surface of the first pyramid structure 152. For example, among the plurality of triangular plate-like structures 182, only the triangular plate-like structure 182 closest to the side surface of the first pyramid structure 152 is in contact with and connected to the side surface of the first pyramid structure 152.

[0068] Note that the triangular plate-like structure 182 included in the same transition region 102 is at least one of the triangular plate-like structures 182 in the two types of embodiments described above. That is, the plurality of triangular plate-like structures 182 included in the same transition region 102 may each have the characteristics of the triangular plate-like structure 182 in the two types of embodiments described above, or may have the characteristics of the triangular plate-like structure 182 in any one of the above-described embodiments.

[0069] In some embodiments, as shown in FIG. 9, FIG. 9 is a diagram showing another local cross-sectional structure of a solar cell provided in an embodiment of the present application. The solar cell may further include a second dielectric layer 114 covering the second surface 120 and a second doped conductive layer 115 covering the surface of the second dielectric layer 114 on the side away from the substrate 100. The type of doping element in the first doped conductive layer 105 is different from the type of doping element in the second doped conductive layer 115.

[0070] Thereby, both the front surface and the back surface of the substrate 100 can be used to receive incident light or reflected light. The first dielectric layer 104 and the first doped conductive layer 105 located on the first surface 110 are used to form a passivation contact structure on the first surface 110. The second dielectric layer 114 and the second doped conductive layer 115 located on the second surface 120 are used to form a passivation contact structure on the second surface 120. A passivation contact structure is provided on both the first surface 110 and the second surface 120 so that the solar cell forms a double-sided TOPCON cell. Thereby, the passivation contact structures located on the first surface 110 and the second surface 120 each play a role of reducing carrier recombination with respect to the first surface 110 and the second surface 120. Compared with forming a passivation contact structure on only one surface of the substrate 100, the carrier loss of the solar cell is significantly reduced, and the open-circuit voltage and short-circuit current of the solar cell are improved.

[0071] Here, by forming a passivation contact structure, the recombination of carriers on the surface of the substrate 100 can be reduced, the open-circuit voltage of the solar cell can be increased, and the photoelectric conversion efficiency of the solar cell can be improved.

[0072] Note that in order to show the approximate positions of the film layers such as the electrode region 101, the transition region 102, the non-electrode region 103, the first dielectric layer 104, and the first doped conductive layer 105 in the double-sided TOPCon cell, in FIG. 9, the surface morphologies of the substrate 100, the first dielectric layer 104, and the first doped conductive layer 105 are not shown.

[0073] In some cases, the first doped conductive layer 105 and the second doped conductive layer 115 play a field passivation role and cause minority carriers to escape from the interface, thereby reducing the minority carrier concentration and lowering the carrier recombination rate at the interface of the substrate 100, thereby increasing the open-circuit voltage, short-circuit current, and backside factor of the solar cell and improving the photoelectric conversion performance of the solar cell.

[0074] In some embodiments, the materials of the first doped conductive layer 105 and the second doped conductive layer 115 include at least one of silicon carbide, amorphous silicon, microcrystalline silicon, or polycrystalline silicon.

[0075] In some cases, the first dielectric layer 104 and the second dielectric layer 114 are used to achieve interface passivation on the surface of the substrate 100 and play a chemical passivation effect. Specifically, by saturating the dangling bonds on the surface of the substrate 100, the density of interface defect levels on the surface of the substrate 100 is reduced, and the recombination centers on the surface of the substrate 100 are decreased.

[0076] In some embodiments, the materials of the first dielectric layer 104 and the second dielectric layer 114 may be dielectric materials. For example, they may be any of silicon oxide, magnesium fluoride, amorphous silicon, polysilicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide, or titanium oxide.

[0077] In some embodiments, the substrate 100 includes a doping element, and the type of the doping element is N-type or P-type. The N-type element may be a Group V element such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As), and the P-type element may be a Group III element such as boron (B), aluminum (Al), gallium (Ga), or indium (In). For example, when the substrate 100 is a P-type substrate 100, the type of the doping element therein is P-type, or when the substrate 100 is an N-type substrate 100, the type of the doping element therein is N-type.

[0078] In some embodiments, when the substrate 100 is an N-type substrate 100, the types of the doping elements in the first doping conductive layer 105 and the second doping conductive layer 115 include a case where the type of the doping element in the first doping conductive layer 105 is N-type and the type of the doping element in the second doping conductive layer 115 is P-type, and a case where the type of the doping element in the first doping conductive layer 105 is P-type and the type of the doping element in the second doping conductive layer 115 is N-type.

[0079] In some embodiments, when the substrate 100 is a P-type substrate 100, the types of the doping elements in the first doping conductive layer 105 and the second doping conductive layer 115 also include a case where the type of the doping element in the first doping conductive layer 105 is N-type and the type of the doping element in the second doping conductive layer 115 is P-type, and a case where the type of the doping element in the first doping conductive layer 105 is P-type and the type of the doping element in the second doping conductive layer 115 is N-type.

[0080] In some embodiments, as shown in FIGS. 1 and 3, the first surface 110 of the double-sided TOPCon cell is the front surface of the substrate 100, and the second surface 120 is the back surface of the substrate 100. The passivation contact structure located on the front surface is installed only in the electrode region 101, and the passivation contact structure located on the back surface is installed over the entire surface. In the above-described embodiments, when the type of the doping element in the second doping conductive layer 115 is different from the type of the doping element in the substrate 100, it corresponds to the provision of a PN junction on the back surface of the substrate 100, and carrier recombination problems are likely to occur on the back surface of the substrate 100. Thus, in order to cope with the installation of different passivation contact structures on the front surface and the back surface of the substrate 100, the thickness of the first dielectric layer 104 can be set to be different from the thickness of the second dielectric layer 114. For example, the thickness of the first dielectric layer 104 may be thinner than the thickness of the second dielectric layer 114. Thereby, the chemical passivation effect of the second dielectric layer 114 on the back surface of the substrate 100 is enhanced, the dangling bonds on the back surface of the substrate 100 are further saturated, the density of interface defect levels on the back surface of the substrate 100 is reduced, and thus the problem that carrier recombination is likely to occur on the back surface of the substrate 100 is improved, contributing to increasing the backside factor, the short-circuit current, and the open-circuit voltage.

[0081] Also, the type of the doping element in the first doping conductive layer 105 is the same as the type of the doping element in the substrate 100. Thereby, when the front electrode formed later in the electrode region 101 is in electrical contact with the first doping conductive layer 105 on the front surface of the substrate 100, it contributes to reducing the metal contact recombination between the first doping conductive layer 105 and the front electrode, lowering the contact recombination of carriers, and reducing the current transmission loss.

[0082] In some embodiments, as shown in FIGS. 1 and 3, the surface of the first doping conductive layer 105 located in the electrode region 101 has a second surface structure 125, and the second surface structure 125 includes a plurality of third pyramid structures 135.

[0083] Note that, since the thickness of the first dielectric layer 104 is sufficiently smaller than the thickness of the first doped conductive layer 105, FIG. 3 only shows that the first doped conductive layer 105 is located in the electrode region 101, and does not show the first dielectric layer 104 between the electrode region 101 and the first doped conductive layer 105. Also, both the first dielectric layer 104 located below the first doped conductive layer 105 and the electrode region 101 have the same or nearly the same surface morphology as the first doped conductive layer 105.

[0084] In some cases, as shown in FIG. 3, the second surface structure 125 mainly includes the third pyramid structure 135, further includes other protrusion structures 145, and a plurality of third pyramid structures 135 are alternately arranged. In actual applications, the arrangement method of the plurality of third pyramid structures 135 is not limited.

[0085] In some embodiments, as shown in FIG. 3, the non-electrode region 103 includes the third surface structure 113, and the third surface structure 113 includes a plurality of fourth pyramid structures 123. In actual applications, the arrangement method of the plurality of fourth pyramid structures 123 is not limited.

[0086] In some embodiments, the one-dimensional dimension L4 of the bottom of the first pyramid structure 152 is larger than the one-dimensional dimension of the bottom of the third pyramid structure 135, and the one-dimensional dimension of the bottom of the third pyramid structure 135 is larger than the one-dimensional dimension of the bottom of the fourth pyramid structure 123.

[0087] Note that, since the one-dimensional dimension of the bottom of the third pyramid structure 135 and the one-dimensional dimension of the bottom of the fourth pyramid structure 123 are both similar to the definition of the one-dimensional dimension L4 of the bottom of the first pyramid structure 152 in an embodiment of the present application, the description is omitted here.

[0088] Also, the one-dimensional dimensions of the bottoms of the different third pyramid structures 135 may be different or the same, but the one-dimensional dimensions of the bottoms of the third pyramid structures 135 are within a certain numerical range. The one-dimensional dimensions of the bottoms of the different fourth pyramid structures 123 may be different or the same, but the one-dimensional dimensions of the bottoms of the fourth pyramid structures 123 are also within a certain numerical range. Based on this, the fact that the one-dimensional dimension L2 of the bottom of the first pyramid structure 152 is larger than the one-dimensional dimension of the bottom of the third pyramid structure 135 means that the average value of the one-dimensional dimensions L4 of the bottoms of the plurality of first pyramid structures 152 in the transition region 102 is larger than the average value of the one-dimensional dimensions of the bottoms of the plurality of third pyramid structures 135 in the first doping conductive layer 105. The fact that the one-dimensional dimension of the bottom of the third pyramid structure 135 is larger than the one-dimensional dimension of the bottom of the fourth pyramid structure 123 means that the average value of the one-dimensional dimensions of the bottoms of the plurality of third pyramid structures 135 in the first doping conductive layer 105 is larger than the average value of the one-dimensional dimensions of the bottoms of the plurality of fourth pyramid structures 123 in the non-electrode region 103.

[0089] Furthermore, in one embodiment of the present application, the magnitude relationship between the one-dimensional dimension of the bottom of the second pyramid structure 172 and the one-dimensional dimension of the bottom of the third pyramid structure 135 is not limited, and the magnitude relationship between the one-dimensional dimension of the bottom of the second pyramid structure 172 and the one-dimensional dimension of the bottom of the fourth pyramid structure 123 is also not limited.

[0090] In some embodiments, as shown in FIG. 9, the solar cell may further include a front electrode 106, and the front electrode 106 is electrically connected to the first doping conductive layer 105. The PN junction formed on the back surface of the substrate 100 is used to receive incident light and generate photo-generated carriers. The generated photo-generated carriers are transported from the substrate 100 to the first doping conductive layer 105, and then to the front electrode 106. The front electrode 106 is used to collect photo-generated carriers.

[0091] In some embodiments, since the type of the doping element of the first doped conductive layer 105 is the same as the type of the doping element of the substrate 100, the metal contact recombination loss between the front electrode 106 and the first doped conductive layer 105 can be reduced, thereby reducing the carrier contact recombination between the front electrode 106 and the first doped conductive layer 105, and increasing the short - circuit current and the photovoltaic conversion performance of the solar cell.

[0092] In some embodiments, as shown in FIG. 9, the solar cell may further include a back electrode 116, the back electrode 116 is located on the back surface of the substrate 100, and the back electrode 116 is in electrical contact with the second doped conductive layer 115.

[0093] In some embodiments, as shown in FIG. 9, the solar cell may further include a first passivation layer 107, the first passivation layer 107 covers the surfaces of the transition region 102 and the non - electrode region 103, and covers the surfaces of the first dielectric layer 104 and the first doped conductive layer 105 which are stacked. The front electrode 106 penetrates through the first passivation layer 107 and is in electrical contact with the first doped conductive layer 105.

[0094] In some embodiments, as shown in FIG. 9, the solar cell may further include a second passivation layer 117, the second passivation layer 117 covers the surface of the second doped conductive layer 115 away from the second dielectric layer 114. The back electrode 116 penetrates through the second passivation layer 117 and is electrically connected to the second doped conductive layer 115.

[0095] In some embodiments, the surface of the first doped conductive layer 105 is provided with a second surface structure 125, so that the contact area between the front electrode 106 and the front surface of the substrate 100 becomes large, which contributes to reducing the contact resistance between the front electrode 106 and the front surface of the substrate 100. In other words, in order to keep the contact resistance between the front electrode 106 and the front surface of the substrate 100 constant, the width of the front electrode 106 can be made small, reducing the shielding of the incident light by the front electrode 106 and increasing the absorption ability of the substrate 100 to the incident light.

[0096] In some embodiments, both the first passivation layer 107 and the second passivation layer 117 may each be a single-layer structure or a laminated structure, and the material of the first passivation layer 107 and the material of the second passivation layer 117 may each be at least one of materials such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbon oxynitride, titanium oxide, hafnium oxide, or aluminum oxide.

[0097] Hereinafter, taking the configuration of an HJT cell in a solar cell as an example, a detailed description will be given.

[0098] In some embodiments, as shown in FIG. 10, the solar cell further includes an intrinsic semiconductor layer 214 covering the second surface 220, a second doped conductive layer 215 covering the surface of the intrinsic semiconductor layer 214 on the side away from the substrate 200, and a transparent conductive layer 207 covering the surface of the second doped conductive layer 215 on the side away from the intrinsic semiconductor layer 214, and the type of doping element in the first doped conductive layer 205 is different from the type of doping element in the second doped conductive layer 215.

[0099] Note that the substrate 200, the first surface 210, the second surface 220, the electrode region 201, the transition region 202, the non-electrode region 203, the first dielectric layer 204, the first doped conductive layer 205, and the front electrode 206 in FIG. 10 are all similar to the corresponding configurations in the above-described embodiments, so the description thereof will be omitted here. Further, since the surface morphologies of the first surface 210, the second surface 220, the first dielectric layer 204, and the first doped conductive layer 205 are also similar to the corresponding surface morphologies in the above-described embodiments, the description thereof will be omitted here.

[0100] Also, in order to show the approximate positions of the film layers such as the electrode region 201, the transition region 202, the non-electrode region 203, the first dielectric layer 204, and the first doped conductive layer 205 in the HJT cell, FIG. 10 does not show the characteristics of the surface morphologies of the substrate 200, the first dielectric layer 204, and the first doped conductive layer 205.

[0101] In some embodiments, the interface where the intrinsic semiconductor layer 214 contacts the substrate 200 can enhance the open-circuit voltage of the solar cell while enhancing the better passivation effect on the substrate 200, thus contributing to enhancing the photoelectric conversion efficiency of the solar cell.

[0102] In some embodiments, the material of the intrinsic semiconductor layer 214 includes intrinsic amorphous silicon, silicon oxide, silicon nitride, or silicon carbide. In some embodiments, the thickness of the intrinsic semiconductor layer is 2 μm to 10 μm. For example, the thickness of the intrinsic semiconductor layer is 5 μm.

[0103] In some embodiments, the material of the second doped conductive layer 215 includes a composite thin film layer in which one or more of N-type doped or P-type doped amorphous silicon, amorphous silicon oxide, amorphous silicon carbide, microcrystalline silicon, hydrogenated microcrystalline silicon, microcrystalline silicon oxide, microcrystalline silicon carbide, or polycrystalline silicon semiconductor thin films are laminated.

[0104] In some embodiments, the thickness of the second doped conductive layer 215 is 4 nm to 500 nm. Further, the thickness range of the second doped conductive layer 215 is 200 nm to 400 nm. For example, the thickness of the second doped conductive layer 215 may be 20 nm to 103 nm, 103 nm to 139 nm, 139 nm to 161 nm, 161 nm to 218 nm, 218 nm to 298 nm, or 298 nm to 500 nm.

[0105] In some embodiments, the second doped conductive layer 215 includes hydrogenated microcrystalline silicon, which contributes to giving the second doped conductive layer 215 a larger bandgap and a narrower absorption spectrum range, so that the photoelectric conversion efficiency of the solar cell can be effectively enhanced. Further, as the crystallization rate improves, the series resistance decreases and the back-bias factor increases, so that the output current of the battery can be improved and the effect of effectively extending the life of the battery can be achieved.

[0106] In some embodiments, the material of the transparent conductive layer 207 may include at least one of tin-doped indium oxide (ITO), aluminum-doped zinc oxide (AZO), cerium-doped indium oxide, and tungsten-doped indium oxide.

[0107] In some embodiments, a PN junction is formed between the second doped conductive layer 215 and the substrate 200. An intrinsic semiconductor layer 214 is inserted as a buffer layer between the PN junctions, and the intrinsic semiconductor layer 214 has a good passivation effect on the surface of the substrate 200, can greatly prevent carrier recombination, and contributes to the improvement of minority carrier lifetime and the open-circuit voltage of the solar cell.

[0108] In some embodiments, as shown in FIG. 10, the solar cell may further include a back electrode 216, and the back electrode 216 is in electrical contact with the transparent conductive layer 207.

[0109] In some cases, the transparent conductive layer 207 has conductivity, and carriers can sequentially pass through the intrinsic semiconductor layer 214, the second doped conductive layer 215, and the transparent conductive layer 207, and finally be collected by the back electrode 216.

[0110] Hereinafter, taking the formation of an IBC cell in a solar cell as an example, a detailed description will be given.

[0111] In some embodiments, as shown in FIG. 11, FIG. 11 is a diagram showing another local cross-sectional structure of a solar cell provided in an embodiment of the present application. The electrode region 301 is a positive electrode region 311 or a negative electrode region 321. The first dielectric layer 304 includes a first sub-dielectric layer 314 located in the positive electrode region 311 and a second sub-dielectric layer 324 located in the negative electrode region 321. The first doped conductive layer 305 includes a first sub-doped conductive layer 315 located on the side of the first sub-dielectric layer 314 close to the positive electrode region 311 and a second sub-doped conductive layer 325 located on the side of the second sub-dielectric layer 324 close to the negative electrode region 321. The type of doping element in the first sub-doped conductive layer 315 is different from the type of doping element in the second sub-doped conductive layer 325.

[0112] It should be noted that the substrate 300, the first surface 310, the second surface 320, the transition region 302, and the non-electrode region 303 in FIG. 11 are all similar to the corresponding structures in the above-described embodiments, so the description is omitted here. However, the surface morphology of the first surface 310 is different from that of the above-described embodiments.

[0113] In addition, in order to show the approximate positions of the film layers such as the electrode region 301, the transition region 302, the non-electrode region 303, the first dielectric layer 304, and the first doped conductive layer 305 in the IBC cell, FIG. 11 does not show the characteristics of the surface morphology of the substrate 300, the first dielectric layer 304, and the first doped conductive layer 305.

[0114] In some embodiments, the first surface 310 in the IBC cell is the back surface of the substrate 300, and the second surface 320 is the front surface of the substrate 300.

[0115] In some embodiments, the substrate 300 also has a doping element. The type of doping element in the first sub-doped conductive layer 315 is different from the type of doping element in the substrate 300, and the type of doping element in the second sub-doped conductive layer 325 is the same as the type of doping element in the substrate 300.

[0116] In some embodiments, as shown in FIG. 12, FIG. 12 is a diagram showing a local cross-sectional structure of a substrate 300 in a solar cell provided in an embodiment of the present application. An electrode region 301 includes a fourth surface structure 331, the fourth surface structure 331 includes a plurality of platform ridge structures 341, a non-electrode region 303 includes a fifth surface structure 313, and the fifth surface structure 313 includes a plurality of fifth pyramid structures 323. Here, a one-dimensional dimension L4 (see FIG. 4) at the bottom of the first pyramid structure 152 (see FIG. 4) is larger than the one-dimensional dimension at the bottom of the fifth pyramid structure 323.

[0117] Note that the surface morphology of the transition region 302 in the IBC cell shown in FIGS. 11 and 12 is also similar to the corresponding surface morphology in the above-described embodiments, so the description is omitted here. Also, FIGS. 11 and 12 do not show the surface morphology of the transition region 302. Therefore, the one-dimensional dimension L4 at the bottom of the first pyramid structure 152 (see FIG. 4) here adopts the notation of the above-described embodiments.

[0118] Also, since the one-dimensional dimension at the bottom of the fifth pyramid structure 323 is similar to the definition of the one-dimensional dimension L4 at the bottom of the first pyramid structure 152 in an embodiment of the present application, the description is omitted here. Also, the one-dimensional dimensions at the bottoms of different fifth pyramid structures 323 may be different or the same, but the one-dimensional dimension at the bottom of the fifth pyramid structure 323 is within a certain numerical range. Based on this, the fact that the one-dimensional dimension L4 at the bottom of the first pyramid structure 152 is larger than the one-dimensional dimension at the bottom of the fifth pyramid structure 323 means that the average value of the one-dimensional dimensions at the bottoms of the plurality of first pyramid structures in the transition region 302 is larger than the average value of the one-dimensional dimensions at the bottoms of the plurality of fifth pyramid structures 323 in the non-electrode region 303.

[0119] In some embodiments, the platform elevation structure 341 is a structure remaining after removing the base portion of the pyramid structure, i.e., the tip portion of the pyramid structure. In other words, compared with the complete pyramid structure, the surface morphology of the electrode region 301 is relatively flat, and the first dielectric layer 304 and the first doped conductive layer 305 formed on the electrode region 301 also have a flat form, which can enhance the uniformity of the formed first dielectric layer 304 and the first doped conductive layer 305, improve the passivation effect of the first dielectric layer 304 and the first doped conductive layer 305 on the electrode region 301, and contribute to further reducing the defect level density of the electrode region 301.

[0120] In the various embodiments described above, as shown in FIG. 2, the electrode region 101 has a first upper surface, the non-electrode region 103 has a second upper surface, and with reference to the second surface 120 (see FIG. 1), the first upper surface is higher than the second upper surface, and the height difference H between the first upper surface and the second upper surface is 0.5 μm to 10 μm.

[0121] Note that the first upper surface of the electrode region 101 is composed of the tip portions of a plurality of third pyramid structures 135 (see FIG. 3). Based on the fact that the dimensions of different third pyramid structures 135 are different, the first upper surface here is a plane composed of the tip portions of most of the third pyramid structures 135 in the electrode region 101, and the proportion of most of the third pyramid structures 135 occupying the electrode region 101 here can be flexibly selected according to the actual situation. Similarly, the second upper surface of the non-electrode region 103 is composed of the tip portions of a plurality of fourth pyramid structures 123 (see FIG. 3).

[0122] In some cases, the height difference H between the first upper surface and the second upper surface is 3 μm to 4 μm. For example, H may be 3.5 μm.

[0123] In some embodiments, FIG. 13 is a scanning electron micrograph of the first doped conductive layer in the solar cell provided in one embodiment of the present application, and FIG. 14 is a scanning electron micrograph of the second doped conductive layer in the solar cell provided in one embodiment of the present application. As shown in FIGS. 13 and 9, in a double-sided TOPCon cell, when the type of the doping element in the first doped conductive layer 105 is N-type and the type of the doping element in the second doped conductive layer 115 is P-type, the first doped conductive layer 105 includes a plurality of first silicon crystal particles 1121, and the surfaces of the plurality of first silicon crystal particles 1121 have a first roughness.

[0124] In some cases, the material of the first doped conductive layer 105 is doped polycrystalline silicon. In the process of forming the first doped conductive layer 105, silicon atoms are arranged in the form of a diamond lattice in a large number of crystal nuclei, and these crystal nuclei grow into crystal grains with different crystal plane orientations and combine these crystal grains to crystallize into polycrystalline silicon. Here, the first silicon crystal particles refer to crystal particles with different crystal plane orientations that make up polycrystalline silicon.

[0125] From the scanning electron micrograph of FIG. 13, the surface morphology of the first doped conductive layer 105 can be intuitively observed. The first doped conductive layer 105 is composed of a plurality of first silicon crystal particles 1121, and the unevenness of the plurality of first silicon crystal particles 1121 constructs the uneven surface of the first doped conductive layer 105, so that the surface of the first doped conductive layer 105 has a first roughness.

[0126] In some embodiments, the crystal grain size of the first silicon crystal particles 1121 ranges from 10 nm to 300 nm. The crystal grain size of the first silicon crystal particles 1121 may be 10 nm to 53 nm, 53 nm to 95.3 nm, 95.3 nm to 138.2 nm, 138.2 nm to 200.6 nm, 200.6 nm to 248 nm, or 248 nm to 300 nm. The crystal grain size of the first silicon crystal particles 1121 is within any of the above ranges such that the roughness of the surface composed of the first silicon crystal particles 1121 increases. When the crystal grain size of the first silicon crystal particles 1121 is within any of the above ranges, the stability between adjacent first silicon crystal particles 1121 is good, and crystalline deformation is less likely to occur in the first doping conductive layer 105. Further, the crystal grain size of the first silicon crystal particles 1121 is within the above-described range, the stress of the first doping conductive layer 105 on the first dielectric layer 104 is small, and the film layer performance between the first doping conductive layer 105 and the first dielectric layer 104 can be improved.

[0127] In some embodiments, the shape of the first silicon crystal particles 1121 includes a particulate shape. Compared with a massive structure, there are fewer grain boundaries between particulate shapes, the space between grain boundaries is large, and the N-type doping elements in the first doping conductive layer 105 can move through the space between grain boundaries and can ultimately be collected by the front electrode 106.

[0128] In some embodiments, the particulate shape includes a spherical particulate shape or a quasi-spherical particulate shape.

[0129] In some embodiments, the thickness of the first dielectric layer 104 is 0.5 nm to 5 nm. The thickness range of the first dielectric layer 104 is 0.5 nm to 1.3 nm, 1.3 nm to 2.6 nm, 2.6 nm to 4.1 nm, or 4.1 nm to 5 nm. When the first dielectric layer 104 is within any of the above ranges, the thickness of the first dielectric layer 104 is thin, and a large number of carriers can easily perform quantum tunneling through the first dielectric layer 104, but a small number of carriers are less likely to pass through the first dielectric layer 104, thereby realizing selective transport of carriers.

[0130] In some embodiments, the thickness of the first doped conductive layer 105 is 10 nm to 300 nm. For example, the thickness of the first doped conductive layer 105 may be 10 nm to 60 nm, 60 nm to 130 nm, 130 nm to 250 nm, or 250 nm to 300 nm.

[0131] As shown in FIGS. 9 and 14, the second doped conductive layer 115 is doped with a P-type doping element. Here, the surface of the second doped conductive layer 115 away from the second dielectric layer 114 has a second roughness, and the second roughness is smaller than the first roughness.

[0132] In some embodiments, the second doped conductive layer 115 includes a plurality of second silicon particles 1221, and the surfaces of the plurality of second silicon particles 1221 constitute the surface of the second doped conductive layer 115 having a second roughness, and the crystal grain size of the first silicon crystal particles 1121 is smaller than the crystal grain size of the second silicon particles 1221.

[0133] In some cases, the "roughness" in "the first roughness and the second roughness" refers to setting an average horizontal line in the sampled length and taking the arithmetic mean value of the absolute value of the vertical deviation amount of the peaks and valleys in the sampled length with respect to the average horizontal line. The roughness can be measured by a comparison method, an optical cutting method, an interference method, or a probe scanning method.

[0134] In some embodiments, the range of the crystal grain size of the second silicon particles 1221 is 100 nm to 900 nm. The crystal grain size of the second silicon particles 1221 may be 100 nm to 250 nm, 250 nm to 360 nm, 360 nm to 490 nm, 490 nm to 584 nm, 584 nm to 610 nm, 610 nm to 790 nm, or 790 nm to 900 nm. When the crystal grain size of the second silicon particles 1221 is within any of the above ranges, the grain boundaries between adjacent second silicon particles 1221 are small, carriers can relatively easily pass through the second doped conductive layer 115, the movement speed of the carriers is increased, and the battery efficiency is improved.

[0135] In some embodiments, the shape of the second silicon particles 1221 may be sheet-like, plate-like, or particulate. The micro-morphology of the second silicon particles 1221 shown in FIG. 14 is sheet-like.

[0136] FIGS. 13 and 14 show the surface morphologies of the first doped conductive layer 105 (see FIG. 9) and the second doped conductive layer 115 (see FIG. 9) at the same magnification. As can be seen therefrom, the surface of the first doped conductive layer 105 is rougher than the surface of the second doped conductive layer 115, that is, the first roughness is greater than the second roughness. Thus, based on the morphological difference between the first doped conductive layer 105 and the second doped conductive layer 115, for the first doped conductive layer 105 with a higher roughness, the surface of the first doped conductive layer 105 can enhance the internal reflection of incident light and reduce the optical loss of the solar cell. In addition, the first doped conductive layer 105 can increase the contact area between the front electrode 106 and the first doped conductive layer 105, and thus improve the contact performance and soldering tensile strength of the first doped conductive layer 105. For the second doped conductive layer 115 with a low roughness, the surface of the second doped conductive layer 115 is smooth, and the uniformity of the passivation layer deposited thereon later is good, and the passivation performance of the passivation layer is good, which can improve the recombination defects of the solar cell.

[0137] Note that the shape of the first silicon crystal particles 1121 and the shape of the second silicon particles 1221 are observed by measuring means having a magnification such as an electron microscope or an optical microscope, and the electron microscope includes a scanning electron microscope (SEM) or an AFM (Atomic Force Microscope), which are common measuring means. FIG. 13 is a micro-morphology diagram of the first silicon crystal particles 1121 by a scanning electron microscope. As can be seen therefrom, the first silicon crystal particles 1121 exhibit a particulate shape with equal length in three-dimensional directions. FIG. 14 is a micro-morphology diagram of the second silicon particles 1221 by a scanning electron microscope. As can be seen therefrom, the second silicon particles 1221 exhibit a sheet-like shape extending in two-dimensional directions.

[0138] In some embodiments, as shown in FIGS. 13 and 14, the crystal grain size of the first silicon crystal particles 1121 being smaller than that of the second silicon particles 1221 means that the one-dimensional radial dimension of the first silicon crystal particles 1121 is smaller than that of the second silicon particles 1221, and the height of the first silicon crystal particles 1121 is greater than that of the second silicon particles 1221. Thereby, the roughness of the first doping conductive layer 105 composed of the first silicon crystal particles 1121 is greater than the roughness of the second doping conductive layer 115 composed of the second silicon particles 1221.

[0139] In some cases, the one-dimensional radial dimension of the first silicon crystal particles 1121 refers to the average line length (or diameter) of the first silicon crystal particles 1121, and the height of the first silicon crystal particles 1121 refers to the distance between the side of the first silicon crystal particles 1121 close to the first dielectric layer 104 and the side of the first silicon crystal particles 1121 away from the first dielectric layer 104.

[0140] Similarly, the one-dimensional radial dimension of the second silicon particles 1221 refers to the average line length (or diameter) of the second silicon particles 1221, and the height of the second silicon particles 1221 refers to the distance between the side of the second silicon particles 1221 close to the second dielectric layer 114 and the side of the second silicon particles 1221 away from the second dielectric layer 114.

[0141] In some embodiments, the thickness of the second dielectric layer 114 is 0.5 nm to 5 nm. The thickness range of the second dielectric layer 114 is 0.5 nm to 1.3 nm, 1.3 nm to 2.6 nm, 2.6 nm to 4.1 nm, or 4.1 nm to 5 nm. When the thickness of the second dielectric layer 114 is within any of the above ranges, the thickness of the second dielectric layer 114 is thin, and a large number of carriers can easily perform quantum tunneling through the second dielectric layer 114, but it becomes difficult for minority carriers to pass through the second dielectric layer 114, thereby realizing selective transport of carriers.

[0142] In some embodiments, the shape of the first silicon crystal particles 1121 is a three-dimensionally equilateral particle shape, the height of the first silicon crystal particles 1121 is equal to the average line length of the first silicon crystal particles 1121, the shape of the second silicon particles 1221 is a two-dimensionally extended sheet shape, and the height of the second silicon particles 1221 is smaller than the average line length of the second silicon particles 1221. The height of the second silicon particles 1221 is the line length in the non-extending surface direction.

[0143] Here, the size of the crystal grains is referred to as the crystal grain size. Common display methods include the number of crystal grains per unit volume (ZV), the number of crystal grains per unit area (ZS), or the average line length (or diameter) of the crystal grains. The average line length of the crystal grains refers to the line length of the extending surface in the extending direction of the crystal grains. The crystal grain size in the embodiments of the present application may be the average line length of the crystal grains.

[0144] In addition, in the HJT cell shown in FIG. 10, when the type of the doping element in the first doping conductive layer 205 is N-type and the type of the doping element in the second doping conductive layer 215 is P-type, the first doping conductive layer 205 also includes a plurality of first silicon crystal particles 1121, the surfaces of the plurality of first silicon crystal particles 1121 have a first roughness, the second doping conductive layer 115 also includes a plurality of second silicon particles 1221, and the surfaces of the plurality of second silicon particles 1221 have a second roughness. Since the relationship between the second roughness and the first roughness and the relationship between the first silicon crystal particles 1121 and the second silicon particles 1221 are similar to the corresponding features in the above-described double-sided TOPCON cell, the description is omitted here.

[0145] Similarly, in the IBC cell shown in FIG. 11, the first doping conductive layer 305 includes a first sub-doping conductive layer 315 and a second sub-doping conductive layer 325. When one of the doping elements in the first sub-doping conductive layer 315 and the second sub-doping conductive layer 325 is N-type and the other doping element is P-type, the doping conductive layer doped with the N-type doping element based on this also includes a plurality of first silicon crystal particles 1121, the surface of the plurality of first silicon crystal particles 1121 has a first roughness, and the doping conductive layer doped with the P-type doping element also includes a plurality of second silicon particles 1221, the surface of the plurality of second silicon particles 1221 has a second roughness. Since the relationship between the second roughness and the first roughness and the relationship between the first silicon crystal particles 1121 and the second silicon particles 1221 are similar to the corresponding features in the above-described double-sided TOPCON cell, the description is omitted here.

[0146] As described above, the first dielectric layer 104 and the first doped conductive layer 105 which are stacked are provided in the electrode region 101. By the passivation effect of the first dielectric layer 104 and the first doped conductive layer 105 on the electrode region 101, the serious carrier recombination problem in the electrode region 101 is improved, and then the collection efficiency of the carriers in the substrate 100 of the electrode formed in the electrode region 101 is improved. On the other hand, by forming the first dielectric layer 104 and the first doped conductive layer 105 only in the electrode region 101, it is possible to prevent the first dielectric layer 104 and the first doped conductive layer 105 from reducing the absorption of the non-electrode region 103 and the transition region 102 with respect to the incident light irradiated on the first surface 110. Further, by providing the first surface structure 112 with a plurality of prism structures 122 inclined toward the electrode region 101, the probability that the incident light incident on the transition region 102 at different angles is absorbed by the transition region 102 through the prism structure 122 by at least one reflection is increased, and the probability that the incident light is reflected to the non-electrode region 103 through the prism structure 122 by at least one reflection and absorbed by the non-electrode region 103 is increased, which contributes to increasing the absorption rate of the incident light on the first surface 110. Thereby, by improving the serious carrier recombination problem in the electrode region 101 and improving the absorption rate of the incident light on the first surface 110, the photoelectric conversion efficiency of the solar cell can be increased.

[0147] Another embodiment of the present application further provides a method for manufacturing a solar cell for manufacturing the solar cell provided in the above-described embodiment. Hereinafter, with reference to the drawings, the method for manufacturing a solar cell provided in another embodiment of the present application will be described in detail. Note that descriptions of the same or corresponding parts as those in the above-described embodiment are omitted here.

[0148] FIGS. 15 to 20 are diagrams showing local cross-sectional structures corresponding to each step in the method for manufacturing a solar cell provided in another embodiment of the present application.

[0149] As shown in FIGS. 15 to 20, the method for manufacturing a solar cell includes at least the following steps.

[0150] Step S11: As shown in FIG. 15, an initial substrate 130 is provided. The initial substrate 130 includes an initial first surface 140 and an initial second surface 150 that are oppositely disposed. The initial first surface 140 includes initial electrode regions 191 and initial non - electrode regions 193 that are alternately disposed at intervals, and an initial transition region 192 located between the initial electrode region 191 and the initial non - electrode region 193.

[0151] In some embodiments, before forming the subsequent initial first dielectric layer, a first etching process may be further performed on the initial first surface 140 to provide a first texture structure on the initial first surface 140. That is, the surfaces of the initial electrode region 191, the initial transition region 192, and the initial non - electrode region 193 all have a similar texture structure, and this texture structure may be a pyramid structure. The first etching process may include chemical etching. For example, the surface of the initial substrate 130 is cleaned with a mixed solution of potassium hydroxide and hydrogen peroxide. Specifically, an initial first surface 140 with a morphology conforming to the desired shape can be formed by controlling the concentration ratio of potassium hydroxide and hydrogen peroxide. In some other embodiments, texture formation processing may be performed by methods such as laser etching, mechanical methods, and plasma etching.

[0152] Step S12: An initial first dielectric layer covering the initial first surface 140 is formed. Step S13: An initial first doped conductive layer covering the surface of the initial first dielectric layer on the side away from the initial substrate 130 is formed. Step S14: The initial first dielectric layer and the initial first doped conductive layer located in the initial transition region 192 and the initial non - electrode region 193 are removed by a laser process to form a substrate 100 having a first surface 110.

[0153] Note that in order to form different types of batteries, steps S12 - S14 are somewhat different, and the following will explain them in detail respectively.

[0154] Here, as shown in FIGS. 15, 1 to 4, the initial electrode region 191, the initial transition region 192, and the initial non-electrode region 193 after being processed by the laser process are the electrode region 101, the transition region 102, and the non-electrode region 103, respectively. The transition region 102 includes a first surface structure 112, and the first surface structure 112 includes a plurality of prismatic structures 122 that are inclined toward the electrode region 101. The plurality of prismatic structures 122 are sequentially arranged at least along a first direction X, the first direction X is the extending direction of the transition region 102, the remaining initial first dielectric layer located in the electrode region 101 is the first dielectric layer 104, and the remaining initial first doped conductive layer located in the electrode region 101 is the first doped conductive layer 105.

[0155] Hereinafter, taking the formation of a double-sided TOPCON cell as an example, steps S12 to S14 will be described in detail.

[0156] In step S12, as shown in FIG. 16, an initial first dielectric layer 154 covering the initial first surface 140 is formed.

[0157] In some embodiments, as shown in FIG. 16, in the step of forming the initial first dielectric layer 154, it may further include forming a second dielectric layer 114 covering the initial second surface 150. Thereby, by forming the initial first dielectric layer 154 and the second dielectric layer 114 in the same process step, not only can the process be omitted, but also the number of coding removal times can be reduced compared to forming the initial first dielectric layer 154 and the second dielectric layer 114 separately.

[0158] In some cases, if the initial first dielectric layer 154 is first formed on the initial first surface 140, it is necessary to first form a protective layer on the initial second surface 150 to ensure that the formation step of the initial first dielectric layer 154 does not affect the initial second surface 150. Also, in the process step of forming the initial first dielectric layer 154, coding is also formed on the side surface of the initial substrate 130. After the initial first dielectric layer 154 is formed, it is necessary to perform a first coding removal process on the side surface of the initial substrate 130. After the first coding removal process, a second dielectric layer 114 is formed on the initial second surface 150. In order to ensure that the formation step of the second dielectric layer 114 does not affect the initial first surface 140, it is necessary to first form a protective layer on the initial first surface 140. And since coding is formed on the side surface of the initial substrate 130 in the formation step of the second dielectric layer 114, it is necessary to perform a second coding removal process after the second dielectric layer 114 is formed.

[0159] In some cases, in the coding removal step, it is necessary to clean the coding formed on the side surface of the initial substrate 130 by a wet chemical method. In other words, the coding removal step not only removes the coding but also, because it employs a wet chemical method, may damage the initial substrate 130. In one embodiment of the present application, by simultaneously forming the initial first dielectric layer 154 and the second dielectric layer 114, the step of forming a protective layer on the initial first surface 140 and the initial second surface 150 respectively can be omitted. On the other hand, after the initial first dielectric layer 154 and the second dielectric layer 114 are formed, only one coding removal step needs to be performed, significantly simplifying the process steps and improving the process efficiency. Also, since there is no need to form a protective layer on the initial first surface 140 and the initial second surface 150, there is no need to remove the protective layer later, avoiding the process damage to the initial substrate 130 caused by the protective layer removal step and maintaining the good performance of the initial substrate 130.

[0160] In step S13, as shown in FIG. 16, an initial first doping conductive layer 155 is formed to cover the surface of the initial first dielectric layer 154 on the side away from the initial substrate 130.

[0161] In some embodiments, as shown in FIG. 16, in the step of forming the initial first doped conductive layer 155, it may further include forming a second doped conductive layer 115 covering the surface of the second dielectric layer 114 on the side away from the initial substrate 130, and the type of doping element in the initial first doped conductive layer 155 is different from the type of doping element in the second doped conductive layer 115. Note that, subsequently, in order to form the first doped conductive layer 105 (see FIG. 9) based on the initial first doped conductive layer 155, the type of doping element in the first doped conductive layer 105 is different from the type of doping element in the second doped conductive layer 115.

[0162] By forming the initial first doped conductive layer 155 and the second doped conductive layer 115 in the same process step, not only can the process be omitted, but also the number of coding removal times can be reduced compared to forming the initial first doped conductive layer 155 and the second doped conductive layer 115 separately.

[0163] In some embodiments, forming the initial first doped conductive layer 155 and the second doped conductive layer 115 can include the following steps.

[0164] Perform a first deposition process on the initial first surface 140 and the initial second surface 150 simultaneously so as to form a first amorphous silicon layer on the surface of the initial first dielectric layer 154 away from the initial substrate 130 and form a second amorphous silicon layer on the surface of the second dielectric layer 114 away from the initial substrate 130. For example, the first amorphous silicon layer and the second amorphous silicon layer can be formed by plasma chemical vapor deposition.

[0165] The first amorphous silicon layer and the second amorphous silicon layer are simultaneously crystallized to convert the first amorphous silicon layer into a first polycrystalline silicon layer and the second amorphous silicon layer into a second polycrystalline silicon layer. In some embodiments, the crystallization process includes performing an annealing process on the first amorphous silicon layer and the second amorphous silicon layer, and the annealing temperature is 800°C to 1200°C. In this temperature range, the annealing temperature is not too low, ensuring sufficient crystallization of the first amorphous silicon layer and the second amorphous silicon layer. On the other hand, the annealing temperature is not too high, preventing the problem that the high annealing temperature damages the initial substrate 130.

[0166] After forming the first polycrystalline silicon layer and the second polycrystalline silicon layer, a first doping process is performed on the first polycrystalline silicon layer to form an initial first doped conductive layer 155. In some embodiments, the doping element in the first doping process also diffuses into some of the initial substrate 130, forming a diffusion region. The doping element concentration in the diffusion region is higher than that in the remaining initial substrate 130. That is, compared with the remaining initial substrate 130, the diffusion region is a high-concentration doping region. The existence of this high-low junction causes a barrier effect on carriers, increasing the transport speed and quantity of carriers in the substrate 100 formed later to the diffusion region, enabling the first doped conductive layer formed later to effectively collect carriers.

[0167] In some embodiments, before performing the first doping process step, it may further include forming a first mask layer on the surface of the initial substrate 130 of the second polycrystalline silicon layer away from the surface, and before the step of forming the second doped conductive layer, it may further include removing the first mask layer. Since the first doping process and the second doping process performed on the second polycrystalline silicon layer later are performed in different process steps, forming the first mask layer on the surface of the second polycrystalline silicon layer before performing the first doping process helps to protect the second polycrystalline silicon layer from the first doping process.

[0168] In some embodiments, the first doping process may be either an ion implantation process or a source diffusion process.

[0169] In some embodiments, after forming the initial first doped conductive layer 155, the first mask layer is removed in an etching process, and the etching process includes any one of a dry etching process, a wet etching process, or a laser etching process.

[0170] After performing the first doping process, a second doping process is performed on the second polycrystalline silicon layer to form a second doped conductive layer 115. In some embodiments, the type of the doping element in the second doped conductive layer 115 is different from the type of the doping element in the initial substrate 130, thereby forming a PN junction between the second doped conductive layer 115 and the substrate 100 (see FIG. 9) formed later, and forming a back contact structure. Since the entire surface of the second doped conductive layer 115 is formed on the back surface of the substrate 100, the area of the PN junction becomes larger, and the number of photo-generated carriers generated in the PN junction increases. On the other hand, the electrostatic field facing the back surface of the substrate 100 formed in the second doped conductive layer 115 becomes larger, which is beneficial to the movement of carriers, and the open-circuit voltage and short-circuit current can be increased. In addition, by forming a PN junction on the back surface, it is possible to prevent the serious carrier recombination problem of the electrode region 101 on the front surface of the substrate 100 caused by forming a PN junction on the front surface of the substrate 100, and the bifacial ratio can be improved.

[0171] In some embodiments, the second doping process may be either an ion implantation process or a source diffusion process.

[0172] In step S14, as shown in FIGS. 16 and 1, the initial first dielectric layer 154 and the initial first doped conductive layer 155 in the initial transition region 192 and the initial non-electrode region 193 are removed by a laser process to form a substrate 100 having a first surface 110.

[0173] In some embodiments, the initial first surface 140 has a first texture structure. In the step of removing the initial first dielectric layer 154 and the initial first doped conductive layer 155 located in the initial transition region 192 and the initial non-electrode region 193 by a laser process, as shown in FIGS. 16, 9, and 3, the first doped conductive layer 105 located in the initial electrode region 191 has a second surface structure 125, the first texture structure located in the initial transition region 192 is converted into a first surface structure 112, and the first texture structure located in the initial non-electrode region 193 is converted into a third surface structure 113. Here, the first surface structure 112 includes a plurality of first pyramid structures 152, the second surface structure 125 includes a plurality of third pyramid structures 135, the third surface structure 113 includes a plurality of fourth pyramid structures 123, the one-dimensional dimension of the bottom of the first pyramid structure 152 is larger than the one-dimensional dimension of the bottom of the third pyramid structure 135, and the one-dimensional dimension of the bottom of the third pyramid structure 135 is larger than the one-dimensional dimension of the bottom of the fourth pyramid structure 123.

[0174] Note that the first surface structure 112 can be finely adjusted by adjusting the process parameters of the laser process.

[0175] Hereinafter, taking the formation of an HJT cell as an example, steps S12 to S14 will be described in detail.

[0176] Note that, as shown in FIG. 10, in the step of forming the HJT cell, the steps of forming the substrate 200, the first dielectric layer 204, and the first doped conductive layer 205 are similar to the steps of forming the substrate 100, the first dielectric layer 104, and the first doped conductive layer 105 in the above-described double-sided TOPCON cell. Therefore, the description thereof is omitted here.

[0177] The main differences in the forming steps are as follows.

[0178] In some embodiments, as shown in FIG. 17, before forming the initial first doped conductive layer 255, it may further include forming an intrinsic semiconductor layer 214 covering the initial second surface 250. In the step of forming the initial first doped conductive layer 255, it may further include forming a second doped conductive layer 215 covering the surface of the intrinsic semiconductor layer 214 on the side away from the initial substrate 230. The type of doping element in the initial first doped conductive layer 255 is different from the type of doping element in the second doped conductive layer 215. After forming the second doped conductive layer 215, it may further include forming a transparent conductive layer 207 covering the surface of the second doped conductive layer 215 on the side away from the intrinsic semiconductor layer 214.

[0179] Note that in another embodiment of the present application, the priority order between the intrinsic semiconductor layer 214 and the initial first dielectric layer 254 is not limited. Also, the initial substrate 230, the initial first surface 240, the initial second surface 250, the initial electrode region 291, the initial transition region 292, the initial non-electrode region 293, the initial first dielectric layer 254, and the initial first doped conductive layer 255 in FIG. 17 are all similar to the corresponding configurations in the above-described embodiments. Therefore, the description thereof is omitted here.

[0180] Hereinafter, taking the formation of the IBC cell as an example, steps S12 to S14 will be described in detail.

[0181] In some embodiments, as shown in FIGS. 18 to 20, the initial electrode region 391 includes an initial positive electrode region 351 and an initial negative electrode region 361. As shown in FIG. 11, the formed first dielectric layer 304 includes a first sub-dielectric layer 314 and a second sub-dielectric layer 324. The first sub-dielectric layer 314 is located in the positive electrode region 311, and the second sub-dielectric layer 324 is located in the negative electrode region 321. The formed first doped conductive layer 305 includes a first sub-doped conductive layer 315 and a second sub-doped conductive layer 325. The first sub-doped conductive layer 315 is located on the side closer to the positive electrode region 311 of the first sub-dielectric layer 314, and the second sub-doped conductive layer 325 is located on the side closer to the negative electrode region 321 of the second sub-dielectric layer 324. The type of doping element in the first sub-doped conductive layer 315 is different from the type of doping element in the second sub-doped conductive layer 325.

[0182] It should be noted that the initial substrate 330, the initial first surface 340, the initial second surface 350, the initial electrode region 391, the initial transition region 392, and the initial non-electrode region 393 in FIGS. 18 to 20 are all similar to the corresponding structures in the above-described embodiments, so the description is omitted here.

[0183] Hereinafter, the formation steps of the first sub-dielectric layer 314 and the second sub-dielectric layer 324 will be described in detail.

[0184] In some embodiments, as shown in FIG. 18, the step of forming the initial first dielectric layer 354 includes forming an initial first sub-dielectric layer 334 for covering the initial first surface 340, and the step of forming the initial first doped conductive layer 355 includes forming an initial first sub-doped conductive layer 335 for covering the surface of the initial first dielectric layer 354 on the side away from the initial substrate 330.

[0185] As shown in FIGS. 18 and 19, the step of adopting the laser process is to remove the initial first sub-dielectric layer 334 and the initial first sub-doping conductive layer 335 located in the initial negative electrode region 361, the initial transition region 392, and the initial non-electrode region 393 in the first laser process, and make the remaining initial first sub-dielectric layer 334 located in the initial positive electrode region 351 the first sub-dielectric layer 314, and make the remaining initial first sub-doping conductive layer 335 located in the initial positive electrode region 351 the first sub-doping conductive layer 315.

[0186] In some embodiments, as shown in FIG. 20, after forming the first sub-dielectric layer 314 and the first sub-doping conductive layer 315, the step of forming the second sub-dielectric layer 324 (see FIG. 11) and the second sub-doping conductive layer 325 (see FIG. 11) may further include forming a first mask layer 308 and locating the first mask layer 308 on the side away from the initial substrate 330 of the first sub-doping conductive layer 315.

[0187] As shown in FIG. 20, the step of forming the initial first dielectric layer 354 includes forming an initial second sub-dielectric layer 344 covering the initial first surface 340 and the first mask layer 308, and the step of forming the initial first doping conductive layer 355 further includes forming an initial second sub-doping conductive layer 345 covering the surface of the initial second sub-dielectric layer 344 on the side away from the initial substrate 330.

[0188] As shown in FIGS. 20 and 11, the step of adopting the laser process is to remove the initial second sub-dielectric layer 344 and the initial second sub-doping conductive layer 345 located in the initial positive electrode region 351, the initial transition region 392, and the initial non-electrode region 393 in the second laser process, and make the remaining initial second sub-dielectric layer 344 located in the initial negative electrode region 361 the second sub-dielectric layer 324, and make the remaining initial second sub-doping conductive layer 345 located in the initial negative electrode region 361 the second sub-doping conductive layer 325.

[0189] As shown in FIGS. 20 and 11, remove the first mask layer 308.

[0190] In addition, in the step of forming the IBC cell, the steps of forming the initial first dielectric layer 354 and the initial first doped conductive layer 355 are different from the steps of forming the initial first dielectric layers 154 and 254 and the initial first doped conductive layers 155 and 255 in the double-sided TOPCON cell and the HJT cell of the above-described embodiments. In the step of forming the IBC cell, the step of forming the initial first dielectric layer 354 includes two separate sub-steps, i.e., the step of forming the initial first sub-dielectric layer 334 and the step of forming the initial second sub-dielectric layer 344, and the step of forming the initial first doped conductive layer 355 includes two separate sub-steps, i.e., the step of forming the initial first sub-doped conductive layer 335 and the step of forming the initial second sub-doped conductive layer 345. The initial positive electrode region 351 and the initial negative electrode region 361 that have undergone the first laser process and the second laser process become the positive electrode region 311 and the negative electrode region 321, respectively, the electrode region 301 is the positive electrode region 311 or the negative electrode region 321, and the initial transition region 392 and the initial non-electrode region 393 that have undergone the first laser process and the second laser process become the transition region 302 and the non-electrode region 303, respectively.

[0191] As described above, in another embodiment of the present application, after forming the initial first dielectric layer 154 and the initial first doped conductive layer 155 on the entire surface, by processing with a laser process, a transition region 102 having the first surface structure 112 is formed, and the stacked first dielectric layer 104 and the first doped conductive layer 105 are formed only in the electrode region 101. Thereby, the serious carrier recombination problem of the electrode region 101 is improved by the passivation effect of the first dielectric layer 104 and the first doped conductive layer 105 on the electrode region 101. On the other hand, it is possible to prevent the first dielectric layer 104 and the first doped conductive layer 105 from reducing the absorption of the non-electrode region 103 and the transition region 102 with respect to the incident light irradiated on the first surface 110. In addition, the first surface structure 112 contributes to increasing the absorption rate of the incident light on the first surface 110.

[0192] Another embodiment of the present application further provides a photovoltaic module, which includes a plurality of solar cells provided in any of the above-described embodiments, and is used to convert the light energy received by the photovoltaic module into electrical energy. FIG. 21 is a diagram showing the structure of a photovoltaic module provided in another embodiment of the present application. For the same or corresponding parts as those in the above-described embodiments, the corresponding descriptions of the above-described embodiments can be referred to. The description will be omitted hereinafter.

[0193] As shown in FIG. 21, the photovoltaic module includes a cell string formed by connecting a plurality of solar cells 40 in any of the above-described embodiments or a plurality of solar cells 40 formed by any of the above-described manufacturing methods, a sealing adhesive film 41 for covering the surface of the cell string, and a cover plate 42 for covering the surface of the sealing adhesive film 41 away from the cell string. The solar cells 40 are electrically connected in an overall or divided form to form a plurality of cell strings, and the plurality of cell strings are electrically connected in series and / or in parallel.

[0194] In some embodiments, the plurality of cell strings may be electrically connected by a conduction band 402. FIG. 21 shows only the positional relationship between one type of solar cells, that is, the arrangement direction of the electrodes with the same polarity of the battery cells is the same, or the electrodes with the positive polarity of each battery cell are arranged on the same side, and the conduction band is connected to different sides of two adjacent battery cells. In some embodiments, the battery cells can have electrodes of different polarities facing the same side, that is, the electrodes of a plurality of adjacent battery cells are arranged in the order of the first polarity, the second polarity, and the first polarity, and the conduction band connects two adjacent battery cells on the same side.

[0195] In some embodiments, no gap is provided between the battery cells, that is, the battery cells overlap each other.

[0196] In some embodiments, the encapsulation adhesive film 41 includes a first encapsulation layer and a second encapsulation layer. The first encapsulation layer covers one of the front surface or the back surface of the solar cell 40, and the second encapsulation layer covers the other of the front surface or the back surface of the solar cell 40. Specifically, at least one of the first encapsulation layer or the second encapsulation layer may be an organic encapsulation adhesive film such as a polyvinyl butyral (PVB) adhesive film, an ethylene vinyl acetate (EVA) copolymer adhesive film, a polyethylene-octene copolymer (POE) adhesive film, or a polyethylene terephthalate (PET) adhesive film.

[0197] In some cases, before the lamination process, there is a boundary line between the first encapsulation layer and the second encapsulation layer. After the lamination process, when the photovoltaic module is formed, the concepts of the first encapsulation layer and the second encapsulation layer no longer exist. That is, an encapsulation adhesive film 41 is formed in which the first encapsulation layer and the second encapsulation layer are integrated.

[0198] In some embodiments, the cover plate 42 may be a cover plate having a light transmission function such as a glass cover plate or a plastic cover plate. Specifically, the surface of the cover plate 42 facing the encapsulation adhesive film 41 may be an uneven surface, thereby increasing the utilization rate of incident light rays. The cover plate 42 includes a first cover plate and a second cover plate. The first cover plate faces the first encapsulation layer, and the second cover plate faces the second encapsulation layer.

[0199] Those skilled in the art will understand that the above embodiments are specific examples for implementing the present disclosure. However, in practical applications, various changes can be made in form and details without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art can make changes and modifications respectively as long as they do not depart from the spirit and scope of the embodiments of the present disclosure. Therefore, the protection scope of the embodiments of the present disclosure should be based on the scope defined by the claims.

Claims

1. A substrate; a first dielectric layer located in the electrode region; a first doped conductive layer located on a side of the first dielectric layer away from the electrode region; the substrate has a first surface and a second surface disposed opposite to each other, the first surface including the electrode regions and non-electrode regions disposed alternately at a distance from each other, and a transition region located between the electrode regions and the non-electrode regions; the first dielectric layer and the first doped conductive layer are formed only in the electrode region; A solar cell characterized by:

2. The prismatic structure includes a first prismatic structure and a second prismatic structure, a first length of the first prismatic structure is greater than a second length of the second prismatic structure along a tilt direction of the prismatic structure, and at least a portion of the second prismatic structure is located on a side of the first prismatic structure away from the electrode region. The solar cell according to claim 1 .

3. A plurality of the second prismatic structures are located on a side surface of the same first prismatic structure away from the electrode region, or a plurality of the second prismatic structures are sequentially arranged along a direction away from the side surface of the first prismatic structure. The solar cell according to claim 2 .

4. The first surface structure further includes a first pyramid structure, at least a portion of the first pyramid structure being located in a portion of the transition region close to the non-electrode region, and at least a portion of the prismatic structure being located in a portion of the transition region close to the electrode region. The solar cell according to claim 1 .

5. The first surface structure further includes a plurality of micro-projection structures, the micro-projection structures including at least one of a second pyramid structure or a triangular plate structure; The solar cell according to claim 4 .

6. a second dielectric layer covering the second surface; a second doped conductive layer covering a surface of the second dielectric layer facing away from the substrate; the type of doping element in the first doped conductive layer is different from the type of doping element in the second doped conductive layer; The solar cell according to claim 1 .

7. a surface of the first doped conductive layer located in the electrode region comprises a second surface structure, the second surface structure comprising a plurality of third pyramid structures; and the non-electrode region comprises a third surface structure, the third surface structure comprising a plurality of fourth pyramid structures. The solar cell according to claim 6 .

8. an intrinsic semiconductor layer covering the second surface; a second doped conductive layer covering a surface of the intrinsic semiconductor layer facing away from the substrate; a transparent conductive layer covering a surface of the second doped conductive layer away from the intrinsic semiconductor layer; the type of doping element in the first doped conductive layer is different from the type of doping element in the second doped conductive layer; The solar cell according to claim 1 .

9. The electrode region has a first upper surface, the non-electrode region has a second upper surface, the first upper surface is higher than the second upper surface with respect to the second surface, and a height difference between the first upper surface and the second upper surface is 0.5 μm to 10 μm. The solar cell according to claim 1 .

10. providing an initial substrate having an initial first surface and an initial second surface disposed opposite each other, the initial first surface including alternating spaced apart initial electrode regions and initial non-electrode regions, and an initial transition region located between the initial electrode regions and the initial non-electrode regions; forming an initial first dielectric layer overlying the initial first surface; forming an initial first doped conductive layer covering a surface of the initial first dielectric layer facing away from the initial substrate; removing the initial first dielectric layer and the initial first doped conductive layer located in the initial transition region and the initial non-electrode region by a laser process to form a substrate having a first surface, wherein the first dielectric layer and the first doped conductive layer are formed only in the electrode region; A method for producing a solar cell comprising the steps of:

11. forming the initial first dielectric layer further comprises forming a second dielectric layer overlying the initial second surface; The step of forming the initial first doped conductive layer further includes forming a second doped conductive layer covering a surface of the second dielectric layer away from the initial substrate, and a type of doping element in the initial first doped conductive layer is different from a type of doping element in the second doped conductive layer. The method for producing a solar cell according to claim 10 .

12. Prior to forming the initial first doped conductive layer, the method further includes forming an intrinsic semiconductor layer overlying the initial second surface; The step of forming the initial first doped conductive layer further includes forming a second doped conductive layer covering a surface of the intrinsic semiconductor layer away from the initial substrate, and a type of doping element in the initial first doped conductive layer is different from a type of doping element in the second doped conductive layer. The method for producing a solar cell according to claim 10 .

13. Before forming the initial first dielectric layer, the method further includes performing a first etching process on the initial first surface to provide the initial first surface with a first texture structure; In the step of removing the initial first dielectric layer and the initial first doped conductive layer located in the initial transition region and the initial non-electrode region by a laser process, the first doped conductive layer located in the initial electrode region has a second surface structure, the first texture structure located in the initial transition region is transformed into the first surface structure, and the first texture structure located in the initial non-electrode region is transformed into a third surface structure; wherein the first surface structure includes a plurality of first pyramid structures, the second surface structure includes a plurality of third pyramid structures, and the third surface structure includes a plurality of fourth pyramid structures, a one-dimensional dimension of a base of the first pyramid structures is larger than a one-dimensional dimension of a base of the third pyramid structures, and a one-dimensional dimension of a base of the third pyramid structures is larger than a one-dimensional dimension of a base of the fourth pyramid structures; The method for producing a solar cell according to claim 11 .

14. the initial electrode region includes an initial positive electrode region and an initial negative electrode region; the formed first dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer, the first sub-dielectric layer is located in the positive electrode region and the second sub-dielectric layer is located in the negative electrode region; the formed first doped conductive layer includes a first sub-doped conductive layer and a second sub-doped conductive layer, the first sub-doped conductive layer is located on a side of the first sub-dielectric layer closer to the positive electrode region and the second sub-doped conductive layer is located on a side of the second sub-dielectric layer closer to the negative electrode region, and a type of doping element in the first sub-doped conductive layer is different from a type of doping element in the second sub-doped conductive layer. The method for producing a solar cell according to claim 10 .

15. A cell string comprising a plurality of solar cells according to any one of claims 1 to 9 connected together or a plurality of solar cells formed by the method for manufacturing a solar cell according to any one of claims 10 to 14 connected together; a sealing adhesive film for covering a surface of the cell string; and a cover plate for covering a surface of the sealing adhesive film away from the cell string. A photovoltaic module comprising:

Images