Electronic component, filter, and multiplexer

Abstract

To provide an electronic component in which the occurrence of cracks in a sealing portion is suppressed.SOLUTION: An electronic component includes a support substrate 10, an element provided on the support substrate 10, a lid 30 provided on the support substrate 10 with a gap between the support substrate 10 and the lid 30 through which the element is exposed, a metal layer 42 located between the support substrate 10 and the lid 30 and having a ring-shaped structure provided around the element when the support substrate 10 is viewed from the element side and having a thickness of at least half the distance D between the support substrate 10 and the lid 30, and a metal layer 41 that is located between the metal layer 42 and the support substrate 10, has a lower electrical conductivity than the metal layer 42, is thinner than the metal layer 42, and has a larger Young's modulus than the metal layer 42.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to electronic components, filters, and multiplexers.

Background Art

[0002] There is known an electronic component in which an element is provided on a substrate, a frame is provided so as to surround the element, and a lid is provided on the frame, thereby sealing the element in a void (for example, Patent Documents 1 and 2).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] The frame surrounding the element may be formed of a plurality of metal layers. In this case, cracks may occur between the metal layers due to thermal stress. When cracks occur, it leads to deterioration of the sealing property.

[0005] The present invention has been made in view of the above problems, and an object thereof is to suppress the occurrence of cracks.

Means for Solving the Problems

[0006] The present invention relates to an electronic component including a substrate, an element provided on the substrate, a lid provided on the substrate with a gap through which the element is exposed being sandwiched between the substrate and the lid, an annular structure provided between the substrate and the lid and surrounding the element when the substrate is viewed from the element side, a first metal layer having a thickness of at least half of the distance between the substrate and the lid, a second metal layer located between the first metal layer and the substrate, having a lower conductivity, being thinner than the first metal layer, and having a larger Young's modulus than the first metal layer.

[0007] In the above configuration, the linear expansion coefficient of the second metal layer can be configured to be larger than the linear expansion coefficient of the substrate and smaller than the linear expansion coefficient of the first metal layer.

[0008] In the above configuration, the thickness of the second metal layer can be configured to be at least 1 / 200 and at most 1 / 10 of the thickness of the first metal layer.

[0009] In the above configuration, it can further include a third metal layer located between the substrate and the second metal layer and having a larger difference in linear expansion coefficient between the first metal layer than the difference in linear expansion coefficient between the first metal layer and the second metal layer.

[0010] In the above configuration, the substrate can be silicon or sapphire, the first metal layer can be copper, the second metal layer can be nickel, and the third metal layer can be titanium.

[0011] In the above configuration, it can further include a solder layer located between the first metal layer and the lid, and a barrier layer located between the first metal layer and the solder layer and suppressing diffusion between the first metal layer and the solder layer.

[0012] In the above configuration, the element can be an elastic wave element.

[0013] The present invention is a filter including the above-described electronic component.

[0014] The present invention is a multiplexer including the filter described above.

Advantages of the Invention

[0015] According to the present invention, the occurrence of cracks can be suppressed.

Brief Description of the Drawings

[0016]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Best Mode for Carrying Out the Invention

[0017] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Embodiment

[0018] FIG. 1(a) is a cross-sectional view of an electronic component 100 according to Embodiment 1, and FIG. 1(b) is a plan view. The thickness direction of the support substrate 10 is the Z direction, and the directions orthogonal to each other in the plane direction of the support substrate 10 are the X direction and the Y direction. In FIG. 1(b), the support substrate 10, the piezoelectric layer 12, the frame 18, and the surface acoustic wave device 50 are schematically illustrated, and for clarity of the drawing, the piezoelectric layer 12, the frame 18, and the surface acoustic wave device 50 are hatched.

[0019] As shown in FIGS. 1(a) and 1(b), a piezoelectric layer 12 is bonded to the upper surface of a support substrate 10 (substrate). The support substrate 10 is, for example, a sapphire substrate, an alumina substrate, a silicon substrate, a spinel substrate, a quartz substrate, a quartz substrate, or a silicon carbide substrate. The sapphire substrate is a single crystal Al2O3 substrate, the alumina substrate is a polycrystalline or amorphous Al2O3 substrate, the silicon substrate is a single crystal or polycrystalline silicon substrate. The spinel substrate is a polycrystalline or amorphous MgAl2O4 substrate, the quartz substrate is a single crystal SiO2 substrate, the quartz substrate is a polycrystalline or amorphous SiO2 substrate, and the silicon carbide substrate is a polycrystalline or single crystal SiC substrate.

[0020] The piezoelectric layer 12 is, for example, a single crystal lithium tantalate (LiTaO3) layer or a single crystal lithium niobate (LiNbO3) layer, and is, for example, a rotated Y-cut X-propagation lithium tantalate layer or a rotated Y-cut X-propagation lithium niobate layer. An insulating layer such as silicon oxide, aluminum oxide, and / or aluminum nitride may be provided between the support substrate 10 and the piezoelectric layer 12. Thus, the piezoelectric layer 12 is bonded to the support substrate 10 directly or indirectly.

[0021] On the piezoelectric layer 12, an elastic wave element 50 and a wiring 20 are provided. The elastic wave element 50 is, for example, an elastic surface wave element. The wiring 20 is electrically connected to the elastic wave element 50. A via wiring 16 penetrating the support substrate 10 is provided. A terminal 14 is provided on the lower surface of the support substrate 10. The terminal 14 is a foot pad for electrically connecting the elastic wave element 50 to the outside. The via wiring 16 electrically connects the wiring 20 and the terminal 14. The terminal 14, the via wiring 16, and the wiring 20 are metal layers containing, for example, titanium, copper, aluminum, platinum, nickel, and / or gold.

[0022] The piezoelectric layer 12 is not provided in the peripheral region of the support substrate 10. In a plan view from the Z direction, a frame body 18 is provided on the support substrate 10 so as to surround the piezoelectric layer 12 and the elastic wave element 50. A lid 30 is provided on the frame body 18 so that a gap 22 in which the elastic wave element 50 is exposed is formed between the lid 30 and the support substrate 10. The frame body 18 connects between the support substrate 10 and the lid 30. The elastic wave element 50 is sealed in the gap 22 by the frame body 18 and the lid 30. The lid 30 includes a metal plate such as a kovar plate, an insulating plate such as a silicon plate or a sapphire plate, or a piezoelectric plate such as a lithium tantalate plate or a lithium niobate plate.

[0023] FIG. 2 is a cross-sectional view showing the layer structure of the frame 18 in Example 1. As shown in FIG. 2, the frame 18 has a metal layer 40, a metal layer 41, a metal layer 42, a metal layer 43, and a solder layer 44 (metal layer) laminated in order from the support substrate 10 side. The metal layer 40 is a titanium layer with a thickness of, for example, 0.05 μm and is an adhesion layer between the support substrate 10 and the frame 18. The metal layer 40 is formed by a sputtering method. The metal layer 41 is a nickel layer with a thickness of, for example, 0.2 μm. The metal layer 41 is formed by a sputtering method. The metal layer 42 is a copper layer with a thickness of, for example, 21 μm and is the thickest and has the highest conductivity among the layers of the frame 18. The thickness of the metal layer 42 is 50% or more of the distance D between the support substrate 10 and the lid 30, and may be 60% or more, or 70% or more. The metal layer 42 includes a seed layer formed by a sputtering method and a plating layer formed by an electroplating method. The metal layer 43 is a nickel layer with a thickness of, for example, 2.5 μm and is a barrier layer (diffusion prevention layer) that suppresses diffusion between the metal layer 42 and the solder layer 44. The metal layer 43 is formed by an electroplating method. The solder layer 44 is a gold-tin solder layer with a thickness of, for example, 4 μm. The solder layer 44 is formed by an electroplating method.

[0024] In addition, the frame 18 may include other metal layers in addition to or instead of the above. For example, a gold layer, a silver layer, a tungsten layer, etc. may be included. Also, the solder layer 44 may be a silver-tin solder layer or a silver-copper-tin solder layer.

[0025] The width of the frame 18 is, for example, 20 μm, and is, for example, 10 μm to 40 μm. The height of the frame 18 is, for example, 27.75 μm as described above, and is, for example, 20 μm to 40 μm. The thickness of the support substrate 10 is, for example, 50 μm to 300 μm, the thickness of the piezoelectric layer 12 is, for example, 0.5 μm to 30 μm, and the thickness of the lid 30 is, for example, 10 μm to 200 μm.

[0026] FIG. 3(a) is a plan view of the elastic wave element 50 in Example 1. As shown in FIG. 3(a), the elastic wave element 50 is a surface acoustic wave resonator. An IDT (Interdigital Transducer) 51 and reflectors 52 are provided on the piezoelectric layer 12. The IDT 51 has a pair of opposing comb-shaped electrodes 53. The comb-shaped electrode 53 has a plurality of electrode fingers 54 and a bus bar 55 to which the plurality of electrode fingers 54 are connected. The reflectors 52 are provided on both sides of the IDT 51. The plurality of electrode fingers 54 excite surface acoustic waves in the piezoelectric layer 12. The pitch of the electrode fingers 54 of one of the pair of comb-shaped electrodes 53 is approximately equal to the wavelength λ of the elastic wave. Twice the pitch D of the plurality of electrode fingers 54 is approximately equal to the wavelength λ of the elastic wave. The IDT 51 and the reflectors 52 are formed of a metal film such as aluminum, copper, or molybdenum, for example. A protective film or a temperature compensation film covering the IDT 51 and the reflectors 52 may be provided on the piezoelectric layer 12. The comb-shaped electrode 53 may have dummy electrode fingers.

[0027] FIG. 3(b) is a cross-sectional view of another example of the elastic wave element 50 in Example 1. As shown in FIG. 3(b), the elastic wave element 50 may be a piezoelectric thin film resonator. A piezoelectric layer 12 is provided on a support substrate 10, and a lower electrode 56 and an upper electrode 57 are provided so as to sandwich the piezoelectric layer 12. A gap 58 is formed between the lower electrode 56 and the support substrate 10. A region where the lower electrode 56 and the upper electrode 57 face each other with at least a part of the piezoelectric layer 12 therebetween is a resonance region 59. In the resonance region 59, the lower electrode 56 and the upper electrode 57 excite elastic waves in the piezoelectric layer 12. The lower electrode 56 and the upper electrode 57 are metal films containing, for example, a ruthenium film. The piezoelectric layer 12 is, for example, an aluminum nitride layer, a zinc oxide layer, a single crystal lithium tantalate layer, or a single crystal lithium niobate layer. An acoustic reflection film that reflects elastic waves may be provided instead of the gap 58.

[0028] [Manufacturing Method] Figs. 4(a) to 4(d) are cross-sectional views showing a method of manufacturing the electronic component 100 according to Embodiment 1. As shown in Fig. 4(a), for example, a via is formed by irradiating a laser beam onto the upper surface of the support substrate 10, and a metal layer such as copper is formed in the via using, for example, an electroplating method. Then, the metal layer is planarized using a CMP (Chemical Mechanical Polishing) method so that the upper surface of the support substrate 10 is exposed, and a via wiring 16 is formed on the support substrate 10. Next, a piezoelectric substrate is joined to the upper surface of the support substrate 10 at room temperature using, for example, a surface activation method. The support substrate 10 and the piezoelectric substrate may be directly joined via an amorphous layer of several nm or the like, or may be indirectly joined via an insulating layer. Thereafter, the piezoelectric substrate is polished using, for example, a CMP method to form a piezoelectric layer 12 joined directly or indirectly to the upper surface of the support substrate 10.

[0029] As shown in Fig. 4(b), a part of the piezoelectric layer 12 is removed using, for example, an etching method. Thereby, the piezoelectric layer 12 in the peripheral region of the support substrate 10 is removed. Next, a surface acoustic wave device 50 is formed on the piezoelectric layer 12. A wiring 20 connected to the surface acoustic wave device 50 is formed.

[0030] As shown in Fig. 4(c), a frame 18 is formed on the support substrate 10 so as to surround the piezoelectric layer 12. Next, a lid 30 is joined to the frame 18. Thereby, the surface acoustic wave device 50 is sealed in a cavity 22 by the frame 18 and the lid 30.

[0031] As shown in Fig. 4(d), the lower surface of the support substrate 10 is polished using, for example, a CMP method. Thereby, the via wiring 16 is exposed from the lower surface of the support substrate 10. A terminal 14 connected to the via wiring 16 is formed on the lower surface of the support substrate 10. Thus, the electronic component 100 according to Embodiment 1 is formed.

[0032] [Comparative Example] FIG. 5 is a cross-sectional view showing the layer structure of the frame body 18 in the comparative example. As shown in FIG. 5, in the comparative example, the frame body 18 has a metal layer 60, a metal layer 61, a metal layer 62, and a solder layer 63 from the support substrate 10 side. The metal layer 60 is a titanium layer having a thickness of, for example, 0.05 μm, and is an adhesion layer between the support substrate 10 and the frame body 18. The metal layer 61 is a copper layer having a thickness of, for example, 21 μm, and is the thickest and highest conductivity layer in the frame body 18. The thickness of the metal layer 61 is 50% or more of the distance D between the support substrate 10 and the lid 30. The metal layer 62 is a nickel layer having a thickness of, for example, 2.5 μm, and is a barrier layer between the metal layer 61 and the solder layer 63. The solder layer 63 is a gold-tin solder layer having a thickness of, for example, 4 μm. Since the other configurations of the electronic component according to the comparative example are the same as those of the first embodiment, illustration and description are omitted.

[0033] For the electronic components according to the first embodiment and the comparative example, the temperature was changed between -65°C and +150°C, and a temperature cycle test was carried out in which the temperature was held at -65°C and +150°C for 15 minutes each. FIGS. 6(a) and 6(b) are cross-sectional views showing the frame body 18 after the temperature cycle test in the comparative example and the first embodiment. As shown in FIG. 6(a), in the comparative example, a crack 65 occurred at the interface between the metal layer 60 and the metal layer 61 in the frame body 18. On the other hand, as shown in FIG. 6(b), in the first embodiment, no crack occurred in the frame body 18.

[0034] [Simulation] FIG. 7(a) is a plan view of the model for which the simulation was carried out, and FIG. 7(b) is a cross-sectional view taken along the line A-A of FIG. 7(a). As shown in FIGS. 7(a) and 7(b), in the model for which the simulation was carried out, a frame body 72 is provided at the periphery of the support substrate 70. A lid 74 is provided on the frame body 72. The frame body 72 is composed of a metal layer 76 and a solder layer 78. For models A to E having the structure shown in FIGS. 7(a) and 7(b), a 2D simulation 1 corresponding to the temperature cycle test was carried out to measure the cumulative strain applied to the metal layer 76. The conditions of simulation 1 are as follows.

[0035] Common conditions for models A to E Support substrate 70: Sapphire substrate with length L1 of 0.45 mm and length L2 of 0.075 mm Lid 74: Kovar plate with length L1 of 0.45 mm and length L2 of 0.03 mm Conditions of Model A Metal layer 76 of the frame 72: Copper layer with a thickness of 10 μm Solder layer 78 of the frame 72: Gold-tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm Conditions of Model B Metal layer 76 of the frame 72: Copper layer with a thickness of 20 μm Solder layer 78 of the frame 72: Gold-tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm Conditions of Model C Metal layer 76 of the frame 72: Copper layer with a thickness of 30 μm Solder layer 78 of the frame 72: Gold-tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm Conditions of Model D Metal layer 76 of the frame 72: Copper layer with a thickness of 20 μm Solder layer 78 of the frame 72: Gold-tin layer with a thickness of 14 μm Width W of the frame 72: 23 μm Conditions of Model E Metal layer 76 of the frame 72: Copper layer with a thickness of 20 μm Solder layer 78 of the frame 72: Gold-tin layer with a thickness of 4 μm Width W of the frame 72: 46 μm

[0036] Table 1 shows the Young's modulus and coefficient of linear expansion of each material used in Simulation 1.

Table 1

[0037] Figure 8 shows the results of Simulation 1. In Figure 8, the horizontal axis represents the step, the left vertical axis represents the maximum value of the cumulative strain applied to the metal layer 76, and the right vertical axis represents the temperature. Table 2 shows the results of Simulation 1.

Table 2

[0038] As shown in FIG. 8 and Table 2, the cumulative strain of Model B was smaller than that of Model A. The cumulative strain of Model C was smaller than that of Model B. Models A, B, and C differed only in the thickness of the metal layer 76 (copper layer). From this result, it was found that the greater the thickness of the metal layer 76, the smaller the cumulative strain. Also, the cumulative strain of Model E was larger than that of Model B. Models B and E differed only in the width W of the frame body 72. From this result, it was found that as the width W of the frame body 72 increased, the cumulative strain of the metal layer 76 increased. The ratio of the thickness of the copper layer to the width W of the frame body 72 was 0.43 for Model A, 0.87 for Models B and D, 1.30 for Model C, and 0.43 for Model E. The cumulative strain was maximum at the inner side of the lower end of the frame body 72, shown as Region A in FIG. 7(b), for all of Models A to E.

[0039] From the results of Simulation 1, in the comparative example, it is considered that the crack 65 occurred at the interface between the metal layers 60 and 61 for the following reasons. When a temperature cycle test is performed, the support substrate 10 and the lid 30 thermally expand and contract according to their respective coefficients of linear expansion. For example, when the support substrate 10 is a sapphire substrate and the lid 30 is a kovar plate, the coefficient of linear expansion of sapphire is larger than that of kovar. Therefore, when the support substrate 10 and the lid 30 each thermally expand and contract according to their coefficients of linear expansion, the strain becomes large at the connection portion between the frame body 18 and the support substrate 10 as in Region A of FIG. 7(b). Since it is preferable that the frame body 18 has a high conductivity, the thickness of the metal layer 61, which is the copper layer with the highest conductivity among the frame body 18, is 50% or more of the distance D between the support substrate 10 and the lid 30. The Young's modulus of copper is relatively small. Thus, since the metal layer 61 is thick and has a small Young's modulus, it is easily deformed by the thermal expansion and contraction of the support substrate 10 and the lid 30 respectively. Since the metal layer 61 is located near the portion where the frame body 18 is connected to the support substrate 10, the strain applied to the metal layer 61 is large, and it is considered that the crack 65 occurred at the interface between the metal layer 60 and the metal layer 61 due to the synergistic effect of this large strain and the deformation of the metal layer 61.

[0040] Next, simulation 2 was performed on models F to I with the laminated structure of the metal layer 76 changed. The conditions for simulation 2 are as follows. Other conditions are the same as those for simulation 1 above. Conditions for model F Metal layer 76 of the frame 72: A copper layer with a thickness of 20 μm Solder layer 78 of the frame 72: A gold - tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm Conditions for model G Metal layer 76 of the frame 72: A laminate of a nickel layer with a thickness of 1 μm and a copper layer with a thickness of 19 μm provided thereon Solder layer 78 of the frame 72: A gold - tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm Conditions for model H Metal layer 76 of the frame 72: A laminate of a nickel layer with a thickness of 3 μm and a copper layer with a thickness of 17 μm provided thereon Solder layer 78 of the frame 72: A gold - tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm Conditions for model I Metal layer 76 of the frame 72: A laminate of a nickel layer with a thickness of 5 μm and a copper layer with a thickness of 15 μm provided thereon Solder layer 78 of the frame 72: A gold - tin layer with a thickness of 4 μm Width W of the frame 72: 23 μm

[0041] Table 3 is a table showing the Young's modulus and coefficient of linear expansion of each material used in simulation 2.

Table 3

[0042] In simulation 2, the cumulative strain was obtained by finding the maximum value of the cumulative strain applied to the copper layer in the metal layer 76. The reason for obtaining the cumulative strain of the copper layer is that, as described above, the copper layer becomes thick in order to increase the conductivity of the frame, and combined with the relatively small Young's modulus, it is easy to deform. When the strain of the copper layer becomes large, cracks are likely to occur at the interface.

[0043] FIG. 9 is a diagram showing the results of Simulation 2. In FIG. 9, the horizontal axis represents steps, the left vertical axis represents the maximum value of the cumulative strain applied to the copper layer, and the right vertical axis represents temperature. Table 4 is a table showing the results of Simulation 2. [Table 4]

[0044] As shown in FIG. 9 and Table 4, for Models G - I, the cumulative strain applied to the copper layer was smaller than that of Model F. From this result, it can be seen that by providing a nickel layer under the copper layer, the cumulative strain applied to the copper layer can be reduced. It is considered that the reason why the cumulative strain applied to the copper layer is reduced by providing the nickel layer is as follows. By providing the nickel layer, the copper layer comes to be positioned away from the connection portion between the frame 72 and the support substrate 70. Since the cumulative strain applied to the frame 72 increases at the connection portion with the support substrate 70 shown in Region A of FIG. 7(b), it is considered that by sandwiching the nickel layer between the support substrate 70, the cumulative strain applied to the copper layer is reduced.

[0045] From the results of Simulation 2, in Example 1, it is considered that the reason why no cracks occurred in the frame 18 as shown in Fig. 6(b) is as follows. In Example 1, a metal layer 41 which is a nickel layer is provided between the support substrate 10 and the metal layer 42 which is a copper layer. Nickel has a larger Young's modulus than copper. Also, since the metal layer 42 is the thickest in the frame 18, the metal layer 41 is thinner than the metal layer 42. Thus, since the metal layer 41 is thin and has a large Young's modulus, even if the support substrate 10 and the lid 30 expand and contract thermally according to the coefficient of linear expansion, the metal layer 41 is pliable. For this reason, even if a large strain is applied because the metal layer 41 is provided near the support substrate 10, it is considered that cracks are unlikely to occur at the interface between the metal layer 41 and other layers. On the other hand, the metal layer 42 which is a copper layer is positioned away from the support substrate 10 because the metal layer 41 is provided between it and the support substrate 10. Since the strain applied to the frame 18 becomes large at the connection portion with the support substrate 10, the strain applied to the metal layer 42 becomes small. For this reason, it is considered that cracks are also unlikely to occur at the interface between the metal layer 42 and other layers. From the above, it is considered that no cracks occurred in the frame 18 in Example 1.

[0046] Fig. 10(a) is a figure obtained from the results of Simulation 2, and Figs. 10(b) and 10(c) are figures obtained from the results of Simulation 1. The horizontal axis in Fig. 10(a) is the ratio of the thickness of the nickel layer to the thickness of the copper layer in the metal layer 76, and the vertical axis is the maximum value of the cumulative strain applied to the copper layer. As shown in Fig. 10(a), when the thickness of the nickel layer increases to a certain extent, the change in the strain applied to the copper layer becomes small. For example, when the ratio of the thickness of the nickel layer to the thickness of the copper layer is 18% or more, the change in the strain applied to the copper layer becomes small. This is considered to be because the strain becomes large at the connection portion with the support substrate 70 shown in region A of Fig. 7(b) for the frame 72, and the change in the strain becomes small because the copper layer is separated from the support substrate 70 by a certain amount or more.

[0047] The horizontal axis of Fig. 10(b) is the thickness of the copper layer in the metal layer 76, and the vertical axis is the maximum value of the cumulative strain applied to the copper layer. The horizontal axis of Fig. 10(c) is the width of the frame 72, and the vertical axis is the maximum value of the cumulative strain applied to the copper layer. As shown in Fig. 10(b) and Fig. 10(c), the thinner the copper layer or the larger the width of the frame 72, the greater the strain applied to the copper layer.

[0048] According to Example 1, as shown in Fig. 2, the frame 18 has a thickness of at least 1 / 2 of the distance D between the support substrate 10 and the lid 30, and includes a metal layer 42 (the first metal layer) having the highest conductivity among the plurality of metal layers, and a metal layer 41 (the second metal layer) located between the metal layer 42 and the support substrate 10, being thinner than the metal layer 42 and having a larger Young's modulus than the metal layer 42. In this way, by providing the metal layer 41, which is thinner than the metal layer 42 and has a larger Young's modulus, between the metal layer 42 and the support substrate 10, it is possible to suppress the occurrence of cracks in the frame 18 as described above. Therefore, deterioration of the sealing property can be suppressed. The Young's modulus of the metal layer 41 is preferably 1.2 times or more, more preferably 1.4 times or more, and still more preferably 1.5 times or more the Young's modulus of the metal layer 42.

[0049] In order to suppress cracks in the frame 18, from the viewpoint of suppressing the deformation of the metal layer 41, the thickness of the metal layer 41 is preferably 1 / 10 or less, more preferably 1 / 25 or less, and still more preferably 1 / 50 or less of the thickness of the metal layer 42. From the viewpoint of suppressing the strain applied to the metal layer 42, the thickness of the metal layer 41 is preferably 1 / 200 or more, more preferably 1 / 150 or more, and still more preferably 1 / 100 or more of the thickness of the metal layer 42. Also, from the viewpoint of suppressing the deformation of the metal layer 41, the Young's modulus of the metal layer 41 is preferably 1.2 times or more, more preferably 1.3 times or more, and still more preferably 1.4 times or more the Young's modulus of the metal layer 42.

[0050] In Example 1, the linear expansion coefficient of the metal layer 41 (nickel: 14.0 ppm / °C) is larger than that of the support substrate 10 (sapphire: 7.7 ppm / °C) and smaller than that of the metal layer 42 (copper: 17.7 ppm / °C). Thus, since the linear expansion coefficient of the metal layer 41 provided between the support substrate 10 and the metal layer 42 is a value between the linear expansion coefficients of the support substrate 10 and the metal layer 42, cracks are less likely to occur at the interface between the metal layer 41 and the metal layer 42.

[0051] In Example 1, as shown in FIG. 2, a metal layer 40 (third metal layer) is provided between the support substrate 10 and the metal layer 41. The difference between the linear expansion coefficient of the metal layer 42 (copper: 17.7 ppm / °C) and the linear expansion coefficient of the metal layer 40 (titanium 8.4 ppm / °C) is larger than the difference between the linear expansion coefficient of the metal layer 42 (copper: 17.7 ppm / °C) and the linear expansion coefficient of the metal layer 41 (nickel: 14.0 ppm / °C). As a result, since the linear expansion coefficient of the frame 18 increases in the order of the metal layer 40, the metal layer 41, and the metal layer 42, cracks are less likely to occur in the frame 18.

[0052] In Example 1, the support substrate 10 is a sapphire substrate, the metal layer 40 is a titanium layer, the metal layer 41 is a nickel layer, and the metal layer 42 is a copper layer. By providing the metal layer 40, which is a titanium layer, between the support substrate 10 and the metal layer 41, the adhesion between the support substrate 10 and the frame 18 can be improved. Since the metal layer 41 between the metal layer 40 and the metal layer 42 is a nickel layer, the adhesion between the metal layer 41 and the metal layers 40 and 42 is improved. Therefore, also from this point, cracks are less likely to occur in the frame 18. The same applies when a silicon substrate is used instead of the sapphire substrate.

[0053] In Example 1, the case of the surface acoustic wave device 50 (surface acoustic wave resonator or piezoelectric thin film resonator) as an element has been described as an example, but the element may be a passive element such as an inductor or a capacitor, an active element including a transistor, or a MEMS (Micro Electro Mechanical System) element or the like.

Example

[0054] FIG. 11(a) is a circuit diagram of the filter 200 according to Embodiment 2. As shown in FIG. 11(a), one or more series resonators S1 to S4 are connected in series between the input terminal Tin and the output terminal Tout. One or more parallel resonators P1 to P3 are connected in parallel between the input terminal Tin and the output terminal Tout. At least one of the series resonators S1 to S4 and the parallel resonators P1 to P3 may be used as the surface acoustic wave device 50 in Embodiment 1. The number of series resonators and parallel resonators can be set as appropriate. Although a ladder-type filter is shown as an example of the filter, the filter may also be a multi-mode filter.

[0055] FIG. 11(b) is a circuit diagram of the duplexer 210 according to a modification of Embodiment 2. As shown in FIG. 11(b), a transmission filter 80 is connected between the common terminal Ant and the transmission terminal Tx. A reception filter 82 is connected between the common terminal Ant and the reception terminal Rx. The transmission filter 80 passes the signal in the transmission band among the high-frequency signals input from the transmission terminal Tx as a transmission signal to the common terminal Ant and suppresses signals of other frequencies. The reception filter 82 passes the signal in the reception band among the high-frequency signals input from the common terminal Ant as a reception signal to the reception terminal Rx and suppresses signals of other frequencies. At least one of the transmission filter 80 and the reception filter 82 can be the filter of Embodiment 2. Although a duplexer is shown as an example of the multiplexer, a triplexer or a quadplexer may also be used.

[0056] As described above in detail with respect to the embodiments of the present invention, the present invention is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims.

Explanation of Reference Numerals

[0057] 10…Support substrate, 12…Piezoelectric layer, 14…Terminal, 16…Via wiring, 18…Frame, 20…Wiring, 22…Gap, 30…Lid, 40…Metal layer, 41…Metal layer, 42…Metal layer, 43…Metal layer, 44…Solder layer, 50…Surface acoustic wave device, 51…IDT, 52…Reflector, 53…Comb electrode, 54…Electrode finger, 55…Bus bar, 56…Lower electrode, 57…Upper electrode, 58…Gap, 59…Resonance region, 60…Metal layer, 61…Metal layer, 62…Metal layer, 63…Solder layer, 65…Crack, 70…Support substrate, 72…Frame, 74…Lid, 76…Metal layer, 78…Solder layer, 80…Transmitting filter, 82…Receiving filter, 100…Electronic component, 200…Filter, 210…Duplexer

Claims

1. A substrate, an element provided on the substrate, a lid provided on the substrate with a gap through which the element is exposed, sandwiching the substrate, a first metal layer located between the substrate and the lid, which is an annular structure provided around the element when the substrate is viewed from the element side, and has a thickness of at least 1 / 2 of the distance between the substrate and the lid, a second metal layer located between the first metal layer and the substrate, having a lower conductivity than the first metal layer, being thinner than the first metal layer, and having a larger Young's modulus than the first metal layer, an electronic component comprising the same.

2. The electronic component according to claim 1, wherein the coefficient of linear expansion of the second metal layer is greater than that of the substrate and smaller than that of the first metal layer.

3. The electronic component according to claim 2, wherein the thickness of the second metal layer is at least 1 / 200 and at most 1 / 10 of the thickness of the first metal layer.

4. The electronic component according to claim 1 or 2, further comprising a third metal layer located between the substrate and the second metal layer, and having a greater difference in coefficient of linear expansion from the first metal layer than the difference in coefficient of linear expansion between the first metal layer and the second metal layer.

5. The substrate is silicon or sapphire, the first metal layer is copper, the second metal layer is nickel, the third metal layer is titanium, the electronic component according to claim 4.

6. The electronic component according to claim 1 or 2, further comprising a solder layer located between the first metal layer and the lid, and a barrier layer located between the first metal layer and the solder layer for suppressing diffusion between the first metal layer and the solder layer.

7. The electronic component according to claim 1 or 2, wherein the element is an elastic wave element.

8. A filter comprising the electronic component according to claim 7.

9. A multiplexer comprising the filter according to claim 8.

Images