Power conversion device, control device of power conversion device, and control program of power conversion device

Abstract

To provide a power conversion device with which it is possible to detect the overcurrent of a bootstrap capacitor.SOLUTION: A power conversion device (10) comprises a bootstrap circuit (40) for supplying power from a capacitor (Cb) to an upper arm driver (31), and control means (60). The control means includes overcurrent detection means (62) for detecting that an overcurrent is flowing in the capacitor when the current detected by a current sensor (Rs) is larger than a threshold at a detection timing after elapse of a prescribed duration from start of charging during the period from start of charging to the capacitor by turning a lower arm switch (SL) on from a state of non-charging till termination of the changing. The threshold is set to be smaller than a peak current which is the peak of current flowing in the capacitor when charging is carried out while the power conversion device is in a normal state, and to be larger than a current flowing in the capacitor at a detection timing when charging is carried out while the power conversion device is in the normal state.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a power conversion device including a power conversion circuit having an upper arm switch and a lower arm switch, and a bootstrap circuit that supplies power to an upper arm driver that drives the upper arm switch.

Background Art

[0002] For example, in this type of power conversion device, based on the current information of the current flowing through a shunt resistor provided between the lower arm switch and the ground during the initial charging of the bootstrap capacitor included in the bootstrap circuit, there is one that detects that the upper arm switch has short-circuited and an overcurrent has flowed (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in addition to the short circuit of the upper arm switch, it is also conceivable that the bootstrap capacitor short-circuits. The overcurrent flowing through the shunt resistor when the bootstrap capacitor short-circuits is much smaller than the overcurrent flowing through the shunt resistor when the upper arm switch short-circuits. For this reason, for example, in a configuration where it is detected that the upper arm switch has short-circuited when the current flowing through the shunt resistor is greater than the threshold value, the current flowing through the shunt resistor when the bootstrap capacitor short-circuits does not become greater than the threshold value, and the short circuit (overcurrent) of the bootstrap capacitor cannot be detected. On the other hand, if the threshold value is decreased to detect the short circuit of the bootstrap capacitor, there is a risk of false detection that the upper arm switch has short-circuited even though the upper arm switch is not short-circuited.

[0005] The present invention has been made to solve the above problems, and its main object is to provide a power conversion device capable of detecting an overcurrent in a bootstrap capacitor.

Means for Solving the Problems

[0006] The first means for solving the above problems is a conversion circuit (20) having an upper arm switch (SH) and a lower arm switch (SL) connected in series, an upper arm driver (31) for on / off driving the upper arm switch, a lower arm driver (32) for on / off driving the lower arm switch, a bootstrap circuit (40) having a resistor (Rb), a diode (Db), and a capacitor (Cb) connected in series to the lower arm switch, and supplying power from the capacitor to the upper arm driver, a constant voltage power supply (50) for supplying power to the bootstrap circuit and the lower arm driver, current sensors (Rs, Rs2) connected in series to the bootstrap circuit and the lower arm switch, and detecting the current flowing through the connected portion, control means (60) for controlling the upper arm driver and the lower arm driver based on the current detected by the current sensor, A power conversion device (10) comprising: The control means includes overcurrent detection means (62) for detecting that an overcurrent is flowing through the capacitor when the current detected by the current sensor is greater than a threshold value at a detection timing after a predetermined period has elapsed since the start of charging until the charging is completed after turning on the lower arm switch to start charging the capacitor. The threshold value is smaller than the peak current, which is the peak of the current flowing through the capacitor when the capacitor is charged from an uncharged state in a state where the power conversion device is normal, and is set to be larger than the current flowing through the capacitor at the detection timing when the capacitor is charged from an uncharged state in a state where the power conversion device is normal.

[0007] According to the above configuration, the boost circuit has a resistor, a diode, and a capacitor connected in series to the lower arm switch, and supplies power from the capacitor to the upper arm driver. The current sensor is connected in series to the boost circuit and the lower arm switch, and detects the current flowing through the connected portion. Therefore, when the capacitor is short-circuited, an overcurrent flows through the capacitor, and the overcurrent is detected by the current sensor.

[0008] Here, in a state where the power conversion device is normal, during the period from when the lower arm switch is turned on to start charging the capacitor from an uncharged state until the charging is completed (hereinafter referred to as "during the initial charging period"), the current flowing through the capacitor first becomes the peak current (maximum current), and then gradually decreases. On the other hand, in a state where the capacitor is short-circuited, during the initial charging period, a current having the same magnitude as the peak current flows continuously through the capacitor. For this reason, the inventor of the present application has noticed that during the initial charging period, no distinguishable difference occurs in the current flowing through the capacitor between the state where the power conversion device is normal and the state where the capacitor is short-circuited unless a predetermined period has elapsed after the start of the charging.

[0009] In this regard, according to the overcurrent detection means and the threshold value, at the detection timing when a distinguishable difference occurs in the current flowing through the capacitor between the state where the power conversion device is normal and the state where the capacitor is short-circuited, it is detected that an overcurrent is flowing through the capacitor by the threshold value capable of distinguishing the difference. Therefore, the power conversion device can detect the overcurrent of the capacitor included in the boost converter circuit. Note that in the state where the power conversion device is normal, the lower arm switch may be turned on to start charging the capacitor from the charged state (charged state). In this case, the current flowing through the capacitor is smaller than the case where charging starts from the uncharged state of the capacitor, first becomes a peak current (maximum current), and then gradually decreases. Even in this case, according to the overcurrent detection means and the threshold value, the power conversion device can detect the overcurrent of the capacitor included in the boost converter circuit.

[0010] In addition, a configuration may be considered in which when the current detected by the current sensor is greater than the threshold value, it is detected that an overcurrent is flowing through the upper arm switch. In this configuration, the current detected by the current sensor at the time of the capacitor short circuit does not become larger than the threshold value corresponding to the short circuit of the upper arm switch, and the short circuit (overcurrent) of the capacitor cannot be detected. On the other hand, if the threshold value is decreased to detect the short circuit of the capacitor, there is a possibility of false detection that the upper arm switch is short-circuited even though the upper arm switch is not short-circuited. In this regard, the overcurrent detection means detects the overcurrent of the capacitor during the charging period, not the short circuit of the upper arm switch. Therefore, even if the threshold value is set according to the short circuit of the capacitor, it is possible to suppress false detection that the current flowing to the load by the conversion circuit after the charging of the capacitor is the overcurrent of the capacitor.

[0011] In the second means, when the control means detects that an overcurrent is flowing through the capacitor, the control means turns off the lower arm switch. According to such a configuration, when the capacitor is short-circuited and an overcurrent flows through the boost circuit, the overcurrent flowing through the boost circuit can be cut off. Therefore, when the capacitor is short-circuited, it is possible to suppress the resistance of the boost circuit from overheating. Accordingly, it is not necessary to increase the capacitance of the resistor in preparation for the case where the capacitor is short-circuited, and the capacitance of the resistor can be significantly reduced.

[0012] In the third means, the detection timing is set such that the cumulative current flowing through the boost circuit from when the charging is started with the capacitor in an uncharged state until the overcurrent is detected and the lower arm switch is turned off is equivalent to the cumulative current flowing through the boost circuit from when the charging is started with the capacitor in an uncharged state until the charging is completed in a state where the power conversion device is normal. According to such a configuration, when the capacitor is short-circuited, the amount of heat generated in the resistor from when the charging is started until it is cut off by the overcurrent can be suppressed to an amount of heat equivalent to the amount of heat generated in the resistor from the start to the end of the charging in a state where the power conversion device is normal. Therefore, the capacitance of the resistor can be set to the minimum capacitance that does not overheat during the charging of the capacitor in a state where the power conversion device is normal, and the capacitance of the resistor can be further reduced.

[0013] In the fourth means, when the control means executes a plurality of on-off operations of turning on and then turning off the lower arm switch after starting the charging of the capacitor by turning on the lower arm switch until the charging is completed, the control means sets the detection timing during any period when the lower arm switch is turned on in the on-off operations after the second time, and includes detection control means (63) for detecting the overcurrent by the overcurrent detection means.

[0014] According to the above configuration, after charging is started, the on-off operation of the lower arm switch is executed a plurality of times, and the charging of the capacitor is completed. Therefore, during the charging period of the capacitor, it is possible to suppress a large inrush current from flowing through the capacitor. In this case, when the predetermined period has elapsed since the start of charging the capacitor, the on-off operation after the second time may be being executed.

[0015] In this regard, the detection control means sets the detection timing during the period in which the lower arm switch is turned on in the on-off operation after the second time. Therefore, even when the charging of the capacitor is performed by a plurality of on-off operations of the lower arm switch, the overcurrent detection means can detect the overcurrent of the capacitor.

[0016] In the fifth means, the detection timing is such that the cumulative current flowing through the bootstrap circuit during the period in which the lower arm switch is turned on in each of the on-off operations from when the charging is started with the capacitor in an uncharged state until the overcurrent is detected and the lower arm switch is turned off is set to be equivalent to the cumulative current flowing through the bootstrap circuit from when the charging is started with the capacitor in an uncharged state until the charging is completed in a state where the power conversion device is normal. According to such a configuration, even in a configuration in which the initial charging of the capacitor is performed by a plurality of on-off operations of the lower arm switch, when the capacitor is short-circuited, the amount of heat generated in the resistor from when the charging is started until the overcurrent is cut off can be suppressed to an amount of heat equivalent to the amount of heat generated in the resistor from the start to the end of the charging in a state where the power conversion device is normal. Therefore, the capacitance of the resistor can be set to the minimum capacitance that does not overheat during the charging of the capacitor in a state where the power conversion device is normal, and the capacitance of the resistor can be made even smaller.

[0017] In a configuration where the initial charging of the capacitor is performed by multiple on / off operations of the lower arm switch, the upper arm switch may be turned on after the lower arm switch is turned off. When the upper arm switch is turned on, current flows to the load through the conversion circuit, so there is a risk of misdetecting an overcurrent in the capacitor.

[0018] In this regard, in the sixth means, the detection control means preferentially maintains the upper arm switch in the off state from the start of the charging until the detection timing. According to such a configuration, it is possible to avoid detecting an overcurrent in the capacitor while current is flowing to the load through the conversion circuit. Therefore, it is possible to suppress misdetection of the overcurrent in the capacitor.

[0019] When the output signal of the current sensor is small, the signal-to-noise ratio becomes small and the accuracy of detecting current by the current sensor decreases. In this regard, in the seventh means, the current sensor outputs two terminal voltages corresponding to the magnitude of the current to be detected, and between the current sensor and the overcurrent detection means, there is provided a differential amplification circuit (72) that amplifies the voltage difference between the two terminal voltages output by the current sensor and inputs it to the overcurrent detection means. According to such a configuration, even when the voltage difference between the two terminal voltages output according to the magnitude of the current detected by the current sensor is small, the voltage difference can be amplified by the differential amplification circuit. Therefore, the signal-to-noise ratio can be increased and the accuracy of detecting current by the current sensor can be improved. Furthermore, since the ground of the differential amplification circuit and the ground of the control means can be made common, an insulation circuit is not required and the current sensor can be made inexpensive.

[0020] In the eighth means, on the premise of the seventh means, the control means includes a first overcurrent detection means (61) that, when the current detected by the current sensor is greater than a first threshold value greater than the threshold value, detects that an overcurrent is flowing through the conversion circuit. A first differential amplifier circuit (71) is provided between the current sensor and the first overcurrent detection means to amplify the voltage difference between the two terminal voltages output by the current sensor and input it to the first overcurrent detection means. At this time, the amplification factor of the differential amplifier circuit is greater than the amplification factor of the first differential amplifier circuit.

[0021] According to the above configuration, since the first overcurrent detection means detects that an overcurrent is flowing through the conversion circuit based on a first threshold value greater than the threshold value, it is possible to suppress misdetection of a short circuit in the conversion circuit. And the amplification factor of the differential amplifier circuit that amplifies and inputs the voltage difference to the overcurrent detection means for detecting the overcurrent of the capacitor is greater than the amplification factor of the first differential amplifier circuit that amplifies and inputs the voltage difference to the first overcurrent detection means for detecting the overcurrent of the conversion circuit. Therefore, the voltage difference can be appropriately amplified according to the magnitude of each overcurrent detected by the overcurrent detection means and the first overcurrent detection means, and the respective signal-to-noise ratios can be increased.

[0022] In the ninth means, on the premise of the seventh means, a first current sensor (Rs1) is provided that is connected in series to the boost circuit and the lower arm switch, detects the current flowing through the connected part, and outputs two terminal voltages corresponding to the magnitude of the detected current. The control means includes a first overcurrent detection means (61) that, when the current detected by the first current sensor is greater than a first threshold value greater than the threshold value, detects that an overcurrent is flowing through the conversion circuit. A first differential amplifier circuit (71) is provided between the first current sensor and the first overcurrent detection means to amplify the voltage difference between the two terminal voltages output by the first current sensor and input it to the first overcurrent detection means. At this time, the gain of the current sensor (Rs2) for converting current into voltage is greater than the gain of the first current sensor for converting current into voltage.

[0023] According to the above configuration, since the first overcurrent detection means detects that an overcurrent is flowing through the conversion circuit with a first threshold value larger than the above-mentioned threshold value, it is possible to suppress misdetection of a short circuit in the conversion circuit. And, the gain of the current sensor used in the overcurrent detection means for detecting the overcurrent of the capacitor is larger than the gain of the first current sensor used in the first overcurrent detection means for detecting the overcurrent of the conversion circuit. Therefore, according to the magnitude of each overcurrent detected by the overcurrent detection means and the first overcurrent detection means, the current can be converted into an appropriate voltage, and each signal-to-noise ratio can be increased. Furthermore, since it is not necessary to increase the amplification factor of the differential amplification circuit and the first differential amplification circuit, it is possible to suppress a decrease in accuracy due to an offset error or the like of the differential amplification circuit.

[0024] In the tenth means, on the premise of the fourth means, the current sensor outputs two terminal voltages corresponding to the magnitude of the current to be detected, and between the current sensor and the overcurrent detection means, there is provided a differential amplification circuit (72) that amplifies the voltage difference between the two terminal voltages output by the current sensor and inputs it to the overcurrent detection means.

[0025] According to the above configuration, in a configuration in which the initial charging of the capacitor is performed by multiple on-off operations of the lower arm switch, the same operational effects as those of the seventh means can be achieved.

[0026] In the eleventh means, on the premise of the tenth means, the control means includes a first overcurrent detection means (61) that detects that an overcurrent is flowing through the conversion circuit when the current detected by the current sensor is larger than a first threshold value larger than the above-mentioned threshold value, and between the current sensor and the first overcurrent detection means, there is provided a first differential amplification circuit (71) that amplifies the voltage difference between the two terminal voltages output by the current sensor and inputs it to the first overcurrent detection means. At this time, the amplification factor of the differential amplification circuit is larger than the amplification factor of the first differential amplification circuit.

[0027] According to the above configuration, in the configuration where the initial charging of the capacitor is performed by multiple on / off operations of the lower arm switch, the same operational effects as those of the eighth means can be achieved.

[0028] Based on the premise of the tenth means and the twelfth means, a first current sensor (Rs1) is provided which is connected in series to the bootstrap circuit and the lower arm switch, detects the current flowing through the connected part, and outputs two terminal voltages corresponding to the magnitude of the detected current. The control means includes a first overcurrent detection means (61) for detecting that an overcurrent is flowing through the conversion circuit when the current detected by the first current sensor is greater than a first threshold value which is greater than the threshold value. A first differential amplification circuit (71) is provided between the first current sensor and the first overcurrent detection means, which amplifies the voltage difference between the two terminal voltages output by the first current sensor and inputs it to the first overcurrent detection means. At this time, the gain of the current sensor (Rs2) for converting current into voltage is greater than the gain of the first current sensor for converting current into voltage.

[0029] According to the above configuration, in the configuration where the initial charging of the capacitor is performed by multiple on / off operations of the lower arm switch, the same operational effects as those of the ninth means can be achieved.

[0030] The thirteenth means is a conversion circuit (20) having an upper arm switch (SH) and a lower arm switch (SL) connected in series, an upper arm driver (31) for driving the upper arm switch on and off, a lower arm driver (32) for driving the lower arm switch on and off, a bootstrap circuit (40) having a resistor (Rb), a diode (Db), and a capacitor (Cb) connected in series to the lower arm switch, and supplying power from the capacitor to the upper arm driver, a constant voltage power supply (50) for supplying power to the bootstrap circuit and the lower arm driver, A current sensor (Rs, Rs2) that is connected in series to the bootstrap circuit and the lower arm switch and detects a current flowing through the connected portion; A control device (60) applied to a power conversion device (10) comprising: The control device controls the upper arm driver and the lower arm driver based on the current detected by the current sensor. The control device includes overcurrent detection means (62) that detects that an overcurrent is flowing through the capacitor when the current detected by the current sensor is greater than a threshold value at a detection timing after a predetermined period has elapsed since the start of charging, during the period from when the lower arm switch is turned on to start charging the capacitor until the charging is completed. At this time, The threshold value is set to be smaller than the peak current that is the peak of the current flowing through the capacitor when the capacitor is charged from an uncharged state in a state where the power conversion device is normal, and is set to be larger than the current flowing through the capacitor at the detection timing when the capacitor is charged from an uncharged state in a state where the power conversion device is normal.

[0031] According to the above configuration, in the control device applied to the power conversion device, the same operational effects as those of the first means can be achieved.

[0032] The fourteenth means is A conversion circuit (20) having a series-connected upper arm switch (SH) and lower arm switch (SL); An upper arm driver (31) that drives the upper arm switch on and off; A lower arm driver (32) that drives the lower arm switch on and off; A bootstrap circuit (40) having a resistor (Rb), a diode (Db), and a capacitor (Cb) connected in series to the lower arm switch, and supplying power from the capacitor to the upper arm driver; A constant voltage power supply (50) that supplies power to the bootstrap circuit and the lower arm driver; A current sensor (Rs, Rs2) that is connected in series to the boost circuit and the lower arm switch and detects a current flowing through the connected portion; A control program applied to a power conversion device (10) comprising: Based on the current detected by the current sensor, a process of controlling the upper arm driver and the lower arm driver; After starting charging the capacitor by turning on the lower arm switch and until the charging is completed, when the current detected by the current sensor is greater than a threshold value at a detection timing after a predetermined period has elapsed since the start of the charging, a process of detecting that an overcurrent is flowing through the capacitor is executed by a computer (60). At this time, The threshold value is set to be smaller than the peak current that is the peak of the current flowing through the capacitor when the power conversion device is normal and the capacitor is charged from an uncharged state, and is set to be greater than the current flowing through the capacitor at the detection timing when the power conversion device is normal and the capacitor is charged from an uncharged state.

[0033] According to the above configuration, in the control program applied to the power conversion device, the same operational effects as those of the first means can be achieved.

Brief Description of the Drawings

[0034]

Figure 1

Figure 2

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Figure 10

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Mode for Carrying Out the Invention

[0035] (First Embodiment) Hereinafter, the first embodiment embodied in a power conversion device that converts the power supplied to a three-phase motor mounted on an electric vehicle or the like will be described with reference to the drawings.

[0036] As shown in FIG. 1, the inverter device 10 includes an inverter circuit 20, an upper arm driver 31, a lower arm driver 32, a bootstrap circuit 40, a constant voltage power supply 50, a shunt resistor Rs, and a control device 60. The inverter device 10 turns on and off the lower arm switch SL among the upper arm switch SH and the lower arm switch SL connected in series in the inverter circuit 20 to charge the capacitor Cb (bootstrap capacitor) of the bootstrap circuit 40.

[0037] The inverter circuit 20 (conversion circuit) generates, for example, an AC voltage from a DC voltage to drive a three-phase motor (electric motor). The inverter circuit 20 is configured by connecting an upper arm switch SH (e.g., IGBT: Insulated Gate Bipolar Transistor) and a lower arm switch SL (IGBT) that are complementarily turned on and off in series. Note that FIG. 1 shows only the U-phase (one phase) among the U-phase, V-phase, and W-phase as an example of the three-phase (n-phase) inverter circuit 20. As the arm switches SH and SL, an N-channel MOSFET or the like can also be adopted.

[0038] An upper arm driver 31 is provided connected to the upper arm switch SH of the inverter circuit 20. The upper arm driver 31 (upper arm drive circuit) turns on and off the upper arm switch SH, for example, by a pulse width modulation (hereinafter referred to as "PWM") signal. The upper arm driver 31 uses the power charged in the capacitor Cb by a constant voltage power supply 50, which is a power supply that supplies a DC constant voltage, as the power supply voltage.

[0039] Specifically, the bootstrap circuit 40 generates a voltage for turning on the upper arm switch SH using the charge charged in the capacitor Cb. The bootstrap circuit 40 has a resistor Rb, a diode Db, and a capacitor Cb connected in series. The first electrode of the capacitor Cb is connected to the high voltage terminal of the constant voltage power supply 50 via the diode Db (bootstrap diode) and the resistor Rb (bootstrap resistor, current limiting resistor). The second electrode of the capacitor Cb is connected to the connection point between the corresponding phase upper arm switch SH and the lower arm switch SL. That is, the resistor Rb, the diode Db, and the capacitor Cb are connected in series to the lower arm switch SL. The low voltage terminal of the constant voltage power supply 50 is connected to the low voltage side main terminal of the lower arm switch SL via a shunt resistor Rs.

[0040] In the bootstrap circuit 40, during the on-period when the lower arm switch SL is turned on, the capacitor Cb is charged by the constant voltage power supply 50 via the diode Db and the resistor Rb. The upper arm driver 31 is connected to the first electrode and the second electrode of the capacitor Cb, and turns on the upper arm switch SH using the charge stored in the capacitor Cb during the off-period when the lower arm switch SL is turned off. That is, the capacitor Cb generates a voltage for turning on the upper arm switch SH using the stored charge, and the upper arm driver 31 turns on the upper arm switch SH with the voltage generated by the capacitor Cb. When the capacitor Cb is charged, the lower arm driver 32 outputs an on-signal to the lower arm switch SL for a certain period of time to drive the lower arm switch SL to turn on.

[0041] Connected to the lower arm switch SL of the inverter circuit 20, a lower arm driver 32 is provided. The lower arm driver 32 (lower arm drive circuit) drives the lower arm switch SL to turn on and off, for example, with a PWM signal. The lower arm driver 32 is connected to the high-voltage terminal and the low-voltage terminal of the constant voltage power supply 50. The lower arm driver 32 uses the constant voltage power supply 50 as a power source.

[0042] Connected to the upper arm driver 31 and the lower arm driver 32, a control device 60 (ECU: Electronic Control Unit) is provided. The control device 60 (control means, computer) is configured as a microcomputer including, for example, a CPU, a ROM, a RAM, an input / output interface, and a storage device. The control device 60 realizes functions such as a gate ON / OFF means 69, a first overcurrent detection means 61, and a second overcurrent detection means 62 by executing the installed control program. The control device 60 can transmit and receive data or update software (program) via wireless communication, for example, by OTA (Over The Air) technology.

[0043] The control device 60 outputs a control signal to the upper arm driver 31 and the lower arm driver 32 to complementarily turn on and off the upper arm switch SH and the lower arm switch SL. A shunt resistor Rs is connected in series to the bootstrap circuit 40 and the lower arm switch SL. For example, the shunt resistor Rs is connected between the lower arm switch SL and the ground. The control device 60 detects the current flowing through the shunt resistor Rs based on the voltage across both terminals of the shunt resistor Rs. That is, the shunt resistor Rs (current sensor) detects the current flowing through the portion to which it is connected. Then, the control device 60 controls the duty ratio of the PWM signal output from each of the drivers 31 and 32 of the plurality of arm switches SH and SL constituting the inverter circuit 20 based on the current detected by the shunt resistors Rs respectively connected to the plurality of lower arm switches SL of the inverter circuit 20. Thereby, the control device 60 controls, for example, a three-phase motor to an appropriate driving state. Note that the arm switches SH and SL are supplied with electric power at a voltage higher than that of the constant voltage power supply 50 from an external DC power supply.

[0044] Next, the operation of the inverter device 10 configured as described above will be described.

[0045] First, the operation in a state where the inverter device 10 is normal will be described. When the inverter device 10 is started, a control signal is output from the control device 60 to the lower arm driver 32, and an ON signal as shown in FIG. 2 is output from the lower arm driver 32 to the lower arm switch SL, and the lower arm switch SL is driven to be on. At this time, since the capacitor Cb is in an uncharged state, the charging charge of the capacitor Cb is set to the power supply voltage. The upper arm driver 31 is not driven, and the upper arm switch SH remains off. That is, an ON signal is not output from the upper arm driver 31 to the upper arm switch SH (an OFF signal is output).

[0046] While the lower arm switch SL is on-driven, a charging current flows through the path indicated by the solid arrow in Fig. 1, and the capacitor Cb is charged through the resistor Rb. Immediately after the start of the inverter device 10, the capacitor Cb is in a no-charge state (uncharged state). Therefore, as shown by the solid line in Fig. 2, the current flowing through the capacitor Cb (hereinafter referred to as "Cb current") initially becomes a peak current (maximum current). For this reason, the resistor Rb is set with its resistance value and rating (capacity) so as to withstand this peak current. Thereafter, as the charging voltage of the capacitor Cb (hereinafter referred to as "Cb voltage") gradually increases, the Cb current gradually decreases, and the Cb voltage gradually increases and finally becomes substantially equal to the voltage of the constant voltage power supply 50, and the initial charging is completed. The resistor Rb is set with its resistance value and rating (capacity) so as to withstand the heat generated in the resistor Rb by the Cb current from the start to the end of the initial charging of the capacitor Cb.

[0047] Subsequently, the operation in the state where the capacitor Cb is short-circuited will be described. In the state where the capacitor Cb is short-circuited, as shown by the broken line in Fig. 2, the Cb current having the same magnitude as the peak current immediately after the start of the inverter device 10 continues to flow as it is. Therefore, even when the capacitor Cb is short-circuited, it is necessary to increase the rating (capacity) of the resistor Rb so as not to ignite due to the heat generation of the resistor Rb, and the size of the resistor Rb increases. On the other hand, if the rating of the resistor Rb can be designed based on the amount of heat generated in the resistor Rb in the state where the capacitor Cb is normally charged (when the inverter device 10 is normal), the size of the resistor Rb can be significantly reduced. Therefore, in the present embodiment, by detecting that the capacitor Cb is short-circuited and immediately executing control to turn off the lower arm switch SL, it is possible to significantly reduce the size of the resistor Rb.

[0048] FIG. 3 is a time chart showing a mode of detecting an overcurrent of the capacitor Cb. This detection of the overcurrent of the capacitor Cb (second overcurrent detection) is executed by the second overcurrent detection means 62. The second overcurrent detection means 62 (overcurrent detection means) executes the detection of the overcurrent of the capacitor Cb only during the period of timings t1 to t3 in the initial charging period (the first on-period tL of the lower arm switch SL). Then, when the Cb current I2 flowing through the shunt resistor Rs is larger than the threshold Ith2, it is detected that an overcurrent is flowing through the capacitor Cb. Here, the case where the overcurrent of the capacitor Cb is detected at the timing t1 (detection timing) after a predetermined period has elapsed since the start of charging the capacitor Cb will be described as an example. The predetermined period is a period in which a distinguishable difference occurs in the Cb current between the state where the inverter device 10 is normal and the state where the capacitor Cb is short-circuited. The predetermined period is a period longer than 0 and shorter than the period from the timing 0 to the timing t1. The threshold Ith2 is set to be smaller than the peak current Ipeak of the Cb current when the inverter device 10 is normal and larger than the Cb current I2 at the timing t1 when the inverter device 10 is normal. In the example of FIG. 3, the initial charging period of the capacitor Cb is shorter than the carrier period T (tL + tH) for driving the arm switches SL and SH.

[0049] At timing 0, when the inverter device 10 is started, with the capacitor Cb in a no-charge state (uncharged state), the upper-arm switch SH is turned off and the lower-arm switch SL is turned on. As a result, the Cb current becomes the peak current Ipeak, and then the Cb current gradually decreases. Before reaching timing t1 from timing 0, the overcurrent of the capacitor Cb is not detected. Therefore, even if the Cb current I2 (for example, the peak current Ipeak) detected at timings 0 to t1 during normal operation of the inverter device 10 is greater than the threshold Ith2, it is possible to avoid misdetecting that an overcurrent is flowing through the capacitor Cb. Note that the above description is a method for setting the threshold Ith2 for detecting normal or abnormal (capacitor short circuit) even when the current is maximum during normal operation, that is, when the capacitor Cb is in a no-charge state (uncharged state). Therefore, by setting this threshold Ith2, even when the capacitor Cb is in a charged state during actual startup, since the peak current Ipeak continues in the case of capacitor abnormality, it becomes possible to detect an abnormality (capacitor Cb short circuit).

[0050] At timing t1, it is determined whether the detected Cb current I2 is greater than the threshold Ith2. Note that during the initial charging period (timings 0 to t3), since the motor current I1 in the motor control period does not flow, there is no misdetection that an overcurrent is flowing through the capacitor Cb due to the motor current I1. When it is determined at timing t1 that the Cb current I2 is greater than the threshold Ith2 and a command to turn off the lower-arm switch SL is output, and when the lower-arm switch SL is actually turned off at timing t2 and the overcurrent is cut off, timing t2 is the timing at which the current-time integral of the Cb current or the effective value (effective current) of the Cb current satisfies the following conditions.

[0051] The current-time integral (Ipeak×t2) of the Cb current from timing 0 to t2 when the capacitor Cb is short-circuited is equal to the current-time integral (the integral of the Cb current graph in the normal state (no charge state) of the inverter device 10) from timing 0 to t3. Or, the effective value of the Cb current from timing 0 to t3 when the capacitor Cb is short-circuited is equal to the effective value of the Cb current from timing 0 to t3 in the normal state of the inverter device 10. That is, the timing t1 (detection timing) is such that the cumulative current flowing through the resistor Rb (bootstrap circuit 40) between the start of charging of the capacitor Cb and the timing t2 when an overcurrent is detected and the lower arm switch SL is turned off is equivalent to the cumulative current flowing through the resistor Rb during the period from the start to the end of the charging (timing 0 to t3) in a state where the inverter device 10 is normal.

[0052] Thereby, even when the capacitor Cb is short-circuited, the amount of heat generated in the resistor Rb from the start of the initial charging of the capacitor Cb until the overcurrent is cut off can be suppressed to be equivalent to the amount of heat generated in the resistor Rb during the initial charging period (timing 0 to t3) in the normal state (no charge state) of the inverter device 10.

[0053] In the motor control period after timing t3, the first overcurrent detection means 61 detects that the upper arm switch SH is short-circuited (an overcurrent is flowing through the inverter circuit 20) when the motor current I1 flowing through the shunt resistor Rs is greater than the first threshold Ith1 which is greater than the threshold Ith2. For example, the first threshold Ith1 is about several hundred [A], and the threshold Ith2 is about several [A]. In the motor control period, the second overcurrent detection means 62 does not perform overcurrent detection of the capacitor Cb. Therefore, even if the motor current I1 exceeds the threshold Ith2, it is possible to avoid misdetection that an overcurrent is flowing through the capacitor Cb.

[0054] Figure 4 is a time chart showing the detection timing t1 and the threshold Ith2. As described above, the timing t2 is determined so that the effective value of the Cb current from timing 0 to t3 when the capacitor Cb is short-circuited is equal to the effective value of the Cb current from timing 0 to t3 when the inverter device 10 is normal (no charge state).

[0055] The effective value Irms of the current when the inverter device 10 is normal is represented by the following formula (1). Vcc is the voltage of the constant voltage power supply 50, e is the base of the natural logarithm (Napier's number), T is the carrier period, Rb is the resistance value of the resistor Rb, τ is the time constant determined by the product of the resistance value of the resistor Rb (exactly Rb + Rs, but approximately Rb) and the capacitance of the capacitor Cb, and Rs is the resistance value of the shunt resistor Rs.

[0056]

Equation

[0057]

Equation

[0058]

Equation

[0059] The peak current Ipeak of the Cb current is represented by the following formula (4).

Equation

Equation

[0060] FIG. 5 is a flowchart showing the processing procedure of the second overcurrent detection (overcurrent detection of the capacitor Cb). This series of processes is executed by the second overcurrent detection means 62, for example, immediately after the inverter device 10 is started. When the inverter circuit 20 supplies power to a three-phase motor, bootstrap circuits 40 are provided for each of the three phases of the U-phase, V-phase, and W-phase. Since the processing procedure of the second overcurrent detection executed immediately after the start of the inverter device 10 is the same for the U-phase, V-phase, and W-phase, the processing procedure will be described here for only one phase.

[0061] First, at timing 0 immediately after the start of the inverter device 10, an off command is given to the upper arm switch SH and an on command is given to the lower arm switch SL (S100). Specifically, a control signal is output to the upper arm driver 31 and the lower arm driver 32 by the gate ON / OFF means 69, and the upper arm switch SH and the lower arm switch SL are driven off and on, respectively.

[0062] Subsequently, wait for t1 hours until timing t1 (the above detection timing) (S101). Note that, as described above, t1 = t2 may be used. Detect the Cb current I2 flowing through the shunt resistor Rs at timing t1, and store the Cb current I2 at timing t1 (S102).

[0063] Subsequently, it is determined whether the detected Cb current I2 is smaller than the threshold Ith2 (S103). In this determination, if it is determined that the Cb current I2 is smaller than the threshold Ith2 (S103: YES), it is determined to be normal (S104). A turn-off command is given to the upper arm switch SH, and a turn-on command is given to the lower arm switch SL (S105). That is, during the initial charging period of the capacitor Cb, the upper arm switch SH is maintained in the off state and the lower arm switch SL is maintained in the on state. Thereafter, normal motor control is commanded (S106).

[0064] On the other hand, in the determination of S103, if it is determined that the Cb current I2 is not smaller than the threshold Ith2 (S103: NO), it is determined that an abnormality has occurred in which the capacitor Cb is short-circuited (S107). A turn-off command is given to the upper arm switch SH, and a turn-off command is given to the lower arm switch SL (S108). That is, a command is given to immediately cut off the overcurrent flowing through the capacitor Cb. As a result, the Cb current is cut off at timing t2, and the initial charging of the capacitor Cb is stopped. The start / stop of the inverter device 10 is commanded (S109). Thereafter, this series of processes is terminated.

[0065] The present embodiment described in detail above has the following advantages.

[0066] · According to the second overcurrent detection means 62 and the threshold Ith2, at the timing t1 (detection timing) after the timing at which a distinguishable difference occurs in the current (Cb current) flowing through the capacitor Cb between the state where the inverter device 10 is normal and the state where the capacitor Cb is short-circuited, it is detected that an overcurrent is flowing through the capacitor Cb by the threshold Ith2 capable of distinguishing the difference. Therefore, the inverter device 10 can detect the overcurrent of the capacitor Cb included in the bootstrap circuit 40.

[0067] · The second overcurrent detection means 62 detects an overcurrent in the capacitor Cb during the initial charging period, rather than a short circuit in the upper arm switch SH. Therefore, even if the threshold Ith2 corresponding to a short circuit in the capacitor Cb is set, it is possible to suppress misdetection of the current flowing to the three-phase motor (motor current I1) by the inverter circuit 20 after the charging of the capacitor Cb is completed as an overcurrent in the capacitor Cb. Note that a short circuit in the upper arm switch SH is detected by the first overcurrent detection means 61 during the motor control period after the initial charging of the capacitor Cb is completed.

[0068] · When the control device 60 detects that an overcurrent is flowing in the capacitor Cb, it turns off the lower arm switch SL. With such a configuration, when the capacitor Cb is short-circuited and an overcurrent flows through the bootstrap circuit 40, the overcurrent flowing through the bootstrap circuit 40 can be immediately interrupted. Therefore, when the capacitor Cb is short-circuited, it is possible to suppress overheating of the resistor Rb in the bootstrap circuit 40. Accordingly, it is not necessary to increase the capacitance of the resistor Rb in preparation for the case where the capacitor Cb is short-circuited, and the capacitance of the resistor Rb can be significantly reduced. For example, assume that the voltage of the constant voltage power supply 50 is 20 [V], the resistance value of the resistor Rb is 10 [Ω], and the capacitance of the capacitor Cb is 4.7 [μF]. In this case, when the capacitor Cb is short-circuited and the peak current Ipeak continues to flow, it is necessary to set the capacitance of the resistor Rb to 40 [W], but when the overcurrent can be interrupted when the capacitor Cb is short-circuited as described above, the capacitance of the resistor Rb can be set to about 0.5 [W].

[0069] ·Timing t1 is set such that the cumulative current flowing through the bootstrap circuit 40 between the start of charging of the capacitor Cb and the timing t2 when an overcurrent is detected and the lower arm switch SL is turned off is equivalent to the cumulative current flowing through the bootstrap circuit 40 between the start of charging and the timing t3 when charging ends in a state where the inverter device 10 is normal (no charge state). Specifically, the effective value of the Cb current from timing 0 to t3 when the capacitor Cb is short-circuited is equal to the effective value of the Cb current from timing 0 to t3 when the inverter device 10 is normal. With such a configuration, when the capacitor Cb is short-circuited, the amount of heat generated in the resistor Rb between the start of charging and the timing t2 when the overcurrent is cut off can be suppressed to an amount of heat equivalent to the amount of heat generated in the resistor Rb between the start (timing 0) and end (timing t3) of charging in a state where the inverter device 10 is normal. Therefore, the capacitance of the resistor Rb can be set to the minimum capacitance that does not overheat during the charging of the capacitor Cb in a state where the inverter device 10 is normal, and the capacitance of the resistor Rb can be made even smaller.

[0070] ·The above-described operational effects can be achieved by a control program applied to the inverter device 10. Specifically, the control device 60 can realize the functions of the gate ON / OFF means 69 and the second overcurrent detection means 62 by executing the installed control program.

[0071] (Second Embodiment) Hereinafter, the second embodiment will be described centering on the differences from the first embodiment. For parts that are the same as those in the first embodiment, the same reference numerals are used and their descriptions are incorporated by reference. In the second embodiment, the initial charging period of the capacitor Cb is longer than the carrier period T (tL + tH) for driving the arm switches SL and SH. For this reason, the control device 60 executes the on / off operation of turning on and then turning off the lower arm switch SL a plurality of times between turning on the lower arm switch SL from the no charge state (uncharged state) of the capacitor Cb to start charging and ending the initial charging.

[0072] In a configuration where the initial charging of the capacitor Cb is performed by multiple on / off operations of the lower arm switch SL, when the lower arm switch SL is turned off, the upper arm switch SH is turned on. When the upper arm switch SH is on, there is a possibility that current may flow through the three-phase motor via the inverter circuit 20, so there is a possibility of erroneously detecting an overcurrent in the capacitor Cb. Therefore, during the period when the lower arm switch SL is turned off (the on period of the upper arm switch SH), the control device 60 turns off the upper arm switch SH except when it is after the timing t1 (detection timing).

[0073] As shown in FIG. 6, the control device 60 includes detection control means 63. By executing the installed control program, the control device 60 realizes the functions of the detection control means 63 in addition to the functions of the gate ON / OFF means 69, the first overcurrent detection means 61, and the second overcurrent detection means 62.

[0074] FIG. 7 is a time chart showing a mode of detecting an overcurrent in the capacitor Cb. The detection control means 63 permits the overcurrent detection of the capacitor Cb by the second overcurrent detection means 62 (second overcurrent detection), and the overcurrent detection of the capacitor Cb is executed by the second overcurrent detection means 62. The detection control means 63 permits the overcurrent detection of the capacitor Cb only during the period from timing t1 to t4 within the initial charging period (timing 0 to t4). Timing t4 is the timing when the initial charging period ends. Further, the detection control means 63 permits the overcurrent detection of the capacitor Cb only during the on period of the lower arm switch SL, and prohibits the overcurrent detection of the capacitor Cb during the off period of the lower arm switch SL. Then, the second overcurrent detection means 62 (overcurrent detection means) detects that an overcurrent is flowing through the capacitor Cb when the overcurrent detection of the capacitor Cb is permitted and the Cb current I2 flowing through the shunt resistor Rs is greater than the threshold Ith2. Here, a case will be described as an example where the overcurrent detection of the capacitor Cb is executed at the timing t1 (detection timing) after the elapse of the predetermined period and the first carrier cycle T since the start of charging of the capacitor Cb.

[0075] As shown by the solid-line ellipse, from timing 0 to before timing t1, even during the on-period tH in which the upper-arm switch SH is turned on, the detection control means 63 maintains the upper-arm switch SH in the off state with priority over other controls. For this reason, it is possible to avoid the motor current I1 from flowing out before detecting the overcurrent of the capacitor Cb.

[0076] At timing t1, it is determined whether or not the detected Cb current I2 is greater than the threshold Ith2. Timing t1 is basically set in the same manner as in the first embodiment. The current-time product of the Cb current from timing 0 to t4 when the capacitor Cb is short-circuited is equal to the current-time product (the integral of the normal Cb current graph) of the Cb current from timing 0 to t4 when the inverter device 10 is normal. Or, the effective value of the Cb current from timing 0 to t4 when the capacitor Cb is short-circuited is equal to the effective value of the Cb current from timing 0 to t4 when the inverter device 10 is normal. That is, timing t1 (detection timing) is such that the cumulative current flowing through the resistor Rb during the on-period tL in which the lower-arm switch SL is turned on in the on-off operation of each lower-arm switch SL from the start of the initial charging of the capacitor Cb until the overcurrent is detected and the lower-arm switch SL is turned off at timing t2 corresponds to the cumulative current flowing through the resistor Rb from the start of the initial charging until the end of the initial charging (timing 0 to t4) in a state where the inverter device 10 is normal. Thereby, the detection control means 63 sets timing t1 during the on-period tL in which the lower-arm switch SL is turned on in the on-off operation of the lower-arm switch SL after the second time, and causes the second overcurrent detection means 62 to detect the overcurrent of the capacitor Cb.

[0077] FIG. 8 is a flowchart showing the processing procedure of overcurrent detection control. This series of processes is executed by the detection control means 63, for example, immediately after the start of the inverter device 10.

[0078] First, set a parameter i representing the number of times the lower arm switch SL is turned on during the initial charging period to an initial value of 0 (S200).

[0079] Subsequently, determine whether the timing t1 (detection timing) is later than the total of the on-periods tL of the lower arm switch SL up to now (S201). Specifically, determine whether tL×(i + 1) < t1. In this determination, if it is determined that tL×(i + 1) < t1 (S201: YES), issue an off command for the upper arm switch SH and an on command for the lower arm switch SL (S203). Wait for tL hours until the on-period tL of the lower arm switch SL ends (S204).

[0080] Subsequently, issue an off command for the upper arm switch SH and an off command for the lower arm switch SL (S205), and wait for tH hours until the on-period tH of the upper arm switch SH ends (S210). That is, before the detection timing t1, even if it is the on-period tH of the upper arm switch SH, the upper arm switch SH is preferentially maintained in the off state.

[0081] Subsequently, determine whether the parameter i = 5 (S211). The parameter i = 5 is an example of a predetermined number for setting the number of carrier cycles T included from the start to the end of the initial charging. In this determination, if it is determined that the parameter i is not 5 (S211: NO), add 1 to the parameter i (i = i + 1) (S212), and execute the process from S201 again. On the other hand, in the determination of S211, if it is determined that the parameter i = 5 (S211: YES), end this series of processes.

[0082] In addition, in the judgment of S201, tL×(i+1) <t1でないと判定した場合(S201:NO)、前回までの下アームスイッチSLのオン期間の合計がタイミングt1を超えているか否か判定する(S202)。具体的には、t1<tL×iであるか否か判定する。この判定において、t1<tL×iでないと判定した場合(S202:NO)、第2過電流検出のルーチンを実行する(S206)。第2過電流検出ルーチンについては後述する。その後、S210の処理へ進む。

[0083] On the other hand, in the judgment of S202, t1 <tL×iであると判定した場合(S202:YES)、上アームスイッチSHをオフ指令し、下アームスイッチSLをオン指令する(S207)。下アームスイッチSLのオン期間tLが終了するまでtL時間だけ待つ(S208)。続いて、上アームスイッチSHをオン指令し、下アームスイッチSLをオフ指令し(S209)、上アームスイッチSHのオン期間tHが終了するまでtH時間だけ待つ(S210)。すなわち、上アームスイッチSHのオン期間において、上アームスイッチSHがオンの状態を維持する。その後、S211の処理へ進む。

[0084] Fig. 9 is a flowchart showing the processing procedure of the second overcurrent detection routine. This series of processing is executed by the second overcurrent detection means 62 when the detection control means 63 commands (permits) execution. The processing in Fig. 9 differs from the processing in Fig. 5 only in that the processing in S101 in Fig. 5 is changed to processing in S101A. The same processing as the processing in Fig. 5 is denoted by the same step numbers and the explanation thereof is incorporated herein.

[0085] In S101A, the process waits for a time (t1-tL×i) until timing t1 (the detection timing) (S101A). That is, the process waits for a time obtained by subtracting the cumulative total of the on-periods tL of the lower arm switches SL from the time t1, thereby waiting for the timing t1 at which overcurrent detection of the capacitor Cb is to be performed. Note that t1 may be set to t2 as described above. Then, the process proceeds to S102.

[0086] The embodiment described in detail above has the same advantages as the first embodiment, but only the advantages different from the first embodiment will be described here.

[0087] · After charging of the capacitor Cb starts from the uncharged state, the on-off operation of the lower arm switch SL is executed a plurality of times, thereby completing the initial charging of the capacitor Cb. Therefore, it is possible to suppress a large inrush current from flowing through the capacitor Cb during the initial charging period of the capacitor Cb.

[0088] · The control device 60 sets the timing t1 during the period when the lower arm switch SL is turned on in the on-off operations after the second time. Therefore, even when the initial charging of the capacitor Cb is performed by the on-off operations of the lower arm switch SL a plurality of times, the overcurrent of the capacitor Cb can be detected by the second overcurrent detection means 62.

[0089] · The timing t1 is such that the cumulative current flowing through the bootstrap circuit 40 during the period when the lower arm switch SL is turned on in each on-off operation between the start of the initial charging and the timing t2 when an overcurrent is detected and the lower arm switch SL is turned off is equivalent to the cumulative current flowing through the bootstrap circuit 40 from the start to the end of the charging (timing 0 to t4) when the inverter device 10 is in a normal state. According to such a configuration, even in a configuration where the initial charging of the capacitor Cb is performed by the on-off operations of the lower arm switch SL a plurality of times, when the capacitor Cb is short-circuited, the amount of heat generated in the resistor Rb between the start of the charging and the timing t2 when the overcurrent is cut off can be suppressed to an amount of heat equivalent to the amount of heat generated in the resistor Rb from the start to the end of the charging when the inverter device 10 is in a normal state. Therefore, the capacitance of the resistor Rb can be set to the minimum capacitance that does not overheat during the charging of the capacitor Cb when the inverter device 10 is in a normal state, and the capacitance of the resistor Rb can be made even smaller.

[0090] ·The control device 60 preferentially maintains the upper arm switch SH in the OFF state from the start of charging until the timing t1. According to such a configuration, it is possible to avoid detecting an overcurrent in the capacitor Cb while a current is flowing through the three-phase motor via the inverter circuit 20. Therefore, it is possible to suppress the misdetection of the overcurrent in the capacitor Cb.

[0091] Note that the second embodiment can also be implemented with the following modifications. For parts that are the same as those in the second embodiment, the same reference numerals are used and their descriptions are incorporated by reference.

[0092] ·As the cumulative sum of the ON periods tL of the past lower arm switch SL, a period including the OFF period of the lower arm switch SL (the ON period tH of the upper arm switch SH) may be used for convenience. Even in this case, the cumulative sum of the current flowing through the resistor Rb (bootstrap circuit 40) from the start of the initial charging of the capacitor Cb until the overcurrent is detected and the lower arm switch SL is turned off is close to the current flowing through the resistor Rb during the period from the start of the initial charging to the end of the initial charging (timings 0 to t4) when the inverter device 10 is normal.

[0093] ·From the start of the initial charging of the capacitor Cb to the timing t1, if the timing t1 does not overlap with the ON period tH of the upper arm switch SH, it is also possible not to issue an OFF command for the upper arm switch SH during the ON period tH of the upper arm switch SH. Even in this case, since the initial charging of the capacitor Cb has not ended, the motor current I1 hardly flows during the ON period tH of the upper arm switch SH.

[0094] Note that the first embodiment and the second embodiment can also be implemented with the following modifications. For parts that are the same as those in the first embodiment and the second embodiment, the same reference numerals are used and their descriptions are incorporated by reference.

[0095] · In the determination of S103 in FIGS. 5 and 9, if it is determined that the Cb current I2 is not less than the threshold Ith2 (S103: NO), the processes of S102 and S103 are immediately executed again. If it is determined again that the Cb current I2 is not less than the threshold Ith2 (S103: NO), it may be determined that an abnormality has occurred in which the capacitor Cb is short-circuited (S107). On the other hand, if it is determined in the re-determination of S103 that the Cb current I2 is less than the threshold Ith2 (S103: YES), it may be determined that it is normal (S104).

[0096] · When the output signal of the shunt resistor Rs (current sensor) is small, the signal-to-noise ratio becomes small, and the accuracy of detecting the current by the shunt resistor Rs decreases. Therefore, as shown in FIG. 10, a well-known differential amplifier circuit 72 may be provided between the shunt resistor Rs, the first overcurrent detection means 61, and the second overcurrent detection means 62. Specifically, the shunt resistor Rs outputs a high-voltage side terminal voltage and a low-voltage side terminal voltage (two terminal voltages) corresponding to the magnitude of the current to be detected. The differential amplifier circuit 72 (differential amplifier circuit) amplifies the voltage difference between the high-voltage side terminal voltage and the low-voltage side terminal voltage output by the shunt resistor Rs and inputs it to the first overcurrent detection means 61 and the second overcurrent detection means 62.

[0097] According to the above configuration, even when the voltage difference between the high-voltage side terminal voltage and the low-voltage side terminal voltage output according to the magnitude of the current detected by the shunt resistor Rs is small, the differential amplifier circuit 72 can amplify the voltage difference. Therefore, the signal-to-noise ratio can be increased, and the accuracy of detecting the current by the shunt resistor Rs can be improved. Furthermore, since the ground of the differential amplifier circuit 72 and the ground of the control device 60 can be made common, a circuit for detecting current can be made inexpensive without the need for an insulation circuit. When directly detecting the voltage of the capacitor Cb to detect a short circuit of the capacitor Cb, a voltage detection circuit including an insulation circuit is required, and the circuit becomes expensive.

[0098] · As shown in Fig. 11, a well-known differential amplifier circuit 71 may be provided between the shunt resistor Rs and the first overcurrent detection means 61, and a well-known differential amplifier circuit 72 may be provided between the shunt resistor Rs and the second overcurrent detection means 62. Specifically, the differential amplifier circuit 71 (the first differential amplifier circuit) amplifies the voltage difference between the terminal voltage on the high-voltage side and the terminal voltage on the low-voltage side output by the shunt resistor Rs and inputs it to the first overcurrent detection means 61. The differential amplifier circuit 72 (the second differential amplifier circuit) amplifies the voltage difference between the terminal voltage on the high-voltage side and the terminal voltage on the low-voltage side output by the shunt resistor Rs and inputs it to the second overcurrent detection means 62. And the amplification factor of the differential amplifier circuit 72 is set to be larger than the amplification factor of the differential amplifier circuit 71.

[0099] According to the above configuration, the amplification factor of the differential amplifier circuit 72 that amplifies and inputs the voltage difference to the second overcurrent detection means 62 for detecting the overcurrent of the capacitor Cb is larger than the amplification factor of the differential amplifier circuit 71 that amplifies and inputs the voltage difference to the first overcurrent detection means 61 for detecting the overcurrent of the inverter circuit 20. Therefore, the voltage difference can be appropriately amplified according to the magnitudes of the respective overcurrents detected by the second overcurrent detection means 62 and the first overcurrent detection means 61, and the respective signal-to-noise ratios can be increased.

[0100] · As shown in Fig. 12, shunt resistors Rs1 and Rs2 may be connected in series between the lower-arm switch SL and the ground. And a well-known differential amplifier circuit 71 (the first differential amplifier circuit) may be provided between the shunt resistor Rs1 (the first current sensor) and the first overcurrent detection means 61, and a well-known differential amplifier circuit 72 may be provided between the shunt resistor Rs2 (the current sensor) and the second overcurrent detection means 62. Here, the resistance value of the shunt resistor Rs2 is set to be larger than the resistance value of the shunt resistor Rs1. That is, the gain of the shunt resistor Rs2 for converting current into voltage is set to be larger than the gain of the shunt resistor Rs1 for converting current into voltage.

[0101] According to the above configuration, the gain of the shunt resistor Rs used in the second overcurrent detection means 62 for detecting the overcurrent of the capacitor Cb to convert current into voltage is larger than the gain of the shunt resistor Rs1 used in the first overcurrent detection means 61 for detecting the overcurrent of the inverter circuit 20 to convert current into voltage. Therefore, according to the magnitudes of the respective overcurrents detected by the second overcurrent detection means 62 and the first overcurrent detection means 61, the current can be converted into an appropriate voltage, and the respective SN ratios can be increased. Furthermore, since it is possible to suppress the amplification factors of the differential amplifier circuits 71 and 72 from becoming excessively large, it is possible to suppress a decrease in accuracy due to an offset error or the like of the differential amplifier circuits 71 and 72.

[0102] As shown in FIG. 13, a well-known differential amplifier circuit 71 (first differential amplifier circuit) may be provided between the shunt resistor Rs1 (first current sensor) and the first overcurrent detection means 61, and a well-known differential amplifier circuit 72 may be provided between the series connection of the shunt resistor Rs1 and the shunt resistor Rs2 and the second overcurrent detection means 62. That is, the series connection of the shunt resistor Rs1 and the shunt resistor Rs2 outputs the terminal voltage on the high-voltage side and the terminal voltage on the low-voltage side (two terminal voltages) corresponding to the magnitude of the current to be detected to the differential amplifier circuit 72. Also in this case, the resistance value of the series connection of the shunt resistor Rs1 and the shunt resistor Rs2 (current sensor) is set to be larger than the resistance value of the shunt resistor Rs1. That is, the gain of the series connection of the shunt resistor Rs1 and the shunt resistor Rs2 to convert current into voltage is set to be larger than the gain of the shunt resistor Rs1 to convert current into voltage. Note that the resistance value of the shunt resistor Rs2 may be different from or the same as the resistance value of the shunt resistor Rs1.

[0103] · As a current sensor for detecting the current flowing through the capacitor Cb (lower arm switch SL), a magnetic current sensor including a Hall sensor (Hall element) can also be employed. Even in this case, the magnetic current sensor outputs two terminal voltages corresponding to the magnitude of the current to be detected. Therefore, the voltage difference between the two terminal voltages output by the magnetic current sensor can be amplified by the differential amplifier circuits 71 and 72. Note that the current sensor can be connected at any position capable of detecting the current flowing through the capacitor Cb (lower arm switch SL).

[0104] · During the initial charging period of the capacitor Cb, if it is after a predetermined period in which a distinguishable difference occurs in the Cb current between the state where the inverter device 10 is normal and the state where the capacitor Cb is short-circuited, the timing t1 (detection timing) for detecting the overcurrent of the capacitor Cb can be set after the timing t2 where t2 = τ / 2.

[0105] · The timing for executing the second overcurrent detection process in FIG. 5 and the overcurrent detection control process in FIG. 8 (including the second overcurrent detection routine in FIG. 9) is not limited to immediately after the startup of the inverter device 10. For example, even during the motor control period after the startup of the inverter device 10, if the motor current I1 is near zero, that is, sufficiently smaller than the threshold Ith2, the second overcurrent detection process in FIG. 5 and the overcurrent detection control process in FIG. 8 may be executed. At this time, the capacitor Cb is in a charged state (charged state), but the charge amount (charged amount) is arbitrary.

[0106] · The present disclosure is not limited to an inverter device including an inverter circuit 20, and can also be applied to a DC / DC converter or the like (power conversion device) including an upper arm switch SH and a lower arm switch SL (power conversion circuit) and including a bootstrap circuit 40 that supplies power to the upper arm driver 31.

[0107] · The control device 60 and its method described in the present disclosure may be implemented by a dedicated computer configured by a processor and a memory programmed to execute one or more functions (instructions) embodied by a computer program. Alternatively, the control device 60 and its method described in the present disclosure may be implemented by a dedicated computer provided by configuring a processor with one or more dedicated hardware logic circuits. Or, the control device 60 and its method described in the present disclosure may be implemented by one or more dedicated computers configured by a combination of a processor programmed to execute one or more functions and a memory and a processor configured by one or more hardware logic circuits. Further, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions executable by a computer.

Description of Reference Numerals

[0108] 10... Inverter device, 20... Inverter circuit, 31... Upper arm driver, 32... Lower arm driver, 40... Bootstrap circuit, 50... Constant voltage power supply, 60... Control device, 62... Second overcurrent detection means, Cb... Capacitor, Db... Diode, SH... Upper arm switch, SL... Lower arm switch, Rb... Resistor, Rs... Shunt resistor, Rs1... Shunt resistor, Rs2... Shunt resistor.

Claims

1. A conversion circuit (20) having an upper arm switch (SH) and a lower arm switch (SL) connected in series; An upper arm driver (31) for turning on and off the upper arm switch; A lower arm driver (32) for turning on and off the lower arm switch; A bootstrap circuit (40) having a resistor (Rb), a diode (Db), and a capacitor (Cb) connected in series to the lower arm switch, and supplying power from the capacitor to the upper arm driver; A constant voltage power supply (50) for supplying power to the bootstrap circuit and the lower arm driver; Current sensors (Rs, Rs2) connected in series to the bootstrap circuit and the lower arm switch, for detecting the current flowing through the connected portion; Control means (60) for controlling the upper arm driver and the lower arm driver based on the current detected by the current sensors; A power conversion device (10) comprising: The control means includes overcurrent detection means (62) for detecting that an overcurrent is flowing through the capacitor when the current detected by the current sensor is greater than a threshold value at a detection timing after a predetermined period has elapsed since the start of charging, after turning on the lower arm switch to start charging the capacitor until the charging is completed; The threshold value is set to be smaller than the peak current which is the peak of the current flowing through the capacitor when the power conversion device is normal and the capacitor is charged from an uncharged state, and is greater than the current flowing through the capacitor at the detection timing when the power conversion device is normal and the capacitor is charged from an uncharged state. Power conversion device.

2. The power conversion device according to claim 1, wherein the control means turns off the lower arm switch when it detects that an overcurrent is flowing through the capacitor.

3. The detection timing is set such that the cumulative current flowing through the bootstrap circuit from when charging starts with the capacitor in an uncharged state until the overcurrent is detected and the lower arm switch is turned off is equivalent to the cumulative current flowing through the bootstrap circuit from when charging starts with the capacitor in an uncharged state until charging ends in a state where the power conversion device is normal. The power conversion device according to claim 2.

4. The control means executes a plurality of on-off operations of turning on and then turning off the lower arm switch during the period from when the lower arm switch is turned on to start charging the capacitor until the charging ends. The control means includes detection control means (63) that sets the detection timing during the period when the lower arm switch is turned on in the on-off operations after the second time and causes the overcurrent detection means to detect the overcurrent. The power conversion device according to claim 1 or 2.

5. The detection timing is set such that the cumulative current flowing through the bootstrap circuit during the period when the lower arm switch is turned on in each of the on-off operations from when charging starts with the capacitor in an uncharged state until the overcurrent is detected and the lower arm switch is turned off is equivalent to the cumulative current flowing through the bootstrap circuit from when charging starts with the capacitor in an uncharged state until charging ends in a state where the power conversion device is normal. The power conversion device according to claim 4.

6. The detection control means preferentially maintains the upper arm switch in the off state from when charging starts until the detection timing. The power conversion device according to claim 5.

7. The current sensor outputs two terminal voltages corresponding to the magnitude of the current to be detected. A differential amplifier circuit (72) that amplifies the voltage difference between the two terminal voltages output by the current sensor and inputs it to the overcurrent detection means is provided between the current sensor and the overcurrent detection means. The power conversion device according to any one of claims 1 to 3.

8. The control means includes first overcurrent detection means (61) that detects that an overcurrent is flowing through the conversion circuit when the current detected by the current sensor is greater than a first threshold value that is greater than the threshold value. A first differential amplifier circuit (71) is provided between the current sensor and the first overcurrent detection means to amplify the voltage difference between the two terminal voltages output by the current sensor and input it to the first overcurrent detection means. The power conversion device according to claim 7, wherein the amplification factor of the differential amplifier circuit is larger than the amplification factor of the first differential amplifier circuit.

9. A first current sensor (Rs1) is provided, which is connected in series to the bootstrap circuit and the lower arm switch, detects the current flowing through the connected part, and outputs two terminal voltages corresponding to the magnitude of the detected current. The control means includes first overcurrent detection means (61) for detecting that an overcurrent is flowing through the conversion circuit when the current detected by the first current sensor is greater than a first threshold value greater than the threshold value. A first differential amplifier circuit (71) is provided between the first current sensor and the first overcurrent detection means to amplify the voltage difference between the two terminal voltages output by the first current sensor and input it to the first overcurrent detection means. The gain of the current sensor (Rs2) for converting current into voltage is larger than the gain of the first current sensor for converting current into voltage. The power conversion device according to claim 7.

10. The current sensor outputs two terminal voltages corresponding to the magnitude of the detected current. The power conversion device according to claim 4, further comprising a differential amplifier circuit (72) that amplifies the voltage difference between the two terminal voltages output by the current sensor and inputs it to the overcurrent detection means between the current sensor and the overcurrent detection means.

11. The control means includes first overcurrent detection means (61) for detecting that an overcurrent is flowing through the conversion circuit when the current detected by the current sensor is greater than a first threshold value greater than the threshold value. A first differential amplifier circuit (71) is provided between the current sensor and the first overcurrent detection means to amplify the voltage difference between the two terminal voltages output by the current sensor and input it to the first overcurrent detection means. The power conversion device according to claim 10, wherein the amplification factor of the differential amplifier circuit is larger than the amplification factor of the first differential amplifier circuit.

12. A first current sensor (Rs1) is provided, which is connected in series to the bootstrap circuit and the lower arm switch, detects the current flowing through the connected part, and outputs two terminal voltages corresponding to the magnitude of the detected current. The control means includes a first overcurrent detection means (61) for detecting that an overcurrent is flowing through the conversion circuit when the current detected by the first current sensor is greater than a first threshold value greater than the threshold value. A first differential amplifier circuit (71) is provided between the first current sensor and the first overcurrent detection means for amplifying the voltage difference between the two terminal voltages output by the first current sensor and inputting the amplified voltage difference to the first overcurrent detection means. The power conversion device according to claim 10, wherein a gain of the current sensor (Rs2) for converting current into voltage is greater than a gain of the first current sensor for converting current into voltage.

13. A conversion circuit (20) having a series-connected upper arm switch (SH) and lower arm switch (SL); An upper arm driver (31) for on / off driving the upper arm switch; A lower arm driver (32) for on / off driving the lower arm switch; A bootstrap circuit (40) having a resistor (Rb), a diode (Db), and a capacitor (Cb) connected in series to the lower arm switch, and supplying power from the capacitor to the upper arm driver; A constant voltage power supply (50) for supplying power to the bootstrap circuit and the lower arm driver; A current sensor (Rs, Rs2) connected in series to the bootstrap circuit and the lower arm switch for detecting a current flowing through the connected portion; A control device (60) applied to a power conversion device (10) comprising: The control device controls the upper arm driver and the lower arm driver based on the current detected by the current sensor. The control device includes an overcurrent detection means (62) for detecting that an overcurrent is flowing through the capacitor when the current detected by the current sensor is greater than a threshold value at a detection timing after a predetermined period has elapsed since the start of charging until the charging is completed after turning on the lower arm switch to start charging the capacitor. The threshold value is smaller than the peak current which is the peak of the current flowing through the capacitor when the capacitor is charged from the uncharged state in a state where the power conversion device is normal, and is set to be larger than the current flowing through the capacitor at the detection timing when the capacitor is charged from the uncharged state in a state where the power conversion device is normal. A control device for a power conversion device.

14. A conversion circuit (20) having series-connected upper arm switches (SH) and lower arm switches (SL), An upper arm driver (31) for on / off driving the upper arm switch, A lower arm driver (32) for on / off driving the lower arm switch, A bootstrap circuit (40) having a resistor (Rb), a diode (Db), and a capacitor (Cb) connected in series to the lower arm switch, and supplying power from the capacitor to the upper arm driver, A constant voltage power supply (50) for supplying power to the bootstrap circuit and the lower arm driver, Current sensors (Rs, Rs2) connected in series to the bootstrap circuit and the lower arm switch for detecting the current flowing through the connected portion, A control program applied to a power conversion device (10) comprising: A process of controlling the upper arm driver and the lower arm driver based on the current detected by the current sensor, When the lower arm switch is turned on to start charging the capacitor and until the charging is completed, when the current detected by the current sensor is larger than a threshold value at the detection timing after a predetermined period has elapsed since the start of the charging, a process of detecting that an overcurrent is flowing through the capacitor is executed by a computer (60). The threshold value is smaller than the peak current which is the peak of the current flowing through the capacitor when the capacitor is charged from the uncharged state in a state where the power conversion device is normal, and is set to be larger than the current flowing through the capacitor at the detection timing when the capacitor is charged from the uncharged state in a state where the power conversion device is normal. A control program for a power conversion device.

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