Image sensor

Abstract

To provide a high pixel image sensor with noise improved.SOLUTION: An image sensor includes a first substrate having a first surface and a second surface facing each other and including a plurality of photoelectric conversion elements, and a color filter disposed on the second surface of the first substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is disposed on 36 photoelectric conversion elements. The 36 photoelectric conversion elements are arranged in six rows in a first direction and six columns in a second direction that is orthogonal to the first direction. Of the 36 photoelectric conversion elements, floating diffusion regions of 12 photoelectric conversion elements are connected into one.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present invention relates to an image sensor, and more particularly to a high-pixel image sensor with improved noise.

Background Art

[0002] An image sensor is a semiconductor device that converts an optical image into an electrical signal. Image sensors can be classified into charge coupled device (CCD) type image sensors based on silicon semiconductors and complementary metal oxide semiconductor (CMOS) type image sensors (CIS).

[0003] Among these, CMOS type image sensors have a simple driving method, can integrate a signal processing circuit on a single chip, can be miniaturized, have low power consumption, and can be applied to products with limited battery capacity. With the development of the electronics industry, it has become an issue to continue various studies to improve the performance of CMOS type image sensors.

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present invention has been made in view of the problems in the above-mentioned conventional image sensors, and an object of the present invention is to provide a high-pixel image sensor with improved noise.

Means for Solving the Problems

[0005] The image sensor according to the present invention made to achieve the above object includes a first surface and a second surface facing each other, a first substrate including a plurality of photoelectric conversion elements, and a color filter disposed on the second surface of the first substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is disposed on 36 photoelectric conversion elements, the 36 photoelectric conversion elements are arranged in 6 rows in a first direction and 6 columns in a second direction orthogonal to the first direction, and floating diffusion regions of 12 photoelectric conversion elements among the 36 photoelectric conversion elements are connected together, which is characterized in that.

[0006] Further, the image sensor according to the present invention made to achieve the above object includes a first surface and a second surface facing each other, a substrate including a plurality of photoelectric conversion elements, and a color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is disposed on 36 photoelectric conversion elements to form a first color region, the second color filter is disposed on 36 photoelectric conversion elements to form a second color region, the third color filter is disposed on 36 photoelectric conversion elements to form a third color region, the first color filter is disposed on 36 photoelectric conversion elements to form a fourth color region, and in each color region, the 36 photoelectric conversion elements are arranged in 6 rows in a first direction and 6 columns in a second direction orthogonal to the first direction. Floating diffusion regions of 12 photoelectric conversion elements among the 36 photoelectric conversion elements are connected together and connected to one analog-to-digital converter, and each color region includes 3 analog-to-digital converters, which is characterized in that.

[0007] In addition, an image sensor according to the present invention made to achieve the above object includes a substrate including a first surface and a second surface facing each other, and including a plurality of photoelectric conversion elements, and a color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is disposed on 36 photoelectric conversion elements, the 36 photoelectric conversion elements are arranged in 6 rows in a first direction and 6 columns in a second direction perpendicular to the first direction, and floating diffusion regions of 9 photoelectric conversion elements among the 36 photoelectric conversion elements are connected together.

Advantages of the Invention

[0008] According to the image sensor of the present invention, one color filter is disposed on 36 photoelectric conversion elements, floating diffusion regions of 12 photoelectric conversion elements or 9 photoelectric conversion elements are connected to form one pixel circuit, and the pixel circuit is connected to one analog-to-digital converter. The 36 photoelectric conversion elements on which the same color filter is disposed are connected to 3 analog-to-digital converters or 4 analog-to-digital converters. Thereby, various pixel signals can be output and noise can be reduced.

Brief Description of the Drawings

[0009]

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Embodiments for Carrying Out the Invention

[0010] Next, a specific example of an embodiment for implementing the image sensor according to the present invention will be described with reference to the drawings. However, the present invention can be implemented in various different forms and is not limited to the embodiments described herein.

[0011] In the drawings, the thickness is shown enlarged in order to clearly represent a plurality of layers and regions. Throughout the specification, the same reference numerals are given to similar parts. When a part such as a layer, film, region, plate, etc. is “on” another part, this includes not only the case where it is “directly on” the other part but also the case where there are other parts in between. Conversely, when a part is “directly above” another part, it means that there are no other parts in between.

[0012] Next, the image sensor according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an exemplary schematic configuration of an image sensor according to an embodiment of the present invention. Referring to FIG. 1, an image sensor 100 according to an embodiment of the present invention includes a controller 110, a timing generator 120, a load driver 130, a pixel array 140, a readout circuit 150, a lamp signal generator 160, a data buffer 170, and an image signal processor 180.

[0013] In one embodiment, the image signal processor 180 can also be arranged outside the image sensor 100. The image sensor 100 converts the light received from the outside into an electrical signal to generate an image signal. The image signal (IMS) is provided to the image signal processor 180. The image sensor 100 can be mounted on an electronic device having an image or light sensing function.

[0014] For example, the image sensor 100 can be mounted on electronic devices such as cameras, smartphones, wearable devices, Internet of Things (IoT) devices, home appliances, tablet personal computers (PCs), personal digital assistants (PDAs), portable multimedia players (PMPs), navigation systems, drones, and advanced driver assistance systems (ADAS). Alternatively, the image sensor 100 can be mounted on an electronic device provided as a component in vehicles, furniture, manufacturing equipment, doors, various measuring instruments, and the like.

[0015] The controller 110 generally controls each component (120, 130, 150, 160, 170) included in the image sensor 100. The controller 110 uses a control signal to control the operation timing of each component (120, 130, 150, 160, 170). In one embodiment, the controller 110 receives a mode signal instructing an imaging mode from an application processor, and generally controls the image sensor 100 based on the received mode signal. For example, the application processor determines the imaging mode of the image sensor 100 according to various scenarios such as the illuminance of the imaging environment, the user's resolution setting, the sensed or learned state, etc., and provides the determined result to the controller 110 as a mode signal.

[0016] The controller 110 controls a plurality of pixels of the pixel array 140 to output pixel signals according to the imaging mode. The pixel array 140 outputs pixel signals for each of the plurality of pixels or pixel signals for a part of the plurality of pixels. The readout circuit 150 samples and processes the pixel signals transmitted from the pixel array 140. The timing generator 120 generates a signal that serves as a reference for the operation timing of the configuration of the image sensor 100. The timing generator 120 controls the timings of the load driver 130, the readout circuit 150, and the ramp signal generator 160. The timing generator 120 provides a control signal for controlling the timings of the load driver 130, the readout circuit 150, and the ramp signal generator 160.

[0017] The pixel array 140 includes a plurality of pixels (PX), and a plurality of roller lines (RL) and a plurality of column lines (LL) respectively connected to the plurality of pixels (PX). In one embodiment, each pixel (PX) includes at least one or more photoelectric conversion elements. The photoelectric conversion element senses the incident light and converts the incident light into an electrical signal corresponding to the amount of light, that is, a plurality of analog pixel signals. The photoelectric conversion element may be a photodiode, a PIN diode, or the like. Also, the photoelectric conversion element may be a SPAD (Single-Photon Avalanche Diode) applied to a 3D sensor pixel. The level of the analog pixel signal output from the photoelectric conversion element is proportional to the amount of charge output from the photoelectric conversion element. That is, the level of the analog pixel signal output from the photoelectric conversion element is determined according to the amount of light received in the pixel array 140.

[0018] The plurality of roller lines (RL) extend in the first direction and are connected to the pixels (PX) arranged along the first direction. For example, the control signal output from the load driver 130 to the roller line (RL) is transmitted to the gates of the transistors of a plurality of pixels (PX) connected to the roller line (RL). The column line (LL) extends in a second direction intersecting the first direction and is connected to pixels (PX) arranged along the second direction. A plurality of pixel signals output from the plurality of pixels (PX) are transmitted to the lead-out circuit 150 via the plurality of column lines (LL).

[0019] On the pixel array 140, a color filter layer and a microlens layer can be arranged. The microlens layer includes a plurality of microlenses, and each of the plurality of microlenses is arranged on top of at least one corresponding pixel (PX). The color filter layer includes color filters such as red, green, and blue, and may further include a white filter additionally. For one pixel (PX), a color filter of one color is arranged between the pixel (PX) and the corresponding microlens. The specific structures of the color filter layer and the microlens layer will be described later with reference to FIG. 4.

[0020] The load driver 130 generates a control signal for driving the pixel array 140 in response to the control signal of the timing generator 120, and provides the control signal to the plurality of pixels (PX) of the pixel array 140 via the plurality of roller lines (RL). In one embodiment, the load driver 130 controls to sense the light incident on the pixels (PX) in units of roller lines. The unit of roller lines includes at least one roller line (RL). For example, the load driver 130 provides a transmission signal, a reset signal, a selection signal, etc. to the pixel array 140.

[0021] In response to a control signal from the timing generator 120, the readout circuit 150 converts a pixel signal (or an electrical signal) from a pixel (PX) connected to a selected roller line (RL) selected from among a plurality of pixels (PX) into a pixel value indicating the amount of light. The readout circuit 150 converts a pixel signal output via a corresponding column line (LL) into a pixel value. For example, the readout circuit 150 converts a pixel signal into a pixel value by comparing the ramp signal with the pixel signal. The pixel value can be image data having a plurality of bits. Specifically, the readout circuit 150 may include a selector, a plurality of comparators, and a plurality of counter circuits, etc.

[0022] The ramp signal generator 160 generates a reference signal and transmits it to the readout circuit 150. The ramp signal generator 160 includes a current source, a resistor, and a capacitor. The ramp signal generator 160 adjusts the magnitude of the current of the variable current source or the resistance value of the variable resistor to adjust the ramp voltage of the voltage applied to the ramp resistor, thereby generating a plurality of ramp signals that decrease or increase with a slope determined according to the magnitude of the current of the variable current source or the resistance value of the variable resistor.

[0023] The data buffer 170 stores the pixel values of a plurality of pixels (PX) connected to a selected column line (LL) transmitted from the readout circuit 150, and outputs the stored pixel values in response to an enable signal from the controller 110. The image signal processor 180 performs image signal processing on the image signal received from the data buffer 170. For example, the image signal processor 180 receives a plurality of image signals from the data buffer 170, and synthesizes the received image signals to generate one image.

[0024] In one embodiment, a plurality of pixels are bundled in the form of M×N (M and N are integers greater than or equal to 2) to form one unit pixel group. The M×N form is a form in which M are arranged in the double-column direction of the column line (LL) and N are arranged in the double-row direction of the row line (RL). For example, one unit pixel group includes a plurality of pixels arranged in a 2×6 form, and one unit pixel group outputs one analog pixel signal. The following embodiments are not limited to one pixel and can also be applied to unit pixel groups.

[0025] FIG. 2 is a plan view showing a schematic configuration of an image sensor according to an embodiment of the present invention, FIG. 3 is a cross-sectional view taken along the line A-A' of FIG. 2, and FIG. 4 is an enlarged view showing the portion indicated by B in FIG. 3. Referring to FIGS. 2 to 4, the image sensor according to the present embodiment includes a first chip 1000 and a third chip 3000. The first chip 1000 includes a photoelectric conversion layer 10, a first wiring region 20, and a light transmission layer 30. The photoelectric conversion layer 10 includes a first substrate 400, a pixel isolation pattern 450, and a photoelectric conversion region 410 located in the first substrate 400. Light incident from the outside is converted into an electrical signal in the photoelectric conversion region 410.

[0026] Referring to FIG. 2, the first substrate 400 includes a planar pixel array region (AR), an optical black region (OB), and a pad region (PAD). The pixel array region (AR) is arranged in the central region of the first substrate 400 on the plane. The pixel array region (AR) includes a plurality of pixels (PX). The pixel (PX) outputs a photoelectric signal from incident light. The pixels (PX) are arranged along rows parallel to the first direction (X) and columns parallel to the second direction (Y).

[0027] The pad region (PAD) is arranged at the edge portion of the first substrate 400 and surrounds the pixel array region (AR). A plurality of pad terminals 83 are arranged in the pad region (PAD). The pad terminal 83 outputs an electrical signal generated from the pixel (PX) to the outside. Or an external electrical signal or voltage is transmitted to the pixel (PX) via the pad terminal 83. The pad region (PAD) is disposed at the edge portion of the first substrate 400, and the pad terminal 83 can be easily connected to the outside.

[0028] The optical black region (OB) is disposed between the pixel array region (AR) and the pad region (PAD) of the first substrate 400. The optical black region (OB) surrounds the pixel array region (AR). The optical black region (OB) includes a plurality of dummy regions 411. The signal generated from the dummy region 411 is used as information for removing subsequent process noise.

[0029] Referring to FIGS. 3 to 4, the image sensor includes a photoelectric conversion layer 10, a gate electrode (TG) of a transmission transistor, a first wiring region 20, and a light transmission layer 30. The photoelectric conversion layer 10 includes the first substrate 400 and a pixel isolation pattern 450. Although not shown in FIGS. 3 and 4, one or more gate electrodes of a plurality of other transistors, for example, a conversion transistor, a source follower transistor, and a selection transistor, are located in the same layer as the gate electrode (TG) of the transmission transistor. However, this is an example, and according to an embodiment, one or more gate electrodes of a conversion transistor, a source follower transistor, and a selection transistor may be disposed on different substrates from the gate electrode (TG) of the transmission transistor and may be electrically connected to each other. Such an embodiment will be separately described with reference to FIG. 26.

[0030] In FIG. 3, the pixel array region (AR) includes a plurality of pixels (PX). The description of the pixel array region (AR) will be given with reference to FIG. 4. Hereinafter, the optical black region (OB) and the pad region (PAD) will be described mainly with reference to FIG. 3. In the optical black region (OB), a first connection structure 50, a first pad terminal 81, and a bulk color filter 90 are disposed on the first substrate 400. The first connection structure 50 includes a first light-shielding pattern 51, a first insulating pattern 53, and a first capping pattern 55. The first light-shielding pattern 51 is disposed on the second surface 400b of the first substrate 400. The first light-shielding pattern 51 covers the inner walls of the third trench (TR3) and the fourth trench (TR4). The first light-shielding pattern 51 penetrates through the photoelectric conversion layer 10 and the first wiring region 20, and electrically connects the photoelectric conversion layer 10 and the first wiring region 20.

[0031] More specifically, the first light-shielding pattern 51 contacts the wiring in the first wiring region 20 and the pixel isolation pattern 450 in the photoelectric conversion layer 10. Thereby, the first connection structure 50 is electrically connected to the wiring in the first wiring region 20. The first light-shielding pattern 51 includes a metal material, for example, tungsten. The first light-shielding pattern 51 blocks the light incident in the optical black region (OB). The first pad terminal 81 is disposed inside the third trench (TR3) and fills the remaining portion of the third trench (TR3). The first pad terminal 81 includes a metal material, for example, aluminum. The first pad terminal 81 is connected to the pixel isolation pattern 450. Thereby, a negative voltage can be applied to the pixel isolation pattern 450 via the first pad terminal 81.

[0032] The first insulating pattern 53 is disposed on the first light-shielding pattern 51 and fills the remaining portion of the fourth trench (TR4). The first insulating pattern 53 penetrates through the photoelectric conversion layer 10 and the first wiring region 20. The first capping pattern 55 is disposed on the first insulating pattern 53. The first capping pattern 55 is disposed on the first insulating pattern 53. The bulk color filter 90 is disposed on the first pad terminal 81, the first light-shielding pattern 51, and the first capping pattern 55. The bulk color filter 90 covers the first pad terminal 81, the first light-shielding pattern 51, and the first capping pattern 55. The first protective film 71 is disposed on and covers the bulk color filter 90.

[0033] The photoelectric conversion region 410’ and the dummy region 411 are disposed in the optical black region (OB) of the first substrate 400. The photoelectric conversion region 410’ is doped with impurities of a second conductivity type different from the first conductivity type, for example. The second conductivity type can be, for example, n-type. The photoelectric conversion region 410’ has a structure similar to the photoelectric conversion region 410 described in FIG. 4, but may not perform the operation of generating an electrical signal upon receiving light. The dummy region 411 can be a region that is not doped with impurities. The signals generated in the photoelectric conversion region 410’ and the dummy region 411 are then used as information for removing process noise.

[0034] In the pad region (PAD), the second connection structure 60, the second pad terminal 83, and the second protective film 73 are disposed on the first substrate 400. The second connection structure 60 includes a second light-shielding pattern 61, a second insulating pattern 63, and a second capping pattern 65. The second light-shielding pattern 61 is disposed on the second surface 400b of the first substrate 400. More specifically, the second light-shielding pattern 61 covers the inner walls of the fifth trench (TR5) and the sixth trench (TR6). The second light-shielding pattern 61 penetrates a part of the photoelectric conversion layer 10, the first wiring region 20, and the second wiring region 40. More specifically, the second light-shielding pattern 61 contacts the wirings (231, 232) within the second wiring region 40. The second light-shielding pattern 61 contains a metallic substance, for example, tungsten.

[0035] The second pad terminal 83 is disposed inside the fifth trench (TR5). The second pad terminal 83 is disposed on the second light-shielding pattern 61 and fills the remaining portion of the fifth trench (TR5). The second pad terminal 83 contains a metallic substance, for example, aluminum. The second pad terminal 83 serves as an electrical connection path between the image sensor element and the outside. The second insulating pattern 63 fills the remaining portion of the sixth trench (TR6). The second insulating pattern 63 penetrates all or part of the photoelectric conversion layer 10 and the first wiring region 20. The second capping pattern 65 is disposed on the second insulating pattern 63. The second protective film 73 covers a part of the second light-shielding pattern 61 and the second capping pattern 65.

[0036] The current applied through the second pad terminal 83 flows to the pixel isolation pattern 450 through the second light-shielding pattern 61, the wirings (231, 232) within the second wiring region 40, and the first light-shielding pattern 51. The electrical signals generated from the photoelectric conversion regions (410, 410’) and the dummy region 411 are transferred to the outside through the wirings of the first wiring region 20, the wirings (231, 232) within the second wiring region 40, the second light-shielding pattern 61, and the second pad terminal 83. In FIG. 3, the configuration in which the first pad terminal 81 and the second pad terminal 83 are disposed on the second surface 400b is shown, but this is merely an example, and the first pad terminal 81 and the second pad terminal 83 can also be disposed on the surface opposite to the second surface 400b, that is, the first surface 400a or the region therebelow.

[0037] Hereinafter, with reference mainly to FIG. 4, the first chip 1000 of the pixel array region (AR) will be described. The first chip 1000 includes a first substrate 400. The first substrate 400 includes a first surface 400a and a second surface 400b facing each other. Light is incident on the second surface 400b of the first substrate 400. The first wiring region 20 is disposed on the first surface 400a of the first substrate 400, and the light-transmitting layer 30 is disposed on the second surface 400b of the first substrate 400. The first substrate 400 can be a semiconductor substrate or a SOI (silicon on insulator) substrate. As an example, the semiconductor substrate can include, for example, a silicon substrate, a germanium substrate, or a silicon-germanium substrate. The first substrate 400 includes impurities of a first conductivity type. As an example, the impurities of the first conductivity type can be p-type impurities such as aluminum (Al), boron (B), indium (In), and / or gallium (Ga).

[0038] Referring to FIG. 2 together, the first substrate 400 includes a plurality of photoelectric conversion elements (PDs) defined by a pixel isolation pattern 450. The plurality of photoelectric conversion elements (PDs) are arranged in a matrix along a first direction (X) and a second direction (Y) intersecting each other. Although it will be described in detail separately later, the floating diffusion regions (FDs) of the plurality of photoelectric conversion elements (PDs) are connected together to form one pixel circuit. As an example, the floating diffusion regions (FDs) of 12 photoelectric conversion elements (PDs) can be connected together, or the floating diffusion regions (FDs) of 9 photoelectric conversion elements (PDs) can be connected together. Specific connection forms and effects will be described later.

[0039] The photoelectric conversion region 410 generates and accumulates charges according to the amount of received light. The photoelectric conversion region 410 constitutes a photoelectric conversion element (PD). FIG. 4 shows a first photoelectric conversion element (PD1) and a second photoelectric conversion element (PD2). The photoelectric conversion region 410 is a region doped with impurities of the second conductivity type within the first substrate 400. The impurities of the second conductivity type have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type include n-type impurities such as phosphorus, arsenic, bismuth, and / or antimony.

[0040] As an example, each photoelectric conversion region 410 includes a first region adjacent to the first surface 400a and a second region adjacent to the second surface 400b. There is a difference in impurity concentration between the first region and the second region of the photoelectric conversion region 410. Therefore, the photoelectric conversion region 410 has a potential gradient between the first surface 400a and the second surface 400b of the first substrate 400. As another example, the photoelectric conversion region 410 may not have a potential gradient between the first surface 400a and the second surface 400b of the first substrate 400. The first substrate 400 and the photoelectric conversion region 410 constitute a photodiode. That is, a photodiode is constituted by a p-n junction between the first substrate 400 of the first conductivity type and the photoelectric conversion region 410 of the second conductivity type. The photoelectric conversion region 410 that constitutes the photodiode generates and accumulates photo charges in proportion to the intensity of the incident light.

[0041] Referring to FIGS. 3 and 4, the pixel isolation pattern 450 is disposed within the first substrate 400. From a planar perspective, the pixel isolation pattern 450 has a lattice structure on the plane. As shown in FIG. 2, the pixel isolation pattern 450 is arranged in a lattice pattern in the region between pixels (PX). That is, the pixel isolation pattern 450 surrounds each pixel (PX). However, the shape of the pixel isolation pattern 450 is an example and is not limited thereto. The planar shapes of various pixel isolation patterns 450 will be described in detail later with reference to FIGS. 10, 13, 15, and 22.

[0042] Referring to FIGS. 3 and 4, the pixel isolation pattern 450 is disposed in the first trench (TR1) and the second trench (TR2). Referring to FIG. 4, the first trench (TR1) and the second trench (TR2) form recesses from the first surface 400a of the first substrate 400. The first trench (TR1) is disposed to penetrate the first substrate 400, and the second trench (TR2) is disposed not to penetrate the first substrate 400. That is, the depth of the first trench (TR1) is deeper than the depth of the second trench (TR2).

[0043] The pixel isolation pattern 450 extends from the first surface 400a of the first substrate 400 toward the second surface 400b. The pixel isolation pattern 450 is a deep trench isolation (DTI) film. The pixel isolation pattern 450 penetrates the first substrate 400. The vertical height of the pixel isolation pattern 450 is substantially the same as the vertical thickness of the first substrate 400. However, this is only an example, and the vertical height of the pixel isolation pattern 450 does not have to be the same as the vertical thickness of the first substrate 400. That is, the vertical height of the pixel isolation pattern 450 can also be lower than the vertical thickness of the first substrate 400. As an example, the width of the pixel isolation pattern 450 can gradually decrease from the first surface 400a to the second surface 400b of the first substrate 400. The width of the pixel isolation pattern 450 at the first surface 400a is the first width (W1), and the width of the pixel isolation pattern 450 at the second surface 400b is the second width (W2). That is, the first width (W1) is larger than the second width (W2).

[0044] The pixel isolation pattern 450 includes a first isolation pattern 451, a second isolation pattern 453, and a capping pattern 455. The first separation pattern 451 is disposed along the sidewall of the first trench (TR1). The first separation pattern 451 may include, as an example, a silicon-based insulating material (e.g., silicon nitrate, silicon oxide, or silicon oxynitride) or a high dielectric constant material (e.g., hafnium oxide or aluminum oxide). As another example, the first separation pattern 451 may include a plurality of layers, and each layer may include a different material from each other. The first separation pattern 451 has a refractive index lower than that of the first substrate 400. Thereby, the crosstalk phenomenon between the pixels (PX) located on the first substrate 400 can be prevented or reduced.

[0045] The second separation pattern 453 is disposed within the first separation pattern 451. For example, the sidewall of the second separation pattern 453 is surrounded by the first separation pattern 451. The first separation pattern 451 is disposed between the second separation pattern 453 and the first substrate 400. The second separation pattern 453 is separated from the first substrate 400 by the first separation pattern 451. Thereby, during the operation of the image sensor, the second separation pattern 453 is electrically separated from the first substrate 400. The second separation pattern 453 includes a crystalline semiconductor material, for example, polycrystalline silicon. As an example, the second separation pattern 453 may further include a dopant, and the dopant may include an impurity of a first conductivity type or an impurity of a second conductivity type.

[0046] For example, the second separation pattern 453 includes doped polycrystalline silicon. Alternatively, the second separation pattern 453 may include an undoped crystalline semiconductor material. For example, the second separation pattern 453 includes undoped polycrystalline silicon. The term "undoped" means that no intentional doping process is performed. The dopant may include an n-type dopant and a p-type dopant.

[0047] The capping pattern 455 is disposed on the lower surface of the second separation pattern 453. The capping pattern 455 is disposed so as to be adjacent to the first surface 400a of the first substrate 400. The upper surface of the capping pattern 455 is substantially the same as the lower surface of the second separation pattern 453. The capping pattern 455 contains a non-conductive material. As an example, the capping pattern 455 may contain a silicon-based insulating material (e.g., silicon nitrate, silicon oxide, or silicon oxynitrate) or a high-k dielectric material (e.g., hafnium oxide or aluminum oxide). Thereby, the pixel isolation pattern 450 can prevent the photo charges generated by the incident light incident on the pixel (PX) from being incident on other adjacent pixels (PX) due to random drift. That is, the pixel isolation pattern 450 can prevent the crosstalk phenomenon between pixels (PX).

[0048] The element isolation pattern 403 is disposed within the first substrate 400. For example, the element isolation pattern 403 is disposed within the second trench (TR2). The second trench (TR2) is recessed from the first surface 400a of the first substrate 400. The element isolation pattern 403 is a shallow trench isolation (STI) film. The element isolation pattern 403 defines an active region (not shown). The upper surface of the element isolation pattern 403 is disposed within the first substrate 400. The width of the element isolation pattern 403 gradually decreases from the first surface 400a to the second surface 400b of the first substrate 400. The upper surface of the element isolation pattern 403 is vertically spaced from the photoelectric conversion region 410. The element isolation pattern 403 may contain silicon nitrate, silicon oxide, and / or silicon oxynitrate. The element isolation pattern 403 contains the same material as the first isolation pattern 451 of the pixel isolation pattern 450. In this case, the boundary between the element isolation pattern 403 and the first isolation pattern 451 may not be visible. However, this is only an example, and the present invention is not limited thereto.

[0049] Also, FIG. 4 shows a configuration in which the element isolation pattern 403, the pixel isolation pattern 450, and the first surface 400a of the first substrate 400 are located on the same plane. However, this is only an example, and the present invention is not limited thereto. As an example, the element isolation pattern 403, the pixel isolation pattern 450, and the first surface 400a of the first substrate 400 may not form a coplanar. The element isolation pattern 403 and the pixel isolation pattern 450 are arranged to protrude or recess from the first surface 400a of the first substrate 400.

[0050] The transmission transistor (TX) is arranged on each active region (not shown) of the pixel (PX). The transmission transistor (TX) is electrically connected to the photoelectric conversion region 410. Moreover, it includes a transmission gate (TG) and a floating diffusion region (FD) on the active region. The transmission gate (TG) includes a first portion (TGa) located on the first surface 400a of the first substrate 400 and a second portion (TGb) extending from the first portion (TGa) into the first substrate 400. The maximum width of the first portion (TGa) in the second direction (D2) is larger than the maximum width of the second portion (TGb) in the second direction (D2).

[0051] The floating diffusion region (FD) is adjacent to one side of the transmission gate (TG). The floating diffusion region (FD) is arranged within the active region. The floating diffusion region (FD) has a second conductivity type (e.g., n-type) opposite to that of the first substrate 400. However, the shapes of the transmission gate (TG) and the floating diffusion region (FD) shown in FIG. 4 are merely examples, and the present invention is not limited thereto. A gate dielectric film (GI) is disposed between the transmission gate (TG) and the first substrate 400. A gate spacer (GS) is disposed on the sidewall of the transmission gate (TG). The gate spacer (GS) may include silicon nitrate, silicon carbonitrate, or silicon oxynitrate.

[0052] Referring to FIG. 4, the first wiring region 20 is disposed on the first surface 400a of the first substrate 400 and includes a plurality of insulating layers (IL1, IL2, IL3), a plurality of wiring layers (CL1, CL2), and vias (VIA). The insulating layers include a first insulating layer (IL1), a second insulating layer (IL2), and a third insulating layer (IL3). The first insulating layer (IL1) covers the first surface 400a of the first substrate 400. The first insulating layer (IL1) covers the gate electrode (TG). The second insulating layer (IL2) is disposed on the first insulating layer (IL1). The third insulating layer (IL3) is disposed on the second insulating layer (IL2).

[0053] The first insulating layer to the third insulating layer (IL1, IL2, IL3) contain a non-conductive material. For example, the first insulating layer to the third insulating layer (IL1, IL2, IL3) may contain a silicon-based insulating material such as silicon oxide, silicon nitrate, or silicon oxynitrate. The first wiring region 20 includes a first wiring layer (CL1) and a second wiring layer (CL2). The first wiring layer (CL1) is disposed within the second insulating layer (IL2). The second wiring layer (CL2) is disposed within the third insulating layer (IL3). A plurality of vias (VIA) are arranged in the first insulating layer (IL1), the second insulating layer (IL2), and the third insulating layer (IL3). The via (VIA) connects the floating diffusion region (FD), the first wiring layer (CL1), and the second wiring layer (CL2) to each other. The first wiring layer (CL1), the second wiring layer (CL2), and the via (VIA) contain a metallic substance. As an example, the first wiring layer (CL1), the second wiring layer (CL2), and the via (VIA) contain copper (Cu).

[0054] As shown in FIG. 4, the floating diffusion regions (FD) of the first photoelectric conversion element (PD1) and the floating diffusion region (FD) of the second photoelectric conversion element (PD2) are connected to each other. Although not shown in FIG. 4, in the present invention, the floating diffusion regions (FD) of 12 photoelectric conversion elements are connected together. Alternatively, the floating diffusion regions (FD) of 9 photoelectric conversion elements are connected together. When the floating diffusion regions (FD) of a plurality of photoelectric conversion elements (PD) are connected together in this way, it is possible to output only the signal of one photoelectric conversion element (PD), or to output the signals of a plurality of photoelectric conversion elements (PD) simultaneously, or to output signals in various combinations. Specific connection methods and effects of the photoelectric conversion elements will be described later with reference to FIGS. 5 to 16.

[0055] The light transmission layer 30 includes an insulating structure 329, a color filter 303, and a microlens portion 306. The light transmission layer 30 condenses and filters the light incident from the outside and provides the light to the photoelectric conversion region 410. The color filter 303 is disposed on the second surface 400b of the first substrate 400. The color filter 303 is disposed on each photoelectric conversion element (PD). As an example, the same color filter is disposed on a plurality of photoelectric conversion elements (PD). As will be described separately later, in the image sensor according to the present embodiment, the same color filter is disposed on 36 photoelectric conversion elements (PDs).

[0056] The color filter 303 may include a primary color filter. The color filter 303 includes a first color filter, a second color filter, and a third color filter having different colors from each other. As an example, the first color filter, the second color filter, and the third color filter each include a green, a red, and a blue color filter. The first color filter, the second color filter, and the third color filter can be arranged in a Bayer pattern. As another example, the first color filter, the second color filter, and the third color filter may include colors such as cyan, magenta, or yellow.

[0057] An insulating structure 329 is disposed between the second surface 400b of the first substrate 400 and the color filter 303. The insulating structure 329 prevents reflection of light so that the light incident on the second surface 400b of the first substrate 400 can smoothly reach the photoelectric conversion region 410. The insulating structure 329 can be named an antireflection structure. The insulating structure 329 includes a first fixed charge film 321, a second fixed charge film 323, and a planarization film 325 sequentially stacked on the second surface 400b of the first substrate 400. Each of the first fixed charge film 321, the second fixed charge film 323, and the planarization film 325 includes a different substance from each other.

[0058] The first fixed charge film 321 may include any one of aluminum oxide, tantalum oxide, titanium oxide, and hafnium oxide. The second fixed charge film 323 may include any one of aluminum oxide, tantalum oxide, titanium oxide, and hafnium oxide. As an example, the first fixed charge film 321 includes aluminum oxide, the second fixed charge film 323 includes hafnium oxide, and the planarization film 325 includes silicon oxide. Although not shown in the figure, in other embodiments, a silicon antireflection film (not shown) can also be interposed between the second fixed charge film 323 and the planarization film 325. The antireflection film includes silicon nitrate.

[0059] The microlens portion 306 is disposed on the color filter 303. The microlens portion 306 includes a flat portion 305 in contact with the color filter 303 and a microlens 307 located on the flat portion 305. The flat portion 305 includes, for example, an organic substance. As another example, the flat portion 305 may include silicon oxide or silicon oxynitrate. The microlens 307 has a convex shape so as to be able to condense the light incident on the pixel (PX). Each microlens 307 overlaps perpendicularly with the photoelectric conversion region 410. The shape of the lens can be various. As shown in FIG. 4, one microlens 307 overlaps with a plurality of photoelectric conversion regions 410. However, this is only an example, and the number of microlenses 307 located in one pixel (PX) can be various. The specific arrangement of the microlenses 307 will be described later with reference to FIGS. 5 to 9 and FIG. 21.

[0060] The light transmission layer 30 further includes a Bayer pattern 311 and a protective film 316. The Bayer pattern 311 is located between adjacent color filters 303 and separates them from each other. The Bayer pattern 311 is disposed on the insulating structure 329. As an example, the Bayer pattern 311 has a lattice structure. The Bayer pattern 311 includes a substance having a refractive index lower than that of the color filter 303. The Bayer pattern 311 includes an organic substance. For example, the Bayer pattern 311 can be a polymer layer containing silica nanoparticles. The Bayer pattern 311 has a low refractive index, but can increase the amount of light incident on the photoelectric conversion region 410 and can reduce crosstalk between pixels (PX). That is, the light reception efficiency can be increased in each photoelectric conversion region 410, and the SNR (Signal Noise Ratio) characteristics can be improved.

[0061] The protective film 316 covers the surface of the Bayer pattern 311 with a substantially uniform thickness. The protective film 316 can include, for example, at least one single film or multiple film of an aluminum oxide film and a silicon carbon oxide film. The protective film 316 protects the color filter 303 and functions as a moisture absorber.

[0062] However, the plan view and cross-sectional view of the image sensor described above are merely examples, and the present invention is not limited thereto. The image sensor according to the present invention is characterized in that a plurality of photoelectric conversion elements (PD), for example, 12 photoelectric conversion elements (PD) or 9 photoelectric conversion elements (PD) are connected to one floating diffusion region (FD). Depending on the specific connection form, the planar structure and cross-sectional structure of the image sensor are various. Hereinafter, the specific structure of the image sensor according to the present invention will be described in detail with reference to the drawings.

[0063] FIG. 5 is a diagram showing a plurality of photoelectric conversion elements (PD) and microlenses 307 in an image sensor according to an embodiment of the present invention. FIG. 5 shows 144 photoelectric conversion elements (PDs), and the same color filter is arranged on 36 photoelectric conversion elements arranged in 6 rows in the first direction (X direction) and 6 columns in the second direction (Y direction). Specifically, FIG. 5 shows 144 photoelectric conversion elements. On 36 photoelectric conversion elements, a green color filter 303G is arranged to form a green color region (GA). On 36 photoelectric conversion elements, a red color filter 303R is arranged to form a red color region (RA). On 36 photoelectric conversion elements, a blue color filter 303B is arranged to form a blue color region (BA). On 36 photoelectric conversion elements again, a green color filter 303G is arranged to form a green color region. That is, referring to FIG. 5, the image sensor according to this embodiment includes two green color regions (GA), a red color region (RA), and a blue color region (BA), and each color region includes 36 photoelectric conversion elements (PDs).

[0064] Referring to FIG. 5, in the image sensor according to this embodiment, one microlens 307 is arranged for every 4 photoelectric conversion elements (PDs). That is, each color region includes 36 photoelectric conversion elements and 9 microlenses 307. However, the number of such microlenses 307 is an example, and the present invention is not limited thereto. As in the embodiment of FIG. 5, when one microlens 307 is arranged on 4 photoelectric conversion elements, autofocus is possible. The photoelectric conversion elements (PDs) sharing one microlens 307 have different angles of light incidence for each photoelectric conversion element, so that autofocus can be realized thereby. In the embodiment of FIG. 5, since all photoelectric conversion elements (PDs) share microlenses 307 with other photoelectric conversion elements (PDs), autofocus is possible for all pixels.

[0065] In FIG. 5, 12 photoelectric conversion elements constitute one pixel circuit. That is, in the image sensor according to this embodiment, 12 out of 36 photoelectric conversion elements where the same color filter is located constitute one pixel and are connected to one analog-to-digital converter (ADC). The analog-to-digital converter receives the signals generated by the respective photoelectric conversion elements and converts them into digital values. At this time, as shown in FIG. 5, 2 photoelectric conversion elements in the first direction (X direction) and 6 photoelectric conversion elements in the second direction (Y direction) are connected to one analog-to-digital converter (ADC). However, this is just an example, and 6 photoelectric conversion elements in the first direction (X direction) and 2 photoelectric conversion elements in the second direction (Y direction) can also be connected to the analog-to-digital converter (ADC).

[0066] Therefore, as shown in FIG. 5, the green color area (GA) includes 3 analog-to-digital converters. Although not shown, the photoelectric conversion elements located in other color areas in FIG. 5 are also such that 12 photoelectric conversion elements are connected to one analog-to-digital converter, and one color area includes 3 analog-to-digital converters. Thus, in the image sensor according to this embodiment, 36 photoelectric conversion elements include the same color filter, and at this time, 12 photoelectric conversion elements are connected to one pixel circuit. Thereby, the signals of the respective photoelectric conversion elements can be output individually or as a whole, and the noise of the image sensor can be improved.

[0067] Hereinafter, specific effects will be described. The noise of the image sensor includes pixel noise (SFnoise) and ADC noise (ADC noise) as follows. TIFF2025100429000002.tif19128TIFF2025100429000003.tif11128

[0068] At this time, the noise (Noise) of the image sensor is composed of the sum of pixel noise and ADC noise as follows. TIFF2025100429000004.tif13128

[0069] The "#" of pixel noise (SF noise) means the number of analog-to-digital converters (ADCs) located in one color region that share the same color filter. That is, in this embodiment, 36 photoelectric conversion elements are arranged in one color region, and such 36 photoelectric conversion elements are connected to one analog-to-digital converter (ADC) in groups of 12, and there are 3 analog-to-digital converters (ADCs) in one color region. Therefore, the "#" of this embodiment corresponds to "3".

[0070] Also, the relationship between the number of ADCs (#) and the conversion gain is as shown in the following formula 1. (Equation 1) Conversion gain = CG / # Furthermore, the total noise of the image sensor corresponds to the value obtained by dividing the noise by the conversion gain as shown in the following formula 2. (Equation 2) Total noise = Noise / CG As described above, the image sensor according to this embodiment has a sharing structure in which a color filter of one color is arranged on 36 photoelectric conversion elements, and 12 of these photoelectric conversion elements are connected together.

[0071] Table 1 shown below summarizes the relative noise according to the number of ADCs. Taking the reference as "1", when 18 photoelectric conversion elements are connected to one pixel circuit, 2 ADCs are required, and the AVG is "2". Also, in this embodiment, since 12 photoelectric conversion elements are connected to one pixel circuit, 3 ADCs are required, and the AVG is "3". When 36 photoelectric conversion elements are connected together, 1 ADC is required, and the ADC is "1". At this time, in each case, the relative values of the conversion gain, pixel noise, ADC noise, and overall noise are as follows.

Table 1

[0072] As can be confirmed from Table 1, it was confirmed that the noise value of Example 2 in which 12 photoelectric conversion elements were connected together decreased compared to Example 3 in which 36 photoelectric conversion elements were connected together. Also, it becomes clear that the overall noise value of Example 1 (2AVG) in which 18 photoelectric conversion elements are connected to one pixel circuit is lower than the overall noise value of Example 2 (3AVG) in which 12 photoelectric conversion elements are connected to one pixel circuit. However, structurally, it is not easy to connect 18 photoelectric conversion elements to one pixel circuit.

[0073] Referring to FIG. 5, when 18 photoelectric conversion elements are connected to one pixel circuit, the photoelectric conversion elements sharing the same microlens 307 are connected to different pixel circuits, which may increase the noise. Also, due to the arrangement of the wiring for connecting 18 photoelectric conversion elements to one pixel circuit, the capacitance increases, which may increase the noise. In FIG. 5, a configuration in which 2 photoelectric conversion elements in the first direction (X direction) and 6 photoelectric conversion elements in the second direction (Y direction) are connected together is shown, but this is an example, and 6 photoelectric conversion elements in the first direction (X direction) and 2 photoelectric conversion elements in the second direction (Y direction) may be connected together.

[0074] FIG. 6 is a diagram showing the same region as FIG. 5 for another embodiment. Referring to FIG. 6, the image sensor according to this embodiment is the same as the embodiment of FIG. 5 except that 6 photoelectric conversion elements in the first direction (X direction) and 2 photoelectric conversion elements in the second direction (Y direction) are connected to one analog-to-digital converter (ADC). Specific descriptions of the same components are omitted. That is, in the image sensor according to this embodiment, one same color filter is disposed on 36 photoelectric conversion elements, and the floating diffusion regions (FD) of the photoelectric conversion elements (PD) arranged in 2×6 or 6×2 are connected together.

[0075] In FIGS. 5 and 6, the number of microlenses 307 located in the green color region (GA), red color region (RA), and blue color region (BA) is shown with the same configuration, but this is merely an example and is not limited thereto. The number of microlenses 307 located in each color region varies.

[0076] FIG. 7 is a diagram showing the same region as in FIG. 5 for another embodiment of the present invention. Referring to FIG. 7, the image sensor according to this embodiment is the same as the embodiment of FIG. 5, except that one microlens 307 is disposed on one photoelectric conversion element (PD) in the green color region (GA). Specific descriptions of the same components are omitted. When, as shown in FIG. 7, one microlens 307 is disposed on one photoelectric conversion element (PD) in the green color region (GA), deterioration of image quality can be prevented. That is, when a plurality of photoelectric conversion elements (PD) share one microlens 307, there is a problem that false colors are mixed, and there is a possibility of deterioration of image quality.

[0077] However, when one microlens 307 is disposed on one photoelectric conversion element (PD) in the green color region (GA) as in the embodiment of FIG. 7, a decrease in color perception can be prevented. This is because green is the color that has the greatest influence on visibility and image quality. Therefore, deterioration of image quality can be prevented in the green color region (GA), and autofocus can be realized in the blue color region (BA) and red color region (RA). Even in the embodiment of FIG. 7, since 12 photoelectric conversion elements (PDs) are connected together to form one pixel circuit, it has the effect of reducing the noise of the image sensor.

[0078] FIG. 8 is a diagram showing the same area as FIG. 5 for another embodiment of the present invention. Referring to FIG. 8, the image sensor according to this embodiment is the same as FIG. 5, except that in the red color region (RA) and the blue color region (BA), one microlens 307 is arranged on two photoelectric conversion elements. Specific descriptions of the same components are omitted. Even in the embodiment of FIG. 8 like this, since 12 photoelectric conversion elements are connected together to form one pixel circuit, it has the effect of reducing noise.

[0079] FIG. 9 is a diagram showing the same area as FIG. 5 for another embodiment of the present invention. Referring to FIG. 9, the image sensor according to this embodiment is the same as the embodiment of FIG. 5, except that in the green color region (GA), the red color region (RA) and the blue color region (BA), one microlens 307 is arranged on one photoelectric conversion element (PD). Specific descriptions of the same components are omitted. When one microlens 307 is arranged on one photoelectric conversion element (PD) in all color regions as in FIG. 9 in this way, it is possible to prevent a decrease in color perception and improve the image quality. Even in the embodiment of FIG. 9, since 12 photoelectric conversion elements are connected together to form one pixel circuit, it has the effect of reducing noise. However, the arrangement of the microlens 307 described in FIGS. 5 to 9 is only an example, and the present invention is not limited thereto. The microlens 307 can be arranged in various shapes other than the shapes shown in FIGS. 5 to 9.

[0080] Hereinafter, a specific arrangement in which the floating diffusion regions of 12 photoelectric conversion elements are connected together in the image sensor according to the embodiment of the present invention will be described. However, the structures and arrangements described below are merely examples, and the connection of the photoelectric conversion elements (PD) is not limited to the shapes described below. FIG. 10 is a diagram schematically showing the planar shape of 12 photoelectric conversion elements in the image sensor according to the embodiment of the present invention. FIG. 11 is a cross-sectional view taken along line A-A' of FIG. 10, and FIG. 12 is a cross-sectional view taken along line B-B' of FIG. 10. In FIGS. 10 to 12, only a partial configuration of the image sensor is shown for convenience of explanation. The description of the light transmission layer 30 and the first wiring region 20 not shown in FIGS. 11 and 12 is the same as that described above with reference to FIG. 4. Also, FIGS. 11 and 12 are shown upside down with respect to FIG. 4 for convenience of explanation. That is, in FIG. 4, the first surface 400a is located below, but in the following drawings, the first surface 400a is located above.

[0081] Referring to FIG. 10, the pixel isolation pattern 450 on the plane is arranged to surround the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4). However, as shown in FIGS. 10 and 11, the pixel isolation pattern 450 does not completely separate the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4), and the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) are connected together at the central portion. That is, as shown in FIG. 11, the first substrates 400 of the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) are connected together.

[0082] The description of the pixel isolation pattern 450 is the same as that described above. That is, the pixel isolation pattern 450 includes a first isolation pattern 451, a second isolation pattern 453, and a capping pattern 455. However, this is just an example, and the shape of the pixel isolation pattern 450 is not limited to this. The element isolation pattern 403 is disposed in the first substrate 400. As shown in FIG. 10, the element isolation pattern 403 defines an active region (ACT). The upper surface of the element isolation pattern 403 is disposed in the first substrate 400. The width of the element isolation pattern 403 gradually decreases from the first surface 400a to the second surface 400b of the first substrate 400. The upper surface of the element isolation pattern 403 is vertically spaced from the photoelectric conversion region 410. The description of the element isolation pattern 403 is the same as that described above. Specific descriptions of the same components are omitted.

[0083] The gate electrode (TG) of the transmission transistor is disposed on the active region (ACT). In FIG. 12, for convenience of explanation, the configuration of the gate electrode (TG) is shown in a simplified manner, but the content regarding the gate electrode (TG) described in FIG. 4 can be applied in the same way. The description of the photoelectric conversion region 410 is the same as that described above. That is, the photoelectric conversion region 410 generates and accumulates charges according to the amount of received light. The photoelectric conversion region 410 constitutes a photoelectric conversion element (PD). The photoelectric conversion region 410 is a region doped with impurities of the second conductivity type in the first substrate 400.

[0084] The impurities of the second conductivity type have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type may include n-type impurities such as phosphorus, arsenic, bismuth, and / or antimony. As an example, each photoelectric conversion region 410 includes a first region adjacent to the first surface 400a and a second region adjacent to the second surface 400b. There is a difference in impurity concentration between the first region and the second region of the photoelectric conversion region 410. Therefore, the photoelectric conversion region 410 has a potential gradient between the first surface 400a and the second surface 400b of the first substrate 400. As another example, the photoelectric conversion region 410 may not have a potential gradient between the first surface 400a and the second surface 400b of the first substrate 400. The first substrate 400 and the photoelectric conversion region 410 constitute a photodiode. That is, a photodiode can also be constituted by a p-n junction between the first substrate 400 of the first conductivity type and the photoelectric conversion region 410 of the second conductivity type. The photoelectric conversion region 410 constituting the photodiode generates and accumulates photo charges in proportion to the intensity of the incident light.

[0085] As shown in FIGS. 10 to 12, a transistor (TR) is arranged in the active region (ACT). Such a transistor (TR) can be one or more of a conversion transistor, a source follower transistor, and a selection transistor for driving the image sensor. As an example, the transistor (TR) shown in FIG. 10 is a source follower transistor. However, this is just an example. Some transistors constituting the pixel circuit are arranged in the active region (ACT), some transistors are arranged on other substrates, and can be connected via a floating diffusion region (FD). Such an embodiment will be separately described later with reference to FIG. 26.

[0086] Referring to FIGS. 10 to 12, a floating diffusion region (FD) is arranged at a portion where four photoelectric conversion elements (PD1, PD2, PD3, PD4) are connected together. Such a floating diffusion region (FD) is a region in which the first substrate 410 is doped with impurities of a second conductivity type opposite to the impurities of the first conductivity type. As shown in FIG. 10, one floating diffusion region (FD) is disposed between four photoelectric conversion elements (PDs). Therefore, the 12 photoelectric conversion elements (PDs) include three floating diffusion regions (FDs). These three floating diffusion regions (FDs) are connected together via vias (VIA) and the first wiring (M1). Therefore, the floating diffusion regions (FDs) of the 12 photoelectric conversion elements (PDs) are connected together. This has the effect of reducing the noise of the image sensor as described above.

[0087] Also, referring to FIGS. 10 and 12, a ground region (GND) is disposed on the active region (ACT). The ground region (GND) is a region to which a ground voltage is applied and is a region in which the first substrate 410 is doped with impurities of the first conductivity type. In the case of this embodiment, since four photoelectric conversion elements (PDs) share one first substrate 400, one ground region (GND) is disposed for the four photoelectric conversion elements (PDs).

[0088] As described above, in the embodiments of FIGS. 10 to 12, the first substrate 400 constituting the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) is not separated and is connected together, and an embodiment in which a floating diffusion region (FD) exists in the connection region has been described. That is, one floating diffusion region (FD) exists for every four photoelectric conversion elements (PDs), and the 12 photoelectric conversion elements (PDs) are connected together via three floating diffusion regions (FDs). This has the effect of reducing the noise of the image sensor as described above.

[0089] As described above, as an example, four photoelectric conversion elements (PD1, PD2, PD3, PD4) have been described, but the description for other photoelectric conversion elements (PD5, PD6, PD6, PD7, PD8, PD9, PD10, PD11, PD12) is the same. However, such a configuration is an example, and the first substrate 400 constituting the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) may be separated by the pixel isolation pattern 450. In this case, adjacent first photoelectric conversion elements (PD1), second photoelectric conversion elements (PD2), third photoelectric conversion elements (PD3), and fourth photoelectric conversion elements (PD4) each include their respective floating diffusion regions (FD), and the respective floating diffusion regions (FD) are connected via separate pads.

[0090] FIG. 13 is a diagram showing the same region as FIG. 10 for another embodiment of the present invention, and FIG. 14 is a cross-sectional view taken along the line C-C' of FIG. 13. Referring to FIGS. 13 and 14, in the image sensor according to this embodiment, the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) are separated by the pixel isolation pattern 450. Therefore, in order to connect the floating diffusion regions (FD) arranged in the active regions (ACT) of the respective photoelectric conversion elements, separate connection pads (FDP) are required. In addition, separate ground connection pads (GNDP) are required to supply a ground voltage to the ground regions (GND) arranged in the respective photoelectric conversion elements at the same time.

[0091] Referring to FIGS. 13 and 14, connection pads (FDP) for connecting the floating diffusion regions (FD) arranged in the respective photoelectric conversion elements (PD) are arranged. Therefore, the floating diffusion regions (FDs) disposed in the respective photoelectric conversion elements (PDs) via such pads are connected together. As shown in FIG. 13, such connection pads (FDPs) are connected together via the first wiring (M1) again, and the floating diffusion regions (FDs) of twelve photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) are connected together. The connection pads (FDPs) may include, but are not limited to, polycrystalline silicon.

[0092] Also, as shown in FIGS. 13 and 14, the ground regions (GND) are disposed at the edge portions of the respective photoelectric conversion elements. Therefore, ground connection pads (GNDPs) are disposed at the portions where such ground regions (GND) gather, and the same ground voltage can be applied to a plurality of photoelectric conversion elements. Among the embodiments of FIGS. 13 and 14, descriptions of other components are omitted because they are the same as those described in FIGS. 10 to 12. The ground connection pads (GNDPs) may also include polycrystalline silicon.

[0093] That is, when describing this embodiment in comparison with FIGS. 10 to 12, in the embodiments of FIGS. 10 to 12, the first substrates 400 of four photoelectric conversion elements (PD) are connected together. Therefore, a ground voltage can be applied to the four photoelectric conversion elements to one ground pad. Also, since the first substrates of the four photoelectric conversion elements (PD) are connected together, the four photoelectric conversion elements (PD) share one floating diffusion region (FD). In order to connect twelve photoelectric conversion elements (PD) together, three floating diffusion regions (FD) are connected by the first wiring (M1) or the like.

[0094] However, in the case of the embodiments of FIGS. 13 and 14, the first substrates of the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) are separated by the pixel separation pattern 450. Therefore, in order to connect the floating diffusion regions (FD) of the respective photoelectric conversion elements, separate connection pads (FDP) are arranged, and such connection pads (FDP) are connected by the first wiring (M1) to connect the twelve photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) together. In addition, in order to apply a ground voltage to each photoelectric conversion element, separate ground connection pads (GNDP) for connecting the ground regions (GND) of the respective photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) can be used.

[0095] Also, a structure in which the embodiments of FIGS. 10 to 12 and the embodiments of FIGS. 13 and 14 are mixed is possible. FIG. 15 is a diagram showing the same region as FIG. 10 for another embodiment of the present invention, and FIG. 16 is a cross-sectional view taken along the line D-D' of FIG. 15. Referring to FIG. 15, the image sensor according to the present embodiment, similar to the embodiment of FIG. 10, has the first substrates of the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) connected together. Therefore, the first photoelectric conversion element (PD1), the second photoelectric conversion element (PD2), the third photoelectric conversion element (PD3), and the fourth photoelectric conversion element (PD4) share one floating diffusion region (FD).

[0096] Therefore, as shown in FIGS. 15 and 16, the three floating diffusion regions (FD) shared by the four photoelectric conversion elements (PD1, PD2, PD3, PD4) are connected by the first wiring (M1) to be connected together. However, as shown in FIG. 15, the ground region (GND) can apply a voltage at once by using a ground connection pad (GNDP) that connects the ground regions arranged in each photoelectric conversion element into one, similar to the embodiments of FIGS. 13 and 14. That is, the embodiments of FIGS. 15 and 16 are a form in which the embodiments of FIGS. 10 to 12 and the embodiments of FIGS. 13 and 14 are mixed. However, such an arrangement and connection form are merely examples, and the present invention is not limited thereto. The main feature of the present invention is that 12 photoelectric conversion elements are connected together, and the specific connection method may vary depending on the embodiment.

[0097] Hereinafter, a circuit diagram of an image sensor according to an embodiment of the present invention will be described. However, the circuit diagram described below is merely an example, and the present invention is not limited thereto. FIG. 17 is a circuit diagram of one pixel included in an image sensor according to an embodiment of the present invention. In the present invention, twelve photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) constitute one pixel.

[0098] Referring to FIG. 17, one pixel includes a plurality of photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12). Each photoelectric conversion element (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) performs photoelectric conversion. As shown in FIG. 17, the plurality of photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) are connected together. Hereinafter, the first photoelectric conversion element (PD1) will be mainly described. However, the following description also applies equally to other photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12).

[0099] The first photoelectric conversion element (PD1) generates and accumulates charges according to the amount of received light. The first photoelectric conversion element (PD1) includes an anode connected to the ground and a cathode connected to one end of the first transmission transistor (TG1). A first transmission signal is supplied to the gate of the first transmission transistor (TG1), and one end of the first transmission transistor (TG1) is connected to the floating diffusion region (FD). When the first transmission transistor (TG1) is turned on by the first transmission signal, the charges charged in the first photoelectric conversion element (PD1) are transmitted to the floating diffusion region (FD). The floating diffusion region (FD) holds the charges transmitted from the photoelectric conversion element (PD).

[0100] Each of the plurality of transmission transistors (TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, TG12) is connected between one of the plurality of photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) and the floating diffusion region (FD), and includes a gate electrode that receives a plurality of transmission signals. For example, the first transmission transistor (TG1) is connected between the first photoelectric conversion element (PD1) and the floating diffusion region (FD), and includes a gate electrode that receives the first transmission signal. The number of the plurality of transmission transistors (TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, TG12) is the same as the number of the plurality of photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12).

[0101] A plurality of conversion transistors (RG, HDG, LDG) are connected between a power supply voltage (VDD) and a floating diffusion region (FD). Such conversion transistors (RG, HDG, LDG) periodically reset the charge accumulated in the floating diffusion region (FD). When the conversion transistor (RG, HDG, LDG) is turned on, the power supply voltage (VDD) connected to the source electrode of the conversion transistor (RG, HDG, LDG) is applied to the floating diffusion region (FD). Therefore, when the conversion transistor (RG, HDG, LDG) is turned on, the charge accumulated in the floating diffusion region (FD) is discharged and the floating diffusion region (FD) is reset.

[0102] Further, this embodiment includes a plurality of conversion transistors (RG, HDG, LDG). Therefore, the capacity of the floating diffusion region can be expanded by using a part of such a plurality of conversion transistors (RG, HDG, LDG). That is, various combinations can be derived by turning on or off some of the plurality of conversion transistors (RG, HDG, LDG), and the capacity of the floating diffusion region can be expanded in various combinations. Therefore, signals can be received by various combinations of the photoelectric conversion elements among the 12 photoelectric conversion elements connected together. It is also possible to receive all the signals of the plurality of transmission transistors (TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, TG12), or only a part of the signals. At this time, the required storage capacitance varies depending on the number of transistors to be received, and the capacitance of the floating diffusion region is expanded by using some of the plurality of conversion transistors (RG, HDG, LDG), so that signals can be received without loss for various combinations.

[0103] The source follower transistor (SF) outputs a pixel signal according to the voltage of the floating diffusion region (FD). The gate of the source follower transistor (SF) is connected to the floating diffusion region (FD), the power supply voltage (VDD) is supplied to the source electrode of the source follower transistor (SF), and the drain electrode of the source follower transistor (SF) is connected to one end of the selection transistor (SL). The source follower transistor (SF) outputs a voltage of a level corresponding to the charge accumulated in the floating diffusion region (FD) as a pixel signal. As shown in FIG. 17, the circuit of the image sensor according to this embodiment connects four source follower transistors (SF) in parallel to reduce noise. However, this is only an example, and the image sensor according to one embodiment may also include one source follower transistor (SF). When the selection transistor (SL) is turned on by a selection signal, the pixel signal of the source follower transistor (SF) is transmitted to the readout circuit. A selection signal is applied to the gate electrode of the selection transistor (SL), and the drain electrode of the selection transistor (SL) is connected to an output wiring that outputs a plurality of pixel signals.

[0104] The operation of the image sensor will be described as follows with reference to FIG. 17. First, with the light blocked, a power supply voltage (VDD) is applied to the drain electrodes of the conversion transistors (RG, HDG, LDG) and the drain electrode of the source follower transistor (SF), and the conversion transistors (RG, HDG, LDG) are turned on to discharge the charges remaining in the floating diffusion region (FD). After that, the conversion transistors (RG, HDG, LDG) are turned off, and when external light is incident on the photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12), electron-hole pairs are generated in each of the photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12). The holes are in the p-type impurity regions of the photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12), and the electrons move to and are accumulated in the n-type impurity regions. When the transmission transistors (TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, TG12) are turned on, charges such as these electrons and holes are transmitted to and accumulated in the floating diffusion region (FD). The gate bias of the source follower transistor (SF) changes in proportion to the amount of accumulated charge, resulting in a change in the source potential of the source follower transistor (SF). At this time, when the selection transistor (SL) is turned on, a signal due to the charge is read out to the output wiring.

[0105] FIG. 18 is a circuit diagram of one pixel included in the image sensor according to another embodiment of the present invention. FIG. 18 is the same as the embodiment of FIG. 17 except that it includes one source follower transistor (SF). Specific descriptions of the same components are omitted. FIG. 17 and FIG. 18 show a circuit diagram including three conversion transistors, four selection transistors, and twelve photoelectric conversion elements, but the image sensor according to the present embodiment is not limited thereto.

[0106] FIG. 19 is a circuit diagram of one pixel included in an image sensor according to another embodiment of the present invention. Referring to FIG. 19, the image sensor according to the present embodiment is the same as the embodiment of FIG. 17 except that it includes four conversion transistors (RG, HRG, MDG, LDG). Specific descriptions of the same components are omitted. In the case of the embodiment of FIG. 19, it includes four conversion transistors (RG, HRG, MDG, LDG). Therefore, the capacitance of the floating diffusion region (FD) can be expanded in various combinations compared to the embodiment of FIG. 17.

[0107] FIG. 20 is a circuit diagram of one pixel included in an image sensor according to another embodiment of the present invention. FIG. 20 is the same as the embodiment of FIG. 19 except that it includes one source follower transistor (SF). Specific descriptions of the same components are omitted. Above, the embodiment in which twelve photoelectric conversion elements constitute one circuit has been described. However, in other embodiments, nine photoelectric conversion elements can constitute one circuit. Hereinafter, other embodiments will be described.

[0108] FIG. 21 is a diagram showing the same region as FIG. 5 for another embodiment of the present invention. Referring to FIG. 21, FIG. 21 is different from the embodiment of FIG. 5 in that one microlens 307 is arranged for each of the nine photoelectric conversion elements (PD). Specific descriptions of the same components are omitted. In FIG. 21, green, red, and blue color filters are arranged on each photoelectric conversion element (PD). FIG. 5 shows 144 photoelectric conversion elements, and one color filter having the same color is arranged on 36 photoelectric conversion elements (PD).

[0109] That is, in the image sensor according to the present embodiment, the same color filter is arranged on 36 photoelectric conversion elements arranged in 6 rows in the first direction (X) and 6 columns in the second direction (Y). On 36 of the 144 photoelectric conversion elements shown in FIG. 21, a green color filter 303G is arranged to form a green color region (GA), on 36 photoelectric conversion elements, a red color filter 303R is arranged to form a red color region (RA), on 36 photoelectric conversion elements, a blue color filter 303B is arranged to form a blue color region (BA), and on 36 photoelectric conversion elements again, a green color filter 303G is arranged to form a green color region (GA). That is, referring to FIG. 21, the image sensor according to the present embodiment includes a green color region (GA), a red color region (RA), a blue color region (BA), and a green color region (GA). Each color region includes 36 photoelectric conversion elements (PD) and 4 microlenses 307.

[0110] In FIG. 21, the photoelectric conversion elements constituting one pixel circuit are indicated by dotted lines and D. In the embodiment of FIG. 21, 9 photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) arranged in 3 rows in the first direction (X) and 3 columns in the second direction (Y) constitute one pixel circuit. Although only a part is shown in FIG. 21, the other photoelectric conversion elements shown in FIG. 21 also have 9 photoelectric conversion elements constituting one pixel circuit in the same manner. In FIG. 21, the same configuration of the number of microlenses 307 arranged in the green color region (GA), the red color region (RA), and the blue color region (BA) is shown, but this is only an example and is not limited thereto. The number of microlenses 307 arranged in each color region is various.

[0111] FIG. 22 is a plan view showing nine photoelectric conversion elements of an image sensor according to an embodiment of the present invention, and FIG. 23 is a cross-sectional view taken along line E-E' of FIG. 22. Referring to FIG. 22, each photoelectric conversion element (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) is divided into a pixel isolation pattern 450. The description of the pixel isolation pattern 450 is the same as that described above. That is, the pixel isolation pattern 450 includes a first isolation pattern 451, a second isolation pattern 453, and a capping pattern 455. However, this is an example, and the shape of the pixel isolation pattern 450 is not limited to this.

[0112] The element isolation pattern 403 is disposed in the first substrate 400. As shown in FIGS. 22 and 23, the element isolation pattern 403 defines an active region (ACT). The upper surface of the element isolation pattern 403 is located within the first substrate 400. The width of the element isolation pattern 403 gradually decreases from the first surface 400a to the second surface 400b of the first substrate 400. The upper surface of the element isolation pattern 403 is vertically spaced from the photoelectric conversion region 410. The description of the element isolation pattern 403 is the same as that described above. Specific descriptions of the same components are omitted.

[0113] The gate electrode (TG) of the transmission transistor is disposed on the active region (ACT). The description of the photoelectric conversion region 410 is the same as that described above. That is, the photoelectric conversion region 410 generates and accumulates charges according to the amount of received light. The photoelectric conversion region 410 constitutes a photoelectric conversion element (PD). The photoelectric conversion region 410 is a region doped with impurities of the second conductivity type within the first substrate 400. The impurities of the second conductivity type have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type may include n-type impurities such as phosphorus, arsenic, bismuth, and / or antimony.

[0114] As an example, each photoelectric conversion region 410 includes a first region adjacent to the first surface 400a and a second region adjacent to the second surface 400b. There is a difference in impurity concentration between the first region and the second region of the photoelectric conversion region 410. Therefore, the photoelectric conversion region 410 has a potential gradient between the first surface 400a and the second surface 400b of the first substrate 400. As another example, the photoelectric conversion region 410 may not have a potential gradient between the first surface 400a and the second surface 400b of the first substrate 400.

[0115] The first substrate 400 and the photoelectric conversion region 410 constitute a photodiode. That is, a photodiode is constituted by a p-n junction between the first substrate 400 of the first conductivity type and the photoelectric conversion region 410 of the second conductivity type. The photoelectric conversion region 410 that constitutes the photodiode generates and accumulates photo charges in proportion to the intensity of the incident light. As shown in FIG. 22, a transistor (TR) is disposed within the active region (ACT). Such a transistor (TR) can be one of a conversion transistor, a source follower transistor, and a selection transistor for driving the image sensor. As an example, the transistor (TR) shown in FIG. 22 is a source follower transistor. However, this is just an example. Only a part of the transistors for driving the image sensor is disposed in the active region (ACT), and some transistors may be disposed on other substrates and connected via a floating diffusion region (FD). Such an embodiment will be separately described later with reference to FIG. 26.

[0116] As shown in FIGS. 22 and 23, nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) each include a respective floating diffusion region (FD). Such a floating diffusion region (FD) is a region doped with a second conductivity type opposite to that of the impurity of the first conductivity type in the first substrate 410. Each floating diffusion region (FD) is connected together via a connection pad (FDP) and a first wiring (M1). Therefore, the nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) are connected together. As described above, this has the effect of reducing noise. Referring also to FIGS. 22 and 23, a ground region (GND) is disposed on the active region (ACT). The ground region (GND) is a region to which a ground voltage is applied, and is a region in which the first substrate 410 is doped with the first conductivity type. Although not shown in FIGS. 22 and 23, the ground regions (GND) of the respective photoelectric conversion elements (PD) may be connected together.

[0117] FIG. 24 is a circuit diagram of one pixel included in an image sensor according to another embodiment of the present invention. In this embodiment, nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) constitute one pixel. The circuit diagram according to the embodiment of FIG. 24 is the same as the embodiment of FIG. 17, except that it includes nine photoelectric conversion elements instead of twelve photoelectric conversion elements and includes five source follower transistors (SF). Specific descriptions of the same components are omitted.

[0118] FIG. 25 is a circuit diagram of one pixel included in an image sensor according to another embodiment of the present invention. FIG. 25 is the same as the embodiment of FIG. 24, except that it includes one source follower transistor (SF). Specific descriptions of the same components are omitted. Above, a partial configuration of the image sensor, particularly mainly the first chip 1000, has been described. Hereinafter, the overall structure including the second chip 2000 and the third chip 3000 will be described. One or more of the conversion transistor, source follower transistor, and selection transistor of the image sensor according to the present embodiment are arranged on the second chip 2000.

[0119] FIG. 26 is a cross-sectional view showing a schematic configuration of an image sensor according to an embodiment of the present invention. Referring to FIG. 26, the image sensor according to the embodiment of the present invention includes a first chip 1000, a second chip 2000, and a third chip 3000. The first chip 1000 includes a photoelectric conversion layer 10, a first wiring region 20, and a light transmission layer 30. The photoelectric conversion layer 10 includes a first substrate 400, a pixel isolation pattern 450, an element isolation pattern 403, and a photoelectric conversion region 410 disposed in the first substrate 400. Light incident from the outside is converted into an electrical signal in the photoelectric conversion region 410. The first chip 1000 includes the photoelectric conversion layer 10 and is a layer that generates a photoelectric signal. The second chip 2000 is a layer in which transistors such as a conversion transistor (RG, HDG, LDG), a source follower transistor (SF), and a selection transistor (SL) and wirings connected to the respective transistors are arranged. A logic circuit is arranged on the third chip 3000. The description of the first chip 1000 is omitted because it is the same as that described above with reference to FIGS. 3 and 4.

[0120] Referring to FIG. 26, a fourth insulating layer (IL4) is disposed on the third insulating layer (IL3). A first floating diffusion region connection node (FDCN_1) is disposed within the fourth insulating layer (IL4). The first floating diffusion region connection node (FDCN_1) includes a main connection portion (FDCN_1A) and a shielding portion (FDCN_1B). The shielding portion (FDCN_1B) is disposed at an edge of the main connection portion (FDCN_1A) and has a smaller area than the main connection portion (FDCN_1A). The shielding portion (FDCN_1B) prevents interference between the floating diffusion region connection nodes of adjacent pixels (PX).

[0121] The main connection portion (FDCN_1A) of the first floating diffusion region connection node (FDCN_1) is connected to the wirings of the first wiring layer (CL1) and the second wiring layer (CL2), but the shielding portion (FDCN_1B) of the first floating diffusion region connection node (FDCN_1) may not be connected to the wirings of the first wiring layer (CL1) and the second wiring layer (CL2). Also, the main connection portion (FDCN_1A) of the first floating diffusion region connection node (FDCN_1) is disposed in an island shape separated for each pixel, but the shielding portion (FDCN_1B) may be disposed connected to adjacent pixels. As an example, the shielding portion (FDCN_1B) is disposed linearly extending in one direction on a plane.

[0122] A separate voltage is applied to the shielding portion (FDCN_1B). However, such a configuration of the main connection portion (FDCN_1A) and the shielding portion (FDCN_1B) is only an example, and the shape of the first floating diffusion region connection node (FDCN_1) is not limited thereto. As an example, the first floating diffusion region connection node (FDCN_1) may also include only the main connection portion (FDCN_1A). As shown in FIG. 26, one surface of the first floating diffusion region connection node (FDCN_1) is exposed without being covered by the fourth insulating layer (IL4). Therefore, as will be described later, it comes into contact with the second floating diffusion region connection node (FDCN_2) disposed on the second chip 2000.

[0123] The second chip 2000 will be described. The second chip 2000 includes a second substrate 500, a second wiring region 40, and a third wiring region 70. The second substrate 500 includes a first surface 500a and a second surface 500b facing each other. The second wiring region 40 is disposed on the first surface 500a of the second substrate 500, and the third wiring region 70 is disposed on the second surface 500b of the second substrate 500. The second substrate 500 can be a semiconductor substrate or an SOI (silicon on insulator) substrate. The semiconductor substrate can include, for example, a silicon substrate, a germanium substrate, or a silicon-germanium substrate. The second substrate 500 contains impurities of a first conductivity type. For example, the impurities of the first conductivity type can include p-type impurities such as aluminum (Al), boron (B), indium (In), and / or gallium (Ga). The first surface 500a of the second substrate 500 is disposed facing the first surface 400a of the first substrate 400.

[0124] On the first surface 500a of the second substrate 500, a fifth insulating layer (IL5), a sixth insulating layer (IL6), a seventh insulating layer (IL7), a third wiring layer (CL3), a plurality of vias (VIA), and a second floating diffusion region connection node (FDCN_2) are disposed. The fifth insulating layer (IL5), the sixth insulating layer (IL6), and the seventh insulating layer (IL7) contain non-conductive substances. For example, the fifth insulating layer (IL5), the sixth insulating layer (IL6), and the seventh insulating layer (IL7) can include silicon-based insulating substances such as silicon oxide, silicon nitrate, or silicon oxynitrate. The third wiring layer (CL3), via (VIA), and second floating diffusion region connection node (FDCN_2) contain a metallic substance. As an example, the third wiring layer (CL3), via (VIA), and second floating diffusion region connection node (FDCN_2) contain copper (Cu). The third wiring layer (CL3) is disposed within the sixth insulating layer (IL6). The wiring of the third wiring layer (CL3) and the transistor (TR) are connected by a via (VIA). At this time, the transistor (TR) can be one or more of the conversion transistors (RG, HDG, LDG), source follower transistors (SF), and selection transistors (SL) described above.

[0125] The second floating diffusion region connection node (FDCN_2) is disposed within the seventh insulating layer (IL7). The second floating diffusion region connection node (FDCN_2) includes a main connection portion (FDCN_2A) and a shielding portion (FDCN_2B). The shielding portion (FDCN_2B) is disposed at the periphery of the main connection portion (FDCN_2A) and has a smaller area than the main connection portion (FDCN_2A). The shielding portion (FDCN_2B) prevents interference between the floating diffusion region connection nodes of adjacent pixels. The main connection portion (FDCN_2A) of the second floating diffusion region connection node (FDCN_2) is connected to the wiring of the third wiring layer (CL3), but in some cases, the shielding portion (FDCN_2B) of the second floating diffusion region connection node (FDCN_2) is not connected to the wiring of the third wiring layer (CL3). The main connection portions (FDCN_2A) of the second floating diffusion region connection node (FDCN_2) are arranged in an island shape separated for each pixel, while the shielding portions (FDCN_2B) are arranged connected to adjacent pixels.

[0126] As an example, the shielding portion (FDCN_2B) is arranged linearly extending in one direction on a plane. A separate voltage is applied to the shielding portion (FDCN_2B). However, the configurations of such a main connection portion (FDCN_2A) and the shielding portion (FDCN_2B) are merely examples, and the shape of the second floating diffusion region connection node (FDCN_2) is not limited thereto. As an example, the second floating diffusion region connection node (FDCN_2) may also include only the main connection portion (FDCN_2A). As shown in FIG. 26, one surface of the second floating diffusion region connection node (FDCN_2) is exposed without being covered by the seventh insulating layer (IL7). Therefore, as shown in FIG. 26, the first floating diffusion region connection node (FDCN_1) disposed on the first chip 1000 and the second floating diffusion region connection node (FDCN_2) disposed on the second chip 2000 are in contact with each other.

[0127] Referring to FIG. 26, the second chip 2000 includes a dip node (DN) penetrating the second substrate 500. The dip node (DN) contains metal and, as an example, contains copper (Cu). However, such a substance is merely an example, and other metal substances can also be included. The dip node (DN) is disposed to penetrate the second substrate 500. One end of the dip node (DN) is disposed on the first surface 500a, and the other end is disposed on the second surface 500b. In this specification, the expression "disposed on a certain surface" is not limited to being disposed in contact with that surface, and includes being disposed in a form that does not contact or protrudes above that surface. That is, as shown in FIG. 26, one end of the dip node (DN) is disposed to protrude from the first surface 500a, and the other end is disposed to protrude from the second surface 500b. Therefore, as shown in FIG. 26, one end of the dip node (DN) may be in contact with the wiring of the third wiring layer (CL3). Also, the other end of the dip node (DN) may be in contact with the fourth wiring layer (CL4) located on the second surface 500b of the second substrate 500.

[0128] On the second surface 500b of the second substrate 500, an eighth insulating layer (IL8), a ninth insulating layer (IL9), a tenth insulating layer (IL10), a fourth wiring layer (CL4), a fifth wiring layer (CL5), and a via (VIA) are arranged. The eighth insulating layer (IL8), the ninth insulating layer (IL9), and the tenth insulating layer (IL10) contain non-conductive substances. For example, the eighth insulating layer (IL8), the ninth insulating layer (IL9), and the tenth insulating layer (IL10) may contain silicon-based insulating substances such as silicon oxide, silicon nitrate, or silicon oxynitrate. The fourth wiring layer (CL4), the fifth wiring layer (CL5), and the via (VIA) contain metallic substances. As an example, the fourth wiring layer (CL4), the fifth wiring layer (CL5), and the via (VIA) contain copper (Cu). However, such substances are only examples, and the present invention is not limited thereto.

[0129] The fourth wiring layer (CL4) is arranged within the ninth insulating layer (IL9). The fifth wiring layer (CL5) is arranged within the tenth insulating layer (IL10). The fourth wiring layer (CL4) and the fifth wiring layer (CL5) are connected via a via (VIA). The dip node (DN) is arranged in the fifth insulating layer (IL5), the second substrate 500, and the eighth insulating layer (IL8). The dip node (DN) is arranged so as to penetrate the second substrate 500, and connects one or more of the transistors arranged on the first surface 500a of the second substrate 500 to the fourth wiring layer (CL4) and the fifth wiring layer (CL5) arranged on the second surface 500b of the second substrate 500.

[0130] The second chip 2000 is connected to the third chip 3000. The third chip 3000 includes a third substrate 700 and a fourth wiring region 80. On the first surface 700a of the third substrate 700, transistors (not shown) constituting a logic circuit are arranged, and a plurality of wirings (LCL) are arranged in the fourth wiring region 80. The fourth wiring region 80 includes an insulating film (LIL), and the plurality of wirings (LCL) are connected to the wiring of the second chip 2000 via vias (not shown).

[0131] As described above, in the image sensor according to the embodiment of the present invention, one or more of the conversion transistors (RG, HDG, LDG), source follower transistors (SF), and selection transistors (SL) are arranged on the first surface 500a of the second substrate 500, and one or more of the wirings connected to the conversion transistors (RG, HDG, LDG), source follower transistors (SF), and selection transistors (SL) are arranged on the second surface 500b of the second substrate 500. The conversion transistors (RG, HDG, LDG), source follower transistors (SF), and the wirings of the selection transistors (SL) are connected via dip nodes (DN) penetrating the second substrate 500. Since each transistor and wiring are arranged on different surfaces from each other in this way, the length of the connection of the floating diffusion region between the first chip 1000 and the second chip 2000 can be shortened.

[0132] That is, in FIG. 26, when the fourth wiring layer (CL4) and the fifth wiring layer (CL5) are arranged on the first surface 500a of the second substrate 500, the distance between the first surface 400a of the first substrate 400 and the first surface 500a of the second substrate 500 becomes farther as the thickness of the fourth wiring layer (CL4), the fifth wiring layer (CL5), and the insulating layer for insulating them increases. However, in the image sensor according to the embodiment of the present invention, since the fourth wiring layer (CL4) and the fifth wiring layer (CL5) are disposed on the second surface 500b of the second substrate 500, the distance between the first surface 400a of the first substrate 400 and the first surface 500a of the second substrate 500 can be reduced. Therefore, the length at which the floating diffusion regions (FD) are connected by the first chip 1000 and the second chip 2000 becomes shorter, and the conversion gain (CG) is improved. However, this is merely an example, and the conversion transistor (RG, HDG, LDG), the source follower transistor (SF), and the selection transistor (SL) can also be disposed on the second surface 500b of the second substrate 500. In this case, the dip node (DN) is not included. Also, the fourth wiring layer (CL4) and the fifth wiring layer (CL5) can be disposed on the first surface 500a of the second substrate 500, and in this case, the dip node (DN) is not included.

[0133] As described above, in the image sensor according to the embodiment of the present invention, one color filter is disposed on 36 photoelectric conversion elements, and the floating diffusion regions of 12 photoelectric conversion elements or 9 photoelectric conversion elements are connected to form one pixel circuit, which is connected to one analog-to-digital converter. That is, the 36 photoelectric conversion elements on which the same color filter is disposed are connected to 3 analog-to-digital converters or 4 analog-to-digital converters, whereby various pixel signals can be output and noise can be reduced.

[0134] Note that the present invention is not limited to the above-described embodiments. Various modifications can be made without departing from the technical scope of the present invention.

Description of Reference Numerals

[0135] 10 Photoelectric conversion layer 20 First wiring region 30 Light transmission layer 40 Second wiring region 50 First connection structure 51 First light-shielding pattern 53 First insulating pattern 55 First capping pattern 60 Second connection structure 61 Second light-shielding pattern 63 Second insulating pattern 65 Second capping pattern 70 Third wiring area 71 First protective film 73 Second protective film 81 First pad terminal 83 Second pad terminal 90 Bulk color filter 100 Image sensor 110 Controller 120 Timing generator 130 Load driver 140 Pixel array 150 Lead-out circuit 160 Lamp signal generator 170 Data buffer 180 Image signal processor 231, 232 Wiring 303 Color filter 303R Red color filter 303G Green color filter 303B Blue color filter 305 Flat part 306 Microlens part 307 Microlens 311 Bayer pattern 316 Protective film 321 First fixed charge film 323 Second fixed charge film 325 Planarization film 329 Insulating structure 400 First substrate 403 Element isolation pattern 410 Photoelectric conversion area 450 Pixel isolation pattern 451 First separation pattern 453 Second separation pattern 455 Capping pattern 500 Second substrate 1000 First chip 2000 Second chip 3000 Third chip ADC Analog-to-digital converter AR Pixel array region FD Floating diffusion region FDP Connection pad GND Ground region GNDP Ground connection pad OB Optical black region PAD Pad region PD Photoelectric conversion element

Claims

1. A first substrate including a first surface and a second surface facing each other and including a plurality of photoelectric conversion elements; A color filter disposed on the second surface of the first substrate and including a first color filter, a second color filter, and a third color filter; The first color filter is disposed on 36 photoelectric conversion elements; The 36 photoelectric conversion elements are arranged in 6 rows in a first direction and 6 columns in a second direction orthogonal to the first direction; An image sensor, characterized in that floating diffusion regions of 12 of the 36 photoelectric conversion elements are connected together.

2. The image sensor according to claim 1, wherein the second color filter and the third color filter are each disposed on 36 photoelectric conversion elements.

3. The image sensor according to claim 1, characterized in that floating diffusion regions of 12 photoelectric conversion elements arranged in 2 rows in the first direction and 6 columns in the second direction are connected together.

4. The image sensor according to claim 1, characterized in that floating diffusion regions of 12 photoelectric conversion elements arranged in 6 rows in the first direction and 2 columns in the second direction are connected together.

5. The image sensor according to claim 1, wherein the 12 photoelectric conversion elements are separated into groups of 4 by a pixel separation pattern.

6. The image sensor according to claim 5, wherein the first substrates of 4 of the 12 photoelectric conversion elements are connected to each other and share one floating diffusion region.

7. The image sensor according to claim 1, wherein the 12 photoelectric conversion elements are separated one by one by a pixel separation pattern.

8. The image sensor according to claim 7, wherein the floating diffusion regions respectively located in the 12 photoelectric conversion elements are connected together via connection pads.

9. The image sensor according to claim 1, wherein the floating diffusion regions of the 12 photoelectric conversion elements are electrically connected to 3 or 4 conversion transistors and one or more source follower transistors.

10. The image sensor according to claim 1, wherein one microlens is disposed on four of the 36 photoelectric conversion elements.

11. The image sensor according to claim 1, wherein one microlens is disposed on one of the 36 photoelectric conversion elements.

12. The image sensor according to claim 1, wherein one microlens is disposed on two of the 36 photoelectric conversion elements.

13. A second substrate that overlaps the first substrate, And a transistor disposed on the second substrate, further comprising: The image sensor according to claim 1, wherein the transistor disposed on the second substrate is electrically connected to the floating diffusion region.

14. A substrate including a first surface and a second surface facing each other and including a plurality of photoelectric conversion elements, A color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, and a third color filter, The first color filter is disposed on 36 photoelectric conversion elements to form a first color region, The second color filter is disposed on 36 photoelectric conversion elements to form a second color region, The third color filter is disposed on 36 photoelectric conversion elements to form a third color region, The first color filter is disposed on 36 photoelectric conversion elements to form a fourth color region, In each color region, the 36 photoelectric conversion elements are arranged in 6 rows in a first direction and 6 columns in a second direction orthogonal to the first direction, The floating diffusion regions of 12 of the 36 photoelectric conversion elements are connected together and connected to one analog-to-digital converter, An image sensor, wherein each color region includes three analog-to-digital converters.

15. The image sensor according to claim 14, wherein the first color region, the second color region, the third color region, and the fourth color region each include nine microlenses.

16. The image sensor according to claim 14, wherein the number of microlenses included in the first color region and the fourth color region is different from the number of microlenses included in the second color region and the third color region.

17. A substrate including a first surface and a second surface facing each other and including a plurality of photoelectric conversion elements; A color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, and a third color filter; The first color filter is disposed on 36 photoelectric conversion elements; The 36 photoelectric conversion elements are arranged in 6 rows in a first direction and 6 columns in a second direction perpendicular to the first direction; An image sensor, characterized in that floating diffusion regions of 9 photoelectric conversion elements among the 36 photoelectric change elements are connected together.

18. The image sensor according to claim 17, characterized in that floating diffusion regions of 9 photoelectric conversion elements arranged in 3 rows in the first direction and 3 columns in the second direction are connected together.

19. The image sensor according to claim 17, characterized in that, for the 9 photoelectric conversion elements, the floating diffusion region is electrically connected to 3 or 4 conversion transistors and one or more source follower transistors.

20. The image sensor according to claim 17, characterized in that one microlens is disposed on the 9 photoelectric conversion elements.

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