Battery monitor device, method for detecting shorting of multiplexer, battery system, and program
The battery monitor device simplifies short circuit detection in multiplexers by using a multiplexer with resistors and capacitors to generate electrical signals, addressing the complexity of existing methods and enhancing detection efficiency.
Patent Information
- Application Number
- JP2023221729
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-27
- Publication Date
- 2025-07-09
AI Technical Summary
Existing methods for detecting short circuits in multiplexers require complex control and measurement processes, making them cumbersome and inefficient.
A battery monitor device and method that utilize a multiplexer with series-connected resistors and switches, along with a voltage dividing circuit and capacitor, to detect short circuits by generating electrical signals based on potential differences without requiring complicated control circuits.
Enables simple and effective detection of short circuits in multiplexers by analyzing electrical signals from capacitors, reducing the complexity of control processes and improving efficiency.
Smart Images

Figure 2025103958000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a battery monitor device, a method for detecting a short circuit of a multiplexer, a battery system, and a program.
Background Art
[0002] Patent Document 1 discloses a fault detection method capable of detecting a closed fault of a multiplex switch constituting a multiplexer.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In the method of Patent Document 1, in order to detect a closed fault of a multiplex switch, the multiplex switches of the multiplexer connected to the battery terminals in the series batteries are individually made conductive, and the potential difference between the input terminals of the differential voltage detection circuit is measured. This method requires conduction for each multiplex switch and measurement of the potential difference for detecting the closed fault. Control of conduction and measurement for each multiplex switch is complicated.
[0005] An object of the present invention is to provide a battery monitor device, a battery system, a method for detecting a short circuit of a multiplexer, and a program capable of detecting a short circuit of a switch of a multiplexer without using a circuit that requires complicated control.
Means for Solving the Problems
[0006] The battery monitoring device according to the first aspect of the present invention is a multiplexer including a plurality of connection nodes configured to be connectable to each of the battery nodes in a battery device including a plurality of secondary batteries and a plurality of battery nodes connected in series, a first power line, a second power line, a first node and a second node, and a plurality of multiplexer switch circuits. The connection nodes are arranged in a first direction from one of the first power line and the second power line to the other. The multiplexer switch circuits are connected between one of the even-numbered nodes and the odd-numbered nodes among the connection nodes and the first node with respect to one of the first power line and the second power line, and between the other of the even-numbered nodes and the odd-numbered nodes and the second node. Each of the multiplexer switch circuits includes a resistor and a switch connected in series. The multiplexer also includes a voltage dividing circuit including a first circuit connected between the first power line and the first node, a second circuit connected between the second power line and the second node, and an intermediate circuit connected between the first node and the second node. The first circuit includes a first resistor and a first switch connected in series. The second circuit includes a second resistor and a second switch connected in series. The intermediate circuit includes an intermediate resistor and an intermediate switch connected in series. The voltage dividing circuit further includes a signal generation circuit configured to generate one or more electrical signals associated with the potentials of the first node and the second node, and a capacitor connected between the first node and the second node and configured to generate a charging voltage.
[0007] The battery system according to the second aspect of the present invention includes the battery monitoring device described in the above aspect and a battery device connected to the battery monitoring device. The battery device includes the secondary battery and the battery node.
[0008] A method for detecting a short circuit of a multiplexer according to a third aspect of the present invention includes preparing a battery system including a battery device including a plurality of battery nodes connected in series and a plurality of rechargeable battery blocks, and a battery monitor device including a multiplexer and a capacitor, wherein the multiplexer includes a plurality of multiplexer switch circuits arranged in a first direction from one of a first power line and a second power line to the other, a first node, a second node, and an intermediate resistor and a capacitor connected in parallel between the first node and the second node, the multiplexer switch circuits include odd-numbered multiplexer switch circuits in the arrangement of the multiplexer switch circuits with respect to one of the first power line and the second power line, and even-numbered multiplexer switch circuits in the arrangement of the multiplexer switch circuits, each of the odd-numbered multiplexer switch circuits is connected between any one of the battery nodes and the first node, each of the even-numbered multiplexer switch circuits is connected between any one of the battery nodes and the second node, and each of the multiplexer switch circuits includes a resistor and a switch connected in series; preparing the battery system; controlling the multiplexer to open all of the switches of the multiplexer switch circuits; forming a series connection of the intermediate resistor and a first resistor between the first power line and the first node; generating a first signal related to the potentials of one end and the other end of the capacitor after forming the series connection of the intermediate resistor and the first resistor; disconnecting the first resistor from the intermediate resistor and forming a series connection of the intermediate resistor and a second resistor between the second power line and the second node; generating a second signal related to the potentials of the one end and the other end of the capacitor after forming the series connection of the intermediate resistor and the second resistor; and specifying the presence or absence of a short circuit in the multiplexer switch circuits based on the first signal and the second signal.
[0009] The program according to the fourth aspect of the present invention is a program including one or more instructions for controlling a battery system including a battery device and a battery monitor device, wherein the battery device includes a plurality of battery nodes connected in series and a plurality of secondary batteries, the battery monitor device includes a multiplexer having a plurality of connection nodes, a first node, and a second node connected to each of the battery nodes, a first resistor and a second resistor, an intermediate resistor and a capacitor connected in parallel between the first node and the second node, and a first power line and a second power line, the connection nodes are arranged in a first direction from one of the first power line and the second power line to the other, and when the instructions are executed by one or more processing devices, the processing devices perform the following operations: controlling the multiplexer so that all switches of a multiplexer switch circuit of the multiplexer connected between an odd-numbered note among the connection nodes and the first node and between an even-numbered note among the connection nodes and the second node are non-conductive with respect to one of the first power line and the second power line; forming a first state in the battery monitor device in which the second resistor is disconnected from the intermediate resistor and the intermediate resistor and the first resistor are connected in series between the second power line and the first node; receiving, in the first state, a first signal related to potentials at one end and the other end of the capacitor; forming a second state in the battery monitor device in which the first resistor is disconnected from the intermediate resistor and the intermediate resistor and the second resistor are connected in series between the first power line and the second node; receiving, in the second state, a second signal related to the potentials at the one end and the other end of the capacitor; and specifying the presence or absence of a short circuit in the multiplexer switch circuit based on the first signal and the second signal. Each of the multiplexer switch circuits includes a resistor connected in series with the switch. [Effects of the Invention]
[0010] According to this aspect, a battery monitor device, a battery system, a method for detecting a short circuit of a multiplexer, and a program capable of detecting a short circuit of a switch of the multiplexer without using a circuit that requires complicated control can be provided.
Brief Description of the Drawings
[0011]
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[0012] Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the following description, the same parts are denoted by the same reference numerals, and redundant descriptions are omitted.
[0013] FIG. 1 is a drawing schematically showing a battery monitor device according to the present embodiment. FIG. 2 is a drawing schematically showing a battery monitor device and a battery system according to the present embodiment.
[0014] Referring to FIGS. 1 and 2, the battery system 11 includes a battery monitor device 13 and a battery device 15. The battery device 15 can include a plurality of secondary batteries 17 (charge - dischargeable battery blocks) and a battery node NDCM. The secondary batteries 17 and the battery node NDCM are alternately connected in series. The arrangement of the serially - connected secondary batteries 17 is hereinafter referred to as the "battery array 16". The battery device 15 has a positive electrode 18b and a negative electrode 18c in the battery array 16. The battery device 15 can be connected to a first external terminal 14b and a second external terminal 14c via the battery monitor device 13. The secondary battery 17 can include, for example, a lithium battery.
[0015] The battery monitor device 13 can include a capacitor 23, a signal generation circuit 25, a voltage - dividing circuit 31, and a multiplexing circuit 33 (multiplexer). Also, an exemplary battery monitor device 13 can include a high - potential line 21b as one of a first power line and a second power line, and a low - potential line 21c as the other of the first power line and the second power line.
[0016] The high potential line 21b and the low potential line 21c are each configured to be connected to the positive electrode 18b and the negative electrode 18c of the battery array 16, respectively. An exemplary high potential line 21b is connected to the first external terminal 14b via the first isolation switch 34b. An exemplary low potential line 21c is connected to the second external terminal 14c via the second isolation switch 34c.
[0017] The capacitor 23 has one end 23b and the other end 23c, and the one end 23b and the other end 23c are connected to the first node NDb and the second node NDc, respectively. The capacitor 23 generates a charging voltage. The capacitor 23 can be used, for example, as a flying capacitor.
[0018] The signal generation circuit 25 has a first input 25b, a second input 25c, and an output 25d, and the first input 25b and the second input 25c are connected to the first node NDb and the second node NDc, respectively. The signal generation circuit 25 is configured to generate one or more electrical signals SV (analog signals or digital signals) associated with the first potential Vb of the first node NDb and the second potential Vc of the second node NDc.
[0019] The voltage dividing circuit 31 can include a first circuit 27, an intermediate circuit 28, and a second circuit 29. The first circuit 27 is connected between the low potential line 21c and the first node NDb. The intermediate circuit 28 is connected between the first node NDb and the second node NDc. The second circuit 29 is connected between the second node NDc and the high potential line 21b.
[0020] Specifically, the first circuit 27 includes a first resistor 22b and a first switch 22c connected in series. The second circuit 29 includes a second resistor 26b and a second switch 26c connected in series. The intermediate circuit 28 includes an intermediate resistor 24b and an intermediate switch 24c connected in series.
[0021] The multiplex circuit 33 includes a first connection terminal 33b connected to the first node NDb, a second connection terminal 33c connected to the second node NDc, a connection terminal 33d (connection node) configured to be connected to the battery device 15, and a plurality of multiplex switch circuits 33e. Each of the multiplex switch circuits 33e can include a multiplex switch 33f, and can further include a resistor 33g (resistive element) connected in series to the multiplex switch 33f.
[0022] The multiplex switch circuits 33e and the connection terminal 33d can be numbered in a first direction from one of the high potential line 21b and the low potential line 21c to the other. Specifically, the multiplex switch circuits 33e can be connected, for example, between one of the high potential line 21b and the low potential line 21c, for example, the low potential line 21c, and one of the even-numbered connection terminals 33d (even-numbered nodes) and the odd-numbered connection terminals 33d (odd-numbered nodes) of the connection terminal 33d, for example, the odd-numbered nodes and the first connection terminal 33b. Also, the multiplex switch circuits 33e can be connected between the other of the even-numbered connection terminals 33d (even-numbered nodes) and the odd-numbered connection terminals 33d (odd-numbered nodes), for example, the even-numbered nodes and the second connection terminal 33c. Accordingly, the series connection of the multiplex switch 33f and the resistor 33g can also be numbered.
[0023] Specifically, the even-numbered series connection bodies (33f, 33g) in the array of the series connection of the multiplex switch 33f and the resistor 33g are connected to the first connection terminal 33b, and the first connection terminal 33b is connected to the first node NDb. The odd-numbered series connection bodies (33f, 33g) in the array of the multiplex switch 33f are connected to the second connection terminal 33c, and the second connection terminal 33c is connected to the second node NDc.
[0024] The high potential line 21b is connected to a connection terminal 13d connected to the positive electrode 18b of the battery array 16. The low potential line 21c is connected to a connection terminal 13d connected to the negative electrode 18c of the battery array 16.
[0025] The battery device 15 can include a plurality of connection terminals 15d. The connection terminals 15d can be used to monitor the potentials and potential differences of the positive and negative electrodes of the individual secondary batteries 17 in the battery array 16. The connection terminals 15d can be connected to either the positive electrode and / or the negative electrode of the secondary battery 17. Specifically, the positive electrode of the secondary battery 17 on the low potential side of the adjacent secondary batteries 17 is connected to the negative electrode of the secondary battery 17 on the high potential side at the battery node NDCM. The positive electrode 18b is connected to the positive electrode of the highest-order secondary battery 17 in the battery array 16. The negative electrode 18c is connected to the negative electrode of the lowest-order secondary battery 17 in the battery array 16.
[0026] Also, the battery nodes NDCM of the battery device 15 can be numbered in the direction from one of the positive electrode 18b and the negative electrode 18c to the other, for example, from the negative electrode 18c to the positive electrode 18b. These battery nodes NDCM can be connected to either the positive electrode and / or the negative electrode of the secondary battery 17.
[0027] The numbered battery nodes NDCM can be connected to each of the connection terminals 15d of the battery device 15, and the connection terminals 15d can also be numbered in the same way.
[0028] The connection terminals 15d of the battery device 15 can be connected to the connection terminals 13d of the battery monitor device 13. The connection terminals 13d are numbered according to the numbering of the connection terminals 15d of the battery device 15. The connection terminals 13d can also be connected to the respective third connection terminals 33d (the third connection terminals 33d of the multiplex circuit 33).
[0029] The battery monitor device 13 has a normal mode in which charging and discharging of the battery device 15 are performed, and monitor modes different from this normal mode, specifically, a first monitor mode and a second monitor mode.
[0030] The battery monitor device 13 can further include a first switch control circuit 38 configured to control the voltage dividing circuit 31. The first switch control circuit 38 can be configured to control the first switch 22c of the first circuit 27, the intermediate switch 24c of the intermediate circuit 28, and the second switch 26c of the second circuit 29 in the monitor mode.
[0031] Specifically, in the first monitor mode, the first switch control circuit 38 turns on the first switch 22c of the first circuit 27 and the intermediate switch 24c of the intermediate circuit 28, and turns off the second switch 26c of the second circuit 29. Also, in the second monitor mode, the first switch control circuit 38 turns on the second switch 26c of the second circuit 29 and the intermediate switch 24c of the intermediate circuit 28, and turns off the first switch 22c of the first circuit 27.
[0032] The battery monitor device 13 can include a second switch control circuit 32 configured to control the multiplexing circuit 33. The second switch control circuit 32 can control the conduction / non - conduction of the multiplex switch 33f in the monitor mode. Specifically, the second switch control circuit 32 controls the multiplex switch 33f to be non - conductive in the first monitor mode and the second monitor mode.
[0033] The reset of the voltage across the terminals of the capacitor 23 can be performed by using the intermediate switch 24c of the intermediate circuit 28 as an equivalent switch.
[0034] However, the voltage dividing circuit 31 can further include a reset circuit 19 configured to reset the voltage across the capacitor 23. The reset circuit 19 can be configured to initialize the first node NDb and the second node NDc, or the charging charge of the capacitor 23, prior to the measurement of the short circuit detection of the multiplex switch circuit 33e. Specifically, the reset circuit 19 makes the potentials of the first node NDb and the second node NDc the same potential. Alternatively, the reset circuit 19 initializes the first node NDb and applies a desired potential, such as a ground potential, to the potential of the first node NDb. Similarly, the reset circuit 19 initializes the second node NDc and applies a desired potential, such as a ground potential, to the potential of the second node NDc.
[0035] An exemplary initialization is to temporarily connect the first node NDb to the reference potential line 21d using a switch, and after the completion of the initialization, the first node NDb is disconnected from the reference potential line 21d. Similarly, the reset circuit 19 initializes the second node NDc and applies a desired potential, such as a ground potential, to the potential of the second node NDc. An exemplary initialization is to temporarily connect the second node NDc to the reference potential line 21d using a switch, and after the completion of the initialization, the second node NDc is disconnected from the reference potential line 21d.
[0036] An exemplary reset circuit 19 can include a first reset switch 19b connected between the first node NDb and the reference potential line 21d. In addition, an exemplary reset circuit 19 can include a second reset switch 19c connected between the second node NDc and the reference potential line 21d.
[0037] The battery monitor device 13 can further include a third switch control circuit 40. The third switch control circuit 40 is configured to reset the voltage across the capacitor 23 and set the reset state in the voltage dividing circuit 31. Specifically, the third switch control circuit 40 controls the conduction / non - conduction of the first reset switch 19b and the second reset switch 19c.
[0038] The battery monitor device 13 can further include a determination circuit 36 (determination device). The determination circuit 36 is connected to the signal generation circuit 25 and is configured to determine the presence or absence of leakage in the arrangement of the secondary battery 17 based on the electrical signal SV.
[0039] As shown in FIG. 1, the battery device 15 is connected to the battery monitor device 13 and is connected to the high potential line 21b and the low potential line 21c in the battery monitor device 13. Specifically, the high potential line 21b and the low potential line 21c are respectively connected to the positive electrode 18b and the negative electrode 18c in the arrangement of the secondary battery 17.
[0040] The battery system 11 can be configured to be mountable on a moving body such as a vehicle, an aircraft, and a ship, for example. The reference potential line 21d can be connected to an electrical conductor of the moving body, for example.
[0041] A schematic explanation will be given of detecting the presence or absence of a short circuit in the multiplex switch circuit 33e in the battery monitor device 13 using the battery device 15.
[0042] First, during a period for sufficiently charging the battery array 16 of the battery device 15, the battery array 16 of the battery device 15 is placed in a charged state.
[0043] The battery monitor device 13 is set to a monitor mode that enables the first monitor mode and the second monitor mode. In the monitor mode, the second switch control circuit 32 controls the multiplex circuit 33 so that all the multiplex switches 33f are non-conductive. Also, when the battery monitor device 13 includes the first isolation switch 34b and the second isolation switch 34c, the first isolation switch 34b and the second isolation switch 34c are made conductive. The conduction / non-conduction of the first isolation switch 34b and the second isolation switch 34c can be controlled by the fourth switch control circuit 37, for example.
[0044] (Connection 1) After initializing the charge of the capacitor 23, a series connection of the first resistor 22b of the first circuit 27 and the intermediate resistor 24b of the intermediate circuit 28 is formed, and the high potential line 21b is disconnected from the second node NDc. The series connection of the first resistor 22b and the intermediate resistor 24b is connected between one of the positive electrode 18b and the negative electrode 18c in the battery array 16, for example, between the negative electrode 18c and the second node NDc. The intermediate resistor 24b is connected in parallel with the capacitor 23.
[0045] When there is a short circuit in the even-numbered multiplex switch 33f, the second node NDc is connected to any battery node NDCM in the battery array 16 via the short-circuited multiplex switch 33f. The battery node NDCM related to the short-circuited multiplex switch circuit 33e is connected to the second node NDc. Thereby, the resistor 33g of the short-circuited multiplex switch circuit 33e, the series connection of the first resistor 22b and the intermediate resistor 24b receives a voltage corresponding to the number of battery stacking stages between the battery node NDCM related to the short-circuited multiplex switch circuit 33e and the negative electrode 18c. The voltage related to the resistance ratio of the intermediate resistor 24b with respect to the series connection of the resistor 33g, the first resistor 22b, and the intermediate resistor 24b is applied to the capacitor 23, and the amount of stored charge associated with this voltage is stored in the capacitor 23.
[0046] When there is no short circuit in the even-numbered multiplex switch 33f, the second node NDc is not connected to any battery node NDCM in the battery array 16 via the multiplex switch 33f. Accordingly, the charging charge of the capacitor 23 is maintained at the initialized value, and the voltage between the terminals of the capacitor 23 becomes, for example, 0 volts.
[0047] Thereby, the presence or absence of the short-circuit switch in the battery device 15, that is, the presence and absence of the short-circuit switch can be detected.
[0048] The voltage between the connection terminal 33d of the short-circuit multiplex switch circuit 33e and the low potential line 21c is divided by the series connection of the resistor 33g of the short-circuit multiplex switch circuit 33e, the first resistor 22b, and the intermediate resistor 24b. The value of this voltage division (voltage division value) is applied to the terminals of the capacitor 23. Since the voltage between the terminals of the capacitor 23 depends on the number of stacked battery cells between the short-circuit multiplex switch 33f and the negative electrode 18c, the position of the short-circuit multiplex switch 33f can be specified based on the voltage between the terminals of the capacitor 23.
[0049] (Connection 2) After initializing the charge of the capacitor 23, a series connection of the second resistor 26b of the second circuit 29 and the intermediate resistor 24b of the intermediate circuit 28 is formed, and the low potential line 21c is disconnected from the first node NDb. The series connection of the second resistor 26b and the intermediate resistor 24b is connected between the positive electrode 18b and the first node NDb, for example, the other of the positive electrode 18b and the negative electrode 18c in the battery array 16. The intermediate resistor 24b is connected in parallel with the capacitor 23.
[0050] When there is a short circuit in the odd-numbered multiplex switch 33f, the first node NDb is connected to any battery node NDCM in the battery array 16 via the short-circuit multiplex switch 33f. The battery node NDCM related to the short-circuit multiplex switch circuit 33e is connected to the first node NDb. As a result, the series connection of the resistor 33g of the short-circuit multiplex switch circuit 33e, the first resistor 22b, and the intermediate resistor 24b receives a voltage corresponding to the number of stacked battery cells between the battery node NDCM related to the short-circuit multiplex switch circuit 33e and the negative electrode 18c. The voltage related to the resistance ratio of the intermediate resistor 24b with respect to the series connection of the resistor 33g of the short-circuit multiplex switch circuit 33e, the second resistor 26b, and the intermediate resistor 24b is applied to the capacitor 23. The amount of stored charge associated with this voltage is stored in the capacitor 23.
[0051] When there is no short circuit in the odd-numbered multiplex switch 33f, the first node NDb is not connected to any battery node NDCM in the battery array 16 via the multiplex switch 33f. Accordingly, the charging charge of the capacitor 23 is maintained at the initialized value, and the voltage between the terminals of the capacitor 23 becomes, for example, 0 volts.
[0052] Thus, the presence or absence of a short circuit switch in the battery device 15, that is, the presence and absence of the short circuit switch can be detected.
[0053] The voltage between the connection terminal 33d related to the short-circuit multiplex switch circuit 33e and the high potential line 21b is divided by the series connection of the resistor 33g of the short-circuit multiplex switch circuit 33e, the second resistor 22c, and the intermediate resistor 24b. The value of this voltage division (voltage division value) is applied to the terminals of the capacitor 23. Since the voltage between the terminals of the capacitor 23 depends on the number of battery stacking stages between the short-circuit multiplex switch 33f and the negative electrode 18c, the position of the short-circuit multiplex switch 33f can be specified based on the voltage between the terminals of the capacitor 23.
[0054] The battery monitor device 13 will be further described with reference to FIGS. 1 and 2.
[0055] The first circuit 27 can have a first end 27b and a second end 27c. The first end 27b is connected to the first node NDb, and the second end 27c is connected to one of the high potential line 21b and the low potential line 21c, for example, the low potential line 21c.
[0056] The second circuit 29 can have a first end 29b and a second end 29c. The first end 29b is connected to the second node NDb, and the second end 29c is connected to the other of the high potential line 21b and the low potential line 21c, for example, the high potential line 21b.
[0057] The intermediate circuit 28 can have a first end 28b and a second end 28c. The first end 28b is connected to the first node NDb, and the second end 28c is connected to the second node NDc.
[0058] When each of the even-numbered and odd-numbered multiplex switches 33f in Connection 1 and Connection 2 has a short-circuited multiplex switch 33f, the voltage related to the number of stages of the secondary battery 17 between the short-circuited multiplex switches 33f is applied to the capacitor 23.
[0059] The battery monitor device 13 can further include a fifth switch control circuit 39. The fifth switch control circuit 39 can be configured to control the first measurement switch 40b and the second measurement switch 40c. The first measurement switch 40b is connected between the first node NDb and the second input 25c of the signal generation circuit 25. The second measurement switch 40c is connected between the second node NDc and the first input 25b of the signal generation circuit 25. The first measurement switch 40b and the second measurement switch 40c control the timing at which the signal generation circuit 25 and the determination circuit 36 acquire a signal related to the potential difference between the terminals of the capacitor 23. Also, the combination of the fifth switch control circuit 39, the first measurement switch 40b, and the second measurement switch 40c enables the first node NDb and the second node NDc to be connected to the signal generation circuit 25 after the divided voltage value has stabilized during voltage division by the capacitor.
[0060] An exemplary signal generation circuit 25 can include a potential measurement circuit 41 and an A / D conversion circuit 43. The potential measurement circuit 41 is configured to generate one or more analog signals SVA associated with the first potential Vb of the first node NDb and the second potential Vc of the second node NDc. The A / D conversion circuit 43 is connected to the output of the potential measurement circuit 41 and is configured to convert the analog signal SVA into a digital signal SVD.
[0061] The first to fifth switch control circuits (32, 37, 38, 39, 40) can constitute a switch control circuit that can receive respective switch control signals from the determination circuit 36.
[0062] FIG. 3 is a block diagram showing exemplary hardware resources of a microcomputer as a processing device of the battery monitor device and the battery system according to the present embodiment. The exemplary determination circuit 36 can include the microcomputer 20. However, the determination circuit 36 can be configured by a configuration of another circuit without using the microcomputer 20.
[0063] In the microcomputer 20, hardware resources are used to determine the presence or absence of a short circuit in the multiplex switch 33f, identify the location of the short circuit, and control the switches in the battery monitor device 13. The exemplary microcomputer 20 can include a processor 141 (central processing unit: CPU), a memory 142 (storage device), an input / output port 143, and a network port 144, and can include an input device 145, a display 146, and a peripheral circuit 148 if necessary. The memory 142 is communicatively coupled to the processor 141. The input / output port 143 is communicatively coupled to the processor 141, receives data from an external sensor, and sends out the received data. The network port 144 is communicatively coupled to the processor 141 and is connected to an (external) network. The input device 145 is communicatively coupled to the processor 141. The display 146 is communicatively coupled to the processor 141 and the memory 142. Information for identifying the location of the short circuit is stored in the memory 142 or provided from a network via the network port 144. The processor 141, the memory 142, the input / output port 143, the network port 144, the input device 145, and the display 146 are connected via a system bus 147. The peripheral circuit 148 can include, for example, an A / D converter, and this A / D converter can convert an analog signal SVA into a digital signal SVD.
[0064] Referring to FIGS. 1 and 2, the microcomputer 20 in FIG. 3 can be an example of the processing device 45.
[0065] The processing device 45 can be placed within the determination circuit 36. The processing device 45 is configured to include one or more memories (142) configured to store one or more instructions, and one or more processors (141) coupled to the memory (142). In the processing device 45 including an A / D converter, the processing device 45 may perform the function of the A / D conversion circuit 43. In this processing device 45, an analog signal SVA is supplied to the processing device 45, and this analog signal SVA is converted into a digital signal SVD by an A / D converter (for example, equivalent to the A / D conversion circuit 43) built into the processing device 45.
[0066] FIG. 4 is a block diagram showing modules for a processing device of the battery system 11 and the battery monitor device 13 according to the present embodiment. The module 140c (see FIG. 3) can be stored in the memory (142) in the form of program code defining instructions.
[0067] Specifically, the memory (142) is configured to store one or more instructions. Further, the memory (142) can be configured to store information 140b (see FIG. 3) available for the operation of the determination circuit 36 in a form available for the operation of the determination circuit 36.
[0068] The instructions can be configured to cause the processor (141) to perform the following operations of the module (140c, see FIG. 3) when executed. Module MD1: Set the monitor mode, specifically, the first monitor mode and / or the second monitor mode, in the battery monitor device 13. Module MD2: Control the multiplexing circuit 33 so that all of the multiplexing switches 33f of the multiplexing switch circuit 33e are turned off. Module MD3: Control the first circuit 27, the intermediate circuit 28, and the second circuit 29 so as to configure connection 1 and / or connection 2 to the battery monitor device 13. Module MD4: After forming either connection 1 or connection 2 in the battery monitor device 13, measurements related to the potential and / or potential difference of the terminals of the capacitor 23 are taken using the signal generation circuit 25. Module MD5: Using an electrical signal SV such as the digital signal SVD and information (140b), it is determined whether there is a short circuit in the multiplexing circuit 33.
[0069] Also, when executed, the instruction can be configured to cause the processor (141) to perform the following operations of module 140c (see FIG. 3). Module MD6: Releases the monitoring mode in the battery monitor device 13. When the monitoring mode is released, another mode such as the normal mode is set in the battery monitor device 13. The non-conduction limit of the multiplexing switch 33f of the multiplexing circuit 33 is released. Also, the conduction / non-conduction limits related to the first isolation switch 34b and the second isolation switch 34c are released.
[0070] The instruction to control the first circuit 27, the intermediate circuit 28, and the second circuit 29 to form connection 1 to the battery monitor device 13 can be configured to cause the processor (141) to perform the following operations of module 140c (see FIG. 3) when executed. Module MD7: Sets the battery monitor device 13 to the first state that provides connection 1. The first circuit 27, the intermediate circuit 28, and the second circuit 29 can be controlled as follows. Specifically, module MD7 makes the first switch 22c in the first circuit 27 and the intermediate switch 24c in the intermediate circuit 28 conductive, and makes the second switch 26c in the second circuit 29 non-conductive. Note that module MD7 can initialize the capacitor 23 prior to setting the battery monitor device 13 to the first state that provides connection 1.
[0071] Instructions for controlling the first circuit 27, the intermediate circuit 28, and the second circuit 29 to form connection 2 to the battery monitor device 13 can be configured to cause the processor (141) to perform operations of a module (140c) as shown below when executed. Module MD8: Set the battery monitor device 13 to a second state that provides connection 2. The first circuit 27, the intermediate circuit 28, and the second circuit 29 can be controlled as follows. Specifically, module MD8 turns on the second switch 26c in the second circuit 29 and the intermediate switch 24c in the intermediate circuit 28, and turns off the first switch 22c in the first circuit 27. Note that module MD8 can initialize the capacitor 23 prior to setting the battery monitor device 13 to the second state that provides connection 2.
[0072] Also, the instructions can be configured to cause the processor (141) to perform operations of a module (140c) as shown below when executed. Module MD9: After setting to the first state or the second state, receive the first signal or the second signal as an electrical signal SV including information related to the potentials of both terminals of the capacitor 23. The electrical signal SV can be generated by measurement using the signal generation circuit 25, and can include at least one signal representing the potential difference between the first potential (e.g., Vb) of the first node NDb and the second potential (e.g., Vc) of the second node NDc. Alternatively / additionally, the electrical signal SV can include at least two signals representing the respective potentials (e.g., Vb and Vc) of the first node NDb and the second node NDc.
[0073] Furthermore, the battery monitor device 13 can include a module that causes the processor 141 to perform the following operations of controlling the first circuit 27, the intermediate circuit 28, and the second circuit 29 after forming connection 1 and / or connection 2 to the battery monitor device 13. Module MD10: Based on at least one of the first signal and the second signal, identify the presence or absence of a short circuit in the arrangement of the multiplex switches 33f of the multiplex circuit 33.
[0074] Identifying the presence or absence of a short-circuit location in module MD10 can include at least one of the following sub-modules. Module MD10-1: Based on the first signal, identify the location of the short circuit in the arrangement of multiplex switches 33f. Module MD10-2: Based on the second signal, identify the location of the short circuit in the arrangement of multiplex switches 33f. Module MD10-3: Based on the first signal and the second signal, identify the location of the short circuit in the arrangement of multiplex switches 33f.
[0075] Also, identifying the presence or absence of a short-circuit location in module MD10 can include at least one of the following sub-modules. Module MD10-4: Compare the value of the first signal with one or more reference values. Module MD10-5: Compare the value of the second signal with one or more reference values. Module MD10-6: Compare the value of each of the first signal and the second signal with one or more reference values.
[0076] The information (142b) in the memory (142) can include data related to the number of series stages of the secondary battery 17, the charging voltage value (for example, the voltage value of substantially full charge) in each of the series stages, and / or reference values for comparison. This information can be obtained, for example, from experiments measuring the characteristics of the battery system 11.
[0077] FIGS. 5, 6, 7, and 8 are flowcharts showing the main operations in the method for detecting a short circuit in the multiplexer according to the present embodiment.
[0078] As shown in FIGS. 5, 6, 7, and 8, this method 100 can include at least one of the following steps.
[0079] In step ST1, as shown in FIG. 5, the battery monitor device 13 and the battery device 15 are prepared. Also, the battery monitor device 13 and the battery device 15 are connected to each other.
[0080] In step ST2, as shown in FIG. 5, after preparing the battery monitor device 13 and the battery device 15, all the multiplex switches 33f are turned off. After turning off, the charge storage of the capacitor 23 is initialized. Prior to the initialization, the second node NDc is disconnected from the high potential line 21b and the first node NDb is disconnected from the low potential line 21c. Exemplary initialization can be provided by turning on the switches (19b, 19c) and / or by turning on the switches (24c, see FIG. 1). The dashed line STG1 indicates a potential short - circuit location. The first isolation switch 34b and the second isolation switch 34c are turned on.
[0081] In step ST3, as shown in FIG. 6, after releasing the initialization, the first monitor mode is set in the battery monitor device 13. The second node NDc and the capacitor 23 are separated from the high potential line 21b, and a series connection of the first resistor 22b and the intermediate resistor 24b is formed. Specifically, the first resistor 22b is connected between the negative electrode 18c in the battery pack including the array of secondary batteries 17 connected in series and one end of the intermediate resistor 24b and the capacitor 23 to form a series connection of the first resistor 22b and the intermediate resistor 24b. In this connection, the capacitor 23 is charged.
[0082] In step ST4, the first switch 22c and the intermediate switch 24c are turned off to form the connection of step ST1. Thereafter, as shown in FIG. 6, the first measurement switch 40b and the second measurement switch 40c are turned on to generate a first signal SG1 indicating the respective potentials of one end and the other end of the capacitor 23 and / or the potential difference between one end and the other end of the capacitor 23 as a potential difference signal. With this connection sequence, the signal generation circuit 25 is separated from the high - voltage circuit that receives the voltage from the secondary battery 17 during the measurement of the first signal SG1.
[0083] In step ST5 of FIG. 6, based on the first signal SG1, the presence or absence of a short circuit in the arrangement of the multiplex switch 33f is determined.
[0084] This method may be such that in step ST5, based on the first signal SG1, the identification of a short circuit in the arrangement of the multiplex switch 33f is determined.
[0085] This method can perform the following steps after step ST5 or after step ST1.
[0086] In step ST6, as shown in FIG. 7, the power storage of the capacitor 23 is initialized. Prior to the initialization, the first node NDb is disconnected from the low potential line 21c and the second node NDc is disconnected from the high potential line 21b. The initialization can be performed by the exemplary initialization already described. The dashed line STG2 indicates a potential short circuit location.
[0087] In step ST7, as shown in FIG. 7, after releasing the initialization, the battery monitor device 13 is set to the second monitor mode. The first node NDb and the capacitor 23 are separated from the low potential line 21c, and a series connection of the second resistor 26b and the intermediate resistor 24b is formed. Specifically, the second resistor 26b is connected between the positive electrode 18b in the battery pack including the array of secondary batteries 17 connected in series and one end of the intermediate resistor 24b and the capacitor 23 to form a series connection of the second resistor 26b and the intermediate resistor 24b. In this connection, the capacitor 23 is charged.
[0088] In step ST8, the intermediate switch 24c and the second resistor 26b are turned off to form the connection of step ST1. After that, as shown in FIG. 8, the first measurement switch 40b and the second measurement switch 40c are turned on to generate a second signal SG2 indicating the respective potentials of one end and the other end of the capacitor 23 and / or the potential difference between one end and the other end of the capacitor 23 as a potential difference signal. According to this connection sequence, the signal generation circuit 25 is separated from the high-voltage circuit that receives the voltage from the secondary battery 17 during the measurement of the second signal SG2.
[0089] In step ST9 of FIG. 8, based on the second signal SG2, the presence or absence of a short circuit in the arrangement of the multiplex switch 33f is determined.
[0090] This method may be configured to determine the location of a short circuit in the arrangement of the multiplex switch 33f based on the second signal SG2 in step ST8.
[0091] In step ST10 of FIG. 8, based on the first signal SG1 and the second signal SG2, the presence or absence of a short circuit in the arrangement of the multiplex switch 33f is determined. Each of the first signal SG1 and the second signal SG2 can indicate the potential at each of one end and the other end of the capacitor 23 and / or the potential difference between one end and the other end of the capacitor 23. Accordingly, determining the presence or absence of a short circuit includes identifying the location of the short circuit in the arrangement of the multiplex switch 33f.
[0092] A program including one or more instructions for controlling the battery system 11 including the battery device 15 and the battery monitor device 13 can be installed in the microcomputer 20.
[0093] When the instructions of the program are executed by one or more processing devices, they are configured to cause the processing devices to perform the following operations.
[0094] · Control the multiplex circuit 33 so that all of the multiplex switches 33f of the multiplex switch circuit 33e are turned off. These multiplex switch circuits 33e are connected between the odd-numbered nodes among the connection terminals 13d and the first node NDb, and between the even-numbered nodes among the connection terminals 13d and the second node NDc. · Prior to measuring the potentials of one end 23b and the other end 23c of the capacitor 23, reset the stored charge of the capacitor 23. · Form the first state in the battery monitor device 13, specifically the state in which the second resistor 26b is disconnected from the intermediate resistor 24b and the intermediate resistor 24b and the first resistor 22b are connected in series between the low potential line 21c (one of the first power supply line and the second power supply line) and the second node NDc. · In the first state, receive the first signal SG1 related to the potentials of one end 23b and the other end 23c of the capacitor 23. · Prior to measuring the potentials of one end 23b and the other end 23c of the capacitor 23, reset the stored charge of the capacitor 23. · Form the second state in the battery monitor device 13, specifically the state in which the first resistor 22b is disconnected from the intermediate resistor 24b and the intermediate resistor 24b and the second resistor 26b are connected in series between the high potential line 21b (the other of the first power supply line and the second power supply line) and the first node NDb. · In the second state, receive the second signal SG2 related to the potentials of one end 23b and the other end 23c of the capacitor 23. · Based on the first signal SG1 and the second signal SG2, identify the presence or absence of a short circuit in the multiplex switch circuit 33e.
[0095] Figures 9 to 14 are drawings for explaining the presence or absence of a short - circuit location. In Figures 9 to 14, an exemplary battery device 15 includes five secondary batteries 17, and an exemplary battery monitor device 13 includes six multiplex switches 33f. These multiplex switches 33f are numbered, for example, in the direction from the low - potential line 21c to the high - potential line 21b. The charging voltage of all the secondary batteries 17 is a value Vbat. Figures 9 to 14 depict a part of the battery monitor device 13 and the battery device 15 shown in FIGS. 1 and 2, specifically, switches (22c, 24c, 26c, 33f) and resistors (22b, 24d, 26b, 33g). The reference sign "SHT" shown by a dashed line means a virtual resistor having a very small resistance, that is, the presence of a short - circuit. For the convenience of the following explanation, the resistance values of the resistors (22b, 24d, 26b, 33g) are referred to by the signs (R22b, R24d, R26b, R33g), respectively.
[0096] For the sake of simplicity, the values related to the electrical elements involved are specifically set as follows in the calculation. The charging voltage of the secondary battery 17 is referred to as "Vbat". The specific values of the resistance values (R22b, R26b, R33g) of the resistors (22b, 26b, 33g) are referred to as "R". The specific value of the resistance value (R24b) of the resistor (24b) is referred to as "2×R / (n - 1)". Here, n indicates the number of stages of the secondary battery 17. In the circuit of FIGS. 9 to 14, n is equal to 5, and accordingly, the resistance value (R24b) of the resistor (24d) is "R / 2".
[0097] Figure 9 shows the battery monitor device 13 that sets connection 1. The multiplex circuit 33 has a short - circuit (SHT) in the multiplex switch 33f on the 6th face from the bottom. The short - circuited multiplex switch 33f applies the voltage of five - stage secondary batteries 17 (+5×Vbat) at the input of the resistor 33g of the multiplex circuit 33 to three resistors (33g, 24b, 22b) connected in series. Accordingly, as a result of voltage division, the charging voltage VC23 of the capacitor 23 is expressed as follows. VC23 = +5 × Vbat × R24b / (R24b + R26d + R33g) = +5 × Vbat × R / 2 / (R / 2 + R + R) = +Vbat It becomes like this. The determination circuit 36 sets a reference value for comparison so as to detect this voltage.
[0098] Figure 10 shows the battery monitor device 13 that sets connection 1. The multiplex circuit 33 has a short circuit (SHT) in the multiplex switch 33f on the 4th side from the bottom. The shorted multiplex switch 33f applies the voltage (+3 × Vbat) of the secondary battery 17 for three stages at the input of the resistor 33g of the multiplex circuit 33 to the three resistors (33g, 24b, 22b) connected in series. Accordingly, as a result of voltage division, the charging voltage VC23 of the capacitor 23 is expressed as follows. VC23 = +3 × Vbat × R24b / (R24b + R26b + R33g) = +3 × Vbat × R / 2 / (R / 2 + R + R) = +Vbat × 3 / 5 It becomes like this. The determination circuit 36 sets a reference value for comparison so as to detect this voltage.
[0099] Figure 11 shows the battery monitor device 13 that sets connection 1. The multiplex circuit 33 has a short circuit (SHT) in the multiplex switch 33f on the 2nd side from the bottom. The shorted multiplex switch 33f applies the voltage (+Vbat) of the secondary battery 17 for one stage at the input of the resistor 33g of the multiplex circuit 33 to the three resistors (33g, 24b, 22b) connected in series. Accordingly, as a result of voltage division, the charging voltage VC23 of the capacitor 23 is expressed as follows. VC23 = +Vbat × R24b / (R24b + R26b + R33g) = +Vbat × R / 2 / (R / 2 + R + R) = +Vbat × 1 / 5 It becomes like this. The determination circuit 36 sets a reference value for comparison so as to detect this voltage.
[0100] Figure 12 shows the battery monitor device 13 for setting Connection 1. The multiplex circuit 33 does not have a short circuit (SHT) in the multiplex switch 33f. Since there is no short circuit, the voltage of the battery device 15 does not pass through the multiplex circuit 33. Accordingly, the charging voltage VC23 of the capacitor 23 is the initialized value VC23 = 0 volts and becomes. The determination circuit 36 sets a reference value for comparison so as to detect this voltage.
[0101] Figure 13 shows the battery monitor device 13 for setting Connection 2. The multiplex circuit 33 has a short circuit (SHT) in the multiplex switch 33f from the lowest position to the first side. The shorted multiplex switch 33f applies the voltage (5 × Vbat) of the secondary battery 17 in five stages at the input of the resistor 33g of the multiplex circuit 33 to three resistors (33g, 24b, 22b) connected in series. Accordingly, as a result of voltage division, the charging voltage VC23 of the capacitor 23 is expressed as follows. VC23 = +5 × Vbat × R24b / (R24b + R26b + R33g) = +5 × Vbat × R / 2 / (R / 2 + R + R) = +Vbat and becomes. The determination circuit 36 sets a reference value for comparison so as to detect this voltage.
[0102] Figure 14 shows the battery monitor device 13 for setting Connection 2. The multiplex circuit 33 does not have a short circuit (SHT) in the multiplex switch 33f. Since there is no short circuit in the multiplex circuit 33, the voltage of the battery device 15 does not pass through the multiplex circuit 33. Accordingly, the charging voltage VC23 of the capacitor 23 is the initialized value VC23 = 0 volts and becomes. The determination circuit 36 sets a reference value for comparison so as to detect this voltage.
[0103] Generally, in the battery device 15 where the number of secondary batteries 17 is n, the number of multiplex switches 33f is n + 1, where n is a natural number of 2 or more.
[0104] Resistance value of the resistor 33g in the multiplex switch circuit 33e: R Resistance value of the first resistor 22b: RC = α × R (Denoted as “αR” in the formula) Resistance value of the second resistor 26b: RA = β × R (Denoted as “βR” in the formula. Considering the symmetry of the circuit, β = α can be set) Resistance value of the intermediate resistor 24b: RB = γ × R (Denoted as “γR” in the formula) Voltage of the secondary battery 17: Vbat
[0105] Short - circuit of the m - th switch (m is a natural number) in the arrangement of the multiplex switch circuit 33e generates the following voltage between the terminals of the capacitor 23. Vmon1=(m - 1)×Vbat×γR / (R + βR + γR) =(m - 1)×Vbat×γ / (1 + β + γ) Here, γ:β = 1:(n - 1) / 2, and accordingly γ = 2β / (n - 1) =Vbat×(m - 1)×(2β / (n - 1)) / (1 + β + 2β / (n - 1)) =Vbat×(m - 1)×2β / ((n - 1)+β×(n - 1)+2β) =Vbat×(m - 1)×2β / ((n - 1)+β×(n + 1))
[0106] Assuming that the resistance value of the second resistor 26b (resistance value of the first resistor 22b) is equal to the resistance value of the resistor 33g in the multiplex switch circuit, that is, α = β = 1, Vmon1=Vbat×2×(m - 1) / (2×n) It becomes. According to this formula, a reference value for determining the short - circuit location can be specified.
[0107] Also, in the battery system 11 where the number of secondary batteries 17 is three (i.e., n = 3. Here, m = 1 or 3), Vmon1 = m×Vbat×2 / (2×3) = m×Vbat / 3
[0108] The measurement of the short circuit is performed by each of Connection 1 and Connection 2. In each of Connection 1 and Connection 2, the reference value for comparison can be set as follows. When m = 1 Vmon1(m = 1) = Vbat / 3 When m = 3 Vmon1(m = 2) = Vbat
[0109] FIG. 15 shows an exemplary determination flow in a battery system where the number of secondary batteries 17 is three (i.e., n = 3). According to this determination flow, the voltage across the terminals of the capacitor 23 in each of Connection 1 and Connection 2 is measured. Then, by comparing the measured values of the voltage across the terminals of the capacitor 23 in Connection 1 and Connection 2 with the reference value, the presence or absence of a short circuit and the short circuit location in the case of a short circuit are identified. "Vbat_min" indicates the minimum charging voltage in the secondary battery 17 in the battery device 15 to be measured. To avoid complexity, all the values of the voltage measurement across the terminals of the capacitor 23 are generated as positive values. In FIG. 15, the resistance value of the intermediate resistor 24b ("RB" in FIG. 15) is 2×R / (n - 1).
[0110] In step ST31, Connection 1 is formed in the battery system 11. The voltage Vmon across the terminals of the capacitor 23 is measured.
[0111] In step ST32, a comparison 1 between the voltage Vmon and the first reference value (e.g., Vbat_min) is performed.
[0112] When the comparison result of comparison 1 indicates that the voltage Vmon is equal to or greater than the first reference value, the determination result in step ST33 indicates that "Switch S1 is short-circuited".
[0113] When the comparison result of Comparison 1 indicates that the voltage Vmon is smaller than the first reference value, in step ST34, a second comparison is made between the voltage Vmon and the next reference value (for example, Vbat_min / 3). Specifically, considering the variation, the voltage Vmon is compared with a second reference value (for example, Vbat_min / 3 + △V1) and a third reference value (for example, Vbat_min / 3 - △V1). Here, △V1 is a very small value representing the variation range.
[0114] When the comparison result of the second comparison indicates that the voltage Vmon is within the range of the second reference value and the third reference value, the determination result in step ST35 indicates that "switch S3 is short-circuited".
[0115] When the comparison result of the second comparison indicates that the voltage Vmon is outside the range of the second reference value and the third reference value, the determination result in step ST36 indicates that "switches S1 and S3 are not short-circuited".
[0116] In step ST37 following step ST36, a connection 2 is formed in the battery system 11. The voltage Vmon across the terminals of the capacitor 23 is measured.
[0117] In step ST38, a third comparison is made between the voltage Vmon and a fourth reference value (for example, Vbat_min).
[0118] When the comparison result of the third comparison indicates that the voltage Vmon is equal to or greater than the fourth reference value, the determination result in step ST39 indicates that "switch S2 is short-circuited".
[0119] When the comparison result of the third comparison indicates that the voltage Vmon is smaller than the fourth reference value, in step ST40, a fourth comparison is made between the voltage Vmon and the next reference value (for example, Vbat_min / 3). Specifically, considering the variation, the voltage Vmon is compared with a fifth reference value (for example, Vbat_min / 3 + △V2) and a sixth reference value (for example, Vbat_min / 3 - △V2). Here, △V2 is a very small value representing the variation range.
[0120] When the comparison result of Comparison 4 indicates that the voltage Vmon is within the range of the fifth reference value and the sixth reference value, the determination result in step ST41 indicates that "switch S4 is short-circuited".
[0121] When the comparison result of Comparison 4 indicates that the voltage Vmon is outside the range of the fifth reference value and the sixth reference value, the determination result in step ST42 is that "switches S2 and S4 are not short-circuited".
[0122] According to the present embodiment, it is possible to provide a battery monitor device, a battery system, a method for detecting a short circuit of a multiplexer switch, and a program that enable simple measurement without using a complex circuit and can detect a short circuit of the multiplexer switch.
[0123] As described above, the present embodiment can have various aspects shown below.
[0124] The battery monitor device of the first aspect according to this embodiment is a multiplexer including a plurality of connection nodes configured to be connectable to each of the battery nodes in a battery device including a plurality of secondary batteries and a plurality of battery nodes connected in series, a first power line, a second power line, a first node and a second node, and a plurality of multiplex switch circuits. The connection nodes are arranged in a first direction from one of the first power line and the second power line to the other. The multiplex switch circuits are connected between one of the even-numbered nodes and the odd-numbered nodes among the connection nodes and the first node with reference to one of the first power line and the second power line, and between the other of the even-numbered nodes and the odd-numbered nodes and the second node. Each of the multiplex switch circuits includes a resistor and a switch connected in series, a multiplexer, a first circuit connected between the first power line and the first node, a second circuit connected between the second power line and the second node, and an intermediate circuit connected between the first node and the second node. The first circuit includes a first resistor and a first switch connected in series. The second circuit includes a second resistor and a second switch connected in series. The intermediate circuit includes an intermediate resistor and an intermediate switch connected in series. A voltage dividing circuit, a signal generation circuit configured to generate one or more electrical signals associated with the potentials of the first node and the second node, and a capacitor connected between the first node and the second node and generating a charging voltage.
[0125] The battery monitor device of the second aspect according to the first aspect of this embodiment further includes a switch control circuit. The switch control circuit can be configured to turn on the first switch of the first circuit and the intermediate switch of the intermediate circuit and turn off the second switch in the second circuit in the first monitor mode.
[0126] In the battery monitor device of the third aspect according to the second aspect of the present embodiment, the switch control circuit is configured to turn on the second switch of the second circuit and the intermediate switch of the intermediate circuit and turn off the first switch in the first circuit in a second monitor mode different from the first monitor mode.
[0127] In the battery monitor device of the fourth aspect according to the third aspect of the present embodiment, the voltage dividing circuit further includes a reset circuit configured to reset the voltage across the capacitor terminals, and the switch control circuit can be configured to reset the voltage across the capacitor terminals and set a reset state in the voltage dividing circuit in the first monitor mode and the second monitor mode.
[0128] The battery monitor device of any one of the first to fourth aspects according to the present embodiment further includes a determination circuit connected to the signal generation circuit, and the determination circuit can be configured to identify the presence or absence of a short circuit in the multiplex switch circuit based on the electrical signal from the signal generation circuit.
[0129] In the battery monitor device of the sixth aspect according to the fifth aspect of the present embodiment, the determination circuit includes a processing device including one or a plurality of storage devices for storing instructions and one or a plurality of processors, and the instructions are configured to cause the processor to perform the following operations when executed by the processor: controlling the multiplexer to turn off all of the switches of the multiplexer switch circuit of the multiplexer; turning on the first switch of the first circuit and the intermediate switch of the intermediate circuit and turning off the second switch of the second circuit to set the battery monitor device to a first state; receiving a first signal as the electrical signal from the signal generation circuit in the first state; turning on the second switch of the second circuit and the intermediate switch of the intermediate circuit and turning off the first switch of the first circuit to set the battery monitor device to a second state; receiving a second signal as the electrical signal from the signal generation circuit in the second state; and identifying the presence or absence of a short circuit in the multiplexer switch circuit based on the first signal and the second signal.
[0130] In the battery monitor device of the seventh aspect according to the sixth aspect of the present embodiment, in the processing device, the instructions are configured to cause the processor to perform the following operations when executed by the processor: in identifying the presence or absence of a short circuit in the multiplexer switch circuit, comparing the values of each of the first signal and the second signal with one or a plurality of reference values.
[0131] In the battery monitor device of the eighth aspect according to the seventh aspect of the present embodiment, the reference value can be associated with the resistance ratio of the sum of the resistor, the intermediate resistor, and the first resistor or the second resistor to the intermediate resistor, and the number of stages of the secondary battery.
[0132] The battery system according to the ninth aspect of the present embodiment includes a battery monitor device described in any one of the first to eighth aspects, and a battery device connected to the battery monitor device, and the battery device includes the secondary battery and the battery node.
[0133] A method for detecting a short circuit of a multiplexer on the tenth aspect according to the present embodiment is as follows: Prepare a battery system including a battery device including a plurality of battery nodes connected in series and a plurality of rechargeable battery blocks, and a battery monitor device including a multiplexer and a capacitor, wherein the multiplexer includes a plurality of multiplexer switch circuits arranged in a first direction from one of a first power line and a second power line to the other, a first node, a second node, and an intermediate resistor and a capacitor connected in parallel between the first node and the second node, the multiplexer switch circuits include odd-numbered multiplexer switch circuits in the arrangement of the multiplexer switch circuits based on one of the first power line and the second power line, and even-numbered multiplexer switch circuits in the arrangement of the multiplexer switch circuits, each of the odd-numbered multiplexer switch circuits is connected between any one of the battery nodes and the first node, each of the even-numbered multiplexer switch circuits is connected between any one of the battery nodes and the second node, and each of the multiplexer switch circuits includes a resistor and a switch connected in series, and prepare a battery system; control the multiplexer to open all of the switches of the multiplexer switch circuits; form a series connection of the intermediate resistor and a first resistor between the first power line and the first node; generate a first signal related to the potentials of one end and the other end of the capacitor after forming the series connection of the intermediate resistor and the first resistor; disconnect the first resistor from the intermediate resistor and form a series connection of the intermediate resistor and a second resistor between the second power line and the second node; generate a second signal related to the potentials of the one end and the other end of the capacitor after forming the series connection of the intermediate resistor and the second resistor; and specify the presence or absence of a short circuit in the multiplexer switch circuits based on the first signal and the second signal.
[0134] The program according to the 11th aspect of the present embodiment is a program including one or more instructions for controlling a battery system including a battery device and a battery monitor device, where: the battery device includes a plurality of battery nodes and a plurality of secondary batteries connected in series, the battery monitor device includes a multiplexer having a plurality of connection nodes, a first node, and a second node connected to each of the battery nodes, a first resistor and a second resistor, an intermediate resistor and a capacitor connected in parallel between the first node and the second node, and a first power line and a second power line, the connection nodes are arranged in a first direction from one of the first power line and the second power line to the other, and when the instructions are executed by one or more processing devices, the processing devices are caused to perform the following operations: controlling the multiplexer so that all switches of the multiplexer switch circuit connected between the odd-numbered nodes among the connection nodes and the first node, and between the even-numbered nodes among the connection nodes and the second node are non-conductive with respect to one of the first power line and the second power line; forming, in the battery monitor device, a first state in which the second resistor is disconnected from the intermediate resistor and the intermediate resistor and the first resistor are connected in series between the second power line and the first node; receiving, in the first state, a first signal related to the potentials of one end and the other end of the capacitor; forming, in the battery monitor device, a second state in which the first resistor is disconnected from the intermediate resistor and the intermediate resistor and the second resistor are connected in series between the first power line and the second node; receiving, in the second state, a second signal related to the potentials of the one end and the other end of the capacitor; and specifying the presence or absence of a short circuit in the multiplexer switch circuit based on the first signal and the second signal, and each of the multiplexer switch circuits includes a resistor connected in series with the switch.
[0135] The program of the 11th aspect according to this embodiment can be installed in the battery monitor device of the 1st aspect and the battery system of the 9th aspect according to this embodiment, and can be configured to control the components in the battery monitor device and the battery system.
[0136] The present invention is not limited to the above-described embodiments, and various modifications can be made and implemented without departing from the gist of the present invention. And all of them are included in the technical idea of the present invention.
Explanation of Reference Numerals
[0137] 11... Battery system 13... Battery monitor device, 13d... Connection terminal, 14b... First external terminal, 14c... Second external terminal, 15d... Connection terminal, 15... Battery device, 16... Battery array, 17... Secondary battery, 18b... Positive electrode, 18c... Negative electrode, 19... Reset circuit, 19b, 19c... Reset switch, 20... Microcomputer, 21b... High potential line, 21c... Low potential line, 21d... Reference potential line, 22b... First resistor, 22c... First switch, 23... Capacitor, 23b... One end, 23c... The other end, 24b... Intermediate resistor, 24c... Intermediate switch, 25... Signal generation circuit, 26b... Second resistor, 26c... The switch, 27... First circuit, 28 ··· Intermediate circuit, 29 ··· Second circuit, 31 ··· Voltage dividing circuit, 32 ··· First switch control circuit, 33 ··· Multiplexing circuit, 33b ··· First connection terminal, 33c ··· Second connection terminal, 33d ··· Second connection terminal, 33e ··· Multiplexing switch circuit, 33f ··· Multiplexing switch, 33g ··· Resistor, 36 ··· Judgment circuit, 37 ··· Second switch control circuit, 38 ··· Third switch control circuit, 39 ··· Fourth switch control circuit, 40 ··· Fifth switch control circuit, 40b ··· First measurement switch, 40c ··· Second measurement switch, 41 ··· Potential measurement circuit 43 ··· A / D conversion circuit, 45 ··· Processing device.
Claims
1. A multiplexer including a plurality of connection nodes configured to be connectable to respective ones of the battery nodes in a battery device including a plurality of secondary batteries connected in series and a plurality of battery nodes, a first power line, a second power line, a first node and a second node, and a plurality of multiplexer switch circuits, wherein the connection nodes are arranged in a first direction from one of the first power line and the second power line to the other, and the multiplexer switch circuits are connected between one of the even-numbered nodes among the connection nodes and the first node and between the other of the even-numbered nodes and the odd-numbered nodes among the connection nodes and the second node with respect to one of the first power line and the second power line, and each of the multiplexer switch circuits includes a resistor and a switch connected in series, the multiplexer, A voltage dividing circuit including a first circuit connected between the first power line and the first node, a second circuit connected between the second power line and the second node, and an intermediate circuit connected between the first node and the second node, wherein the first circuit includes a first resistor and a first switch connected in series, the second circuit includes a second resistor and a second switch connected in series, and the intermediate circuit includes an intermediate resistor and an intermediate switch connected in series, the voltage dividing circuit, A signal generation circuit configured to generate one or more electrical signals associated with the potentials of the first node and the second node, A capacitor connected between the first node and the second node and generating a charging voltage, A battery monitor device comprising the same.
2. Further comprising a switch control circuit, In the first monitor mode, the switch control circuit is configured to turn on the first switch of the first circuit and the intermediate switch of the intermediate circuit and turn off the second switch in the second circuit. The battery monitor device according to claim 1.
3. In a second monitor mode different from the first monitor mode, the switch control circuit is configured to turn on the second switch of the second circuit and the intermediate switch of the intermediate circuit and turn off the first switch in the first circuit. The battery monitor device according to claim 2.
4. The voltage dividing circuit further includes a reset circuit configured to reset the voltage across the terminals of the capacitor. The switch control circuit is configured to reset the voltage across the terminals of the capacitor and set a reset state in the voltage dividing circuit in the first monitoring mode and the second monitoring mode. The battery monitoring device according to claim 3.
5. It further includes a determination circuit connected to the signal generation circuit. The determination circuit is configured to identify the presence or absence of a short circuit in the multiplex switch circuit based on the electrical signal from the signal generation circuit. The battery monitoring device according to claim 1.
6. The determination circuit includes a processing device including one or a plurality of storage devices for storing instructions and one or a plurality of processors. The instructions are configured to cause the processor to perform the following operations when executed by the processor. Controlling the multiplexer to turn off all of the switches of the multiplex switch circuit of the multiplexer. Turning on the first switch of the first circuit and the intermediate switch of the intermediate circuit and turning off the second switch of the second circuit to set a first state in the battery monitoring device. Receiving a first signal as the electrical signal from the signal generation circuit in the first state. Turning on the second switch of the second circuit and the intermediate switch of the intermediate circuit and turning off the first switch of the first circuit to set a second state in the battery monitoring device. Receiving a second signal as the electrical signal from the signal generation circuit in the second state. Identifying the presence or absence of a short circuit in the multiplex switch circuit based on the first signal and the second signal. The battery monitoring device according to claim 5.
7. In the processing device, the instructions are configured to cause the processor to perform the following operations when executed by the processor. In identifying the presence or absence of a short circuit in the multiplex switch circuit, comparing the values of each of the first signal and the second signal with one or a plurality of reference values. The battery monitoring device according to claim 6.
8. The reference value is associated with the resistance ratio between the sum of the resistor, the intermediate resistor, and the first resistor or the second resistor and the intermediate resistor, and the number of stages of the secondary battery. The battery monitor device according to claim 7.
9. A battery monitor device according to any one of claims 1 to 8, a battery device connected to the battery monitor device, comprising: the battery device includes the secondary battery and the battery node, a battery system.
10. Preparing a battery system including a battery device including a plurality of battery nodes connected in series and a plurality of rechargeable battery blocks, and a battery monitor device including a multiplexer and a capacitor, wherein the multiplexer includes a plurality of multiplexer switch circuits arranged in a first direction from one of a first power line and a second power line to the other, a first node, a second node, and an intermediate resistor and a capacitor connected in parallel between the first node and the second node, the multiplexer switch circuits include odd-numbered multiplexer switch circuits in the arrangement of the multiplexer switch circuits based on one of the first power line and the second power line, and even-numbered multiplexer switch circuits in the arrangement of the multiplexer switch circuits, each of the odd-numbered multiplexer switch circuits is connected between one of the battery nodes and the first node, each of the even-numbered multiplexer switch circuits is connected between one of the battery nodes and the second node, and each of the multiplexer switch circuits includes a resistor and a switch connected in series, preparing a battery system; Controlling the multiplexer to open all of the switches of the multiplexer switch circuits; Forming a series connection of the intermediate resistor and the first resistor between the first power line and the first node; After forming the series connection of the intermediate resistor and the first resistor, generating a first signal related to the potentials of one end and the other end of the capacitor; Disconnecting the first resistor from the intermediate resistor and forming a series connection of the intermediate resistor and the second resistor between the second power line and the second node; After forming a series connection of the intermediate resistor and the second resistor, generating a second signal related to the potentials of the one end and the other end of the capacitor; Identifying the presence or absence of a short circuit in the multiplex switch circuit based on the first signal and the second signal; A method for detecting a short circuit in a multiplexer, including the above.
11. A program including one or more instructions for controlling a battery system including a battery device and a battery monitor device, The battery device includes a plurality of battery nodes and a plurality of secondary batteries connected in series, The battery monitor device includes a multiplexer having a plurality of connection nodes, a first node, and a second node connected to each of the battery nodes, a first resistor and a second resistor, an intermediate resistor and a capacitor connected in parallel between the first node and the second node, a first power line and a second power line, and the connection nodes are arranged in a first direction from one of the first power line and the second power line to the other; When the instructions are executed by one or more processing devices, the instructions cause the processing device to perform the following operations: Controlling the multiplexer so that all switches of the multiplex switch circuit of the multiplexer connected between the odd-numbered nodes among the connection nodes and the first node and between the even-numbered nodes among the connection nodes and the second node are non-conductive, with reference to one of the first power line and the second power line; Forming a first state in the battery monitor device in which the second resistor is disconnected from the intermediate resistor and the intermediate resistor and the first resistor are connected in series between the second power line and the first node; Receiving a first signal related to the potentials of one end and the other end of the capacitor in the first state; Forming a second state in the battery monitor device in which the first resistor is disconnected from the intermediate resistor and the intermediate resistor and the second resistor are connected in series between the first power line and the second node; Receiving a second signal related to the potentials of the one end and the other end of the capacitor in the second state; Identifying the presence or absence of a short circuit in the multiplex switch circuit based on the first signal and the second signal; configured to cause the above, Each of the multiplex switch circuits includes a resistor connected in series with the switch. Program.
Citation Information
Patent Citations
Monitoring method for battery pack dc voltage detector
JP2002281681A