Circuit board and power device

Abstract

To provide a circuit board and a power device with improved resistance to thermal cycling while maintaining heat dissipation.SOLUTION: A circuit board 50 comprises a ceramic substrate 10 made of a material mainly composed of silicon nitride, a Ti-containing bonding layer 20 formed on one of the main surfaces 12 of the ceramic substrate 10, and a conductor layer 30 bonded to the ceramic substrate 10 via the bonding layer 20, and the thickness of the bonding layer 20 is equal to or more than 0.3 μm and equal to or less than 3 μm.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a circuit board and a power device.

Background Art

[0002] Since silicon nitride has high thermal conductivity and strength, it has attracted attention as an insulating heat dissipation substrate for power modules used in electric vehicles (EVs) and hybrid vehicles (HVs). Conventionally, aluminum nitride has been widely used as an insulating heat dissipation substrate material. However, in the case of power modules for high currents such as EVs, the temperature rises to about 250°C, and a large thermal stress is generated in the substrate due to the difference in thermal expansion from metals such as copper that are joined. As a result, aluminum nitride with low strength develops cracks and fractures. Therefore, although its thermal conductivity is inferior to that of aluminum nitride, silicon nitride, which has high thermal conductivity among general insulating ceramics and further has higher strength, is increasingly being adopted. The bonding between the silicon nitride heat dissipation substrate and the conductor layer is generally performed by a brazing method using a brazing material containing a metal.

[0003] Patent Document 1 discloses a method for manufacturing a ceramic circuit board and a ceramic circuit board provided with a stress relaxation portion in which two or more independent through holes reaching the ceramic substrate are arranged on at least one surface or both surfaces of a metal circuit surface and a heat dissipation surface. In the relationship between the distance (h1) from the circuit end to the through hole end and the diameter (D) of the through hole in the straight portion of the circuit shape, (0 <) h1 ≤ 2D, the interval (h2) between adjacent through holes satisfies metal thickness < h2 < 2D, and in the end shape of the metal circuit surface, the tangent angle (θ1) of the circuit end and the tangent angle (θ2) inside the through hole satisfy θ2 < θ1 < 90°.

[0004] Patent Document 2 discloses a ceramic substrate, a copper circuit board, and a brazing material protruding portion. The copper circuit board is joined to at least one surface of the ceramic substrate via a brazing material layer containing Ag, Cu, and Ti. The brazing material protruding portion is formed of a brazing material layer protruding outward from the side surface of the copper circuit board. The total of the Ti phase and the TiN phase in the brazing material protruding portion is 3% by mass or more, and is different from the total amount of the Ti phase and the TiN phase in the brazing material layer 4b interposed between the ceramic substrate and the copper circuit board. The area per piece in the brazing material protruding portion is 200 μm 2 There is disclosed a ceramic circuit board in which the following voids are one or less (including 0).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] In both Patent Document 1 and Patent Document 2, the joining of the silicon nitride heat dissipation substrate and the conductor layer is performed by brazing. When manufacturing a circuit board by brazing the silicon nitride heat dissipation substrate and the conductor layer, in order to firmly join the silicon nitride heat dissipation substrate and the conductor layer, the thickness of the brazing material has to be relatively thick. However, when the thickness of the brazing material increases, the thermal conductivity of the brazed portion decreases and the heat dissipation performance deteriorates. On the other hand, when the thickness of the brazing material decreases, the risk of interfacial cracks due to thermal cycling increases.

[0007] For this reason, when using a circuit board in which a silicon nitride heat dissipation substrate and a conductor layer are joined as a circuit board for a power device, there has been a demand for a circuit board with improved resistance to thermal cycling while maintaining heat dissipation performance.

[0008] The present invention has been made in view of such circumstances, and an object thereof is to provide a circuit board and a power device that enhance resistance to thermal cycles while maintaining heat dissipation performance.

Means for Solving the Problems

[0009] (1) To achieve the above object, the circuit board of the present invention takes the following means. That is, the circuit board of an application example of the present invention includes a ceramic substrate made of a material mainly composed of silicon nitride, a bonding layer containing Ti formed on one main surface of the ceramic substrate, and a conductor layer bonded to the ceramic substrate via the bonding layer, and the thickness of the bonding layer is 0.3 μm or more and 3 μm or less.

[0010] (2) Further, in the circuit board of the application example of (1) above, a diffusion layer containing Ti exists on the bonding layer side of the ceramic substrate, and the thickness of the diffusion layer is 0.2 μm or more and 3 μm or less.

[0011] (3) Further, in the circuit board of the application example of (1) or (2) above, the bonding layer contains at least one of Si, Cu, or N.

[0012] (4) Further, in the circuit board of any one of the application examples of (1) to (3) above, a second bonding layer containing Ti formed on the other main surface facing the one main surface of the ceramic substrate, and a second conductor layer bonded to the ceramic substrate via the second bonding layer are further provided, and the thickness of the second bonding layer is 0.3 μm or more and 3 μm or less.

[0013] (5) Further, in the circuit board of the application example of (4) above, the second conductor layer is bonded to a region of 75% or more of the area of the other main surface of the ceramic substrate.

[0014] (6) Further, in the circuit board of any one of the application examples of (1) to (5) above, the conductor layer is made of a material mainly composed of copper, and the thickness of the conductor layer is 0.2 mm or more and 1.5 mm or less.

[0015] (7) Also, in the circuit board of the application example of (4) or (5) above, the thermal conductivity in the direction perpendicular to the one main surface of the circuit board is 120 W / mK or more.

[0016] (8) Further, the power device of the application example of the present invention includes the circuit board according to any one of (1) to (7) above, and a power semiconductor mounted on the conductor layer.

Effect of the Invention

[0017] According to the circuit board or the power device of the present invention, it is possible to obtain a circuit board or a power device with enhanced resistance to thermal cycling while maintaining heat dissipation performance.

Brief Description of the Drawings

[0018]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Mode for Carrying Out the Invention

[0019] Next, embodiments of the present invention will be described with reference to the drawings. For ease of understanding of the description, the same reference numerals are assigned to the same components in each drawing, and duplicate descriptions are omitted. Note that in the configuration diagrams, the sizes of the respective components are conceptually represented and do not necessarily represent actual dimensional ratios.

[0020] [Configuration of Circuit Board] (First Embodiment) First, a circuit board according to the first embodiment of the present invention will be described. FIG. 1 is a schematic cross-sectional view showing an example of a circuit board 50 according to the first embodiment of the present invention. FIG. 2 is a schematic plan view showing an example of the circuit board 50 according to the first embodiment. The circuit board 50 according to the first embodiment of the present invention includes a ceramic substrate 10, a bonding layer 20, and a conductor layer 30.

[0021] The ceramic substrate 10 is made of a material mainly composed of silicon nitride. To be mainly composed of silicon nitride means to contain 86 wt% or more of silicon nitride. The ceramic substrate 10 may contain sialon. The ceramic substrate 10 is formed in a flat plate shape, for example.

[0022] The thickness in the direction perpendicular to one main surface 12 of the ceramic substrate 10 is preferably 220 μm or more and 690 μm or less. Thereby, the balance between the strength and heat dissipation of the ceramic substrate 10 can be improved. If the thickness is smaller than this range, the strength of the ceramic substrate 10 may be low. Also, if the thickness is larger than this range, the heat dissipation may decrease.

[0023] The bonding layer 20 is formed on one main surface 12 of the ceramic substrate 10. The bonding layer 20 contains Ti. The thickness of the bonding layer 20 is 0.3 μm or more and 3 μm or less. Thereby, the heat transfer property between the ceramic substrate 10 and the conductor layer 30 is improved, and the heat dissipation of the circuit board 50 is increased.

[0024] The thickness of the bonding layer 20 can be determined by SEM (Scanning Electron Microscope) observation. Specifically, for the polished surface of a cross-section perpendicular to one main surface of the ceramic substrate 10, five locations are randomly selected, and a field of view of 120 μm × 90 μm is observed at a magnification of 2000 times. Next, the lengths of ten line segments drawn at equal intervals perpendicular to a 100-μm line segment drawn at the interface between the ceramic substrate 10 and the bonding layer 20 are determined. Then, the average value of these values is taken as the thickness of the bonding layer 20.

[0025] The bonding layer 20 preferably contains at least one of Si, Cu, or N. Thereby, the bonding strength between the ceramic substrate 10 and the conductor layer 30 is increased, and the resistance to thermal cycling is increased.

[0026] The types of elements contained in the ceramic substrate 10, the bonding layer 20, and the conductor layer 30 can be confirmed by SEM-EDX (Scanning Electron Microscope - Energy Dispersive X-ray Spectroscopy).

[0027] The conductor layer 30 is bonded to the ceramic substrate 10 via the bonding layer 20. The conductor layer 30 is preferably made of a metal, more preferably made of a metal having copper as a main component, and even more preferably made of oxygen-free copper. A metal having copper as a main component means a metal containing 99 wt% or more of copper. The thickness of the conductor layer 30 is preferably 0.2 mm or more and 1.5 mm or less.

[0028] FIG. 3 is a schematic partial enlarged cross-sectional view showing an example of the circuit board 50 according to the first embodiment. As shown in FIG. 3, it is preferable that a diffusion layer 14 containing Ti exists on the bonding layer 20 side of the ceramic substrate 10. At this time, the thickness of the diffusion layer 14 is preferably 0.2 μm or more and 3 μm or less. Thereby, the bonding strength between the ceramic substrate 10 and the conductor layer 30 is increased, and the resistance to thermal cycling is increased.

[0029] The presence of the diffusion layer 14 can be confirmed by observing the cross-section of the bonding interface between the ceramic substrate 10 of the circuit board 50 and the bonding layer 20 by SEM. The thickness of the diffusion layer 14 can be determined by performing SEM-EDX analysis on a line set on the SEM image of the cross-section. Specifically, for the polished surface of a cross-section perpendicular to one main surface of the ceramic substrate 10, five locations are randomly selected and observed at a magnification of 2000 times with a field of view of 120 μm × 90 μm. Next, set two or more lines perpendicular to a straight line drawn at the interface between the ceramic substrate 10 and the bonding layer 20 on the SEM image. It is preferable that the intervals between the lines are equal. Next, perform line analysis by SEM-EDX on the set lines to obtain the region where Ti has diffused into the ceramic substrate 10. The diffusion layer 14 is defined as the region from the interface between the ceramic substrate 10 and the bonding layer 20 to the point where it first falls below one-tenth of the maximum count value of the line analysis of Ti in the bonding layer 20. Next, measure the length of the obtained region on the line. Then, the average value of these values is taken as the thickness of the diffusion layer 14. The line set to determine the thickness of the diffusion layer 14 may be a line segment obtained by extending any one of the ten line segments used to determine the thickness of the bonding layer 20.

[0030] (Second Embodiment) Next, a circuit board according to the second embodiment of the present invention will be described. Since the circuit board 50 according to the second embodiment has many overlapping parts with the circuit board 50 according to the first embodiment, only the different parts will be described. FIG. 4 is a schematic cross-sectional view showing an example of the circuit board 50 according to the second embodiment of the present invention. FIG. 5 is a schematic bottom view showing an example of the circuit board 50 according to the second embodiment. The circuit board 50 according to the second embodiment of the present invention includes a ceramic substrate 10, a bonding layer 20, a conductor layer 30, a second bonding layer 22, and a second conductor layer 32. The configurations of the ceramic substrate 10, the bonding layer 20, and the conductor layer 30 are the same as those of the circuit board 50 according to the first embodiment.

[0031] The second bonding layer 22 is formed on the other main surface 16 facing one main surface 12 of the ceramic substrate 10. The second bonding layer 22 preferably contains Ti. The thickness of the second bonding layer 22 is preferably 0.3 μm or more and 3 μm or less. Thereby, the heat transfer property between the ceramic substrate 10 and the second conductor layer 32 is improved, and the heat dissipation property of the circuit board 50 is enhanced. The method for determining the thickness of the second bonding layer 22 is the same as the method for determining the thickness of the bonding layer 20. The thickness of the second bonding layer 22 may be the same as or different from the thickness of the bonding layer 20.

[0032] The second bonding layer 22 preferably contains at least one of Si, Cu, or N. Thereby, the bonding strength between the ceramic substrate 10 and the second conductor layer 32 is increased, and the resistance to thermal cycling is enhanced. The types of atoms contained in the second bonding layer 22 can be confirmed by SEM-EDX.

[0033] The second conductor layer 32 is bonded to the ceramic substrate 10 via the second bonding layer 22. The second conductor layer 32 is preferably made of metal, more preferably made of a metal having copper as a main component, and even more preferably made of oxygen-free copper. The material of the second conductor layer 32 may be different from the material of the conductor layer 30, but is preferably the same. The thickness of the second conductor layer 32 is preferably 0.2 mm or more and 1.5 mm or less. The thickness of the second conductor layer 32 may be the same as or different from the thickness of the conductor layer 30.

[0034] As shown in FIG. 5, the second conductor layer 32 is preferably bonded to a region of 75% or more of the area of the other main surface 16 of the ceramic substrate 10. Thereby, heat can be efficiently dissipated from the second conductor layer 32, and the heat dissipation property of the circuit board 50 is enhanced.

[0035] FIG. 6 is a schematic partial enlarged cross-sectional view showing an example of a circuit board 50 according to the second embodiment. It is preferable that a second diffusion layer 18 containing Ti exists on the second bonding layer 22 side of the ceramic substrate 10. At this time, the thickness of the second diffusion layer 18 is preferably 0.2 μm or more and 3 μm or less. Thereby, the bonding strength between the ceramic substrate 10 and the second conductor layer 32 is increased. The thickness of the second diffusion layer 18 may be the same as or different from the thickness of the diffusion layer 14.

[0036] The presence of the second diffusion layer 18 can be confirmed by observing the cross section of the bonding interface between the ceramic substrate 10 and the second bonding layer 22 of the circuit board 50 by SEM. The thickness of the second diffusion layer 18 can be obtained by performing SEM-EDX analysis on a line set on the SEM image of the cross section in the same manner as the method for obtaining the thickness of the bonding layer 20.

[0037] The thermal conductivity in the direction perpendicular to one main surface 12 of the circuit board 50 is preferably 120 W / mK or more. Thereby, the heat dissipation property of the circuit board 50 becomes sufficiently high. Note that the thermal conductivity in the direction perpendicular to one main surface 12 of the circuit board 50 is to be measured for the circuit board 50 including the conductor layer 30 and the second conductor layer 32 as in the circuit board 50 according to the second embodiment.

[0038] The thermal conductivity in the direction perpendicular to one main surface 12 of the circuit board 50 can be measured and calculated by the laser flash method.

[0039] With these features, it is possible to obtain a circuit board 50 with improved resistance to thermal cycling while maintaining heat dissipation.

[0040] [Configuration of Power Device] FIG. 7 is a schematic cross-sectional view showing an example of a power device according to an embodiment of the present invention. The power device 100 includes a circuit board 50 and a power semiconductor 60. In FIG. 7, the bonding layer 20, the second bonding layer 22, etc. of the circuit board 50 are omitted.

[0041] The circuit board 50 is the circuit board 50 described above. A conductor layer 30 is formed on at least one main surface 12 of the ceramic substrate 10. The circuit board 50 may have a second conductor layer 32 formed on the other main surface 16 facing the one main surface 12.

[0042] A power semiconductor 60 is mounted above the conductor layer 30 of the circuit board 50. The power semiconductor 60 and the conductor layer 30 may be joined using solder 52 or the like. The power semiconductor 60 may be, for example, a semiconductor through which a large current for an EV flows and which is likely to heat up. Since the circuit board 50 of the present invention enhances resistance to thermal cycling while maintaining heat dissipation, even when a large thermal stress is generated in the ceramic substrate 10 due to the difference in thermal expansion between the metal joined to the ceramic substrate 10 due to temperature rise, cracks and fractures are less likely to occur.

[0043] When the circuit board 50 includes the second conductor layer 32, a heat sink 70 may be joined below the second conductor layer 32. The heat sink 70 and the second conductor layer 32 may be joined using solder 52 or the like.

[0044] The surface of the heat sink 70 facing the surface joined to the second conductor layer 32 may be in contact with a heat dissipation member 80 via grease 72 or the like. The heat sink 70 is preferably made of metal, more preferably made of a metal having copper as a main component, and even more preferably made of oxygen-free copper. The heat dissipation member 80 preferably has heat dissipation fins formed thereon. The heat dissipation member 80 is preferably made of metal, more preferably made of a metal having copper or aluminum as a main component.

[0045] [Manufacturing Method of Circuit Board] An example of the method for manufacturing the above circuit board is shown below. As the ceramic substrate, a general silicon nitride sintered body can be used. The silicon nitride sintered body can be manufactured, for example, by the following method. First, weigh the raw material powder of the silicon nitride sintered body. The raw material powder of the silicon nitride sintered body may be oxides, carbonates, hydroxides, nitrides, etc. of each element contained in the silicon nitride sintered body. Examples of the raw material powder of the silicon nitride sintered body include, in addition to silicon nitride, magnesium carbonate, calcium carbonate, yttrium oxide, etc.

[0046] Add ethanol to these raw material powders and wet-mix and grind them in a ball mill for, for example, 6 to 60 hours to obtain a slurry. By drying the slurry with a hot plate or a spray dryer, etc., a mixed powder is obtained.

[0047] Next, fill the mixed powder into a mold and perform uniaxial pressing at, for example, a pressure of 30 MPa to form it into a desired shape. Then, perform CIP treatment (cold isostatic pressing treatment) at, for example, a pressure of 150 MPa to obtain a formed body. The obtained formed body (CIP pressed body) is placed in, for example, a silicon carbide mold with its interior coated with BN, and held at a maximum temperature of 1800°C to 1900°C for 5 to 30 hours in a nitrogen atmosphere of 9 atmospheres to be fired, thereby obtaining a silicon nitride sintered body.

[0048] Manufacture a ceramic substrate by processing the outer shape of the obtained silicon nitride sintered body so as to have a predetermined shape and thickness. The processing can be performed, for example, by cutting, grinding, polishing, etc. It is preferable to polish the main surface on the side where the conductor layer of the ceramic substrate is to be joined to a surface roughness Ra of 0.5 μm or less.

[0049] Separate from the manufacturing of the ceramic substrate, a plate material with a predetermined thickness to be the conductor layer is prepared. The plate material is preferably made of metal, more preferably made of a metal with copper as the main component, and even more preferably made of oxygen-free copper. Next, a metal film containing Ti to be the bonding layer is formed on one main surface of the plate material or the ceramic substrate. The metal film can be formed by vapor deposition, sputtering, plating, or the like. The thickness of the metal film is preferably 0.3 μm or more and 3 μm or less. If a metal foil of the same thinness can be prepared, it is not necessary to form the metal film.

[0050] Next, the plate material on which the metal film is formed and the ceramic substrate are laminated so that the metal film is sandwiched therebetween. When the metal film is not formed, the plate material, the metal foil, and the ceramic substrate are laminated in this order. Then, the plate material and the ceramic substrate can be joined by performing HP treatment (hot pressing treatment) or HIP treatment (hot isostatic pressing treatment). The conditions of the HP treatment can be, for example, a pressure of 5 MPa or more and 30 MPa or less, a maximum temperature of 700 °C or more and 980 °C or less, and a maximum temperature holding time of 10 minutes or more and 2 hours or less.

[0051] By such a manufacturing method, a circuit board with enhanced resistance to thermal cycling while maintaining heat dissipation can be manufactured.

[0052] [Examples, Comparative Examples] (Example 1) Silicon nitride powder (average particle size 1.4 μm) 94 wt%, magnesium carbonate powder (average particle size 2.5 μm) 3 wt%, and yttrium oxide powder (average particle size 1.0 μm) 3 wt% were weighed. Next, the weighed raw material powders were used for ball milling to obtain a mixed slurry. For the ball milling, the raw material powders and ethanol were put into a resin pot, and silicon nitride balls were used to grind and mix at 60 rpm for 24 hours. The obtained mixed slurry was dried by evaporation to obtain a mixed powder.

[0053] The obtained mixed powder was subjected to powder press molding by uniaxial pressing and CIP to produce a molded body. First, after filling the mixed powder into a dedicated mold, pre-molding was performed by uniaxial pressing at a pressure of 30 MPa. Next, the pre-molded body was evacuated and placed in a dedicated bag, and CIP molding was performed at a pressure of 150 MPa. The obtained molded body was fired. The sintering method was atmospheric firing under a gas pressure of 9 atmospheres of nitrogen, and it was held at a maximum temperature of 1900 °C for 10 hours. As the mold, a silicon carbide mold with an internal BN coating was used. The fired silicon nitride sintered body was cut into a size of 100 mm × 100 mm × 0.32 mm, and polished so that the surface roughness Ra of the bonding surface of the conductor layer was 0.5 μm or less to prepare a ceramic substrate.

[0054] Separately from this, two oxygen-free copper plates with a size of 100 mm × 100 × 0.3 mm were prepared. Next, Ti serving as a bonding layer was vapor-deposited to a thickness of 0.3 μm on the bonding surface of each plate with the ceramic substrate to prepare two conductor layers. Then, the conductor layer, ceramic substrate, and conductor layer (second conductor layer) were laminated in this order, and HP treatment (hot pressing treatment) was performed for bonding. The pressure was 10 MPa, the maximum temperature was 900 °C, and the maximum temperature holding time was 30 minutes. In this way, the circuit board of Example 1 was produced.

[0055] (Example 2) The circuit board of Example 2 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was 0.5 μm.

[0056] (Example 3) The circuit board of Example 3 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was 1 μm.

[0057] (Example 4) The circuit board of Example 4 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was 2 μm.

[0058] (Example 5) The circuit board of Example 5 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was 3 μm.

[0059] (Comparative Example 1) The circuit board of Comparative Example 1 was produced under the same conditions as the circuit board of Example 1, except that Ti was not vapor-deposited on the board material, a brazing material containing Ti, Cu, and Ag was applied with a thickness of 15 μm, and the board was heated to 800 °C for bonding.

[0060] [Various Measurements] The obtained circuit boards of the examples and comparative examples were evaluated by the following measurements and the like.

[0061] (Calculation of Thermal Conductivity) For the circuit boards of the examples and comparative examples, the thermal conductivity was determined by the laser flash method at room temperature.

[0062] (Thermal Cycle Test) The circuit boards of the examples and comparative examples were placed in a thermal cycle tester, and the following thermal cycle test was performed. The thermal cycle test was defined as one cycle of cooling from -40 °C for 30 minutes ⇒ 25 °C for 10 minutes ⇒ 130 °C for 30 minutes ⇒ 25 °C for 10 minutes ⇒ -40 °C. After 500 cycles, the circuit boards were observed. Those without swelling of the conductor layer or the second conductor layer or cracks in the ceramic substrate were judged as qualified (○), and those with swelling of the conductor layer or the second conductor layer or cracks in the ceramic substrate were judged as unqualified (×).

[0063] (Confirmation of Diffusion Layer) The circuit board was cut perpendicular to one main surface of the ceramic substrate and polished. Then, the presence of the diffusion layer was confirmed by observing SEM images at 2000 times the cross-section.

[0064] (Measurement of Element Content in Each Layer) The circuit board was cut perpendicular to one main surface of the ceramic substrate and polished. Next, five SEM images at 2000 times the cross-section were taken. Then, for each SEM image, a straight line was drawn at the interface between the ceramic substrate and the bonding layer, and two lines perpendicular to the straight line were set. The distance between the two lines was about 4 μm. By analyzing the line using SEM-EDX, the types of elements contained in each layer and their relative amounts were measured.

[0065] (Result) Figure 8 is a table showing the thickness, thermal conductivity, and results of the thermal cycle test for each layer of the circuit boards of the examples and comparative examples. In Examples 1 to 5 where the thickness of the bonding layer was 0.3 μm or more and 3 μm or less, the thermal conductivity was high and the results of the thermal cycle test were also acceptable. On the other hand, in Comparative Example 1 where bonding was performed with a conventional solder material and the thickness of the bonding layer was large, the thermal conductivity was low and the results of the thermal cycle test were also unacceptable. From this, it was found that the thickness of the bonding layer is preferably 0.3 μm or more and 3 μm or less.

[0066] When observing the SEM images, the ceramic substrate, the bonding layer, and the conductor layer could be clearly distinguished because their color tones were different. Also, it was confirmed by the following SEM-EDX analysis that a diffusion layer was formed on the ceramic substrate side of the interface between the ceramic substrate and the bonding layer, and that it could be distinguished from the ceramic substrate that was not the diffusion layer. Therefore, the thickness of the diffusion layer was calculated from the results of the SEM-EDX analysis.

[0067] Figures 9(a) and (b) are graphs showing the results of SEM-EDX analysis on line AB or line CD drawn on a certain SEM image of Example 2. The dotted lines indicating the interfaces between the ceramic substrate and the bonding layer and between the bonding layer and the conductor layer in Figures 9(a) and (b) show the positions of the interfaces observed in the SEM image. As shown in Figures 9(a) and (b), it was confirmed that Ti had diffused from the bonding layer interface observed in the SEM image toward the ceramic substrate side. From this, it was found that the diffusion layer of the ceramic substrate contains Ti. The length of the region where Ti had diffused was measured from the interface between the ceramic substrate and the bonding layer, and the average value of the values obtained for 10 lines in 5 images was taken as the thickness of the diffusion layer. Also, although it varies depending on the distance from the ceramic substrate or the conductor layer, it was found that the bonding layer contains Si, Cu, or N.

[0068] As described above, in the circuit board of the present invention, the bonding layer is sufficiently thin and the diffusion layer is formed on the ceramic substrate, so that the bonding strength between the ceramic substrate and the conductor layer is increased, and while maintaining heat dissipation performance, it is presumed that the resistance to thermal cycling can be enhanced.

[0069] From the above results, it was confirmed that the circuit board and the power device of the present invention can enhance the resistance to thermal cycling while maintaining heat dissipation performance.

[0070] The present invention is not limited to the above-described embodiments, and it goes without saying that the present invention extends to various modifications and equivalents included in the spirit and scope of the present invention. In addition, the structure, shape, number, position, size, etc. of the components shown in each drawing are for convenience of explanation and can be appropriately changed.

Explanation of Reference Numerals

[0071] 10 Ceramic substrate 12 One main surface 14 Diffusion layer 16 The other main surface 18 Second diffusion layer 20 Bonding layer 22 Second bonding layer 30 Conductor layer 32 Second conductor layer 50 Circuit board 52 Solder 60 Power semiconductor 70 Heat sink 72 Grease 80 Heat dissipation member 100 Power device

Claims

1. A ceramic substrate made of a material mainly composed of silicon nitride, A bonding layer containing Ti formed on one main surface of the ceramic substrate, A conductor layer bonded to the ceramic substrate via the bonding layer, and comprising: The circuit board is characterized in that the thickness of the bonding layer is 0.3 μm or more and 3 μm or less.

2. A diffusion layer containing Ti exists on the bonding layer side of the ceramic substrate, The circuit board according to claim 1, wherein the thickness of the diffusion layer is 0.2 μm or more and 3 μm or less.

3. The circuit board according to claim 1 or claim 2, wherein the bonding layer contains at least one of Si, Cu, or N.

4. A second bonding layer containing Ti formed on the other main surface facing the one main surface of the ceramic substrate, A second conductor layer bonded to the ceramic substrate via the second bonding layer, and further comprising: The circuit board according to claim 1 or claim 2, wherein the thickness of the second bonding layer is 0.3 μm or more and 3 μm or less.

5. The circuit board according to claim 4, wherein the second conductor layer is bonded to a region of 75% or more of the area of the other main surface of the ceramic substrate.

6. The conductor layer is made of a material mainly composed of copper, The circuit board according to claim 1 or claim 2, wherein the thickness of the conductor layer is 0.2 mm or more and 1.5 mm or less.

7. The circuit board according to claim 4, wherein the thermal conductivity in a direction perpendicular to the one main surface of the circuit board is 120 W / mK or more.

8. A power device comprising the circuit board according to claim 1 or claim 2, And a power semiconductor mounted on the conductor layer.

Images