Semiconductor device

Abstract

To provide a semiconductor device in which both of manufacturing cost reduction and reliability improvement are achieved.SOLUTION: A semiconductor device comprises: a substrate 50 that has a surface metal body 52 connected to a semiconductor element; and a sealing body 30 that seals at least a part of the substrate 50 including the surface metal body 52 and the semiconductor element. High adhesion parts 527a, 527b and 527c in which an adhesion degree with the sealing body 30 is increased and a low adhesion part 527p in which an adhesion degree with the sealing body 30 is lower than the high adhesion parts are formed in a contact part with the sealing body 30 of the surface metal body 52. A part in which the surface metal body is not provided and an insulation base material is exposed, of one of a first substrate and a second substrate is defined as an exposed part, and a part that faces the exposed part of the surface metal body 52 of the other substrate 50 is defined as an exposed facing part 52a. The low adhesion part is formed on at least a part of the exposed facing part.SELECTED DRAWING: Figure 17

Description

Technical Field

[0001] The disclosure in this specification relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device including a semiconductor element having main electrodes, a substrate with metal bodies disposed on both surfaces of an insulating substrate, and a sealing body. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When the sealing body peels off due to thermal stress, there is a risk of a leakage path occurring between portions of the substrate having different potentials. That is, a decrease in reliability becomes a problem.

[0005] To address this problem, for example, by performing measures such as roughening the surface of the surface (front surface) metal body to increase the degree of adhesion with the sealing body, peeling of the sealing body can be suppressed. However, the above measures are troublesome and lead to an increase in manufacturing cost.

[0006] One disclosed object is to provide a semiconductor device that achieves both reduction in manufacturing cost and improvement in reliability.

Means for Solving the Problems

[0007] To achieve the above object, a semiconductor device according to an aspect of the present disclosure includes: a semiconductor element (40) having main electrodes (40D, 40S) on both surfaces; A substrate (50, 60) having an insulating base material (51, 61) and a surface metal body (52, 62) disposed on the surface of the insulating base material and electrically connected to the main electrode. At least a part of the substrate including the surface metal body and a sealing body (30) for sealing the semiconductor element. In the contact portion of the surface metal body with the sealing body, a high-adhesion portion (527a, 527b, 527c, 527d, 627b) with enhanced adhesion to the sealing body and a low-adhesion portion (527p, 627p) with lower adhesion to the sealing body than the high-adhesion portion are formed. The main electrode includes a first main electrode (40D) provided on the surface of the semiconductor element and a second main electrode (40S) provided on the back surface of the semiconductor element. The substrate includes a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode. When a portion where the insulating base material is exposed without the surface metal body is defined as an exposed portion (61a) in one of the first substrate and the second substrate, and a portion of the surface metal body of the other substrate that faces the exposed portion of one substrate is defined as an exposed facing portion (52a), At least a part of the exposed facing portion is formed with a low-adhesion portion.

[0008] According to the semiconductor device disclosed herein, in the contact portion of the surface (front surface) metal body with the sealing body, a low-adhesion portion is also formed in addition to the high-adhesion portion. Therefore, compared with the case where the entire surface is a high-adhesion portion, the labor for forming the high-adhesion portion can be reduced. In addition, at least a part of the exposed facing portion is formed with a low-adhesion portion. According to this, when the sealing body and the substrate are thermally deformed with a temperature change, the force by which the sealing body is pulled by the contact portion with the exposed facing portion of the sealing body can be reduced. As a result, the force by which the exposed portion of the insulating base material is pulled by the sealing body can be reduced. Therefore, the concern that the insulating base material is damaged due to thermal deformation can be reduced. As described above, according to the semiconductor device, both reduction of manufacturing cost and improvement of reliability can be achieved.

[0009] Also, in order to achieve the above object, a semiconductor device according to an aspect of the present disclosure is A semiconductor element (40) having main electrodes (40D, 40S) on both sides, a substrate (50, 60) having insulating substrates (51, 61) and surface metal bodies (52, 62) disposed on the surfaces of the insulating substrates and electrically connected to the main electrodes, a sealing body (30) that seals at least a part of the substrate including the surface metal body and the semiconductor element, In the contact portion of the surface metal body with the sealing body, there are formed high-adhesion portions (527a, 527b, 527c, 527d, 627b) with enhanced adhesion to the sealing body and low-adhesion portions (527p, 627p) with lower adhesion to the sealing body than the high-adhesion portions, When a portion of the contact portion facing the semiconductor element is defined as an element-facing portion (62b), a low-adhesion portion is formed in at least a part of the element-facing portion.

[0010] According to the semiconductor device disclosed herein, in the contact portion of the surface (front surface) metal body with the sealing body, in addition to the high-adhesion portion, a low-adhesion portion is also formed. Therefore, compared with the case where the entire surface is a high-adhesion portion, the labor for forming the high-adhesion portion can be reduced. In addition, at least a part of the low-adhesion portion is formed in the element-facing portion. According to this, when the sealing body and the substrate are thermally deformed due to a temperature change, the force by which the sealing body is pulled by the contact portion with the element-facing portion of the sealing body can be reduced. As a result, the force by which the semiconductor element is pulled by the sealing body can be reduced. Thus, the concern that the semiconductor element is damaged due to thermal deformation can be reduced. As described above, according to the semiconductor device, it is possible to achieve both reduction in manufacturing cost and improvement in reliability.

[0011] Note that the reference numerals in the parentheses above only show an example of the correspondence with the specific configuration in the embodiments described later, and do not limit the technical scope in any way.

Brief Description of the Drawings

[0012]

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Embodiments for Carrying Out the Invention

[0013] Hereinafter, a plurality of embodiments will be described with reference to the drawings. In each embodiment, corresponding components may be denoted by the same reference numerals, and redundant descriptions may be omitted. When only a part of the configuration is described in each embodiment, the configuration of other embodiments described previously can be applied to other parts of the said configuration. In addition, not only the combinations of configurations explicitly shown in the description of each embodiment, but also the configurations of a plurality of embodiments can be partially combined with each other as long as there is no problem with the combination.

[0014] The semiconductor device of the present embodiment is applied to, for example, a power conversion device of a moving body having a rotating electrical machine as a drive source. The moving body is, for example, an electric vehicle (EV), a hybrid vehicle (HV), a plug-in hybrid vehicle (PHV), or other electric vehicles, a flying body such as a drone, a ship, a construction machine, or an agricultural machine. Hereinafter, an example applied to a vehicle will be described.

[0015] (First Embodiment) First, based on FIG. 1, the schematic configuration of the drive system 1 of the vehicle will be described.

[0016] (Drive System of Vehicle) As shown in FIG. 1, the drive system 1 of the vehicle includes a DC power source 2, a motor generator 3, and a power conversion device 4.

[0017] The DC power supply 2 is a DC voltage source composed of a rechargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a driving source for vehicle travel, that is, as an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor generator 3.

[0018] <Power conversion device> Next, based on FIG. 1, the circuit configuration of the power conversion device 4 will be described. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of the present embodiment includes a smoothing capacitor 5 and an inverter 6 which is a power conversion circuit.

[0019] The smoothing capacitor 5 mainly smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7 which is a power supply line on the high potential side and an N line 8 which is a power supply line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative electrode of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel with the DC power supply 2.

[0020] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts the DC voltage into a three-phase AC voltage according to switching control by a control circuit (not shown) and outputs it to the motor generator 3. Thereby, the motor generator 3 is driven to generate a predetermined torque. During the regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 receiving the rotational force from the wheels into a DC voltage according to switching control by the control circuit and outputs it to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0021] The inverter 6 is configured to include upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 may be referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are serially connected between the P line 7 and the N line 8 with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the corresponding phase winding 3a in the motor generator 3 via the output line 10. The inverter 6 has six arms. Each arm is configured to include a switching element. At least a part of each of the P line 7, the N line 8, and the output line 10 is constituted by a conductive member such as a bus bar.

[0022] In this embodiment, an n-channel type MOSFET 11 is adopted as the switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited. It may be one or a plurality. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0023] As an example, in this embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two MOSFETs 11 connected in parallel are connected to the P line 7. In the lower arm 9L, the sources of the two MOSFETs 11 connected in parallel are connected to the N line 8. The sources of the two MOSFETs 11 connected in parallel in the upper arm 9H and the drains of the two MOSFETs 11 connected in parallel in the lower arm 9L are connected to each other. The two MOSFETs 11 connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0024] A freewheeling diode 12 is connected in anti-parallel to each of the MOSFETs 11. The diode 12 may be the parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. The upper and lower arm circuits 9 for one phase are provided by one semiconductor device 20. Details of the semiconductor device 20 will be described later.

[0025] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power supply 2 and the smoothing capacitor 5. The converter includes, for example, a reactor and the above-described upper and lower arm circuits 9. According to this configuration, step-up and step-down are possible. The power conversion device 4 may include a filter capacitor for removing power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0026] The power conversion device 4 may include a drive circuit for the switching elements that constitute the inverter 6 and the like. The drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding MOSFET 11, that is, turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0027] The power conversion device 4 may include a control circuit for the switching elements. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates a drive command based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0028] As various sensors, for example, there are a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as a drive command. The control circuit is configured to include, for example, a processor and a memory. PWM is an abbreviation for Pulse Width Modulation.

[0029] <Semiconductor device> Next, the semiconductor device will be described with reference to FIGS. 2 to 13. FIG. 2 is a perspective view of the semiconductor device 20. FIG. 3 is a perspective view of the semiconductor device 20 similar to FIG. 2. FIG. 3 is a transmission view showing the internal structure. FIG. 4 is a plan view of the semiconductor device 20. FIG. 4 is a transmission view showing the internal structure. FIG. 5 is a cross-sectional view taken along line V-V of FIG. 4. FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. 4. FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 4. FIG. 8 is a cross-sectional view taken along line VIII-VIII of FIG. 4. FIG. 9 is an enlarged view of the region IX indicated by the dashed-dotted line in FIG. 8.

[0030] FIG. 10 is an exploded perspective view for explaining the semiconductor device 20. In FIG. 10, for convenience, the lead frame 94 is shown. FIG. 11 is a plan view showing a state where the semiconductor element 40 is mounted on the substrate 50. FIG. 12 is a plan view showing the circuit pattern of the surface metal body 52 on the substrate 50. FIG. 13 is a plan view showing the circuit pattern of the surface metal body 62 on the substrate 60.

[0031] Hereinafter, the thickness direction of the semiconductor element (semiconductor substrate) is defined as the Z direction. The direction in which the semiconductor elements constituting the upper arm 9H and the semiconductor elements constituting the lower arm 9L are arranged, which is orthogonal to the Z direction, is defined as the Y direction. The direction orthogonal to both the Z direction and the Y direction is defined as the X direction. Unless otherwise specified, the shape viewed from the Z direction in plan view, in other words, the shape along the XY plane defined by the X direction and the Y direction, is defined as the planar shape. The plan view from the Z direction may simply be referred to as the plan view. Also, the term "arrangement" is not limited to the mounting surface, and may be used to indicate a positional relationship of overlapping in plan view.

[0032] As shown in FIGS. 2 to 13, the semiconductor device 20 constitutes one of the above-described upper and lower arm circuits 9, that is, the upper and lower arm circuit 9 for one phase. The semiconductor device 20 includes a sealing body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90.

[0033] The sealing body 30 seals a part of the other elements constituting the semiconductor device 20. The remaining part of the other elements is exposed outside the sealing body 30. The sealing body 30 is made of, for example, resin. An example of the resin is an epoxy resin. The sealing body 30 is formed by, for example, a transfer molding method using resin as a material. Such a sealing body 30 may sometimes be referred to as a sealing resin body, a mold resin, or a resin molded body. The sealing body 30 may be formed using, for example, a gel. The gel is filled (arranged) in, for example, the opposing regions of the pair of substrates 50 and 60.

[0034] As shown in FIGS. 2 to 4, the sealing body 30 has a substantially rectangular shape in plan view. The sealing body 30 has a front surface 30a as the outer surface and a back surface 30b which is the surface opposite to the front surface 30a in the Z direction. The front surface 30a and the back surface 30b are, for example, flat surfaces. The sealing body 30 also has side surfaces that connect the front surface 30a and the back surface 30b. The side surfaces include two side surfaces 30c and 30d from which the external connection terminals 90 protrude. The side surface 30d is the surface opposite to the side surface 30c in the X direction.

[0035] The semiconductor device 40 is formed by forming a switching element on a semiconductor substrate made of silicon (Si), a wide-bandgap semiconductor having a wider bandgap than silicon, or the like. Examples of the wide-bandgap semiconductor include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor device 40 may be referred to as a power device or a semiconductor chip.

[0036] In the semiconductor device 40 of this embodiment, the above-described n-channel MOSFET 11 is formed on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical structure such that the main current flows in the thickness direction of the semiconductor device 40 (semiconductor substrate), that is, the Z direction. The semiconductor device 40 has main electrodes of the switching element on both surfaces in its own thickness direction, that is, the Z direction. Specifically, as the main electrodes, it has a drain electrode 40D on one surface and a source electrode 40S on the back surface, which is the surface opposite to the one surface in the Z direction.

[0037] When the diode 12 is a parasitic diode, the source electrode 40S also serves as the anode electrode, and the drain electrode 40D also serves as the cathode electrode. The diode 12 may be formed on a separate chip from the MOSFET 11. The drain electrode 40D is the main electrode (first main electrode) on the high-potential side, and the source electrode 40S is the main electrode (second main electrode) on the low-potential side. Hereinafter, the drain electrode 40D and the source electrode 40S may be denoted as main electrodes 40D and 40S.

[0038] The semiconductor device 40 has a substantially rectangular planar shape. As shown in FIG. 11, the semiconductor device 40 has a pad 40P formed at a position different from the source electrode 40S on the back surface. The source electrode 40S and the pad 40P are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 40D is formed on substantially the entire surface of one surface. The source electrode 40S is formed on a part of the back surface of the semiconductor device 40. In plan view, the area of the drain electrode 40D is larger than that of the source electrode 40S.

[0039] Pad 40P is an electrode for signals. Pad 40P is electrically separated from source electrode 40S. Pad 40P is formed at an end portion on the opposite side of the formation region of source electrode 40S in the Y direction. Pad 40P includes a pad for a gate electrode.

[0040] Semiconductor device 20 includes a plurality of semiconductor elements 40 configured as described above. The configurations of each semiconductor element 40 are common to each other. The plurality of semiconductor elements 40 include a semiconductor element 40H that constitutes the upper arm 9H and a semiconductor element 40L that constitutes the lower arm 9L. The semiconductor element 40H may be referred to as an upper arm element, and the semiconductor element 40L may be referred to as a lower arm element. Each of the semiconductor elements 40H and 40L is an arm element that constitutes one arm. The semiconductor device 20 of the present embodiment includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged side by side in the X direction. Similarly, the two semiconductor elements 40L are arranged side by side in the X direction. The semiconductor element 40H and the semiconductor element 40L are arranged side by side in the Y direction. The Y direction is a first direction orthogonal to the Z direction, which is the thickness direction of the semiconductor element 40. The X direction is a second direction orthogonal to the Z direction and the first direction (Y direction). The semiconductor device 20 has two columns along the Y direction formed by the semiconductor element 40H and the semiconductor element 40L.

[0041] Each semiconductor element 40 is arranged at substantially the same position as each other in the Z direction. The drain electrode 40D of each semiconductor element 40 faces the substrate 50. The source electrode 40S of each semiconductor element 40 faces the substrate 60. Hereinafter, the substrate 50 may be referred to as the D-side substrate 50, and the substrate 60 may be referred to as the S-side substrate 60.

[0042] The substrates 50 and 60 are arranged so as to sandwich the plurality of semiconductor elements 40 in the Z direction. The substrates 50 and 60 are arranged so that at least a part of them faces each other in the Z direction. The substrates 50 and 60 enclose all of the plurality of semiconductor elements 40 (40H, 40L) in a plan view.

[0043] The substrate 50 is disposed on the drain electrode 40D side with respect to the semiconductor element 40. The substrate 60 is disposed on the source electrode 40S side with respect to the semiconductor element 40. The substrate 50 is electrically connected to the drain electrode 40D and provides a wiring function as will be described later. Similarly, the substrate 60 is electrically connected to the source electrode 40S and provides a wiring function. For this reason, the substrates 50 and 60 may be referred to as wiring substrates. The substrate 50 may be referred to as a drain substrate or a substrate on the D side, and the substrate 60 may be referred to as a source substrate or a substrate on the S side. The substrates 50 and 60 provide a heat dissipation function for dissipating the heat generated by the semiconductor element 40. For this reason, the substrates 50 and 60 may be referred to as heat dissipation members. Of the pair of substrates 50 and 60 sandwiching the semiconductor element 40 in the Z direction, the substrate 50 on the D side is the first substrate, and the substrate 60 on the S side may be referred to as the second substrate.

[0044] The substrate 50 has a facing surface 50a facing the semiconductor element 40 and a back surface 50b which is a surface opposite to the facing surface 50a. The substrate 50 includes an insulating base material 51, a surface metal body 52, and a back surface metal body 53. The substrate 50 is a substrate in which the insulating base material 51 and the metal bodies 52 and 53 are laminated. The substrate 60 has a facing surface 60a facing the semiconductor element 40 and a back surface 60b which is a surface opposite to the facing surface 60a. The substrate 60 includes an insulating base material 61, a surface metal body 62, and a back surface metal body 63. The substrate 60 is a substrate in which the insulating base material 61 and the metal bodies 62 and 63 are laminated. In the substrate 50 which is the first substrate, the insulating base material 51 is the first insulating base material, the surface metal body 52 is the first surface metal body, and the back surface metal body 53 is the first back surface metal body. In the substrate 60 which is the second substrate, the insulating base material 61 is the second insulating base material, the surface metal body 62 is the second surface metal body, and the back surface metal body 63 is the second back surface metal body. Hereinafter, the surface metal bodies 52 and 62 and the back surface metal bodies 53 and 63 may be simply denoted as metal bodies 52, 53, 62, and 63.

[0045] The insulating substrate 51 electrically separates the front surface metal body 52 and the back surface metal body 53. Similarly, the insulating substrate 61 electrically separates the front surface metal body 62 and the back surface metal body 63. The insulating substrates 51 and 61 may be referred to as an insulating layer. The materials of the insulating substrates 51 and 61 are resin or ceramic as an inorganic material. As the resin, for example, epoxy resin, polyimide resin, etc. can be used. As the ceramic, for example, Al2O3 (alumina), Si3N4 (silicon nitride), etc. can be used. When the insulating substrates 51 and 61 are resin, the substrates 50 and 60 may be referred to as a metal resin substrate. When the insulating substrates 51 and 61 are ceramic, the substrates 50 and 60 may be referred to as a metal ceramic substrate.

[0046] In the case of the insulating substrates 51 and 61 using a resin material, in order to improve heat dissipation, insulation, etc., an inorganic filler (inorganic filling material) may be included in the resin. The linear expansion coefficient may be adjusted by adding the filler. As the filler, for example, Al2O3, SiO2 (silicon dioxide), AlN (aluminum nitride), BN (boron nitride), etc. can be used. The insulating substrates 51 and 61 may contain only one type of filler or may contain a plurality of types of fillers.

[0047] Considering heat dissipation and insulation properties, in the case of resin-based materials, the thickness of each of the insulating substrates 51 and 61, that is, the length in the Z direction, is preferably about 50 μm to 300 μm. In the case of ceramic-based materials, the thickness of the insulating substrates 51 and 61 is preferably about 200 μm to 500 μm. In the Z direction, the surfaces (front surfaces) of the insulating substrates 51 and 61 are the inner surfaces, that is, the surfaces on the side of the semiconductor element 40, and the back surfaces, which are the surfaces opposite to the surfaces in the Z direction, are the outer surfaces. The insulating substrates 51 and 61 may have the same (identical) material composition or may be different from each other. In this embodiment, resin-based insulating substrates 51 and 61 are employed, and the material compositions are the same. The linear expansion coefficients of the insulating substrates 51 and 61 are adjusted to be approximately the same value as that of the sealing body 30 by adding fillers to the resin. By adding fillers to the resin, the linear expansion coefficients of the insulating substrates 51 and 61 and the sealing body 30 are close to the values of the metals (Cu) constituting the metal bodies 52, 53, 62, and 63.

[0048] The metal bodies 52, 53, 62, and 63 are provided, for example, as metal plates or metal foils. The metal bodies 52, 53, 62, and 63 are formed using metals such as Cu or Al that have good electrical conductivity and thermal conductivity as materials. The thickness of each of the metal bodies 52, 53, 62, and 63 is, for example, about 0.1 mm to 3 mm. The front surface metal body 52 is disposed on the surface of the insulating substrate 51 in the Z direction. The back surface metal body 53 is disposed on the back surface of the insulating substrate 51. Similarly, the front surface metal body 62 is disposed on the surface of the insulating substrate 61 in the Z direction. The back surface metal body 63 is disposed on the back surface of the insulating substrate 61. The insulating substrates 51 and 61 are the opposing surfaces to the semiconductor element 40 in the Z direction. As shown in FIGS. 5 to 9 and the like, in this embodiment, the front surface metal body 52 is thicker than the back surface metal body 53. The front surface metal body 62 is thicker than the back surface metal body 63. The front surface metal body 52 on the drain electrode 40D side is thicker than the front surface metal body 62 on the source electrode 40S side. Instead of this configuration, the back surface metal bodies 53 and 63 may be made thicker than the corresponding front surface metal bodies 52 and 62. The thicknesses of the front surface metal body 52 and the back surface metal body 53 may be made substantially equal, or the thicknesses of the front surface metal body 62 and the back surface metal body 63 may be made substantially equal.

[0049] The surface metal bodies 52 and 62 are patterned. The surface metal bodies 52 and 62 provide wiring, that is, a circuit. For this reason, the surface metal bodies 52 and 62 may be referred to as a circuit pattern, a wiring layer, or a circuit conductor. The surface metal bodies 52 and 62 may have a plating film such as a Ni-based film or Au on the metal surface. Hereinafter, the pattern of the surface metal bodies 52 and 62 may be shown as a circuit pattern. The surface metal body 52 and the non-arrangement region of the surface metal body 52 on the surface of the insulating substrate 51 form the opposing surface 50a of the substrate 50. Similarly, the surface metal body 62 and the non-arrangement region of the surface metal body 62 on the surface of the insulating substrate 61 form the opposing surface 60a of the substrate 60.

[0050] For example, surface metal bodies 52 and 62 patterned into a predetermined shape by pressing, etching, etc. may be prepared and adhered to a laminate having a two-layer structure of insulating substrates 51 and 61 and back metal bodies 53 and 63 to form substrates 50 and 60. After forming a laminate having a three-layer structure of surface metal bodies 52 and 62, insulating substrates 51 and 61, and back metal bodies 53 and 63, the surface metal bodies 52 and 62 may be patterned by cutting or etching.

[0051] As shown in FIG. 11 etc., the surface metal body 52 has a P wiring 54 and a relay wiring 55. The P wiring 54 and the relay wiring 55 are electrically separated by a predetermined interval (gap). This gap is filled with a sealing body 30.

[0052] The P wiring 54 is connected to the P terminal 91P and the drain electrode 40D of the semiconductor element 40H, which will be described later. The P wiring 54 electrically connects the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 may be referred to as the positive electrode wiring or the high-potential power supply wiring. The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection portion 80, and the output terminal 92. The relay wiring 55 electrically connects the arm connection portion 80 and the drain electrode 40D of the semiconductor element 40L. The relay wiring 55 electrically connects the source electrode 40S of the semiconductor element 40H, the drain electrode of the semiconductor element 40L, and the output terminal 92. On the surface metal body 52 (first surface metal body), the P wiring 54 is the first power supply wiring, and the relay wiring 55 is the first relay wiring.

[0053] The P wiring 54 and the relay wiring 55 are arranged side by side in the Y direction. In the Y direction, the P wiring 54 is arranged on the side of the power supply terminal 91, and the relay wiring 55 is arranged on the side of the output terminal 92. In other words, the P wiring 54 is arranged at a position closer to the side surface 30c of the sealing body 30, and the relay wiring 55 is arranged at a position closer to the side surface 30d.

[0054] The P wiring 54 has a notch 540. The notch 540 opens in one of the four sides of a substantially rectangular shape in a plane with the X direction as the longitudinal direction. The notch 540 is provided substantially at the center in the X direction on the side facing the side surface 30c. The P wiring 54 has a base portion 541 and a pair of extended portions 542. The base portion 541 and the pair of extended portions 542 define the notch 540. The P wiring 54 has a substantially U-shaped (concave-shaped) plane.

[0055] The base portion 541 is a portion on the side of the relay wiring 55 rather than the notch 540 and the extended portion 542, and has a substantially rectangular shape in a plane. The base portion 541 overlaps the semiconductor element 40H in a plan view. That is, the semiconductor element 40H is arranged on the base portion 541. The drain electrode 40D of the semiconductor element 40H is connected to the base portion 541.

[0056] The two extended portions 542 extend from the base portion 541 in the same direction as each other, specifically in the Y direction and toward the side surface 30c side of the sealing body 30. One of the extended portions 542 is continuous near one end of the base portion 541 in the X direction, and the other one is continuous near the other end of the base portion 541. Both ends of the U shape of the P wiring 54, that is, the ends of the two extended portions 542 on the side opposite to the base portion 541 are substantially at the same position in the Y direction. The pair of extended portions 542 sandwich the notch 540 in the X direction. The length in the Y direction is longer for the base portion 541 than the depth of the notch 540 and the extended portions 542.

[0057] The relay wiring 55 also has a notch 550. The notch 550 opens in one of the four sides of a substantially rectangular shape in plan view. The notch 550 is provided substantially at the center in the X direction on the side facing the side surface 30d. That is, in the surface metal body 52, a notch 540 is provided at one of the ends in the Y direction, and a notch 550 is provided at the other end.

[0058] The relay wiring 55 has a base portion 551 and a pair of extended portions 552. The base portion 551 and the pair of extended portions 552 define the notch 550. The relay wiring 55 has a substantially U shape (concave shape) in plan view. The base portion 551 is a portion on the P wiring 54 side rather than the notch 550 and the extended portions 552, and has a substantially rectangular shape in plan view. The base portion 551 overlaps the semiconductor element 40L in plan view. That is, the semiconductor element 40L is disposed on the base portion 551. The drain electrode 40D of the semiconductor element 40L is connected to the base portion 551.

[0059] The two extended portions 552 extend from the base portion 551 in the same direction as each other, specifically in the Y direction and toward the side surface 30d side of the sealing body 30. One of the extended portions 552 is continuous near one end of the base portion 551 in the X direction, and the other is continuous near the other end of the base portion 551. Both ends of the U-shaped relay wiring 55, that is, the ends of the two extended portions 552 on the side opposite to the base portion 551 are substantially at the same position in the Y direction. The pair of extended portions 552 sandwich the notch 550 in the X direction. The length in the Y direction is longer for the base portion 551 than the depth of the notch 550 and the extended portions 552.

[0060] On the other hand, as shown in FIGS. 10 and 13, the surface metal body 62 has an N wiring 64 and a relay wiring 65. The N wiring 64 and the relay wiring 65 are electrically separated by a predetermined interval (gap). This gap is filled with the sealing body 30.

[0061] The N wiring 64 is connected to an N terminal 91N and a source electrode 40S of the semiconductor element 40L, which will be described later. The N wiring 64 electrically connects the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The N wiring 64 may be referred to as an N wiring. The relay wiring 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. In the surface metal body 62 (second surface metal body), the N wiring 64 is a second power supply wiring, and the relay wiring 65 is a second relay wiring.

[0062] The N wiring 64 has a base portion 640 and a pair of extended portions 641. The N wiring 64 has a substantially U shape in plan view. The base portion 640 is arranged side by side with the relay wiring 65 in the Y direction. The base portion 640 is arranged on the side surface 30d side in the Y direction. The base portion 640 has a substantially rectangular shape in plan view with the X direction as the longitudinal direction. As shown in FIG. 15, the base portion 640 overlaps the semiconductor element 40L in plan view. That is, the semiconductor element 40L is arranged on the base portion 640. The source electrode 40S of the semiconductor element 40L is connected to the base portion 640.

[0063] The two extended portions 641 extend from the base portion 640 in the same direction as each other, specifically in the Y direction and toward the side surface 30c side of the sealing body 30. One of the extended portions 641 is continuous near one end of the base portion 640 in the X direction, and the other one is continuous near the other end of the base portion 640. Both ends of the U shape of the N wiring 64, that is, the ends of the two extended portions 641 on the side opposite to the base portion 640 are substantially at the same position in the Y direction.

[0064] The pair of extended portions 641 form both ends of the surface metal body 62 in the X direction. The pair of extended portions 641 are arranged near the end of the substrate 60. In a plan view, a part of each of the pair of extended portions 641 overlaps the P wiring 54. The length in the Y direction is longer for the extended portion 641 than for the base portion 640. The N wiring 64 also has a notch 642. The notch 642 opens in one of the four sides of a substantially rectangular shape in a plane having the Y direction as the longitudinal direction. The notch 642 is provided substantially at the center in the X direction on the side facing the side surface 30c. The base portion 640 and the pair of extended portions 641 define the notch 642.

[0065] As described above, the relay wiring 65 is arranged side by side with the N wiring 64, specifically, the base portion 640, in the Y direction. In the Y direction, the relay wiring 65 is arranged at a position close to the side surface 30c of the sealing body 30, and the base portion 640 is arranged at a position close to the side surface 30d. The relay wiring 65 is arranged between the pair of extended portions 641 in the X direction. The relay wiring 65 is sandwiched by the pair of extended portions 641. The relay wiring 65 is arranged in the notch 642. The relay wiring 65 is arranged with a predetermined interval (gap) from the N wiring 64. In a plan view, a part of the relay wiring 65 overlaps the P wiring 54, and another part overlaps the relay wiring 55.

[0066] As shown in FIG. 15, the relay wiring 65 overlaps the semiconductor element 40H in a plan view. That is, the semiconductor element 40H is disposed on the relay wiring 65. The source electrode 40S of the semiconductor element 40H is connected to the relay wiring 65. A more detailed example of the circuit pattern of the surface metal body 62 will be described later.

[0067] The back metal bodies 53 and 63 are electrically separated from the circuit including the semiconductor element 40 by the insulating substrates 51 and 61. The back metal bodies 53 and 63 may be referred to as metal base substrates. The heat generated by the semiconductor element 40 is transmitted to the back metal bodies 53 and 63 through the surface metal bodies 52 and 62 and the insulating substrates 51 and 61. The back metal bodies 53 and 63 provide a heat dissipation function. The back metal bodies 53 and 63 of the present embodiment have a substantially rectangular shape in plan, and their outer contour substantially coincides with the outer contour of the surface metal bodies 52 and 62. The back metal bodies 53 and 63 are so-called solid conductors disposed over substantially the entire back surface of the insulating substrates 51 and 61. As described above, since the coefficient of linear expansion of the insulating substrates 51 and 61 is adjusted by adding the filler, warping can be suppressed even if the patterns are different on the front and back. Of course, the back metal bodies 53 and 63 may be patterned so as to coincide with the surface metal bodies 52 and 62 in a plan view.

[0068] The back metal bodies 53 and 63 of the present embodiment are disposed over substantially the entire back surface of the corresponding insulating substrates 51 and 61. In order to further enhance the heat dissipation effect, at least one of the back metal bodies 53 and 63 may be exposed from the sealing body 30. In the present embodiment, the back metal body 53 is exposed from one surface 30a of the sealing body 30, and the back metal body 63 is exposed from the back surface 30b. The exposed surface of the back metal body 53 is substantially flush with the one surface 30a. The exposed surface of the back metal body 63 is substantially flush with the back surface 30b. The back metal bodies 53 and 63 form the back surfaces 50b and 60b of the substrates 50 and 60.

[0069] The conductive spacer 70 provides a spacer function to ensure a predetermined interval between the semiconductor element 40 and the substrate 60. For example, the conductive spacer 70 ensures a height for electrically connecting the corresponding signal terminal 93 to the pad 40P of the semiconductor element 40. The conductive spacer 70 is located in the middle of the electrical conduction and heat conduction paths between the source electrode 40S of the semiconductor element 40 and the substrate 60, and provides a wiring function and a heat dissipation function. The conductive spacer 70 contains a metal material with good electrical conductivity and heat conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface. The conductive spacer 70 is a columnar body with a substantially rectangular planar shape having substantially the same size as the source electrode 40S in plan view.

[0070] The conductive spacer 70 may be referred to as a terminal, a terminal block, or a metal block body. The semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor element 40. Specifically, it includes four conductive spacers 70. The conductive spacers 70 are individually connected to the semiconductor element 40.

[0071] The arm connection portion 80 electrically connects the relay wirings 55 and 65. That is, the arm connection portion 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connection portion 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the Y direction. The arm connection portion 80 is provided in the overlapping region of the relay wiring 55 and the relay wiring 65 in plan view. The arm connection portion 80 of the present embodiment includes a joint portion 81 and a bonding material 103 described later.

[0072] The joint portion 81 is a metal columnar body provided separately from the surface metal bodies 52 and 62. Such a joint portion 81 may be referred to as a joint terminal. In the Z direction, the bonding material 103 is interposed between one end of the joint portion 81 and the relay wiring 55, and the bonding material 103 is interposed between the other end and the relay wiring 65.

[0073] Alternatively, the joint part 81 may be integrally continuous with at least one of the surface metal bodies 52 and 62. That is, the joint part 81 may be provided integrally with the surface metal bodies 52 and 62 as part of the substrates 50 and 60. The arm connection part 80 may be configured not to include the joint part 81. That is, the arm connection part 80 may be configured to include only the bonding material 103.

[0074] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed using a metal material with good conductivity such as copper. The external connection terminal 90 is, for example, a plate material. The external connection terminal 90 may be referred to as a lead. The external connection terminal 90 includes a power supply terminal 91, an output terminal 92, and a signal terminal 93. The power supply terminal 91 includes a P terminal 91P and an N terminal 91N. The P terminal 91P, the N terminal 91N, and the output terminal 92 are main terminals electrically connected to the main electrodes of the semiconductor element 40. The signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0075] The power supply terminal 91 is the external connection terminal 90 electrically connected to the above-described power supply lines 7 and 8. The P terminal 91P is electrically connected to the positive electrode terminal of the smoothing capacitor 5. The P terminal 91P may be referred to as a positive electrode terminal or a high-potential power supply terminal. The P terminal 91P is connected to the P wiring 54 of the surface metal body 52. That is, the P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H constituting the upper arm 9H.

[0076] The P terminal 91P is connected near one end in the Y direction of the P wiring 54. The P terminal 91P extends in the Y direction from the connection part (joint part) with the P wiring 54, and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30c. The semiconductor device 20 of the present embodiment includes two P terminals 91P. As shown in FIG. 11, one of the P terminals 91P is connected to one of the pair of extended parts 542, and the other one is connected to the other of the pair of extended parts 542. The P terminals 91P are arranged at positions close to the notch 540, that is, inward, in each of the extended parts 542 so as to be adjacent to the N terminal 91N in a plan view. The two P terminals 91P are arranged side by side in the X direction. The two P terminals 91P are arranged at substantially the same position in the Z direction.

[0077] The N terminal 91N is electrically connected to the negative electrode terminal of the smoothing capacitor 5. The N terminal 91N may be referred to as a negative electrode terminal or a low-potential power supply terminal. The N terminal 91N is connected to the N wiring 64 of the surface metal body 62. That is, the N terminal 91N is connected to the source electrode 40S of the semiconductor element 40L constituting the lower arm 9L.

[0078] The N terminal 91N is connected near one end in the Y direction of the N wiring 64. The N terminal 91N extends in the Y direction from the joint part with the N wiring 64, and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30c. The semiconductor device 20 includes two N terminals 91N. As shown in FIG. 15 etc., one of the N terminals 91N is connected to one of the pair of extended parts 641, and the other one is connected to the other of the pair of extended parts 641. The two N terminals 91N are arranged side by side in the Y direction. The two N terminals 91N are arranged at substantially the same position in the Z direction.

[0079] The two N terminals 91N are arranged outside the two P terminals 91P in the X direction. In a plan view, one of the N terminals 91N is arranged near one of the P terminals 91P, and the other of the N terminals 91N is arranged near the other of the P terminals 91P. The N terminal 91N and the P terminal 91P adjacent to each other in the X direction have their sides facing each other in a part including the portion protruding from the sealing body 30.

[0080] The output terminal 92 is electrically connected to the winding 3a (stator coil) of the corresponding phase of the motor generator 3. The output terminal 92 may be referred to as an O terminal, an AC terminal, etc. As shown in FIGS. 3 and 7, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 on the substrate 50. That is, the output terminal 92 is connected to the connection point between the upper arm 9H and the lower arm 9L.

[0081] The output terminal 92 is connected near one end in the Y direction of the relay wiring 55. The output terminal 92 extends in the Y direction from the joint with the relay wiring 55 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30d. The semiconductor device 20 includes two output terminals 92. One of the output terminals 92 is connected to one of the pair of extended portions 552, and the other is connected to the other of the pair of extended portions 552. The two output terminals 92 are arranged side by side in the X direction. The two output terminals 92 are arranged at substantially the same position in the Z direction.

[0082] The signal terminal 93 is electrically connected to a drive circuit (driver) (not shown). The signal terminal 93H is electrically connected to the pad 40P of the semiconductor element 40H via a connection member such as a bonding wire 110. The number of the signal terminals 93H is not particularly limited. The signal terminal 93H may include at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 40H. The semiconductor device 20 of the present embodiment includes two signal terminals 93H. One of the signal terminals 93H is a terminal for the gate electrode. The pads 40P for the gate electrodes of the two semiconductor elements 40H are electrically connected to the signal terminal 93H for the gate electrode. The signal terminal 93H is disposed at a position overlapping the notch 540 of the P wiring 54 in a plan view. In the signal terminal 93H, the joint with the bonding wire 110 faces the insulating base material 51 instead of the surface metal body 52. The two signal terminals 93H are arranged side by side in the X direction.

[0083] The signal terminal 93H extends in the Y direction from the joint with the bonding wire 110 and protrudes out of the sealing body 30 from near the center in the Z direction on the side surface 30c. At least a part of the protruding portion of the signal terminal 93H extends in the same direction as the power supply terminal 91. The signal terminal 93H is disposed between the two P terminals 91P in the X direction. That is, the external connection terminals 90 protruding from the side surface 30c are arranged in the X direction in the order of the N terminal 91N, the P terminal 91P, the two signal terminals 93H, the P terminal 91P, and the N terminal 91N.

[0084] The signal terminal 93L is electrically connected to the pad 40P of the semiconductor element 40L via a connection member such as a bonding wire 110. The number of signal terminals 93L is not particularly limited. The signal terminal 93L may include at least a terminal for applying a driving voltage to the gate electrode of the semiconductor element 40L. The semiconductor device 20 of the present embodiment includes four signal terminals 93L. One of the signal terminals 93L is a terminal for the gate electrode. The pads 40P for the gate electrodes of the two semiconductor elements 40L are electrically connected to the signal terminal 93L for the gate electrode. The signal terminal 93L is disposed at a position overlapping the notch 550 of the relay wiring 55 in a plan view. In the signal terminal 93L, the joint portion with the bonding wire 110 faces the insulating base material 51 instead of the surface metal body 52. The four signal terminals 93L are arranged side by side in the X direction.

[0085] The signal terminal 93L extends in the Y direction from the joint portion with the bonding wire 110 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30d. At least a part of the protruding portion of the signal terminal 93L extends in the same direction as the output terminal 92. The signal terminal 93L is disposed between the two output terminals 92 in the X direction. That is, the external connection terminals 90 protruding from the side surface 30d are arranged in the X direction in the order of the output terminal 92, the four signal terminals 93L, and the output terminal 92.

[0086] The drain electrode 40D of the semiconductor element 40 is joined to the surface metal body 52 via a joining material 100. The source electrode 40S of the semiconductor element 40 is joined to the conductive spacer 70 via a joining material 101. The conductive spacer 70 is joined to the surface metal body 62 via a joining material 102. The joint portion 81 is joined to the metal bodies 52 and 62 via a joining material 103. Among the external connection terminals 90, the P terminal 91P, the N terminal 91N, which are main terminals, and the output terminal 92 are joined to the corresponding surface metal bodies 52 and 62 via a joining material 104.

[0087] The bonding materials 100 to 104 are conductive bonding materials. For example, solder can be adopted as the bonding materials 100 to 104. An example of the solder is a multi-component lead-free solder containing Cu, Ni, etc. in addition to Sn. Instead of the solder, a sintered bonding material such as sintered silver may be used. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly bonded to the corresponding surface metal bodies 52, 62 without passing through the bonding material 104. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly bonded to the surface metal bodies 52, 62 by, for example, ultrasonic bonding, friction stir bonding, laser welding, etc. When the joint part 81 is provided separately from the substrates 50, 60, the joint part 81 may be directly bonded to the surface metal bodies 52, 62.

[0088] As described above, in the semiconductor device 20, a plurality of semiconductor elements 40 constituting the upper and lower arm circuits 9 for one phase are sealed by the sealing body 30. The sealing body 30 integrally seals a plurality of semiconductor elements 40, a part of the substrate 50, a part of the substrate 60, a plurality of conductive spacers 70, the arm connection part 80, and a part of the external connection terminal 90 respectively. The sealing body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 on the substrates 50, 60.

[0089] The semiconductor element 40 is disposed between the substrates 50, 60 in the Z direction. The semiconductor element 40 is sandwiched by the opposed substrates 50, 60. Thereby, the heat of the semiconductor element 40 can be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the substrate 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the substrate 60 is substantially flush with the back surface 30b of the sealing body 30. Since the back surfaces 50b, 60b are exposed surfaces, the heat dissipation performance can be improved.

[0090] <Manufacturing Method> Next, based on FIG. 10, an example of the manufacturing method of the semiconductor device 20 will be described. In FIG. 10, the substrates 50 and 60 are shown facing each other for easy understanding of the subsequent assembly.

[0091] First, prepare a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, a joint portion 81, and a lead frame 94. As shown in FIG. 10, the lead frame 94 is provided with external connection terminals 90. The lead frame 94 is formed by processing a metal plate such as pressing. The external connection terminals 90 are supported by an outer peripheral frame 94b via tie bars 94a.

[0092] Next, join (connect) the semiconductor element 40, the joint portion 81, and the external connection terminals 90 to the substrate 50. Also, join the conductive spacer 70 to the semiconductor element 40.

[0093] At this time, arrange the lead frame 94 and the semiconductor element 40 on the substrate 50. Also, arrange the conductive spacer 70 on the source electrode 40S of the semiconductor element 40. Regarding the lead frame 94, arrange it such that a part of each of the external connection terminals 90 overlaps the substrate 50 in a plan view. Specifically, arrange the P terminal 91P and the N terminal 91N to overlap the P wiring 54 of the surface metal body 52, and arrange the output terminal 92 to overlap the relay wiring 55. Also, arrange the signal terminal 93H to overlap the insulating base material 51 exposed from the notch 540, and arrange the signal terminal 93L to overlap the insulating base material 51 exposed from the notch 550.

[0094] Then, join the drain electrode 40D of the semiconductor element 40 and the surface metal body 52 with a joining material 100. Join the source electrode 40S and the conductive spacer 70 with a joining material 101. Join the joint portion 81 and the surface metal body 52 with a joining material 103. Join the P terminal 91P and the output terminal 92 and the surface metal body 52 with a joining material 104. For example, in the case of solder, joining can be performed all at once by reflow. FIG. 10 shows this joined state.

[0095] Next, electrically connect the pad 40P of the semiconductor element 40H and the signal terminal 93H with a bonding wire 110. Similarly, electrically connect the pad 40P of the semiconductor element 40L and the signal terminal 93L with a bonding wire 110.

[0096] Next, the substrate 60 is joined (connected). The source electrode 40S of the semiconductor element 40 and the surface metal body 62 are joined via the joining material 102. The joint portion 81 and the surface metal body 62 are joined via the joining material 103. The N terminal 91N and the surface metal body 62 are joined via the joining material 104. For example, in the case of solder, joining can be performed all at once by reflow.

[0097] Next, the sealing body 30 is formed by the transfer molding method. Although not shown, in this embodiment, the sealing body 30 is formed so as to completely cover the substrates 50 and 60, and cutting is performed after forming. The sealing body 30 is cut together with a part of the back surface metal bodies 53 and 63 of the substrates 50 and 60. Thereby, the back surfaces 50b and 60b are exposed. The back surface 50b is substantially flush with one surface 30a of the sealing body 30, and the back surface 60b is substantially flush with the back surface 30b. Note that the sealing body 30 may be formed in a state where the back surfaces 50b and 60b are pressed against and adhered to the cavity wall surface of the molding die. In this case, when the sealing body 30 is formed, the back surfaces 50b and 60b are exposed from the sealing body 30. Therefore, cutting after forming becomes unnecessary.

[0098] Next, in the lead frame 94, unnecessary portions such as the tie bar 94a and the outer peripheral frame 94b are removed. Thus, the semiconductor device 20 can be obtained.

[0099] <Positional relationship> Next, based on FIGS. 14 and 15, the positional relationship among the semiconductor element 40, the circuit patterns of the surface metal bodies 52 and 62, the arm connection portion 80, and the external connection terminals 90 connected to the circuit patterns will be described. FIG. 14 is a diagram showing the circuit pattern of the surface metal body 52, the semiconductor element 40, and the arrangement of the terminals. FIG. 15 is a diagram showing the circuit pattern of the surface metal body 62, the semiconductor element 40, and the arrangement of the terminals. In FIGS. 14 and 15, for convenience, only the external connection terminals 90 connected to the circuit patterns are illustrated. In FIG. 14, the arrangement region of the semiconductor element 40 is denoted as D so that the main electrode (drain electrode 40D) connected to the surface metal body 52 is easily distinguishable. Similarly, in FIG. 15, the arrangement region of the semiconductor element 40 is denoted as S so that the main electrode (source electrode 40S) connected to the surface metal body 62 is easily distinguishable.

[0100] The virtual line CL1 shown in FIG. 14 is a virtual line passing through the midpoints of the two semiconductor elements 40 that constitute one arm. The virtual line CL1 passes through the midpoint (center) in the arrangement direction of the two semiconductor elements 40 and extends in the Y direction. The virtual line CL1 is, for example, a line passing through the midpoints of the two semiconductor elements 40H. Instead of the semiconductor element 40H, it may be a line passing through the midpoints of the semiconductor elements 40L.

[0101] As shown in FIG. 14, the arrangements of the two semiconductor elements 40H are substantially line-symmetric with respect to the virtual line CL1. Similarly, the arrangements of the two semiconductor elements 40L are also substantially line-symmetric with respect to the virtual line CL1. Here, substantially line-symmetric means that errors within the range of manufacturing variations can be tolerated. The circuit pattern of the surface metal body 52 is also substantially line-symmetric with respect to the virtual line CL1. That is, each of the P wiring 54 and the relay wiring 55 is substantially line-symmetric with respect to the virtual line CL1.

[0102] The arrangement of the arm connection portion 80 connected to the relay wiring 55 is also substantially line-symmetric with respect to the virtual line CL1. The arrangement of the external connection terminals 90 connected to the surface metal body 52 is also substantially line-symmetric with respect to the virtual line CL1. That is, the arrangements of the two P terminals 91P are also substantially line-symmetric with respect to the virtual line CL1. The arrangements of the two output terminals 92 are also substantially line-symmetric with respect to the virtual line CL1.

[0103] Similar to FIG. 14, FIG. 15 also shows the virtual line CL1. The arrangement of the semiconductor elements 40H and 40L is the same as that in FIG. 14. As shown in FIG. 15, the circuit pattern of the surface metal body 62 is also substantially line-symmetric with respect to the virtual line CL1. That is, each of the N wiring 64 and the relay wiring 65 is substantially line-symmetric with respect to the virtual line CL1. The arrangement of the arm connection portion 80 connected to the relay wiring 65 is also substantially line-symmetric with respect to the virtual line CL1, similar to FIG. 14. The arrangement of the two N terminals 91N, which are external connection terminals 90 connected to the surface metal body 62, is also substantially line-symmetric with respect to the virtual line CL1.

[0104] <Circuit pattern> Next, based on FIG. 15, the circuit pattern of the surface metal body 62 will be described in more detail. The dashed-dotted lines shown in FIG. 15 indicate the boundaries of the respective regions.

[0105] As described above, the surface metal body 62 on the substrate 60 has the N wiring 64 and the relay wiring 65. The N wiring 64 has a base portion 640 and a pair of extending portions 641. The pair of extending portions 641 extend from the base portion 640 in the Y direction and toward the side surface 30c of the sealing body 30. The N wiring 64 defines the outer contour of the surface metal body 62. The relay wiring 65 is sandwiched by the pair of extending portions 641. The relay wiring 65 is disposed within the notch 642 of the N wiring 64.

[0106] As shown in FIG. 15, the relay wiring 65 has an end portion 650 as one end in the Y direction. The end portion 650 is the end on the base portion 640 side in the Y direction. On the other hand, the base portion 640 of the N wiring 64 has an opposing side 640a to the end portion 650. The opposing side 640a is the portion between the pair of extending portions 641 at the base portion 640.

[0107] The relay wiring 65 of the present embodiment has a width-reducing portion 651a. The width-reducing portion 651a includes the end portion 650. The width-reducing portion 651a is a portion within a predetermined range in the Y direction from the end portion 650. The length in the X direction of the width-reducing portion 651a, that is, the width, is the smallest at the end portion 650.

[0108] The width of the width-reducing portion 651a may be reduced stepwise, for example, at predetermined lengths in the Y direction. That is, the end portion of the width-reducing portion 651a in the X direction may change in a stepped manner. In the present embodiment, the length of the width-reducing portion 651a in the X direction becomes shorter as it is closer to the base portion 640. That is, the width of the width-reducing portion 651a continuously decreases toward the base portion 640. The arm connection portion 80 is disposed in the width-reducing portion 651a.

[0109] The relay wiring 65 may have only the width-reducing portion 651a including the end portion 650. In this case, the semiconductor element 40H is also disposed in the width-reducing portion 651a. The relay wiring 65 of the present embodiment has a constant-width portion 651b. The constant-width portion 651b is continuous with the width-reducing portion 651a and is a portion having a constant width over a predetermined range in the Y direction. And the semiconductor element 40H is disposed in the constant-width portion 651b.

[0110] The relay wiring 65 of the present embodiment further has a width-reducing portion 651c. The width-reducing portion 651c includes an end portion 652 opposite to the end portion 650. The width-reducing portion 651c is opposite to the width-reducing portion 651a and is continuous with the constant-width portion 651b. The width of the width-reducing portion 651c is minimum at the end portion 652. In the present embodiment, the width of the width-reducing portion 651c continuously decreases toward the end portion 652. In the relay wiring 65, the width-reducing portions 651a and 651c become narrower as they are farther from the constant-width portion 651b.

[0111] In the present embodiment, the distance between the N wiring 64 and the relay wiring 65 is substantially constant over the entire area of the end portion 650. The extending portion 641 of the N wiring 64 is patterned so that the distance from the relay wiring 65 is substantially constant. Each of the extending portions 641 has an expanding portion 641a, a constant-width portion 641b, and an expanding portion 641c.

[0112] The widening portion 641a is continuous with the base portion 640 and is a portion within a predetermined range in the Y direction from the boundary with the base portion 640. The length in the X direction of the widening portion 641a, that is, the width, is maximum at the boundary with the base portion 640. The width of the widening portion 641a in the present embodiment continuously expands toward the base portion 640. The constant-width portion 641b is continuous with the widening portion 641a and is a portion with a constant width over a predetermined range in the Y direction. The constant-width portion 641b faces the constant-width portion 651b of the relay wiring 65.

[0113] The widening portion 641c is opposite to the widening portion 641a and is continuous with the constant-width portion 641b. The widening portion 641a extends to a position closer to the side surface 30c than the narrowing portion 651c. The widening portion 641c includes the tip portion 641d of the extending portion 641. The width of the widening portion 641c is maximum at the tip portion 641d. In the widening portion 641c, the width at an arbitrary first position is greater than or equal to the width at a second position farther from the tip portion 641d than the first position. In the present embodiment, the width of the widening portion 641c continuously expands toward the tip portion 641d at the opposing portion with the narrowing portion 651c. In the widening portion 641c, the portion on the tip portion 641d side rather than the opposing portion has a constant width. In the N wiring 64, a part of the widening portion 641c and the widening portion 641a become wider as they are farther from the constant-width portion 641b.

[0114] <Current path> Next, based on FIG. 16, the current path will be described. FIG. 16 is a diagram showing the PN current loop in the semiconductor device 20 of the present embodiment. The PN current loop refers to the loop shape of the current path from the P terminal 91P to the N terminal 91N.

[0115] In considering inductance, the PN current loop from the P terminal 91P → P wiring 54 → semiconductor element 40H → relay wiring 65 → arm connection portion 80 → relay wiring 55 → semiconductor element 40L → N wiring 64 → N terminal 91N is taken into account. For this reason, in order to make the PN current loop easy to understand, a solid line connecting from the P terminal 91P to the N terminal 91N is shown. Actually, the semiconductor elements 40H and 40L are controlled so as not to turn on simultaneously. For the sake of convenience, only the current path for one of the semiconductor elements 40H and one of the semiconductor elements 40L is shown, but the same applies to the other one of the semiconductor elements 40H and the other one of the semiconductor elements 40L.

[0116] In the semiconductor device 20 of the present embodiment, as described above, the N wiring 64 and the relay wiring 65 are patterned and satisfy a predetermined positional relationship with the semiconductor element 40L. Due to this positional relationship, as shown in FIG. 16, the N wiring 64 (extended portion 641) also exists above one side 400 of the semiconductor element 40L in a plan view. The side 400 is the side facing the relay wiring 65. Therefore, current enters from the side 400 of the semiconductor element 40L and exits from the same side 400. Among the currents flowing from the semiconductor element 40L toward the N terminal 91N, the Y-direction component particularly increases in the vicinity of the semiconductor element 40L.

[0117] In this way, the current flowing through the N wiring 64 approaches the relay wiring 65, and the current path through the N wiring 64, that is, the current path between the semiconductor element 40L and the N terminal 91N becomes shorter. Therefore, the PN current loop is small. The PN current loop is also small in the Z direction. The P wiring 54 and the N wiring 64 face each other in the Z direction. Also, the relay wiring 55 and the N wiring 64 face each other in the Z direction. Since the PN current loop becomes small in this way, the inductance of the main circuit wiring can be reduced.

[0118] <Adhesion portion of the D-side substrate> As shown in FIGS. 9 and 17, on the substrate 50 on the D side, the portion of the surface metal body 52 that is not in contact with the insulating base material 51 is divided into a contact portion 527 and a non-contact portion 528. The contact portion 527 is a region that contacts the sealing body 30 and is a region that is in close contact with and sealed by the sealing body 30. The non-contact portion 528 is a region that does not contact the sealing body 30. The portion surrounded by the dotted line in FIG. 17 indicates the non-contact portion 528. Specifically, the bonding portions of the surface metal body 52 with the semiconductor element 40, the P terminal 91P, the output terminal 92, and the arm connection portion 80 correspond to the non-contact portion 528.

[0119] In the contact portion 527 of the substrate 50 on the D side, a high-contact portion with an increased degree of adhesion to the sealing body 30 and a low-contact portion 527p with a lower degree of adhesion to the sealing body 30 than the high-contact portion are formed. The surface roughness of the high-contact portion is rougher than that of the low-contact portion 527p. Therefore, in the high-contact portion, the contact area with the sealing body 30 becomes larger, and the adhesive force with the sealing body 30 is higher than that of the low-contact portion 527p. As a result, peeling of the sealing body 30 is less likely to occur in the high-contact portion.

[0120] The high-contact portion includes an element annular portion 527a, a metal body annular portion 527b, and a terminal annular portion 527c. Note that the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c may have portions that are integrally formed with each other.

[0121] The element annular portion 527a has a shape that extends annularly along the outer shapes of the semiconductor elements 40H and 40L and surrounds the semiconductor elements 40H and 40L. That is, the element annular portion 527a has a shape that extends rectangularly along the outer shape of the non-contact portion 528 at the bonding portion with the semiconductor element 40. In the region where two semiconductor elements 40H are arranged in the P wiring 54, a part of the two element annular portions 527a is integrally formed. Similarly, in the region where two semiconductor elements 40L are arranged in the relay wiring 55, a part of the two element annular portions 527a is integrally formed.

[0122] The metal body annular portion 527b is shaped to extend annularly along the outer shape of the surface metal body 52. That is, the metal body annular portion 527b is shaped to extend annularly along the outer shape of each of the P wiring 54 and the relay wiring 55. The metal body annular portion 527b along the outer shape of the P wiring 54 surrounds all the low adhesion portions 527p on the P wiring 54. The metal body annular portion 527b along the outer shape of the relay wiring 55 surrounds all the low adhesion portions 527p on the relay wiring 55.

[0123] The terminal annular portion 527c is shaped to extend annularly along the outer shape of the portion of the surface metal body 52 to which the power terminal 91 and the output terminal 92 are connected, and surrounds the terminal connection portion. That is, the terminal annular portion 527c is shaped to surround the extension portion 542 and the extension portion 552. Note that a part of the terminal annular portion 527c is integrally formed with a part of the metal body annular portion 527b. A part of the terminal annular portion 527c is integrally formed with a part of the element annular portion 527a.

[0124] The low adhesion portions 527p are arranged inside each of the annular portions so as to be surrounded by the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c. On the D-side substrate 50, the area of the high adhesion portion is smaller than the area of the low adhesion portion 527p. That is, the total area of the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c is smaller than the area of the low adhesion portion 527p. Also, it can be said that in the P wiring 54, the area of the high adhesion portion is smaller than the area of the low adhesion portion 527p. In the relay wiring 55 as well, it can be said that the area of the high adhesion portion is smaller than the area of the low adhesion portion 527p.

[0125] The high adhesion portions are arranged between portions of the surface metal body 52 having different potentials (between different potentials). That is, the P wiring 54 and the relay wiring 55 correspond to portions having different potentials. And, among the metal body annular portion 527b surrounding the P wiring 54, the portion facing the relay wiring 55 corresponds to the high adhesion portion arranged between different potentials. Also, among the metal body annular portion 527b surrounding the relay wiring 55, the portion facing the P wiring 54 also corresponds to the high adhesion portion arranged between different potentials.

[0126] <Adhesive portion of the S-side substrate> As shown in FIGS. 9 and 18, also in the substrate 60 on the S side, similar to the substrate 50 on the D side, it is divided into an adhesive portion 627 and a non-adhesive portion 628. The adhesive portion 627 is a region that contacts and adheres to the sealing body 30, and the non-adhesive portion 628 is a region that does not contact the sealing body 30. The portion surrounded by the dotted line in FIG. 18 indicates the non-adhesive portion 628. Specifically, the bonding portions of the surface metal body 62 with the semiconductor element 40, the N terminal 91N, and the arm connection portion 80 correspond to the non-adhesive portion 628.

[0127] In the adhesive portion 627 of the substrate 60 on the S side, a high-adhesion portion with an enhanced adhesion degree to the sealing body 30 and a low-adhesion portion 627p with a lower adhesion degree to the sealing body 30 compared to the high-adhesion portion are formed. Similar to the substrate 50 on the D side, since the surface roughness of the high-adhesion portion is rougher than that of the low-adhesion portion 527p, the adhesive force with the sealing body 30 is higher in the high-adhesion portion.

[0128] The high-adhesion portion includes a metal body annular portion 627b. The metal body annular portion 627b has a shape that extends annularly along the outer shape of the surface metal body 62. That is, the metal body annular portion 627b has a shape that extends annularly along the outer shapes of the N wiring 64 and the relay wiring 65 respectively. The metal body annular portion 627b along the outer shape of the N wiring 64 surrounds all the low-adhesion portions 627p on the N wiring 64. The metal body annular portion 627b along the outer shape of the relay wiring 65 surrounds all the low-adhesion portions 627p on the relay wiring 65.

[0129] The metal body annular portion 627b also functions as an element annular portion surrounding the semiconductor elements 40H and 40L. The metal body annular portion 627b also functions as a terminal annular portion surrounding the power supply terminal 91 among the surface metal body 62. Note that although the metal body annular portion 627b has a linearly extending shape, the opposing linear portions in the annular shape may be adjacent to form a single line. For example, when the separation distance between the opposing linear portions is short, such as in the portion surrounding the extension portion 641, the two lines may be in contact with each other to form a single line.

[0130] The high-adhesion portion is disposed between portions of the surface metal body 62 having different potentials (between different potentials). That is, the N wiring 64 and the relay wiring 65 correspond to portions having different potentials. And, among the metal body annular portions 627b surrounding the N wiring 64, the portion facing the relay wiring 65 corresponds to the high-adhesion portion disposed between different potentials. Also, among the metal body annular portions 627b surrounding the relay wiring 65, the portion facing the N wiring 64 also corresponds to the high-adhesion portion disposed between different potentials.

[0131] <Exposed facing portion> As shown in FIGS. 18 and 19, a portion of the S-side substrate 60 (one substrate) where the insulating base material 61 is exposed without the surface metal body 62 being provided is called an exposed portion 61a. As shown in FIGS. 17 and 19, among the surface metal body 52 of the D-side substrate 50 (the other substrate), the portion facing the exposed portion 61a is called an exposed facing portion 52a. The region surrounded by the dashed-dotted line shown in FIG. 19 indicates the exposed facing portion 52a of the relay wiring 55. The exposed portion 61a corresponding to the exposed facing portion 52a of the relay wiring 55 is the portion between the N wiring 64 and the relay wiring 65 in the insulating base material 61.

[0132] Note that illustration of the exposed facing portion of the P wiring 54 is omitted. Also, the S-side substrate 60 corresponds to one of the first substrate and the second substrate, and the D-side substrate 50 corresponds to the other of the first substrate and the second substrate. Note that also in the D-side substrate 50, there is an exposed portion where the insulating base material 51 is exposed. Also in the S-side surface metal body 62, there is an exposed facing portion facing the exposed portion on the D side.

[0133] At least a part of the low-adhesion portion 527p of the D-side substrate 50 is formed in the exposed facing portion 52a. For example, the portion surrounded by the dashed-dotted line in FIG. 17 is the portion corresponding to the exposed facing portion 52a among the low-adhesion portion 527p. The area where the low-adhesion portion 527p is formed in the exposed facing portion 52a is larger than the area where the high-adhesion portion is formed in the exposed facing portion 52a.

[0134] In the exposed opposing portion of the surface metal body 52, basically, a low adhesion portion 527p is formed instead of a high adhesion portion. However, in the region between different potentials, there are exceptional portions where high adhesion portions are formed even in the exposed opposing portion. For example, in a linear region that extends annularly along the outer shape of the P wiring 54 or the relay wiring 55, and in the region between different potentials, and in the portion of the exposed opposing portion, a high adhesion portion is formed instead of the low adhesion portion 527p. That is, even in the region corresponding to the exposed opposing portion, priority is given to forming a high adhesion portion in the region between different potentials.

[0135] Also, in the region that extends annularly along the outer shape of the surface metal body 52, there are exceptional portions where high adhesion portions are formed even in the exposed opposing portion. For example, in a linear region that extends annularly along the outer shape of the P wiring 54 or the relay wiring 55, and in the portion of the exposed opposing portion, a high adhesion portion is formed instead of the low adhesion portion 527p. That is, even in the region corresponding to the exposed opposing portion, priority is given to forming the metal body annular portion 527b.

[0136] Also, in the region that extends annularly along the outer shape of the semiconductor elements 40H and 40L, there are exceptional portions where high adhesion portions are formed even in the exposed opposing portion. That is, even in the region corresponding to the exposed opposing portion, priority is given to forming the terminal annular portion 527c.

[0137] <Roughening of the high adhesion portion> The high adhesion portions on the D side and the S side described above are formed by the same method. In the following description, the high adhesion portion on the D side will be described, and the description will be applied to the high adhesion portion on the S side.

[0138] As shown in FIG. 20, the surface metal body 52 has a base material 521, a metal film 522 provided on the surface of the base material 521, and an uneven oxide film 520. The base material 521 forms the main part of the surface metal body 52. The base material 521 is formed using, for example, a Cu-based material. The metal film 522 is formed to contain a material with higher wettability to solder than the base material 521. Note that the portion of the base material 521 where the metal film 522 is not formed corresponds to the exposed portion described above. The uneven oxide film 520 is formed in the region of the high adhesion portion described above and provides the high adhesion portion.

[0139] The uneven oxide film 520 is formed by irradiating the metal film 522 with laser light. The metal film 522 has an underlying film mainly composed of Ni (nickel) and an upper film mainly composed of Au (gold). In this embodiment, an electroless Ni plating film containing P (phosphorus) is adopted as the underlying film. Among the metal film 522, the upper film (Au) of the portion where the uneven oxide film 520 is formed is removed by the irradiation of laser light when forming the uneven oxide film 520. The uneven oxide film 520 is a film of an oxide mainly composed of Ni.

[0140] The concave portion 523 on the surface of the metal film 522 is formed by irradiating the laser light with pulse oscillation. One concave portion 523 is formed for each pulse. The uneven oxide film 520 is formed by the surface layer portion of the metal film 522 melting, vaporizing, and depositing due to the irradiation of laser light. The uneven oxide film 520 is an oxide film derived from the metal film 522. The uneven oxide film 520 is a film of an oxide of the metal (Ni) which is the main component of the metal film 522. The uneven oxide film 520 is formed following the unevenness on the surface of the metal film 522 having the concave portion 523. On the surface of the uneven oxide film 520, unevenness is formed at a pitch finer than the width of the concave portion 523. That is, very fine unevenness (roughened portion) is formed.

[0141] Such an uneven oxide film 520 can be formed by the following steps. First, the surface metal body 52 having the metal film 522 formed on the base material 521 is irradiated with laser light with pulse oscillation to melt and evaporate the surface of the metal film 522.

[0142] At this time, by relatively moving the light source of the laser light and the surface metal body 52, the laser light is scanned and irradiated in order at a plurality of positions. By irradiating the laser light to melt and vaporize the surface of the metal film 522, recesses 523 are formed on the surface of the metal film 522. Among the metal film 522, the average thickness of the portion irradiated with the laser light becomes thinner than the average thickness of the portion not irradiated with the laser light. Further, the plurality of recesses 523 formed corresponding to the spots of the laser light are continuous and, for example, are in a scale shape. A spot is an irradiation range by one pulse. For example, the laser light is scanned so that the spots of the laser light adjacent in the X direction partially overlap and the spots of the laser light adjacent in the Y direction partially overlap.

[0143] Next, the melted portion of the metal film 522 is solidified. Specifically, the melted and vaporized metal film 522 is deposited on the portion irradiated with the laser light and its peripheral portion. Thus, by depositing the melted and vaporized metal film 522, an uneven oxide film 520 is formed on the surface of the metal film 522.

[0144] Since extremely fine irregularities are formed on the surface of the uneven oxide film 520 formed as described above, the sealing body 30 is entangled and an anchor effect occurs. Also, the contact area with the sealing body 30 increases. Therefore, the adhesive force of the surface metal body 52 to the sealing body 30 can be enhanced. A similar uneven oxide film is formed on the surface metal body 62 on the S side, and the adhesive force is enhanced.

[0145] Here, since the surface metal bodies 52 and 62 and the sealing body 30 have different coefficients of linear expansion with respect to temperature, there is a concern that the above-mentioned adhesion may be damaged and peeled off. Since the electrical insulation of air is inferior to that of the sealing body 30, at the location where peeling has occurred as described above, the electrical insulation of the surface metal bodies 52 and 62 decreases. As a result, there is a concern about the formation of an electrical leakage path between different potentials, such as between the P wiring 54 and the relay wiring 55, or between the N wiring 64 and the relay wiring 65. Further, when the peeled portion is an electrical connection portion such as solder, stress concentration may occur in the electrical connection portion, and there is a concern that distortion and damage may occur in the electrical connection portion. Therefore, in the present embodiment, peeling is suppressed by the high-adhesion portion, and the above concerns are eliminated.

[0146] <Effect regarding the high-adhesion portion> If, contrary to the present embodiment, all of the low-adhesion portions 527p and 627p are replaced with high-adhesion portions, the area to be roughened by the laser light increases, and the processing cost increases. In view of this point, in the present embodiment, in the adhesion portions that are the contact portions of the surface metal bodies 52 and 62 with the sealing body 30, in addition to the high-adhesion portions, low-adhesion portions 527p and 627p are also formed. Therefore, the processing cost can be significantly reduced as compared with the case where all of the adhesion portions are high-adhesion portions. Still, since the high-adhesion portions are arranged at the portions between different potentials of the surface metal bodies 52 and 62, peeling of the sealing body 30 between different potentials can be sufficiently suppressed. Therefore, the concern about the formation of a leakage path between different potentials can be sufficiently suppressed. As described above, according to the semiconductor device 20 according to the present embodiment, it is possible to achieve both reduction in manufacturing cost and improvement in reliability.

[0147] Furthermore, in the present embodiment, the high-adhesion portions include metal body annular portions 527b and 627b that extend annularly along the outer shapes of the surface metal bodies 52 and 62. According to this, even if peeling occurs inside the metal body annular portions 527b and 627b, the peeled portion will be surrounded by the metal body annular portions 527b and 627b where peeling has not occurred. Therefore, the concern about the formation of a leakage path from the peeled portion can be further reduced. Also, the concern about the formation of a leakage path between the surface metal body 52 and the back metal body 53 can be reduced.

[0148] Furthermore, in the present embodiment, the high-adhesion portion includes an element annular portion 527a that extends annularly along the outer shapes of the semiconductor elements 40H and 40L. According to this, it is possible to reduce the concern that stress concentration due to the above-described peeling occurs at the electrical connection portion (for example, solder) between the semiconductor elements 40H and 40L and the surface metal body 52. Therefore, it is possible to reduce the concern that distortion or damage occurs in the electrical connection portion of the semiconductor elements 40H and 40L.

[0149] Furthermore, in the present embodiment, the high-adhesion portion includes a terminal annular portion 527c that extends annularly so as to surround the connection portion between the surface metal body 52 and the external connection terminal 90. According to this, it is possible to reduce the concern that stress concentration due to the above-described peeling occurs at the electrical connection portion (for example, solder) between the external connection terminal 90 and the surface metal body 52. Therefore, it is possible to reduce the concern that distortion or damage occurs in the electrical connection portion of the external connection terminal 90.

[0150] Furthermore, in the present embodiment, the high-adhesion portion and the low-adhesion portion are formed on both the D-side substrate 50 (first substrate) and the S-side substrate 60 (second substrate). It is possible to further reduce the concern that a leakage path is formed between the D-side surface metal body 52 and the S-side surface metal body 62.

[0151] Furthermore, in the present embodiment, at least a part of the high-adhesion portion has a shape that extends annularly, and at least a part of the low-adhesion portions 527p and 627p is surrounded by the high-adhesion portion. According to this, even if peeling occurs in the low-adhesion portions 527p and 627p surrounded by the high-adhesion portion, the peeled portion will be surrounded by the high-adhesion portion where no peeling has occurred. Therefore, it is possible to further reduce the concern that a leakage path is formed from the peeled portion in the low-adhesion portions 527p and 627p.

[0152] Furthermore, in the present embodiment, the area of the high-adhesion portion on one substrate 50, 60 is smaller than the area of the low-adhesion portions 527p and 627p. Therefore, it is possible to promote the reduction of the processing cost required for forming the high-adhesion portion.

[0153] <Effect regarding the exposed facing portion> If, contrary to this embodiment, a highly adherent portion is formed over the entire exposed facing portion 52a, the following concerns arise. That is, due to the difference in the linear expansion coefficients of the sealing body 30 and the surface metal body 52, as the temperature changes, the contact surface of the sealing body 30 with the surface metal body 52 will be pulled by the surface metal body 52. If this contact surface is a highly adherent portion, the force with which the sealing body 30 is pulled by the surface metal body 52 will increase. This tensile force acts in the X direction as indicated by the arrow A in FIG. 19.

[0154] On the other hand, the contact surface of the sealing body 30 with the exposed portion 61a is pulled not only in the X direction but also in the Z direction as indicated by the arrow B in FIG. 19 due to the generation of the tensile force A. That is, a tensile force in the Z direction acts on the contact surface of the sealing body 30 with the exposed portion 61a as indicated by the arrow C. As a result, there is a concern of damage such as cracking occurring in the insulating base material 61. As a countermeasure, if the thickness dimension of the insulating base material 61 is increased to enhance the strength, the heat dissipation function of the substrate 60 will deteriorate.

[0155] In view of this point, in this embodiment, at least a part of the low-adhesion portion 527p is formed in the exposed facing portion 52a. Therefore, compared with the case where the entire exposed facing portion 52a is formed with a highly adherent portion, the tensile force A generated in the exposed facing portion 52a can be reduced, and the tensile force C acting on the exposed portion 61a can be reduced. Thus, the concern of cracking occurring in the insulating base material 61 can be reduced without increasing the thickness dimension of the insulating base material 61. That is, it is possible to suppress cracking damage without causing a deterioration in the heat dissipation function of the insulating base material 61.

[0156] Furthermore, in this embodiment, the area of the exposed facing portion 52a where the low-adhesion portion 527p is formed is larger than the area of the exposed facing portion 52a where the highly adherent portion is formed. Therefore, the reduction of the tensile force A generated in the exposed facing portion 52a can be made sufficiently large, and the effect of suppressing damage to the insulating base material 61 can be ensured sufficiently.

[0157] Furthermore, in the present embodiment, in the region between different potentials on the D-side substrate 50 (the other substrate), there is a portion where a highly adherent portion is formed even in the exposed facing portion 52a. Therefore, the above-described effect of suppressing the peeling of the sealing body 30 between different potentials at the highly adherent portion and suppressing the concern of forming a leakage path between different potentials is exhibited. However, since the entire exposed facing portion 52a is not formed as a highly adherent portion and at least a part thereof is formed as a low adherent portion 527p, the effect of suppressing damage to the insulating base material 61 is also exhibited.

[0158] Furthermore, in the present embodiment, in the region that extends annularly along the outer shape of the surface metal body 52 in the D-side substrate 50, there is a portion where a highly adherent portion is formed even in the exposed facing portion 52a. Therefore, even if peeling occurs inside the region surrounded by the metal body annular portion 527b, the above-described effect of reducing the concern of forming a leakage path from the peeling location by the metal body annular portion 527b is exhibited. However, since at least a part of the exposed facing portion 52a is formed as a low adherent portion 527p, the effect of suppressing damage to the insulating base material 61 is also exhibited.

[0159] Furthermore, in the present embodiment, in the region that extends annularly along the outer shapes of the semiconductor elements 40H and 40L in the D-side substrate 50, there is a portion where a highly adherent portion is formed even in the exposed facing portion 52a. Therefore, the above-described effect of reducing the concern of stress concentration occurring at the electrical connection portion between the semiconductor elements 40H and 40L and the surface metal body 52 is exhibited. However, since at least a part of the exposed facing portion 52a is formed as a low adherent portion 527p, the effect of suppressing damage to the insulating base material 61 is also exhibited.

[0160] (Second Embodiment) In the above-described first embodiment, the line widths of the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c are formed to be the same. In contrast, in the present embodiment, as shown in FIG. 21, the line width of the element annular portion 527a formed in the relay wiring 55 is made wider than the line widths of the metal body annular portion 527b and the terminal annular portion 527c.

[0161] However, in this embodiment, as a result of increasing the line width of the element annular portion 527a, the area of the high-adhesion portion in the exposed facing portion 52a increases. Therefore, from the perspective of reducing the area of the high-adhesion portion in the exposed facing portion 52a and improving the damage suppression effect of the insulating base material 61, it is desirable to form the entire element annular portion 527a so as not to overlap with the exposed facing portion 52a as in the first embodiment. Conversely, in contrast to this embodiment, the line width of the metal body annular portion 527b may be made thicker than the line width of the element annular portion 527a.

[0162] Further, in the first embodiment described above, the entire region between the element annular portion 527a and the metal body annular portion 527b in the relay wiring 55 is made into the low-adhesion portion 527p. In contrast, in this embodiment, as shown in FIG. 21, a non-annular portion 527d, which is a high-adhesion portion, is also formed in the region between the element annular portion 527a and the metal body annular portion 527b. In the example shown in FIG. 21, the entire non-annular portion 527d is formed so as not to overlap with the exposed facing portion 52a, but a part of the non-annular portion 527d may overlap with the exposed facing portion 52a. The non-annular portion 527d has a non-annular shape, and both ends of the non-annular portion 527d are connected to the metal body annular portion 527b.

[0163] Also, in the first embodiment described above, the sizes of the back surface metal body 53 and the front surface metal body 52 in plan view are the same. In contrast, in this embodiment, the back surface metal body 53 is larger than the front surface metal body 52, and the entire outer edge of the back surface metal body 53 protrudes from the front surface metal body 52 in plan view. As described above, in this embodiment, the line width of the annular portion is arbitrarily set, and the non-annular portion 527d is provided. And the other configurations are the same as those in the first embodiment. Therefore, the same effects as those in the first embodiment are exhibited also in this embodiment.

[0164] (Third Embodiment) In this embodiment, as shown in FIG. 22, although the element annular portion 527a is formed, the metal body annular portion 527b, the terminal annular portion 527c, and the non-annular portion 527d are abolished. Note that the element annular portion 527a, the terminal annular portion 527c, and the non-annular portion 527d may be abolished while forming the metal body annular portion 527b. According to this embodiment, compared with the first and second embodiments, the area of the high-adhesion portion in the surface metal body 52 can be reduced. Therefore, the processing cost of roughening by a laser or the like can be further reduced.

[0165] (Fourth Embodiment) In the first embodiment described above, instead of forming the low-adhesion portion 527p over the entire exposed facing portion 52a, the metal body annular portion 527b is formed on a part of the exposed facing portion 52a. That is, priority is given to exerting the effect of the metal body annular portion 527b rather than reducing the area of the high-adhesion portion in the exposed facing portion 52a to improve the damage suppression effect on the insulating base material 61. In contrast, in this embodiment, as shown in FIG. 23, on the substrate 60 on the S side, the low-adhesion portion 627p is formed over the entire exposed facing portion 62a. That is, the low-adhesion portion 527p in the exposed facing portion 62a crosses the metal body annular portion 627b, making the metal body annular portion 627b non-annular.

[0166] As described above, in this embodiment, on the substrate 60 on the S side, the low-adhesion portion 627p is formed over the entire exposed facing portion 62a. Thereby, the area of the high-adhesion portion in the exposed facing portion 62a can be reduced, and the damage suppression effect on the exposed portion of the insulating base material 51 on the D side can be improved.

[0167] (Fifth Embodiment) Also in this embodiment, in the same manner as in the first embodiment described above, the portions of the surface metal bodies 52 and 62 that are not in contact with the insulating base materials 51 and 61 are divided into the adhesion portions 527 and 627 and the non-adhesion portions 528 and 628. The adhesion portions 527 and 627 are also referred to as the "contact portions" of the surface metal bodies 52 and 62 that are in contact with the sealing body 30. The adhesion portions 527 and 627 (contact portions) are divided into the high-adhesion portions and the low-adhesion portions 527p and 627p.

[0168] Here, the D-side surface of the semiconductor element 40 is connected to the surface metal body 52 via the bonding material 100. In contrast, the S-side surface of the semiconductor element 40 is connected to the surface metal body 62 via the bonding materials 101, 102, and the conductive spacer 70. And the entire D-side surface of the semiconductor element 40 is connected to the surface metal body 52. In contrast, although most of the S-side surface of the semiconductor element 40 is connected to the surface metal body 62, a part thereof is exposed without being connected to the conductive spacer 70. In this way, the portion of the semiconductor element 40 that is exposed from the conductive spacer 70 and the bonding material 101 is referred to as the element exposed portion 40a (see FIG. 24). The pad 40P described above is provided on the element exposed portion 40a.

[0169] More specifically, a resin protective film is formed on the surface of the semiconductor element 40. An example of the material of the protective film is polyimide (PI). This protective film is also formed on the element exposed portion 40a described above, and hereinafter, the surface of the element exposed portion 40a is referred to as the PI surface.

[0170] Among the surface metal bodies 52 and 62, the portion facing the semiconductor element 40 is referred to as the element facing portion 62b. However, for the S-side surface metal body 62, a conductive spacer 70 is interposed between it and the semiconductor element 40. Therefore, in the Z-direction view, the region where the surface metal body 62 overlaps with the conductive spacer 70 cannot be said to face the semiconductor element 40 and is not called the element facing portion. That is, for the S-side surface metal body 62, the portion facing the element exposed portion 40a is referred to as the element facing portion 62b. More specifically, the portion of the S-side surface metal body 62 that faces the PI surface of the semiconductor element 40 and the portion where the PI surface is projected in the Z direction onto the surface metal body 62 correspond to the element facing portion 62b.

[0171] Among the surface metal bodies 62, the portion between the dotted line L2 and the dashed-dotted line L3 in FIGS. 24 and 25 corresponds to the element facing portion 62b. Note that the portion surrounded by the dotted line L2 in FIG. 25 corresponds to the non-contact portion 628 described above. The dashed-dotted line L3 in FIG. 25 corresponds to the outer contour line of the semiconductor element 40. The element facing portion 62b is shaped to extend annularly around the semiconductor element 40. Since the element facing portion 62b is in contact with the sealing body 30, it is also the contact portion 627.

[0172] On the other hand, regarding the surface metal body 52 on the D side, there is no intervening substance between it and the semiconductor element 40, and the entire portion of the surface metal body 52 surrounded by the dashed-dotted line L3 corresponds to the element facing portion. However, on the surface metal body 52 on the D side, the entire D side surface of the semiconductor element 40 is joined to the surface metal body 52. Therefore, there is no contact portion 527 that is in close contact with the sealing body 30 on the element facing portion on the D side.

[0173] Here, in the following regions according to the first embodiment, there are portions where a highly adherent portion is formed even in the element facing portion 62b. That is, the region that extends annularly along the outer contour of the surface metal body 62, the region that extends annularly along the outer contour of the semiconductor element 40, and the region between different electric potentials. In contrast, in this embodiment, as shown in FIG. 25, the entire element facing portion 62b is the low adhesion portion 627p, and the formation of a highly adherent portion on the element facing portion 62b is prohibited even in the above regions.

[0174] <Effect regarding the element facing portion> If, contrary to this embodiment, a highly adherent portion is formed over the entire element facing portion 62b, the following concerns arise. That is, due to the difference in the linear expansion coefficients of the sealing body 30 and the surface metal body 62, with a change in temperature, the contact surface of the sealing body 30 with the surface metal body 62 will be pulled by the surface metal body 62. If this contact surface is a highly adherent portion, the force with which the sealing body 30 is pulled by the surface metal body 62 will increase. This tensile force acts in the X direction as indicated by the arrow A1 in FIG. 24.

[0175] On the other hand, the contact surface of the sealing body 30 with the element exposure portion 40a is pulled not only in the X direction but also in the Z direction as indicated by the arrow B1 in FIG. 24 due to the generation of the tensile force A1. That is, a tensile force in the Z direction acts on the contact surface of the sealing body 30 with the element exposure portion 40a as indicated by the arrow C1. As a result, the stress generated at the interface between the semiconductor element 40 and the sealing body 30 increases, the sealing body 30 peels off from the element exposure portion 40a, leading to a breakdown voltage failure of the semiconductor element 40.

[0176] In view of this point, in the present embodiment, a low adhesion portion 627p is formed in at least a part of the element facing portion 62b. Therefore, compared with the case where the entire surface of the element facing portion 62b is formed as a high adhesion portion, the tensile force A1 generated in the element facing portion 62b can be reduced, and the tensile force C1 acting on the element exposure portion 40a can be reduced. Thus, the risk of the sealing body 30 peeling off from the element exposure portion 40a can be reduced, and damage to the semiconductor element 40 can be suppressed. In particular, in the present embodiment, the formation of a high adhesion portion on the element facing portion 62b is prohibited, and the entire element facing portion 62b is the low adhesion portion 627p, so the effect of reducing the tensile force C1 is great.

[0177] More specifically, the portion of the surface metal body 62 on the S side that faces the PI surface of the semiconductor element 40 (element facing portion 62b) is a low adhesion portion 627p where roughening by a laser or the like is prohibited. Therefore, the interface between the element facing portion 62b and the sealing body 30 has a lower adhesion force than the high adhesion portion, so the tensile force A1 can be reduced, and thus the tensile force B1 can be reduced. As a result, the strain generated at the interface between the PI surface and the sealing body 30 can be reduced. Thereby, since the PI surface and the sealing body 30 are in close contact, the occurrence of a breakdown voltage failure of the semiconductor element 40 can be prevented.

[0178] <Effects of the First Embodiment Compared with the Present Embodiment> The effects of the semiconductor device 20 according to the first embodiment, as compared with the present embodiment, will be described. In the present embodiment, the formation of a highly adhered portion on the element facing portion 62b is prohibited. On the other hand, in the first embodiment described above, a part of the element facing portion 62b is a highly adhered portion. However, the area where the low adhered portion 627p is formed in the element facing portion 62b is larger than the area where the highly adhered portion is formed in the element facing portion 62b. Therefore, the reduction of the tensile force A1 generated in the element facing portion 62b can be made sufficiently large, and the effect of suppressing damage to the semiconductor element 40 can be sufficiently ensured.

[0179] Furthermore, in the first embodiment described above, as shown in FIG. 18, in the element facing portion 62b of the surface metal body 62, basically, a low adhered portion 627p is formed instead of a highly adhered portion. However, in the region between different potentials, there is an exception where a portion where a highly adhered portion is formed exists even in the element facing portion 62b. For example, in a linear region that extends annularly along the outer shape of the N wiring 64 or the relay wiring 65, and in the region between different potentials, and in the portion of the element facing portion, a highly adhered portion is formed instead of the low adhered portion 627p. That is, even in the region corresponding to the element facing portion 62b, priority is given to forming a highly adhered portion in the region between different potentials. Therefore, the above-described effect of suppressing the peeling of the sealing body 30 between different potentials at the highly adhered portion and suppressing the concern that a leakage path is formed between different potentials is exhibited. Nevertheless, since the entire element facing portion 62b is not formed as a highly adhered portion, and at least a part thereof is formed with a low adhered portion 627p, the effect of suppressing damage to the semiconductor element 40 is also exhibited.

[0180] Furthermore, in the first embodiment described above, as shown in FIG. 18, in a region that extends annularly along the outer shape of the surface metal body 62, exceptionally, there is a portion where a highly adherent portion is formed even in the element facing portion 62b. For example, in a linear region that extends annularly along the outer shape of the N wiring 64 or the relay wiring 65 and in the portion of the element facing portion 62b, a highly adherent portion is formed instead of the low adherent portion 627p. That is, even in the region corresponding to the element facing portion 62b, priority is given to forming the metal body annular portion 627b by the highly adherent portion. Therefore, even if peeling occurs inside the metal body annular portion 627b, the above-described effect that the risk of forming a leakage path from the peeled portion can be reduced by the metal body annular portion 627b is exhibited. Nevertheless, since the low adherent portion 627p is formed in at least a part of the element facing portion 62b, the effect of suppressing damage to the semiconductor element 40 is also exhibited.

[0181] (Other Embodiments) In each of the above embodiments, laser roughening is employed to form the highly adherent portion by roughening the surface roughness of the surface metal bodies 52 and 62. On the contrary, roughening plating, sandblasting, chemical solution treatment, etc. may be used for roughening treatment to form the highly adherent portion. Further, instead of forming the highly adherent portion by roughening treatment, the highly adherent portion may be formed by an adhesive or a tackifier.

[0182] In each of the above embodiments, the highly adherent portion is disposed over the entire region between different electric potentials on the substrates 50 and 60. On the contrary, a configuration in which the highly adherent portion is disposed in a part between different electric potentials may be employed. For example, in the example shown in FIG. 17, the boundary (exposed portion) between the P wiring 54 and the relay wiring 55 has a shape that extends linearly in the X direction. And the metal body annular portion 527b is disposed over the entire boundary. On the contrary, the metal body annular portion 527b may be changed to a non-annular shape, and the metal body annular portion 527b may be disposed in a part of the boundary.

[0183] In each of the above embodiments, at least a part of the high adhesion portion has a shape extending annularly, and at least a part of the low adhesion portions 527p and 627p is arranged to be surrounded by the high adhesion portion. In contrast, the annular portion of the high adhesion portion may be abolished.

[0184] In each of the above embodiments, the area of the high adhesion portion on one substrate 50, 60 is made smaller than the area of the low adhesion portions 527p and 627p, and most of it is the low adhesion portions 527p and 627p. In contrast, the area of the high adhesion portion may be made larger than the area of the low adhesion portions 527p and 627p, and most of it may be the high adhesion portion.

[0185] In each of the above embodiments, the area where the low adhesion portion 527p is formed among the exposed facing portions 52a is made larger than the area where the high adhesion portion is formed among the exposed facing portions 52a, and most of the exposed facing portions 52a is the low adhesion portion 527p. In contrast, the relationship between the above areas may be reversed, and most of the exposed facing portions 52a may be the high adhesion portion.

[0186] In each of the above embodiments, the substrates on which both the high adhesion portion and the low adhesion portion are to be formed are the D-side substrate 50 and the S-side substrate 60. In contrast, the above object may be either the D-side substrate 50 or the S-side substrate 60. In that case, for the other one, the high adhesion portion may be abolished and only the low adhesion portion may be formed, or the low adhesion portion may be abolished and only the high adhesion portion may be formed.

[0187] In each of the above embodiments, on the S-side substrate 50, the line widths of the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c are set to be smaller than the separation distance between the P wiring 54 and the relay wiring 55. In contrast, the above line widths may be larger than the above separation distance. Similarly, on the D-side substrate 60, the line width of the metal body annular portion 627b may be smaller or larger than the separation distance between the N wiring 64 and the relay wiring 65.

[0188] In each of the above embodiments, an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 is shown, but the present invention is not limited thereto. The present invention is also applicable to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected. Further, the back metal bodies 53 and 63 may be omitted, a heat dissipation gel having electrical insulation may be applied to the back surfaces of the insulating substrates 51 and 61, and a heat sink may be thermally connected to the heat dissipation gel.

[0189] In each of the above embodiments, an example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L is shown, but the present invention is not limited thereto. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. For example, the semiconductor device 20 may include only one semiconductor element 40.

[0190] In each of the above embodiments, the element facing portion 62b has a shape that extends annularly along the outer shape of the semiconductor element 40. On the other hand, the element facing portion 62b is not limited to being annular, and may have, for example, a shape that extends linearly along one side of the semiconductor element 40.

[0191] In each of the above embodiments, also on the S-side substrate 60, in the same manner as the D-side substrate 50, a high adhesion portion may be formed annularly along the outer shape of the semiconductor elements 40H and 40L. However, even in a region that extends along the outer shape of the semiconductor elements 40H and 40L, the exposed facing portion 62a and the element facing portion 62b may be the low adhesion portion 627p. Alternatively, even in the exposed facing portion 62a and the element facing portion 62b, priority may be given to forming a high adhesion portion annularly along the outer shape of the semiconductor elements 40H and 40L.

[0192] In each of the above embodiments, also on the S-side substrate 60, in the same manner as the D-side substrate 50, a high adhesion portion may be formed annularly along the outer shape of the semiconductor elements 40H and 40L. However, even in a region that extends along the outer shape of the semiconductor elements 40H and 40L, the exposed facing portion 62a and the element facing portion 62b may be the low adhesion portion 627p. Alternatively, even in the exposed facing portion 62a and the element facing portion 62b, priority may be given to forming a high adhesion portion annularly along the outer shape of the semiconductor elements 40H and 40L.

[0193] The configuration described in this embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, and other embodiments. Further, although this disclosure has been described based on examples, it is understood that this disclosure is not limited to such examples and structures. This disclosure also includes various modifications and variations within the equivalent scope. In addition, although various combinations and forms are shown in this disclosure, other combinations and forms that include only one element, more than one element, or less than one element thereof are also within the scope and spirit of this disclosure.

[0194] (Disclosure of Technical Ideas) This specification discloses a plurality of technical ideas described in a plurality of claims listed below. Some claims may be described in a multiple dependent form that alternatively cites a preceding claim in subsequent claims. Further, some claims may be described in a multiple dependent form that cites another multiple dependent form claim. The claims described in these multiple dependent forms define a plurality of technical ideas.

[0195] (Technical Idea 1) A semiconductor element (40) having main electrodes (40D, 40S) on both sides, A substrate (50, 60) having an insulating substrate (51, 61) and surface metal bodies (52, 62) disposed on the surface of the insulating substrate and electrically connected to the main electrodes, A sealing body (30) that seals at least a part of the substrate including the surface metal body and the semiconductor element, In the contact portion of the surface metal body with the sealing body, a high-adhesion portion (527a, 527b, 527c, 527d, 627b) with an increased degree of adhesion to the sealing body and a low-adhesion portion (527p, 627p) with a lower degree of adhesion to the sealing body than the high-adhesion portion are formed. The main electrodes include a first main electrode (40D) provided on the surface of the semiconductor element and a second main electrode (40S) provided on the back surface of the semiconductor element. The substrate includes a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode. In one of the first substrate and the second substrate, a portion where the insulating base material is exposed without the surface metal body provided thereon is defined as an exposed portion (61a), and in the surface metal body of the other substrate, a portion facing the exposed portion is defined as an exposed facing portion (52a). When A semiconductor device in which the low adhesion portion is formed on at least a part of the exposed facing portion.

[0196] (Technical idea 2) The semiconductor device according to Technical idea 1, wherein an area where the low adhesion portion is formed in the exposed facing portion is larger than an area where the high adhesion portion is formed in the exposed facing portion.

[0197] (Technical idea 3) In a region between portions having different potentials in the other substrate, there is a portion where the high adhesion portion is formed even in the exposed facing portion, according to the semiconductor device described in Technical idea 1 or 2.

[0198] (Technical idea 4) In a region that extends annularly along the outer shape of the surface metal body of the substrate, there is a portion where the high adhesion portion is formed even in the exposed facing portion, according to any one of the semiconductor devices described in Technical ideas 1 to 3.

[0199] (Technical idea 5) In a region that extends annularly along the outer shape of the semiconductor element in the substrate, there is a portion where the high adhesion portion is formed even in the exposed facing portion, according to any one of the semiconductor devices described in Technical ideas 1 to 4.

[0200] (Technical idea 6) A semiconductor element (40) having main electrodes (40D, 40S) on both sides, and A substrate (50, 60) having an insulating substrate (51, 61) and a surface metal body (52, 62) disposed on the surface of the insulating substrate and electrically connected to the main electrode; And a sealing body (30) that seals at least a part of the substrate including the surface metal body and the semiconductor element. In a contact portion of the surface metal body with the sealing body, a high-adhesion portion (527a, 527b, 527c, 527d, 627b) having an increased adhesion degree with the sealing body and a low-adhesion portion (527p, 627p) having a lower adhesion degree with the sealing body than the high-adhesion portion are formed. When a portion of the contact portion facing the semiconductor element is defined as an element-facing portion (62b), A semiconductor device in which the low-adhesion portion is formed in at least a part of the element-facing portion.

[0201] (Technical Idea 7) The semiconductor device according to Technical Idea 6, wherein an area of the element-facing portion where the low-adhesion portion is formed is larger than an area of the element-facing portion where the high-adhesion portion is formed.

[0202] (Technical Idea 8) The semiconductor device according to Technical Idea 6 or 7, wherein in a region between different potential portions of the substrate, there is a portion where the high-adhesion portion is formed even in the element-facing portion.

[0203] (Technical Idea 9) The semiconductor device according to any one of Technical Ideas 6 to 8, wherein in a region of the substrate that extends annularly along the outer shape of the surface metal body, there is a portion where the high-adhesion portion is formed even in the element-facing portion.

[0204] (Technical Idea 10) The semiconductor device according to any one of Technical Ideas 1 to 9, wherein at least a part of the high-adhesion portion is disposed between different potential portions of the substrate.

[0205] (Technical Idea 11) The semiconductor device according to technical idea 10, wherein the high adhesion portion includes a metal body annular portion (527b, 627b) that extends annularly along the outer shape of the surface metal body.

[0206] (Technical idea 12) The semiconductor device according to technical idea 10 or 11, wherein the high adhesion portion includes an element annular portion (527a) that extends annularly along the outer shape of the semiconductor element.

[0207] (Technical idea 13) An external connection terminal (90) for electrically connecting to an external device is connected to the surface metal body, The semiconductor device according to any one of technical ideas 10 to 12, wherein the high adhesion portion includes a terminal annular portion (527c) that extends annularly so as to surround a connection portion between the surface metal body and the external connection terminal.

[0208] (Technical idea 14) The main electrode includes a first main electrode (40D) provided on the surface of the semiconductor element and a second main electrode (40S) provided on the back surface of the semiconductor element, The substrate includes a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode, The semiconductor device according to any one of technical ideas 10 to 13, wherein the high adhesion portion and the low adhesion portion are formed on both the first substrate and the second substrate.

[0209] (Technical idea 15) At least a part of the high adhesion portion has an annularly extending shape, The semiconductor device according to any one of technical ideas 10 to 14, wherein at least a part of the low adhesion portion is surrounded by the high adhesion portion.

[0210] (Technical idea 16) The semiconductor device according to any one of technical ideas 10 to 15, wherein the area of the high adhesion portion on one substrate is smaller than the area of the low adhesion portion.

Description of reference numerals

[0211] 30 sealing body, 40 semiconductor element, 40D main electrode, 40D first main electrode, 40S main electrode, 40S second main electrode, 50 substrate, 50 first substrate, 51 insulating base material, 52 surface metal body, 527a, 527b, 527c, 527d high adhesion part, 527p low adhesion part, 52a exposed facing part, 60 substrate, 60 second substrate, 61 insulating base material, 61a exposed part, 62 surface metal body, 627b high adhesion part, 627p low adhesion part, 62b element facing part.

Claims

1. A semiconductor element (40) having main electrodes (40D, 40S) on both sides, a substrate (50, 60) having insulating substrates (51, 61) and surface metal bodies (52, 62) disposed on the surfaces of the insulating substrates and electrically connected to the main electrodes, and a sealing body (30) that seals at least a part of the substrate including the surface metal body and the semiconductor element, wherein in the contact portions of the surface metal bodies with the sealing body, high-adhesion portions (527a, 527b, 527c, 527d, 627b) with enhanced adhesion to the sealing body and low-adhesion portions (527p, 627p) with lower adhesion to the sealing body than the high-adhesion portions are formed, the main electrodes include a first main electrode (40D) provided on the surface of the semiconductor element and a second main electrode (40S) provided on the back surface of the semiconductor element, the substrate includes a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode, when a portion where the insulating substrate is exposed without the surface metal body is defined as an exposed portion (61a) in one of the first substrate and the second substrate, and a portion of the surface metal body of the other substrate that faces the exposed portion is defined as an exposed facing portion (52a), a semiconductor device in which at least a part of the exposed facing portion is formed with the low-adhesion portion.

2. The semiconductor device according to claim 1, wherein the area where the low-adhesion portion is formed in the exposed facing portion is larger than the area where the high-adhesion portion is formed in the exposed facing portion.

3. The semiconductor device according to claim 1 or 2, wherein in a region between portions having different potentials in the other substrate, there is a portion where the high-adhesion portion is formed even in the exposed facing portion.

4. The semiconductor device according to claim 1 or 2, wherein in a region that extends annularly along the outer shape of the surface metal body in the substrate, there is a portion where the high-adhesion portion is formed even in the exposed facing portion.

5. The semiconductor device according to claim 1 or 2, wherein in a region that extends annularly along the outer shape of the semiconductor element in the substrate, there is a portion where the high-adhesion portion is formed even in the exposed facing portion.

6. A semiconductor element (40) having main electrodes (40D, 40S) on both sides, A substrate (50, 60) having an insulating base material (51, 61) and a surface metal body (52, 62) disposed on the surface of the insulating base material and electrically connected to the main electrode. At least a part of the substrate including the surface metal body and a sealing body (30) for sealing the semiconductor element. In the contact portion of the surface metal body with the sealing body, a high adhesion portion (527a, 527b, 527c, 527d, 627b) with enhanced adhesion to the sealing body and a low adhesion portion (527p, 627p) with lower adhesion to the sealing body than the high adhesion portion are formed. When a portion of the contact portion facing the semiconductor element is defined as an element facing portion (62b). A semiconductor device in which the low adhesion portion is formed in at least a part of the element facing portion.

7. The semiconductor device according to claim 6, wherein an area of the element facing portion where the low adhesion portion is formed is larger than an area of the element facing portion where the high adhesion portion is formed.

8. The semiconductor device according to claim 6 or 7, wherein in a region between portions of the substrate having different potentials, there is a portion where the high adhesion portion is formed even in the element facing portion.

9. The semiconductor device according to claim 6 or 7, wherein in a region of the substrate extending annularly along the outer shape of the surface metal body, there is a portion where the high adhesion portion is formed even in the element facing portion.

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