System and method for scalable quantum computing

Abstract

To provide control and communicable coupling between devices.SOLUTION: A superconducting circuit includes four superconducting qubits communicatively coupled by a four-qubit even parity stabilizer. The four-qubit even parity stabilizer includes a superconducting stabilizer loop and four inductances, each inductance is inductively communicatively coupled to the inductance of each one of the four superconducting qubits. The four-qubit even parity stabilizer also includes a parity-enforcing superconducting qubit communicatively coupled to the superconducting loop. The quantum processor includes four Josephson parametric amplifiers communicatively coupled by the four-qubit even parity stabilizer. The Josephson parametric amplifiers include pairs of superconducting microwave resonators communicatively coupled by compound-compound Josephson junctions.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] Field The present disclosure generally relates to systems and methods for scalable quantum computing, and more particularly, to circuits for providing controllable and communicatively coupled connections between devices.

Background Art

[0002] Background Superconducting Processor A computer processor can take the form of a quantum processor, such as an analog processor, for example, a superconducting quantum processor. A superconducting quantum processor can include a number of qubits (e.g., two or more superconducting qubits) and associated local bias devices. Further details and embodiments of exemplary quantum processors that can be associated with and used in the present systems, methods, and apparatuses are described in U.S. Patent No. 7,533,068, U.S. Patent 8,195,596, U.S. Patent No. 8,190,548, and PCT Patent Application US / 2009 / 037984.

[0003] A superconducting processor can be a processor that is not intended for quantum computing and operates, for example, according to the principles governing the operation of a classical computer processor.

[0004] A computing system can typically include a quantum processor and / or a classical processor. The computing system can be a hybrid system that includes a quantum processor and a classical processor. In some implementations, at least one of the quantum processor and the classical processor is a superconducting processor.

[0005] Superconducting Qubit A superconducting quantum processor can include superconducting qubits. Superconducting qubits can be formed within a superconducting integrated circuit using superconducting materials (e.g., aluminum and / or niobium).

[0006] Superconducting qubits can be classified according to the physical properties used to encode information in the qubits. For example, superconducting qubits can be classified into charge qubits, flux qubits, and phase qubits. A charge qubit can store and manipulate information in the charged state of the qubit. A flux qubit can store and manipulate information in a variable related to the magnetic flux through a part of the qubit. A phase qubit can store and manipulate information in a variable related to the difference in superconducting phase between two regions of the qubit. Hybrid devices can use two or more of the charge, flux, and phase degrees of freedom.

[0007] Superconducting qubits typically include at least one Josephson junction. A Josephson junction is a small interruption in an otherwise continuous superconducting current path, usually realized by a thin insulating barrier sandwiched between two superconducting electrodes. A Josephson junction can be formed as a three-layer or "trilayer" structure. Superconducting qubits are further described, for example, in U.S. Patent No. 7,876,248, U.S. Patent No. 8,035,540, and U.S. Patent No. 8,098,179.

[0008] Some implementations of superconducting flux qubits include a superconducting loop (also referred to herein as a qubit loop) interrupted by at least one Josephson junction. Some implementations include a plurality of superconducting loops connected in series and / or in parallel with each other. Some implementations include a plurality of Josephson junctions connected in series or in parallel with each other.

[0009] A pair of Josephson junctions connected in parallel with each other is called a compound Josephson junction (CJJ). It is understood that the behavior of a CJJ can be modeled as a single effective Josephson junction in a manner similar to how the behavior of a plurality of resistors connected in parallel can be modeled as a single effective resistance.

[0010] A compound Josephson junction in which at least one of the constituent Josephson junctions is itself a compound Josephson junction is referred to in the present application as a compound-compound Josephson junction (CCJJ).

[0011] Hamiltonian description of a quantum processor According to some implementations of the present system and device, the quantum processor can be designed to perform adiabatic quantum computing and / or quantum annealing. A general Hamiltonian problem includes a first component proportional to a diagonal single-qubit term and a second component proportional to a diagonal multi-qubit term, and can be expressed, for example, as follows:

Equation

[0012] is an example of a diagonal single-qubit term, and the term σ i z is an example of a diagonal two-qubit term. The Hamiltonian can be physically realized, for example, by the implementation of superconducting qubits. i z σ j z is an example of a diagonal two-qubit term. The Hamiltonian can be physically realized, for example, by the implementation of superconducting qubits.

[0013] The foregoing examples of related art and limitations associated therewith are intended to be illustrative and thus not exclusive. Other limitations of the related art will become apparent to those skilled in the art upon reading this specification and studying the accompanying drawings.

Summary of the Invention

Means for Solving the Problems

[0014] Overview The superconducting circuit can be summarized as including a Josephson parametric amplifier, which includes a pair of superconducting resonators; a compound Josephson junction superconducting electrically communicably coupled between the pair of superconducting resonators; and a first control circuit communicably coupled to the compound Josephson junction.

[0015] In some implementations, the first control circuit is inductively communicably coupled to the compound Josephson junction.

[0016] In some implementations, the first control circuit includes an analog DC current bias communicably coupled to the compound Josephson junction of the Josephson parametric amplifier; a digital / analog converter (DAC) communicably coupled to the compound Josephson junction of the Josephson parametric amplifier; and a first microwave drive communicably coupled to a first tunable mutual inductance, the first tunable mutual inductance being communicably coupled to the compound Josephson junction of the Josephson parametric amplifier. In some implementations, the first tunable mutual inductance of the first control circuit is inductively communicably coupled to the compound Josephson junction of the Josephson parametric amplifier. In some implementations, the analog DC current bias and the DAC of the first control circuit are inductively communicably coupled to the compound Josephson junction of the Josephson parametric amplifier. In some implementations, the first tunable mutual inductance includes a superconducting loop blocked by the compound Josephson junction.

[0017] In some implementations, the first control circuit is operable to control the strengths of the X and Z terms of the effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, the second angular frequency being equal to the difference between twice the first angular frequency and a time-dependent detuning frequency.

[0018] In some implementations, the superconducting circuit further includes a second control circuit including a second microwave drive communicatively coupled to a second tunable mutual inductance, the second tunable mutual inductance being communicatively coupled to a compound Josephson junction of a Josephson parametric amplifier. In some implementations, the second control circuit is inductively communicatively coupled to the compound Josephson junction. In some implementations, the second tunable mutual inductance of the second control circuit is inductively communicatively coupled to a compound Josephson junction of a Josephson parametric amplifier. In some implementations, the second tunable mutual inductance includes a superconducting loop blocked by a compound Josephson junction.

[0019] In some implementations, each resonator of a pair of superconducting resonators is a superconducting microwave resonator. In some implementations, the superconducting microwave resonator is a coaxial transmission line resonator. In some implementations, the superconducting microwave resonator is a ladder circuit including a plurality of LC circuits electrically communicatively coupled in series with each other.

[0020] A method of operating a hybrid computing system can be summarized as including a digital processor, a superconducting circuit including at least one Josephson parametric amplifier, a resonant drive, and a parametric drive. The method includes setting, by the digital processor, a first angular frequency of the resonant drive; setting, by the digital processor, a second angular frequency of the parametric drive, the second angular frequency being equal to a difference between twice the first angular frequency and a detuning frequency; and controlling, by the digital processor, strengths of X and Z terms of an effective Hamiltonian of the superconducting circuit by changing the detuning frequency.

[0021] The superconducting circuit can be summarized as including first, second, third, and fourth superconducting qubits, and the first, second, third, and fourth qubits are communicatively coupled by a four-qubit even parity stabilizer. In some implementations, the four-qubit even parity stabilizer includes a superconducting stabilizer loop including a material that is superconducting below a first critical temperature; a first inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the first superconducting qubit; a second inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the second superconducting qubit; a third inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the third superconducting qubit; a fourth inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the fourth superconducting qubit; and a parity-enforcing superconducting qubit, and the parity-enforcing qubit is communicatively coupled to the superconducting loop.

[0022] In some implementations, each of the first, second, third, fourth, and parity-enforcing superconducting qubits is a superconducting flux qubit. In some implementations, each of the first, second, third, and fourth superconducting flux qubits includes a respective multiplexed composite Josephson junction. In some implementations, each of the first, second, third, and fourth superconducting flux qubits includes a respective superconducting qubit loop, and each superconducting qubit loop includes a material that is superconducting below a second critical temperature; each superconducting qubit loop includes a respective crossover. In some implementations, the parity-enforcing superconducting flux qubit is communicatively coupled to the superconducting loop by a fully electrochemical CJJ coupling device.

[0023] The quantum processor can be summarized as including first, second, third, and fourth Josephson parametric amplifiers, and the first, second, third, and fourth parametric amplifiers are communicatively coupled to each other by a 4-qubit even parity stabilizer. In some implementations, each of the first, second, third, and fourth Josephson parametric amplifiers includes a respective pair of superconducting microwave resonators, and each superconducting microwave resonator of each respective pair of superconducting microwave resonators is communicatively coupled to each other by a multiplexed Josephson junction. In some implementations, the 4-qubit even parity stabilizer includes a superconducting loop including a material that is superconducting below a critical temperature; a superconducting loop including a crossover; first, second, third, and fourth inductances of the superconducting loop, each of which is inductively communicatively coupled to the inductance of a respective Josephson parametric amplifier; and a parity enforcement Josephson parametric amplifier, the parity enforcement Josephson parametric amplifier being communicatively coupled to the superconducting loop. In some implementations, each of the first, second, third, and fourth Josephson parametric amplifiers includes a respective multiplexed Josephson junction and a respective first control circuit communicatively coupled to the respective multiplexed Josephson junction of each of the first, second, third, and fourth Josephson parametric amplifiers. Each respective first control circuit can be inductively communicatively coupled to the respective multiplexed Josephson junction of each of the first, second, third, and fourth Josephson parametric amplifiers.Each respective first control circuit may include an analog DC current bias communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers, a digital / analog converter (DAC) communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers, and each respective first microwave drive communicatively coupled to each respective first tunable mutual inductance communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each respective first tunable mutual inductance of each first control circuit may be inductively communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each respective analog DC current bias and each respective DAC of each first control circuit may be inductively communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each respective first tunable mutual inductance may include a superconducting loop blocked by a compound Josephson junction. Each respective first control circuit may be operable to control the strength of the X and Z terms of the effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, where the second angular frequency is equal to the difference between twice the first angular frequency and a time-dependent detuning frequency. Each of the first, second, third, and fourth Josephson parametric amplifiers may further include a respective second control circuit, and each respective second control circuit includes a respective second microwave drive communicatively coupled to a respective second tunable mutual inductance, and each respective second tunable mutual inductance is communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.Each respective second control circuit can be inductively communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each respective second tunable mutual inductance of each respective second control circuit can be inductively communicatively coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each respective second tunable mutual inductance can include a superconducting loop blocked by a compound Josephson junction. Each resonator of each pair of superconducting resonators of the first, second, third, and fourth Josephson parametric amplifiers can be a superconducting microwave resonator. Each of the superconducting microwave resonators within each pair of superconducting resonators of the first, second, third, and fourth Josephson parametric amplifiers can be a coaxial transmission line resonator. Each of the superconducting microwave resonators within each pair of superconducting resonators of the first, second, third, and fourth Josephson parametric amplifiers can be a ladder circuit including a plurality of LC circuits electrically communicatively coupled in series with each other.

[0024] Brief Description of Some of the Drawings In the accompanying drawings, the same reference numerals identify similar elements or acts. The dimensions and relative positions of the elements in the accompanying drawings are not necessarily drawn to scale. For example, the shapes and angles of the various elements are not necessarily drawn to scale, and some of these elements may be arbitrarily enlarged and positioned to improve the readability of the drawings. Further, the particular shapes of the elements depicted are not necessarily intended to convey any information regarding the actual shape of the particular element, and may be selected solely for ease of recognition in the accompanying drawings.

Brief Description of the Drawings

[0025]

Fig. 1A

Fig. 1B

Fig. 2

Fig. 3

Fig. 4

Fig. 5

Fig. 6

DETAILED DESCRIPTION

[0026] Detailed Description In the following description, several specific details are set forth in order to provide a thorough understanding of various disclosed implementations. However, one of ordinary skill in the art will recognize that the implementations may be practiced without one or more of these specific details, or with other methods, components, materials, etc. In other instances, well-known structures associated with computer systems, server computers, and / or communication networks have not been shown or described so as not to obscure the description of the implementations unnecessarily.

[0027] Unless the context requires otherwise, throughout the following specification and claims, the term "comprising" is synonymous with "including" and is inclusive or open-ended (i.e., it does not exclude additional, non-enumerated elements or method acts).

[0028] References to "one implementation" or "an implementation" throughout this specification mean that a particular feature, structure, or characteristic described in connection with that implementation is included in at least one implementation. Thus, appearances of the phrases "in one implementation" or "in an implementation" in various places throughout this specification are not necessarily all referring to the same implementation. Further, the particular features, structures, or characteristics may be combined in any suitable manner in one or more implementations.

[0029] As used in this specification and the appended claims, the singular forms of articles and indefinite articles include plural referents unless the context clearly dictates otherwise. It should also be noted that the term "or" is generally employed in the sense of "and / or" unless the context clearly dictates otherwise.

[0030] The headings and abstracts of the disclosure provided in this specification are for convenience only and do not interpret the scope or meaning of the implementations.

[0031] Scalable coupling Multi-qubit interactions can include two-local interactions. Multi-qubit interactions can also include k-local interactions, where k > 2.

[0032] One architecture suitable for quantum annealing is described, for example, in Lechner W. et al., A QUANTUM ANNEALING ARCHITECTURE WITH ALL-TO-ALL CONNECTIVITY FROM LOCAL INTERACTIONS, Sci. Adv. 2015;1:e1500838 (variously referred to herein as the LHZ architecture and the LHZ scheme). The direct implementation of a four-local coupling device (e.g., a non-linear coupling device that provides a communicable coupling between four logical qubits) can be challenging. For example, it can be found that the act of tuning qubit interactions by using a four-local coupling device is difficult, and the magnitude of the achievable interaction energy can actually be weaker than desired.

[0033] One approach for implementing a 4 - qubit even - parity stabilizer is to use one or more auxiliary qubits. Searching over the space of discretized two - local couplings and one - local biases can reveal configurations that give rise to the eight possible even - parity logical qubit states that are degenerate ground states.

[0034] FIG. 1A is a schematic diagram of an exemplary implementation of a 4 - qubit even - parity stabilizer 100a. The stabilizer 100a is an exemplary configuration of a 6 - qubit implementation of a 4 - qubit even - parity stabilizer.

[0035] The stabilizer 100a includes four logical qubits 102, 104, 106, 108. In some implementations, a logical qubit (e.g., one of the logical qubits 102, 104, 106, 108) includes two or more physical qubits and at least one communicable coupling device between the physical qubits.

[0036] The stabilizer 100a includes two auxiliary qubits 110, 112. The auxiliary qubits 110, 112 can contribute to performing even - parity.

[0037] The stabilizer 100a can be implemented by using two - local interactions that are either + 1 or - 1. The energy interval between the eight - fold degenerate ground state and the first excited state can take, for example, the value 2.

[0038] In FIG. 1A, ferromagnetic couplings between qubits are indicated by solid lines, and antiferromagnetic couplings between qubits are indicated by dashed lines.

[0039] The stabilizer 100a includes ferromagnetic (FM) couplings 114 between logical qubits 102 and 104, antiferromagnetic (AFM) couplings 116 between logical qubits 104 and 106, antiferromagnetic (AFM) couplings 118 between logical qubits 106 and 108, and an FM coupling 120 between logical qubits 108 and 102. The stabilizer 100a includes an FM coupling 122 between the auxiliary qubit 112 and the logical qubit 102, and AFM couplings 124, 126, and 128 between the auxiliary qubit 112 and each of the logical qubits 104, 106, and 108. The stabilizer 100a includes an FM coupling 130 between the auxiliary qubit 110 and the logical qubit 102, and AFM couplings 132, 134, and 136 between the auxiliary qubit 110 and each of the logical qubits 104, 106, and 108. The stabilizer 100a also includes an FM coupling 138 between the auxiliary qubits 110 and 112. The stabilizer 100a also includes an FM coupling 140 between the logical qubits 102 and 106.

[0040] FIG. 1B is a schematic diagram of another exemplary implementation of a 4-qubit even parity stabilizer 100b. The stabilizer 100b includes four logical qubits 142, 144, 146, and 148. The stabilizer 100b is a simpler implementation of the stabilizer 100a of FIG. 1A. In the stabilizer 100b, the auxiliary qubits 110 and 112 of FIG. 1A are replaced by a single auxiliary qubit 150.

[0041] In FIG. 1B, ferromagnetic couplings between qubits are indicated by solid lines, and antiferromagnetic couplings between qubits are indicated by dashed lines.

[0042] The stabilizer 100b includes ferromagnetic (FM) couplings 152 between logical qubits 142 and 144, antiferromagnetic (AFM) couplings 154 and 156 respectively between logical qubits 144 and 146 and between 146 and 148, and an FM coupling 158 between logical qubits 148 and 142. The stabilizer 100b includes an AFM coupling 160 between logical qubits 144 and 148 and an FM coupling 162 between logical qubits 142 and 146.

[0043] The stabilizer 100b includes an FM coupling 164 between the auxiliary qubit 150 and the logical qubit 142, and AFM couplings 166, 168, 170 between the auxiliary qubit 150 and the logical qubits 144, 146, 148 respectively.

[0044] In the exemplary implementation shown in FIG. 1B, the strengths of the couplings 164, 166, 168, 170 between the auxiliary qubit 150 and each of the logical qubits 142, 144, 146, 148 are respectively twice the strength of the couplings between the auxiliary qubits 110, 112 of FIG. 1A and the logical qubits 102, 104, 106, 108, and twice the strength of each of the couplings 152, 154, 156, 158, 160, 162 between the respective pairs of the logical qubits 142, 144, 146, 148.

[0045] The strength of the coupling is shown in FIG. 1B by the thickness of the line representing the coupling. For example, the line representing the coupling 164 is twice as thick as the line representing the coupling 152.

[0046] The interaction Hamiltonian of the stabilizer 100b in FIG. 1B can be expressed as follows:

Equation

[0047] Circuit having qubits and a 4 - qubit stabilizer A drawback of the LHZ architecture is that a practical implementation of the architecture may require high connectivity between logical qubits. For example, in a two - dimensional square lattice of logical qubits having 4 - qubit stabilizers (e.g., the stabilizer 100b of FIG. 1B), each logical qubit can be communicatively coupled to 4 nearest - neighbor qubits, 4 next - nearest - neighbor qubits, and 4 auxiliary qubits due to a total of 12 couplings per logical qubit.

[0048] There are several ways to reduce the required connectivity between logical qubits. Referring to FIG. 1B, the couplings between logical qubits 142, 144, 146, 148 and between the auxiliary qubit 150 and logical qubits 142, 144, 146, 148 can be symmetric in magnitude. If so, logical qubits 142, 144, 146, 148 and auxiliary qubit 150 can be communicatively coupled by a single linear coupling device to achieve anti-coupling.

[0049] FIG. 2 is a schematic diagram of an exemplary implementation of a circuit 200 including the four-qubit stabilizer 100b of FIG. 1B. In circuit 200, four logical qubits 202, 204, 206, 208 and an auxiliary qubit 210 are communicatively coupled by a single linear coupling device 212 to achieve anti-coupling.

[0050] Each of the logical qubits 202, 204, 206, 208 includes a superconducting loop 214, 216, 218, 220, respectively. Each of the superconducting loops 214, 216, 218, 220 includes a material that is superconducting below a critical temperature.

[0051] Each of the superconducting loops 214, 216, 218, 220 includes a crossover 222, 224, 226, 228, respectively. In the cross-shaped arrangement of circuit 200, the crossovers 222, 224, 226, 228 can change the sign of the interaction with logical qubit 202 relative to the sign of the interaction between logical qubits 204, 206, 208 and auxiliary qubit 210.

[0052] A superconducting loop topologically formed by a 180° out-of-plane rotation of a part of the superconducting loop is called a superconducting loop with a crossover in the present application. The current flowing through the superconducting loop on one side of the crossover flows in the clockwise direction around the loop, and the current flowing through the superconducting loop on the other side of the crossover flows in the counterclockwise direction around the loop. Two segments of superconducting loops crossing each other are electrochemically insulated from each other at the crossover.

[0053] The Hamiltonian interaction of the system can be expressed as follows: [Number] Assuming that the coupling device has linearity with sensitivity X1 c the permanent current operator of the coupling device can be expressed as follows: [Number] where [Number] is the permanent current operator of the i-th qubit. By combining these equations, the Hamiltonian interaction [Number] can be expressed as follows: [Number] The desired result can be achieved by selecting the following values: -M c1 = M c2 = M c3 = M c4 ≡ M cq > 0 and M cp │I p p │ = 2M cq │I q p │

[0054] Referring again to FIG. 2, each of the superconducting loops 214, 216, 218, 220 is blocked by a respective composite Josephson junction (CCJJ) 230, 232, 234, 236.

[0055] In the exemplary implementation of FIG. 2, the auxiliary qubit 210 (also referred to as a parity-executing qubit in this application) is communicatively coupled to the coupling device 212 by a fully electrochemical CJJ coupling device. In other implementations, the auxiliary qubit 210 is a different type of qubit. In other implementations, the auxiliary qubit 210 has a different form of communicative coupling to the coupling device 212.

[0056] For an explanation of the probe qubit, see for example U.S. Patent No. 10,068,180. For an explanation of the electrochemical CJJ coupling device, see for example International PCT Publication No. WO 2019 / 126396 A1.

[0057] The circuit 200 can be tiled to generate the LHZ architecture with only four (4) couplings per logical qubit.

[0058] A circuit using a 4-bit parity executor (such as the circuit 200 in FIG. 2) can have advantages over circuits using conventional 4-local interactions. For example, a 4-bit parity executor can be implemented by using a set of 2-local interactions configured to have a stronger effective 4-local interaction than conventional 4-local interactions.

[0059] Josephson parametric amplifier For example, a parametric amplifier, which is a device that amplifies a high-frequency input signal by sinusoidally changing the reactance of a circuit, is commonly used in the art. A degenerate parametric amplifier is a phase-sensitive amplifier that can amplify (at least in principle) one of the in-phase and quadrature components of a signal without introducing excess noise. The parametric amplifier can be based on the non-linear inductance of a Josephson junction. Applications of parametric amplifiers can include quantum-limited amplification in the field of quantum information processing using superconducting circuits.

[0060] A Josephson parametric amplifier may include a superconducting transmission line resonator terminated by a DC SQUID (Superconducting Quantum Interference Device).

[0061] In one approach, a pump (also called a drive in this application) is used to directly modulate the current through a Josephson junction. In another approach (see, for example, T. Yamamoto et al., FLUX-DRIVEN JOSEPHSON PARAMETRIC AMPLIFIER, arXiv: 0808.1386v), the pump is used to modulate the magnetic flux through a DC SQUID. The resonance frequency of the superconducting transmission line resonator can be controlled by the DC magnetic flux applied to the DC SQUID as well. Since the pump and the input signal are applied to various ports and the pump frequency is twice the resonance frequency, it can be very easy to separate the output signal from the pump.

[0062] FIG. 3 is a schematic diagram of an exemplary implementation of a Josephson parametric amplifier 300. The JPA 300 includes a superconducting transmission line resonator 302 terminated by a DC SQUID 304. A pump 306 is used to modulate the current through the DC SQUID 304.

[0063] An input signal 308 can be applied to a port 310 of the superconducting transmission line resonator 302. An output signal 312 can be provided at the port 310 of the superconducting transmission line resonator 302. The superconducting transmission line resonator 302 includes inductances 314a, 314b, 314c and capacitances 316a, 316b, 316c, and each pair of inductance and capacitance (for example, the pair formed by inductance 314a and capacitance 316a) forms an LC circuit. The superconducting transmission line resonator 302 may include additional LC circuits in series (not shown in FIG. 3).

[0064] The DC SQUID 304 includes a compound Josephson junction (CJJ) 318 (shown in FIG. 3 by using a dotted line). The CJJ 318 includes Josephson junctions 320a, 320b. Each of the Josephson junctions 320a, 320b may have its own capacitance (as shown in FIG. 3, but not mentioned in FIG. 3 for clarity).

[0065] The superconducting transmission line resonator 302 further includes a coupling capacitance 322.

[0066] Quantum annealing platform using JPA The Ising problem can be encoded within a network of two-photon driven Kerr nonlinear resonators (also referred to as KNRs in this application). A single Ising spin can be mapped to two coherent states with opposite phases that can constitute the two-fold degenerate eigenstates of a two-photon driven KNR in a frame rotating at the drive frequency.

[0067] In one circuit quantum electrodynamics (QED) implementation of a quantum annealer, the KNR is realized as a superconducting microwave resonator terminated by a flux pumping type SQUID (superconducting quantum interference device). The nonlinear inductance of the flux pumping type SQUID can induce Kerr nonlinearity, and the two-photon drive can be generated by flux pumping the flux pumping type SQUID at twice the resonance frequency of the superconducting microwave resonator.

[0068] Since the Josephson parametric amplifier (JPA) can be similarly realized as a superconducting microwave resonator terminated by a flux pumping type SQUID, in this context, the KNR can be considered equivalent to the JPA. In one implementation, the SQUID loop of the JPA is driven by a flux pump having a tunable amplitude and frequency.

[0069] In some circuit implementations, the network of KNRs can be constructed by using pair-wise couplings, but still requires only single-site drives.

[0070] While some of these optimization problems can be represented by using controllable long-range interactions between a number of Ising spins, they can be challenging problems to implement in hardware form. Long-range interactions refer to interactions between non-adjacent nodes of a problem graph in the present application. One approach is to use a method (referred to as the LHZ method in the present application) that can map an Ising problem onto a graph by local interactions only. For an explanation of the LHZ method, see, for example, Lechner W. et al., A QUANTUM ANNEALING ARCHITECTURE WITH ALL-TO-ALL CONNECTIVITY FROM LOCAL INTERACTIONS, Sci. Adv. 2015;1:e1500838.

[0071] The LHZ method can be implemented, for example, by embedding physical spins within the eigenbasis of two-photon driven KNR (the eigenbasis is a basis of a vector space consisting of eigenvectors). As described above, KNR can be realized as a superconducting microwave resonator terminated by a flux pumping type SQUID.

[0072] S. Puri et al., QUANTUM ANNEALING WITH ALL-TO-ALL CONNECTED NONLINEAR OSCILLATORS, Nature Communications (2017) describes an exemplary physical realization including four JPAs coupled by Josephson junctions (JJs). The non-linearity of the JJs can induce four-body coupling between the four JPAs.

[0073] A quantum annealing platform can be constructed, for example, from a group of four JPAs interacting via a single Josephson junction (JJ). Each JPA within the group can have a different resonance frequency with respect to the other three JPAs within the group. Each group of four JPAs and the coupling JJs are referred to as building blocks in the present application.

[0074] FIG. 4 is a schematic diagram of an exemplary implementation of a building block 400 that can be used to construct a quantum annealing platform. The building block 400 includes four JPAs 402, 404, 406, 408 communicatively coupled by JJ410.

[0075] JPA 402 includes two coupling capacitors 412, 414 and two resonators 416, 418 communicatively coupled by a composite Josephson junction (CJJ) 420. JPA 404 includes two coupling capacitors 422, 424 and two resonators 426, 428 communicatively coupled by a CJJ 430. JPA 406 includes two coupling capacitors 432, 434 and two resonators 436, 438 communicatively coupled by a CJJ 440. JPA 408 includes two coupling capacitors 442, 444 and two resonators 446, 448 communicatively coupled by a CJJ 450.

[0076] Circuit having JPAs and four qubit stabilizers The circuit 200 of FIG. 2 shows an implementation of an LHZ architecture using superconducting flux qubits, but JPAs can be used instead of superconducting flux qubits.

[0077] FIG. 5 is a schematic diagram of another exemplary implementation of a building block 500 that can be used to construct a quantum annealing platform. The building block 500 includes four JPAs 502, 504, 506, 508, and an auxiliary JPA 510 is communicatively coupled by a single linear coupling device 512 to realize an anti-coupling. The coupling device 512 includes a superconducting loop 514. The superconducting loop 514 includes a material that is superconducting below a critical temperature. The superconducting loop 514 includes a crossover 516.

[0078] JPA502 includes two resonators 518, 520 communicatively coupled by a compound superconducting Josephson junction (CCJJ) 522. JPA504 includes two resonators 524, 526 communicatively coupled by a CCJJ 528. JPA506 includes two resonators 530, 532 communicatively coupled by a CCJJ 534. JPA508 includes two resonators 536, 538 communicatively coupled by a CCJJ 540.

[0079] Coupling device 512 includes four inductive interfaces 542, 544, 546, 548, each inductively communicatively coupled to one of each of the four JPAs. Inductive interfaces 542, 544, 546, 548 are shown as transformers in the exemplary implementation of FIG. 5. Each transformer includes a pair of inductances (i.e., one inductance that interrupts superconducting loop 514 and another inductance electrically communicatively coupled between one of the resonators of the JPA (e.g., resonator 520 of JPA502) and one of the CCJJs of the JPA (e.g., CCJJ 522 of JPA502)). It may be beneficial to have an inductive coupling between coupling device 512 and each JPA at a location generally near the center of the JPA within the JPA (where each current profile is strongest or at least stronger).

[0080] In another embodiment, inductive interfaces 542, 544, 546, 548 include one inductance that interrupts superconducting loop 514 and another inductance of the inner conductor of a coaxial transmission line of one of the resonators (e.g., resonator 520 of JPA502).

[0081] Auxiliary JPA510 includes two resonators 550, 552 communicatively coupled by a compound superconducting Josephson junction (CCJJ) 554. In the exemplary implementation of FIG. 5, auxiliary JPA510 (also referred to herein as a parity enforcement JPA) is communicatively coupled to coupling device 512 by an inductive interface 556. In other implementations, auxiliary JPA510 has a different form of communicative coupling to coupling device 512.

[0082] Scalable JPA Control In order to realize a large-scale quantum annealing platform, it may be beneficial to implement a scalable JPA with a scalable control bias as described in this application. The systems and methods described in this application may also advantageously include replacing a single Josephson junction (e.g., JJ410 in FIG. 4) that couples the JPA by a composite Josephson junction (CJJ) or a composite composite Josephson junction (CCJJ) (including a pair of CJJs arranged in parallel with each other).

[0083] The CCJJ may be more robust to the presence of variations during fabrication and can be tuned to introduce junction asymmetry between the constituent CJJs as needed. Each CJJ of the CCJJ can be biased, for example, by a combination of an analog DC current bias and a bias supplied by a DAC (digital-to-analog converter).

[0084] The resonance frequency of the superconducting microwave resonator of the JPA can be tuned by using a combination of an analog DC current bias and a bias supplied by a DAC.

[0085] The systems and methods described in this application include a) a circuit operable to control the strength of the X and Z terms of the effective Hamiltonian, and b) a circuit operable to facilitate, for example, spectroscopic measurements of the JPA during calibration.

[0086] The systems and methods described in this application include scalable coupling of the JPA.

[0087] FIG. 6 is a schematic diagram of an exemplary implementation of a circuit 600 that includes a scalable JPA with a scalable control bias. The circuit 600 includes coupling capacitors 602, 604. The locations where the capacitors 602, 604 in the circuit 600 are coupled also indicate where other devices and / or circuits can be communicatively coupled to the circuit 600.

[0088] Circuit 600 includes JPA 606. JPA 606 includes resonators 608, 610 and a compound composite Josephson junction (CCJJ) 612. Both resonators 608, 610 are communicatively coupled to CCJJ 612. Each of resonators 608, 610 includes two or more respective LC circuits (e.g., LC circuit 614, only one is mentioned for clarity in FIG. 6) that are electrically communicatively coupled in series with each other. LC circuit 614 includes an inductance 616 and a capacitor 618 that is electrically communicatively coupled to ground terminal 620.

[0089] Circuit 600 includes a control circuit 622 (also referred to as CNTL-XZ 622 in the present application). CNTL-XZ 622 is at angular frequency ω p = 2ω r - δ0(t) and ω r and can be used to control the strength of the X and Z terms of the effective Hamiltonian via parametric drive and resonant drive, respectively. The function δ0(t) is referred to as a detuning function in the present application and can be a function of time. The detuning function can "detune" the resonator. For example, the resonator can be brought to a resonant state during annealing. The detuning function can define an annealing schedule. The detuning function can be a monotonic function or a non-monotonic function.

[0090] CJJ 220 of JPA 202 in FIG. 2 is advantageously replaced by CCJJ 612 in circuit 600 of FIG. 6. CCJJ 612 can be used to a) compensate for variations during the fabrication of the constituent Josephson junctions and b) intentionally introduce junction asymmetry as needed for the operation and / or calibration of circuit 600.

[0091] CCJJ 612 can be tuned by a combination of an analog DC current bias 624 by a first pair of inductive interfaces 626, 628 and a digital / analog converter (DAC) 630 by a second pair of inductive interfaces 632, 634.

[0092] The microwave drive 636 is communicatively coupled to the CCJJ 612 via a tunable mutual inductance 638. The tunable mutual inductance 638 includes a superconducting loop 640 interrupted by the CJJ 642. The tunable mutual inductance 638 has an inductive interface 644 to the microwave drive 636 and a third pair of inductive interfaces 646, 648 to the CCJJ 612.

[0093] In some implementations, each pair of the first pair of inductive interfaces 626, 628, the second pair of inductive interfaces 632, 634, and the third pair of inductive interfaces 646, 648 can be replaced by a respective single inductive interface (also referred to as a transformer in this application). The advantage of having a pair of inductive interfaces rather than a single inductive interface is that the pair of inductive interfaces can be mirror symmetric with respect to the CCJJ 612.

[0094] In some implementations, at least one pair of the first pair of inductive interfaces 626, 628, the second pair of inductive interfaces 632, 634, and the third pair of inductive interfaces 646, 648 is mirror symmetric with respect to the CCJJ 612. The mirror symmetry of the inductive interfaces in a pair of inductive interfaces can eliminate or at least reduce the magnitude of the unbalanced phase and / or the unintended bias.

[0095] The function of the tunable mutual inductance 638 is to facilitate device-by-device adjustment of the coupling strength between the microwave drive 636 and the target device. Device-by-device adjustment can advantageously be used to compensate for variations during fabrication and / or impedance mismatches. The tunable mutual inductance 638 can have a combination of an analog current bias applied to the CJJ 642 and a bias supplied by a DAC (not shown in FIG. 6).

[0096] Circuit 600 includes a control circuit 650 (also referred to as CNTL-X in this application). CNTL-X includes a microwave drive 652 inductively coupled via an interface 654 to a tunable mutual inductance 656 which is inductively coupled via an interface 658 to CCJJ612. The tunable mutual inductance 656 includes CJJ660. The tunable mutual inductance 656 may have a combination of an analog current bias applied to CJJ660 and a bias supplied by a DAC (not shown in FIG. 6).

[0097] The methods, processes, or techniques described above may be implemented by a series of processor-readable instructions stored on one or more non-transitory processor-readable media. Some examples of the methods, processes, or techniques described above may be performed in part by a special device such as an adiabatic quantum computer or a quantum annealer or a system (e.g., a computer including at least one digital processor) that programs or otherwise controls its operation. The methods, processes, or techniques described above may include various acts, but one of ordinary skill in the art will recognize that in alternative examples some acts may be omitted and / or additional acts may be added. One of ordinary skill in the art will recognize that the order of the acts shown is provided for illustrative purposes only and may vary in alternative examples. Some of the illustrative acts or operations of the methods, processes, or techniques described above are performed repeatedly. Some of the methods, processes, or techniques described above may be performed during each iteration, after a plurality of iterations, or at the end of all iterations.

[0098] The foregoing description of the disclosed implementations, including what is set forth in the abstract, is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Specific implementations and examples are described herein for illustrative purposes, but various equivalent modifications may be made without departing from the spirit and scope of the disclosure as recognized by one of ordinary skill in the art. The teachings provided herein in the context of various implementations may not necessarily apply to the exemplary methods of quantum computing generally described above, but may apply to other systems and methods of quantum computing.

[0099] The various implementations described above may be combined to provide other implementations. All of the U.S. Patent Application Publications, U.S. Patent Applications, foreign patents, and foreign patent applications, including but not limited to U.S. Patent Application Publication No. 63 / 001,014, filed Mar. 27, 2020, which are referenced herein and / or listed in the Application Data Sheet, are hereby incorporated by reference in their entirety.

[0100] These and other modifications may be made to the above-described implementations in light of the above detailed description. In general, in the following claims, the terms used should not be construed as limiting the claims to the specific implementations disclosed herein, but should be interpreted to include all possible implementations along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the present disclosure.

Claims

1. A superconducting circuit including a Josephson parametric amplifier, wherein the Josephson parametric amplifier includes: A pair of superconducting resonators; A compound Josephson junction coupled to be superconducting electrically communicable between the pair of superconducting resonators; and A superconducting circuit including a first control circuit communicably coupled to the compound Josephson junction.

2. The superconducting circuit according to claim 1, wherein the first control circuit is inductively communicably coupled to the compound Josephson junction.

3. The first control circuit includes: An analog DC current bias communicably coupled to the compound Josephson junction of the Josephson parametric amplifier; A digital / analog converter (DAC) communicably coupled to the compound Josephson junction of the Josephson parametric amplifier; and A first microwave drive communicably coupled to a first tunable mutual inductance, The superconducting circuit according to claim 1, wherein the first tunable mutual inductance is communicably coupled to the compound Josephson junction of the Josephson parametric amplifier.

4. The superconducting circuit according to claim 3, wherein the first tunable mutual inductance of the first control circuit is inductively communicably coupled to the compound Josephson junction of the Josephson parametric amplifier.

5. The superconducting circuit according to claim 3, wherein the analog DC current bias and the DAC of the first control circuit are inductively communicably coupled to the compound Josephson junction of the Josephson parametric amplifier.

6. The superconducting circuit according to claim 3, wherein the first tunable mutual inductance includes a superconducting loop blocked by a compound Josephson junction.

7. The first control circuit is operable to control the strengths of the X and Z terms of the effective Hamiltonian via a resonance drive at a first angular frequency and via a parametric drive at a second angular frequency, and the second angular frequency is equal to the difference between twice the first angular frequency and a time-dependent detuning frequency. The superconducting circuit according to claim 3.

8. The superconducting circuit further includes a second control circuit, the second control circuit includes a second microwave drive communicatively coupled to a second tunable mutual inductance, and the second tunable mutual inductance is communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier. The superconducting circuit according to claim 3.

9. The superconducting circuit according to claim 8, wherein the second control circuit is inductively communicatively coupled to the composite Josephson junction.

10. The superconducting circuit according to claim 8, wherein the second tunable mutual inductance of the second control circuit is inductively communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier.

11. The superconducting circuit according to claim 8, wherein the second tunable mutual inductance includes a superconducting loop blocked by a composite Josephson junction.

12. The superconducting circuit according to claim 1, wherein each resonator of the pair of superconducting resonators is a superconducting microwave resonator.

13. The superconducting circuit according to claim 12, wherein the superconducting microwave resonator is a coaxial transmission line resonator.

14. The superconducting circuit according to claim 12, wherein the superconducting microwave resonator is a ladder circuit including a plurality of LC circuits electrically communicatively coupled in series with each other.

15. A hybrid computing system including a digital processor and a superconducting circuit, the superconducting circuit including at least one Josephson parametric amplifier, a resonance drive, and a parametric drive. A method for operating a hybrid computing system, including: setting a first angular frequency of the resonance drive by the digital processor; setting a second angular frequency of the parametric drive by the digital processor, wherein the second angular frequency is equal to a difference between twice the first angular frequency and a detuning frequency; and controlling, by the digital processor, strengths of X and Z terms of an effective Hamiltonian of the superconducting circuit by changing the detuning frequency.

16. A superconducting circuit including first, second, third, and fourth superconducting qubits, wherein the first, second, third, and fourth qubits are communicatively coupled by a four-qubit even-parity stabilizer.

17. The four-qubit even-parity stabilizer includes a superconducting stabilizer loop including a material that is superconducting below a first critical temperature; a first inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the first superconducting qubit; a second inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the second superconducting qubit; a third inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the third superconducting qubit; a fourth inductance of the superconducting stabilizer loop inductively communicatively coupled to the inductance of the fourth superconducting qubit; and a parity-executing superconducting qubit communicatively coupled to the superconducting loop, the superconducting circuit according to claim 16.

18. The superconducting circuit according to claim 17, wherein each of the first, second, third, fourth, and parity-executing superconducting qubits is a superconducting flux qubit.

19. The superconducting circuit according to claim 18, wherein each of the first, second, third, and fourth superconducting flux qubits includes a respective multiplexed composite Josephson junction.

20. The superconducting circuit according to claim 18, wherein each of the first, second, third, and fourth superconducting flux qubits includes a respective superconducting qubit loop, each of the respective superconducting qubit loops including a material that is superconducting below a second critical temperature; and each superconducting qubit loop includes a respective intersection.

21. The superconducting circuit according to claim 18, wherein the parity-executing superconducting flux qubit is communicatively coupled to the superconducting loop by a fully electrochemical CJJ coupling device.

22. A quantum processor including first, second, third, and fourth Josephson parametric amplifiers, wherein the first, second, third, and fourth parametric amplifiers are communicatively coupled to each other by a four-qubit even parity stabilizer.

23. Each of the first, second, third, and fourth Josephson parametric amplifiers includes a respective pair of superconducting microwave resonators, and each superconducting microwave resonator of the respective pairs of superconducting microwave resonators is communicatively coupled to each other by a multiplexed composite Josephson junction. The quantum processor according to claim 22.

24. The four-qubit even parity stabilizer is A superconducting loop including a material that is superconducting below a critical temperature, the superconducting loop including a crossover; First, second, third, and fourth inductances of the superconducting loop, each of which is inductively communicatively coupled to the inductance of a respective Josephson parametric amplifier; and Including a parity enforcement Josephson parametric amplifier, The parity enforcement Josephson parametric amplifier is communicatively coupled to the superconducting loop. The quantum processor according to claim 22.

25. Each of the first, second, third, and fourth Josephson parametric amplifiers includes A respective multiplexed composite Josephson junction; and A respective first control circuit communicatively coupled to the respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. The quantum processor according to claim 23.

26. Each respective first control circuit is inductively communicatively coupled to the respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. The quantum processor according to claim 25.

27. Each respective first control circuit is: An analog DC current bias communicatively coupled to the respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers; A digital / analog converter (DAC) communicatively coupled to the respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers; and each including a respective first microwave drive communicatively coupled to a respective first tunable mutual inductance; The quantum processor according to claim 25, wherein each of the respective first tunable mutual inductances is communicatively coupled to a respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.

28. The quantum processor according to claim 27, wherein each of the respective first tunable mutual inductances of each of the respective first control circuits is inductively communicatively coupled to a respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.

29. The quantum processor according to claim 27, wherein each of the respective analog DC current biases and each of the DACs of each of the respective first control circuits is inductively communicatively coupled to a respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.

30. The quantum processor according to claim 27, wherein each of the respective first tunable mutual inductances includes a superconducting loop blocked by a composite Josephson junction.

31. The quantum processor according to claim 27, wherein each of the respective first control circuits is operable to control the strengths of the X and Z terms of the effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, the second angular frequency being equal to the difference between twice the first angular frequency and a time-dependent detuning frequency.

32. Each of the first, second, third, and fourth Josephson parametric amplifiers further includes a respective second control circuit, each of the respective second control circuits including a respective second microwave drive communicatively coupled to a respective second tunable mutual inductance, The quantum processor according to claim 27, wherein each of the respective second tunable mutual inductances is communicatively coupled to a respective multiplexed composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.

33. Each respective second control circuit is inductively communicably coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers, the quantum processor according to claim 32.

34. Each respective second tunable mutual inductance of each respective second control circuit is inductively communicably coupled to each respective compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers, the quantum processor according to claim 32.

35. Each respective second tunable mutual inductance includes a superconducting loop blocked by a compound Josephson junction, the quantum processor according to claim 32.

36. Each resonator of each pair of superconducting resonators of the first, second, third, and fourth Josephson parametric amplifiers is a superconducting microwave resonator, the quantum processor according to claim 23.

37. Each of each pair of the superconducting microwave resonators of the first, second, third, and fourth Josephson parametric amplifiers is a coaxial transmission line resonator, the quantum processor according to claim 36.

38. Each of each pair of superconducting microwave resonators of the first, second, third, and fourth Josephson parametric amplifiers is a ladder circuit including a plurality of LC circuits electrically communicably coupled in series with each other, the quantum processor according to claim 36.

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