Semiconductor device

Abstract

To reduce the stress acting on a bonding wire at a joint with a pad.SOLUTION: A semiconductor device 20 with a double-sided heat dissipation structure includes a semiconductor element 40 and substrates 50 and 60. The substrate 50 connected to a drain electrode 40D of the semiconductor element 40 includes a roughened portion 527 on the surface of a surface metal body 52. The substrate 60 connected to the source electrode 40S of the semiconductor element 40 includes a roughened portion 627 and a non-roughened portion 628 on the surface of the surface metal body 62. The non-roughened portion 628 is provided at least in a portion overlapping with a pad 40P in plan view. An encapsulant 30 adheres to the roughened portions 527 and 627 and does not adhere to the non-roughened portion 628.SELECTED DRAWING: Figure 123

Description

Technical Field

[0001] The disclosure in this specification relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device with a double-sided heat dissipation structure. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, a pair of DCB substrates are arranged so as to sandwich a semiconductor chip. DCB is an abbreviation for Direct Copper Bonding. Among the DCB substrates, the surface of the copper layer is roughened. And a sealing body is in close contact with the roughened portion. Thereby, peeling of the sealing body can be suppressed.

[0005] However, since the sealing body is in close contact with the copper layer, the sealing body is pulled by the deformed copper layer, and there is a problem that the stress acting on the bonding portion between the semiconductor chip pad and the bonding wire increases. The increase in stress causes, for example, cracks or breaks. From the above viewpoints, or from other viewpoints not mentioned, further improvements are required for the semiconductor device.

[0006] One disclosed object is to provide a semiconductor device capable of reducing the stress acting on the bonding portion with the pad in the bonding wire.

Means for Solving the Problems

[0007] The semiconductor device disclosed herein is a semiconductor element (40) having a first main electrode (40D) provided on one surface, a second main electrode (40S) provided on the back surface opposite to the one surface in the plate thickness direction, a signal pad (40P) provided at a position different from the second main electrode on the back surface, and a protective film (44) provided on the back surface and having openings for individually exposing the second main electrode and the pad; a first wiring member (50) disposed on the first main electrode side in the plate thickness direction and electrically connected to the first main electrode so as to enclose the semiconductor element in a plan view in the plate thickness direction; a second wiring member (60) disposed on the second main electrode side in the plate thickness direction and electrically connected to the second main electrode so as to enclose the semiconductor element in a plan view; a bonding wire (110) bonded to the pad; a sealing body (30) that seals the semiconductor element, at least a part of the first wiring member including the surface facing the semiconductor element, at least a part of the second wiring member including the surface facing the semiconductor element, and the bonding wire; and includes at least one of the first wiring member and the second wiring member has a contact portion (527, 570, 627) provided on the surface facing the semiconductor element and in close contact with the sealing body; the second wiring member is provided in a region that is continuous with the electrical connection portion between the semiconductor element and the semiconductor element and provides a flat surface together with the connection portion, and is provided in a portion that overlaps at least the pad in a plan view, and has a non-contact portion (628, 671) having a lower adhesion to the sealing body than the contact portion; the second wiring member has a non-contact portion and a contact portion provided at a position different from the non-contact portion on the surface facing the semiconductor element.

[0008] According to the disclosed semiconductor device, while having an adhered portion, a predetermined position is intentionally made a non-adhered portion. Specifically, at least the portion overlapping the pad on the opposing surface of the second wiring member, that is, the portion directly above the pad, is made a non-adhered portion. Thereby, even if the second wiring member is deformed due to heat of the semiconductor element or temperature change of the usage environment, it is possible to suppress the sealing body located above the joint portion between the pad and the bonding wire from being pulled. As a result, the stress acting on the joint portion can be reduced.

[0009] The plurality of disclosed aspects in this specification adopt different technical means to achieve their respective purposes. The claims and the reference numerals in parentheses described in this section exemplarily show the correspondence with the parts of the embodiments described later, and are not intended to limit the technical scope. The objects, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings.

Brief Description of the Drawings

[0010]

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Embodiments for Carrying Out the Invention

[0011] Hereinafter, a plurality of embodiments will be described with reference to the drawings. In each embodiment, the same reference numerals may be assigned to corresponding components, and redundant descriptions may be omitted. When only a part of the configuration is described in each embodiment, the configuration of other embodiments described previously can be applied to other parts of the configuration. In addition, not only the combinations of configurations explicitly shown in the description of each embodiment, but also the configurations of a plurality of embodiments can be partially combined with each other as long as there is no problem with the combination, even if not explicitly shown.

[0012] The semiconductor device of this embodiment is applied, for example, to a power conversion device of a moving body having a rotating electric machine as a drive source. The moving body is, for example, an electric vehicle such as a battery electric vehicle (BEV), a hybrid electric vehicle (HEV), a plug-in hybrid electric vehicle (PHEV), a flying body such as an electric vertical take-off and landing aircraft or a drone, a ship, a construction machine, or an agricultural machine. Hereinafter, an example applied to a vehicle will be described.

[0013] (First Embodiment) First, based on FIG. 1, the schematic configuration of the drive system 1 of the vehicle will be described.

[0014] (Drive System of Vehicle) As shown in FIG. 1, the drive system 1 of the vehicle includes a DC power source 2, a motor generator 3, and a power conversion device 4.

[0015] The DC power source 2 is a DC voltage source composed of a rechargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a driving source for the vehicle to travel, that is, as an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power source 2 and the motor generator 3.

[0016] (Power Conversion Device) Next, based on FIG. 1, the circuit configuration of the power conversion device 4 will be described. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of this embodiment includes a smoothing capacitor 5 and an inverter 6 which is a power conversion circuit.

[0017] The smoothing capacitor 5 mainly smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to the P line 7 which is the power supply line on the high potential side and the N line 8 which is the power supply line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative electrode of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel with the DC power supply 2.

[0018] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts the DC voltage into a three-phase AC voltage according to the switching control by a control circuit (not shown) and outputs it to the motor generator 3. Thereby, the motor generator 3 is driven to generate a predetermined torque. During the regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 receiving the rotational force from the wheels into a DC voltage according to the switching control by the control circuit and outputs it to the P line 7. Thus, the inverter 6 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0019] The inverter 6 is configured to include upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8 with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the corresponding phase winding 3a in the motor generator 3 via the output line 10. The inverter 6 has six arms. Each arm is configured to include a switching element. At least a part of each of the P line 7, the N line 8, and the output line 10 is constituted by a conductive member such as a bus bar.

[0020] In this embodiment, an n-channel type MOSFET 11 is adopted as the switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited. It may be one or a plurality. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0021] As an example, in this embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two MOSFETs 11 connected in parallel are connected to the P line 7. In the lower arm 9L, the sources of the two MOSFETs 11 connected in parallel are connected to the N line 8. The sources of the two MOSFETs 11 connected in parallel in the upper arm 9H and the drains of the two MOSFETs 11 connected in parallel in the lower arm 9L are connected to each other. The two MOSFETs 11 connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0022] A freewheeling diode 12 is connected in anti-parallel to each of the MOSFETs 11. The diode 12 may be a parasitic diode (body diode) of the MOSFET 11 or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. The upper and lower arm circuits 9 for one phase are provided by one semiconductor device 20. Details of the semiconductor device 20 will be described later.

[0023] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power supply 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-described upper and lower arm circuits 9. According to this configuration, step-up and step-down are possible. The power conversion device 4 may include a filter capacitor for removing power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0024] The power conversion device 4 may include a drive circuit for a switching element that constitutes the inverter 6 or the like. Based on a drive command from the control circuit, the drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm. By applying the drive voltage, the drive circuit drives the corresponding MOSFET 11, that is, turns it on and off. The drive circuit is sometimes referred to as a driver.

[0025] The power conversion device 4 may include a control circuit for the switching element. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates a drive command based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0026] Examples of the various sensors include a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as a drive command. The control circuit is configured to include, for example, a processor and a memory. PWM is an abbreviation for Pulse Width Modulation.

[0027] <Semiconductor device> Next, based on FIGS. 2 to 13, the semiconductor device will be described. FIG. 2 is a perspective view of the semiconductor device 20. FIG. 3 is a perspective view of the semiconductor device 20 similar to FIG. 2. FIG. 3 is a transmission view showing the internal structure. FIG. 4 is a plan view of the semiconductor device 20. FIG. 4 is a transmission view showing the internal structure. FIG. 5 is a cross-sectional view taken along line V-V of FIG. 4. FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. 4. FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 4. FIG. 8 is a cross-sectional view taken along line VIII-VIII of FIG. 4. FIG. 9 is an enlarged view of the region IX indicated by the dashed-dotted line in FIG. 8.

[0028] FIG. 10 is an exploded perspective view for explaining the semiconductor device 20. In FIG. 10, for convenience, the lead frame 94 is shown. FIG. 11 is a plan view showing a state where the semiconductor element 40 is mounted on the substrate 50. FIG. 12 is a plan view showing the circuit pattern of the surface metal body 52 on the substrate 50. FIG. 13 is a plan view showing the circuit pattern of the surface metal body 62 on the substrate 60.

[0029] Hereinafter, the thickness direction of the semiconductor element (semiconductor substrate) is defined as the Z direction. The direction in which the semiconductor elements constituting the upper arm 9H and the semiconductor elements constituting the lower arm 9L are arranged, which is orthogonal to the Z direction, is defined as the Y direction. The direction orthogonal to both the Z direction and the Y direction is defined as the X direction. Unless otherwise specified, the shape viewed from the Z direction in plan view, in other words, the shape along the XY plane defined by the X direction and the Y direction, is defined as the planar shape. The plan view from the Z direction may be simply referred to as the plan view. Also, the arrangement is not limited to the mounting surface, and in the case of an overlapping positional relationship in plan view, it may be referred to as the arrangement.

[0030] As shown in FIGS. 2 to 13, the semiconductor device 20 constitutes one of the above-described upper and lower arm circuits 9, that is, one-phase upper and lower arm circuit 9. The semiconductor device 20 includes a sealing body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90.

[0031] The encapsulation body 30 encapsulates a part of other elements constituting the semiconductor device 20. The remaining part of the other elements is exposed outside the encapsulation body 30. The encapsulation body 30 is made of, for example, resin. An example of the resin is an epoxy resin. The encapsulation body 30 is formed using the resin as a material, for example, by a transfer molding method. Such an encapsulation body 30 may be referred to as an encapsulation resin body, a molding resin, or a resin molded body. The encapsulation body 30 may be formed using, for example, a gel. The gel is filled (disposed) in, for example, the opposing regions of a pair of substrates 50 and 60.

[0032] As shown in FIGS. 2 to 4, the encapsulation body 30 has a substantially rectangular planar shape. The encapsulation body 30 has a front surface 30a as a surface forming the outer contour and a back surface 30b that is opposite to the front surface 30a in the Z direction. The front surface 30a and the back surface 30b are, for example, flat surfaces. Further, it has side surfaces that connect the front surface 30a and the back surface 30b. The side surfaces include two side surfaces 30c and 30d from which the external connection terminals 90 protrude. The side surface 30d is opposite to the side surface 30c in the X direction.

[0033] The semiconductor element 40 is formed by forming a switching element on a semiconductor substrate made of, for example, silicon (Si), a wide bandgap semiconductor having a wider bandgap than silicon, or the like. Examples of the wide bandgap semiconductor include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 40 may be referred to as a power element or a semiconductor chip.

[0034] The semiconductor element 40 of the present embodiment is formed by forming the above-described n-channel type MOSFET 11 on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical structure such that the main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), that is, the Z direction. The semiconductor element 40 has main electrodes of the switching element on both surfaces in its own thickness direction, that is, the Z direction. Specifically, as the main electrodes, it has a drain electrode 40D on one surface and a source electrode 40S on the back surface that is opposite to the one surface in the Z direction.

[0035] When the diode 12 is a parasitic diode, the source electrode 40S also serves as the anode electrode, and the drain electrode 40D also serves as the cathode electrode. The diode 12 may be formed on a chip different from the MOSFET 11. The drain electrode 40D is the main electrode (first main electrode) on the high potential side, and the source electrode 40S is the main electrode (second main electrode) on the low potential side. Hereinafter, the drain electrode 40D and the source electrode 40S may be denoted as the main electrodes 40D and 40S.

[0036] The semiconductor element 40 has a substantially rectangular planar shape. As shown in FIG. 11, the semiconductor element 40 has a pad 40P formed at a position different from the source electrode 40S on the back surface. The source electrode 40S and the pad 40P are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 40D is formed on substantially the entire surface of one side. The source electrode 40S is formed on a part of the back surface of the semiconductor element 40. In plan view, the drain electrode 40D has a larger area than the source electrode 40S.

[0037] The pad 40P is an electrode for signals. The pad 40P is electrically separated from the source electrode 40S. The pad 40P is formed at an end portion on the side opposite to the formation region of the source electrode 40S in the Y direction. The pad 40P includes a pad for the gate electrode.

[0038] The semiconductor device 20 includes a plurality of semiconductor elements 40 configured as described above. The configurations of the respective semiconductor elements 40 are common to each other. The plurality of semiconductor elements 40 include a semiconductor element 40H that constitutes the upper arm 9H and a semiconductor element 40L that constitutes the lower arm 9L. The semiconductor element 40H may be referred to as an upper arm element, and the semiconductor element 40L may be referred to as a lower arm element. Each of the semiconductor elements 40H and 40L is an arm element that constitutes one arm. The semiconductor device 20 of the present embodiment includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged side by side in the X direction. Similarly, the two semiconductor elements 40L are arranged side by side in the X direction. The semiconductor element 40H and the semiconductor element 40L are arranged side by side in the Y direction. The Y direction is a first direction orthogonal to the Z direction, which is the thickness direction of the semiconductor element 40. The X direction is a second direction orthogonal to the Z direction and the first direction (Y direction). The semiconductor device 20 has two columns along the Y direction formed by the semiconductor element 40H and the semiconductor element 40L.

[0039] Each semiconductor element 40 is arranged at substantially the same position as each other in the Z direction. The drain electrode 40D of each semiconductor element 40 faces the substrate 50. The source electrode 40S of each semiconductor element 40 faces the substrate 60.

[0040] The substrates 50 and 60 are arranged so as to sandwich the plurality of semiconductor elements 40 in the Z direction. The substrates 50 and 60 are arranged so that at least a part of them faces each other in the Z direction. The substrates 50 and 60 enclose all of the plurality of semiconductor elements 40 (40H, 40L) in plan view.

[0041] The substrate 50 is disposed on the drain electrode 40D side with respect to the semiconductor element 40. The substrate 60 is disposed on the source electrode 40S side with respect to the semiconductor element 40. The substrate 50 is electrically connected to the drain electrode 40D as will be described later and provides a wiring function. Similarly, the substrate 60 is electrically connected to the source electrode 40S and provides a wiring function. For this reason, the substrates 50 and 60 may be referred to as wiring substrates. The substrate 50 may be referred to as a drain substrate, and the substrate 60 may be referred to as a source substrate. The substrates 50 and 60 provide a heat dissipation function for dissipating the heat generated by the semiconductor element 40. For this reason, the substrates 50 and 60 may be referred to as heat dissipation members. Among the pair of substrates 50 and 60 sandwiching the semiconductor element 40 in the Z direction, the substrate 50 is the first substrate, and the substrate 60 is the second substrate.

[0042] The substrate 50 has a facing surface 50a facing the semiconductor element 40 and a back surface 50b which is a surface opposite to the facing surface 50a. The substrate 50 includes an insulating base material 51, a surface metal body 52, and a back surface metal body 53. The substrate 50 is a substrate in which the insulating base material 51 and the metal bodies 52 and 53 are laminated. The substrate 60 has a facing surface 60a facing the semiconductor element 40 and a back surface 60b which is a surface opposite to the facing surface 60a. The substrate 60 includes an insulating base material 61, a surface metal body 62, and a back surface metal body 63. The substrate 60 is a substrate in which the insulating base material 61 and the metal bodies 62 and 63 are laminated. In the substrate 50 which is the first substrate, the insulating base material 51 is the first insulating base material, the surface metal body 52 is the first surface metal body, and the back surface metal body 53 is the first back surface metal body. In the substrate 60 which is the second substrate, the insulating base material 61 is the second insulating base material, the surface metal body 62 is the second surface metal body, and the back surface metal body 63 is the second back surface metal body. Hereinafter, the surface metal bodies 52 and 62 and the back surface metal bodies 53 and 63 may be simply denoted as metal bodies 52, 53, 62, and 63.

[0043] The insulating substrate 51 electrically isolates the front surface metal body 52 and the back surface metal body 53. Similarly, the insulating substrate 61 electrically isolates the front surface metal body 62 and the back surface metal body 63. The insulating substrates 51 and 61 may be referred to as insulating layers. The materials of the insulating substrates 51 and 61 are resins or inorganic ceramic materials. As the resin, for example, epoxy resins, polyimide resins, etc. can be used. As the ceramic, for example, Al2O3 (alumina), Si3N4 (silicon nitride), etc. can be used. When the insulating substrates 51 and 61 are resins, the substrates 50 and 60 may be referred to as metal resin substrates. When the insulating substrates 51 and 61 are ceramics, the substrates 50 and 60 may be referred to as metal ceramic substrates.

[0044] In the case of the insulating substrates 51 and 61 using resin materials, in order to improve heat dissipation, insulation, etc., an inorganic filler (inorganic filling material) may be included in the resin. The linear expansion coefficient may be adjusted by adding the filler. As the filler, for example, Al2O3, SiO2 (silicon dioxide), AlN (aluminum nitride), BN (boron nitride), etc. can be used. The insulating substrates 51 and 61 may contain only one type of filler or multiple types of fillers.

[0045] Considering heat dissipation and insulation properties, in the case of resin-based materials, the thickness of each of the insulating substrates 51 and 61, that is, the length in the Z direction, is preferably about 50 μm to 300 μm. In the case of ceramic-based materials, the thickness of the insulating substrates 51 and 61 is preferably about 200 μm to 500 μm. In the Z direction, the surfaces of the insulating substrates 51 and 61 are the inner surfaces, that is, the surfaces on the semiconductor element 40 side, and the back surfaces, which are the surfaces opposite to the surfaces in the Z direction, are the outer surfaces. The insulating substrates 51 and 61 may have the same (identical) material composition or may be different from each other. In this embodiment, resin-based insulating substrates 51 and 61 are employed, and the material compositions are the same. The linear expansion coefficients of the insulating substrates 51 and 61 are adjusted to be approximately the same as that of the sealing body 30 by adding fillers to the resin. By adding fillers to the resin, the linear expansion coefficients of the insulating substrates 51 and 61 and the sealing body 30 are close to the values of the metals (Cu) constituting the metal bodies 52, 53, 62, and 63.

[0046] The metal bodies 52, 53, 62, and 63 are provided, for example, as metal plates or metal foils. The metal bodies 52, 53, 62, and 63 are formed using metals such as Cu or Al, which have good electrical conductivity and thermal conductivity, as materials. The thickness of each of the metal bodies 52, 53, 62, and 63 is, for example, about 0.1 mm to 3 mm. The front surface metal body 52 is disposed on the surface of the insulating substrate 51 in the Z direction. The back surface metal body 53 is disposed on the back surface of the insulating substrate 51. Similarly, the front surface metal body 62 is disposed on the surface of the insulating substrate 61 in the Z direction. The back surface metal body 63 is disposed on the back surface of the insulating substrate 61. The insulating substrates 51 and 61 are the surfaces facing the semiconductor element 40 in the Z direction. As shown in FIGS. 5 to 9 and the like, in this embodiment, the front surface metal body 52 is thicker than the back surface metal body 53. The front surface metal body 62 is thicker than the back surface metal body 63. The front surface metal body 52 on the drain electrode 40D side is thicker than the front surface metal body 62 on the source electrode 40S side. Instead of this configuration, the back surface metal bodies 53 and 63 may be made thicker than the corresponding front surface metal bodies 52 and 62. The thicknesses of the front surface metal body 52 and the back surface metal body 53 may be made substantially equal, or the thicknesses of the front surface metal body 62 and the back surface metal body 63 may be made substantially equal.

[0047] The surface metal bodies 52 and 62 are patterned. The surface metal bodies 52 and 62 provide wiring, that is, a circuit. For this reason, the surface metal bodies 52 and 62 may be referred to as a circuit pattern, a wiring layer, or a circuit conductor. The surface metal bodies 52 and 62 may have a plating film such as a Ni-based film or Au on the metal surface. Hereinafter, the pattern of the surface metal bodies 52 and 62 may be shown as a circuit pattern. The surface metal body 52 and the non-arrangement region of the surface metal body 52 on the surface of the insulating base material 51 form the opposing surface 50a of the substrate 50. Similarly, the surface metal body 62 and the non-arrangement region of the surface metal body 62 on the surface of the insulating base material 61 form the opposing surface 60a of the substrate 60.

[0048] For example, surface metal bodies 52 and 62 patterned into a predetermined shape by pressing, etching, or the like may be prepared and adhered to a laminate having a two-layer structure of insulating base materials 51 and 61 and back surface metal bodies 53 and 63 to form substrates 50 and 60. After forming a laminate having a three-layer structure of the surface metal bodies 52 and 62, the insulating base materials 51 and 61, and the back surface metal bodies 53 and 63, the surface metal bodies 52 and 62 may be patterned by cutting or etching.

[0049] As shown in FIG. 11 and the like, the surface metal body 52 has a P wiring 54 and a relay wiring 55. The P wiring 54 and the relay wiring 55 are electrically separated by a predetermined interval (gap). This gap is filled with the sealing body 30.

[0050] The P wiring 54 is connected to the P terminal 91P and the drain electrode 40D of the semiconductor element 40H, which will be described later. The P wiring 54 electrically connects the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 may be referred to as a positive electrode wiring or a high-potential power supply wiring. The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection portion 80, and the output terminal 92. The relay wiring 55 electrically connects the arm connection portion 80 and the drain electrode 40D of the semiconductor element 40L. The relay wiring 55 electrically connects the source electrode 40S of the semiconductor element 40H, the drain electrode of the semiconductor element 40L, and the output terminal 92. On the surface metal body 52 (first surface metal body), the P wiring 54 is the first power supply wiring, and the relay wiring 55 is the first relay wiring.

[0051] The P wiring 54 and the relay wiring 55 are arranged side by side in the Y direction. In the Y direction, the P wiring 54 is arranged on the side of the power supply terminal 91, and the relay wiring 55 is arranged on the side of the output terminal 92. In other words, the P wiring 54 is arranged at a position closer to the side surface 30c of the sealing body 30, and the relay wiring 55 is arranged at a position closer to the side surface 30d.

[0052] The P wiring 54 has a notch 540. The notch 540 opens in one of the four sides of a substantially rectangular plane with the X direction as the longitudinal direction. The notch 540 is provided substantially at the center in the X direction on the side facing the side surface 30c. The P wiring 54 has a base portion 541 and a pair of extending portions 542. The base portion 541 and the pair of extending portions 542 define the notch 540. The P wiring 54 has a substantially U-shaped (concave-shaped) plane.

[0053] The base portion 541 is a portion on the side of the relay wiring 55 rather than the notch 540 and the extending portion 542, and has a substantially rectangular plane. The base portion 541 overlaps the semiconductor element 40H in plan view. That is, the semiconductor element 40H is arranged on the base portion 541. The drain electrode 40D of the semiconductor element 40H is connected to the base portion 541.

[0054] The two extended portions 542 extend from the base portion 541 in the same direction as each other, specifically in the Y direction and toward the side surface 30c side of the sealing body 30. One of the extended portions 542 is continuous near one end of the base portion 541 in the X direction, and the other one is continuous near the other end of the base portion 541. Both ends of the U shape of the P wiring 54, that is, the ends on the side opposite to the base portion 541 in the two extended portions 542 are substantially at the same position in the Y direction. The pair of extended portions 542 sandwich the notch 540 in the X direction. The length in the Y direction is longer for the base portion 541 than the depth of the notch 540 and the extended portions 542.

[0055] The relay wiring 55 also has a notch 550. The notch 550 opens in one of the four sides of a substantially rectangular shape in plan view. The notch 550 is provided substantially at the center in the X direction on the side facing the side surface 30d. That is, in the surface metal body 52, a notch 540 is provided at one of the ends in the Y direction, and a notch 550 is provided at the other end.

[0056] The relay wiring 55 has a base portion 551 and a pair of extended portions 552. The base portion 551 and the pair of extended portions 552 define the notch 550. The relay wiring 55 has a substantially U shape (concave shape) in plan view. The base portion 551 is a portion on the P wiring 54 side rather than the notch 550 and the extended portions 552, and has a substantially rectangular shape in plan view. The base portion 551 overlaps the semiconductor element 40L in plan view. That is, the semiconductor element 40L is disposed on the base portion 551. The drain electrode 40D of the semiconductor element 40L is connected to the base portion 551.

[0057] The two extended portions 552 extend from the base portion 551 in the same direction as each other, specifically in the Y direction and toward the side surface 30d of the sealing body 30. One of the extended portions 552 is continuous near one end of the base portion 551 in the X direction, and the other one is continuous near the other end of the base portion 551. Both ends of the U-shaped relay wiring 55, that is, the ends of the two extended portions 552 on the side opposite to the base portion 551 are substantially at the same position in the Y direction. The pair of extended portions 552 sandwich the notch 550 in the X direction. In the Y direction, the base portion 551 is longer than the depth of the notch 550 and the extended portions 552.

[0058] On the other hand, as shown in FIGS. 10 and 13, the surface metal body 62 has an N wiring 64 and a relay wiring 65. The N wiring 64 and the relay wiring 65 are electrically separated by a predetermined interval (gap). This gap is filled with the sealing body 30.

[0059] The N wiring 64 is connected to the N terminal 91N and the source electrode 40S of the semiconductor element 40L, which will be described later. The N wiring 64 electrically connects the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The N wiring 64 may be referred to as an N wiring. The relay wiring 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. In the surface metal body 62 (second surface metal body), the N wiring 64 is a second power supply wiring, and the relay wiring 65 is a second relay wiring.

[0060] The N wiring 64 has a base portion 640 and a pair of extended portions 641. The N wiring 64 has a substantially U shape in plan view. The base portion 640 is arranged side by side with the relay wiring 65 in the Y direction. The base portion 640 is arranged on the side surface 30d side in the Y direction. The base portion 640 has a substantially rectangular shape in plan view with the X direction as the longitudinal direction. As shown in FIG. 15, the base portion 640 overlaps the semiconductor element 40L in plan view. That is, the semiconductor element 40L is arranged on the base portion 640. The source electrode 40S of the semiconductor element 40L is connected to the base portion 640.

[0061] The two extended portions 641 extend from the base portion 640 in the same direction as each other, specifically in the Y direction and toward the side surface 30c side of the sealing body 30. One of the extended portions 641 is continuous near one end of the base portion 640 in the X direction, and the other one is continuous near the other end of the base portion 640. Both end portions of the U shape of the N wiring 64, that is, the end portions of the two extended portions 641 on the side opposite to the base portion 640 are substantially at the same position in the Y direction.

[0062] The pair of extended portions 641 form both ends of the surface metal body 62 in the X direction. The pair of extended portions 641 are arranged near the end portion of the substrate 60. In a plan view, a part of each of the pair of extended portions 641 overlaps the P wiring 54. The length in the Y direction is longer for the extended portion 641 than for the base portion 640. The N wiring 64 also has a notch 642. The notch 642 opens in one of the four sides of a substantially rectangular shape in a plane with the Y direction as the longitudinal direction. The notch 642 is provided substantially at the center in the X direction on the side facing the side surface 30c. The base portion 640 and the pair of extended portions 641 define the notch 642.

[0063] As described above, the relay wiring 65 is arranged side by side with the N wiring 64, specifically the base portion 640, in the Y direction. In the Y direction, the relay wiring 65 is arranged at a position close to the side surface 30c of the sealing body 30, and the base portion 640 is arranged at a position close to the side surface 30d. The relay wiring 65 is arranged between the pair of extended portions 641 in the X direction. The relay wiring 65 is sandwiched by the pair of extended portions 641. The relay wiring 65 is arranged in the notch 642. The relay wiring 65 is arranged with a predetermined interval (gap) from the N wiring 64. In a plan view, a part of the relay wiring 65 overlaps the P wiring 54, and the other part overlaps the relay wiring 55.

[0064] As shown in FIG. 15, the relay wiring 65 overlaps the semiconductor element 40H in a plan view. That is, the semiconductor element 40H is disposed on the relay wiring 65. The source electrode 40S of the semiconductor element 40H is connected to the relay wiring 65. A more detailed example of the circuit pattern of the surface metal body 62 will be described later.

[0065] The back metal bodies 53 and 63 are electrically separated from the circuit including the semiconductor element 40 by the insulating substrates 51 and 61. The back metal bodies 53 and 63 may be referred to as metal base substrates. The heat generated by the semiconductor element 40 is transmitted to the back metal bodies 53 and 63 through the surface metal bodies 52 and 62 and the insulating substrates 51 and 61. The back metal bodies 53 and 63 provide a heat dissipation function. The back metal bodies 53 and 63 of the present embodiment are substantially rectangular in plan view, and their outer contour substantially coincides with the outer contour of the surface metal bodies 52 and 62. The back metal bodies 53 and 63 are so-called solid conductors disposed over substantially the entire back surface of the insulating substrates 51 and 61. As described above, since the coefficient of linear expansion of the insulating substrates 51 and 61 is adjusted by adding the filler, warping can be suppressed even if the patterns are changed on the front and back. Of course, the back metal bodies 53 and 63 may be patterned so as to coincide with the surface metal bodies 52 and 62 in a plan view.

[0066] The back metal bodies 53 and 63 of the present embodiment are disposed over substantially the entire back surface of the corresponding insulating substrates 51 and 61. In order to further enhance the heat dissipation effect, at least one of the back metal bodies 53 and 63 may be exposed from the sealing body 30. In the present embodiment, the back metal body 53 is exposed from one surface 30a of the sealing body 30, and the back metal body 63 is exposed from the back surface 30b. The exposed surface of the back metal body 53 is substantially flush with the one surface 30a. The exposed surface of the back metal body 63 is substantially flush with the back surface 30b. The back metal bodies 53 and 63 form the back surfaces 50b and 60b of the substrates 50 and 60.

[0067] The conductive spacer 70 provides a spacer function for ensuring a predetermined interval between the semiconductor element 40 and the substrate 60. For example, the conductive spacer 70 ensures a height for electrically connecting the corresponding signal terminal 93 to the pad 40P of the semiconductor element 40. The conductive spacer 70 is located in the middle of the electrical conduction and heat conduction paths between the source electrode 40S of the semiconductor element 40 and the substrate 60, and provides a wiring function and a heat dissipation function. The conductive spacer 70 contains a metal material such as Cu with good electrical conductivity and thermal conductivity. The conductive spacer 70 may have a plating film on its surface. The conductive spacer 70 is a columnar body with a substantially rectangular planar shape having substantially the same size as the source electrode 40S in plan view.

[0068] The conductive spacer 70 may be referred to as a terminal, a terminal block, or a metal block body. The semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor element 40. Specifically, it includes four conductive spacers 70. The conductive spacers 70 are individually connected to the semiconductor element 40.

[0069] The arm connection part 80 electrically connects the relay wirings 55 and 65. That is, the arm connection part 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connection part 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the Y direction. The arm connection part 80 is provided in the overlapping region of the relay wiring 55 and the relay wiring 65 in plan view. The arm connection part 80 of the present embodiment is configured to include a joint part 81 and a bonding material 103 described later.

[0070] The joint part 81 is a metal columnar body provided separately from the surface metal bodies 52 and 62. Such a joint part 81 may be referred to as a joint terminal. In the Z direction, the bonding material 103 is interposed between one end of the joint part 81 and the relay wiring 55, and the bonding material 103 is interposed between the other end and the relay wiring 65.

[0071] Instead, the joint part 81 may be integrally continuous with at least one of the surface metal bodies 52 and 62. That is, the joint part 81 may be provided integrally with the surface metal bodies 52 and 62 as part of the substrates 50 and 60. The arm connection part 80 may be configured without the joint part 81. That is, the arm connection part 80 may be configured to include only the bonding material 103.

[0072] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed using a metal material with good conductivity such as copper. The external connection terminal 90 is, for example, a plate material. The external connection terminal 90 may be referred to as a lead. The external connection terminal 90 includes a power supply terminal 91, an output terminal 92, and a signal terminal 93. The power supply terminal 91 includes a P terminal 91P and an N terminal 91N. The P terminal 91P, the N terminal 91N, and the output terminal 92 are main terminals electrically connected to the main electrodes of the semiconductor element 40. The signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0073] The power supply terminal 91 is the external connection terminal 90 electrically connected to the power supply lines 7 and 8 described above. The P terminal 91P is electrically connected to the positive electrode terminal of the smoothing capacitor 5. The P terminal 91P may be referred to as a positive electrode terminal or a high-potential power supply terminal. The P terminal 91P is connected to the P wiring 54 of the surface metal body 52. That is, the P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H that constitutes the upper arm 9H.

[0074] The P terminal 91P is connected near one end in the Y direction of the P wiring 54. The P terminal 91P extends in the Y direction from the connection part (joint part) with the P wiring 54 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30c. The semiconductor device 20 of the present embodiment includes two P terminals 91P. As shown in FIG. 11, one of the P terminals 91P is connected to one of the pair of extended parts 542, and the other one is connected to the other of the pair of extended parts 542. The P terminals 91P are arranged at positions close to the notches 540, that is, inward, in each of the extended parts 542 so as to be adjacent to the N terminals 91N in plan view. The two P terminals 91P are arranged side by side in the X direction. The two P terminals 91P are arranged at substantially the same position in the Z direction.

[0075] The N terminal 91N is electrically connected to the negative terminal of the smoothing capacitor 5. The N terminal 91N may be referred to as a negative terminal or a low-potential power supply terminal. The N terminal 91N is connected to the N wiring 64 of the surface metal body 62. That is, the N terminal 91N is connected to the source electrode 40S of the semiconductor element 40L constituting the lower arm 9L.

[0076] The N terminal 91N is connected near one end in the Y direction of the N wiring 64. The N terminal 91N extends in the Y direction from the joint part with the N wiring 64 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30c. The semiconductor device 20 includes two N terminals 91N. As shown in FIG. 15 etc., one of the N terminals 91N is connected to one of the pair of extended parts 641, and the other one is connected to the other of the pair of extended parts 641. The two N terminals 91N are arranged side by side in the Y direction. The two N terminals 91N are arranged at substantially the same position in the Z direction.

[0077] The two N terminals 91N are arranged outside the two P terminals 91P in the X direction. In a plan view, one of the N terminals 91N is arranged near one of the P terminals 91P, and the other one of the N terminals 91N is arranged near the other one of the P terminals 91P. The N terminal 91N and the P terminal 91P adjacent to each other in the X direction have their side surfaces facing each other in a part including the portion protruding from the sealing body 30.

[0078] The output terminal 92 is electrically connected to the winding 3a (stator coil) of the corresponding phase of the motor generator 3. The output terminal 92 may be referred to as an O terminal, an AC terminal, etc. As shown in FIGS. 3 and 7, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 on the substrate 50. That is, the output terminal 92 is connected to the connection point between the upper arm 9H and the lower arm 9L.

[0079] The output terminal 92 is connected near one end in the Y direction of the relay wiring 55. The output terminal 92 extends in the Y direction from the joint with the relay wiring 55 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30d. The semiconductor device 20 includes two output terminals 92. One of the output terminals 92 is connected to one of the pair of extended portions 552, and the other one is connected to the other one of the pair of extended portions 552. The two output terminals 92 are arranged side by side in the X direction. The two output terminals 92 are arranged at substantially the same position in the Z direction.

[0080] The signal terminal 93 is electrically connected to a drive circuit (driver) (not shown). The signal terminal 93H is electrically connected to the pad 40P of the semiconductor element 40H via a connection member such as a bonding wire 110. The number of the signal terminals 93H is not particularly limited. The signal terminal 93H may include at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 40H. The semiconductor device 20 of the present embodiment includes two signal terminals 93H. One of the signal terminals 93H is a terminal for the gate electrode. The pads 40P for the gate electrodes of the two semiconductor elements 40H are electrically connected to the signal terminal 93H for the gate electrode. The signal terminal 93H is disposed at a position overlapping the notch 540 of the P wiring 54 in a plan view. In the signal terminal 93H, the joint portion with the bonding wire 110 faces the insulating base material 51 instead of the surface metal body 52. The two signal terminals 93H are arranged side by side in the X direction.

[0081] The signal terminal 93H extends in the Y direction from the joint portion with the bonding wire 110 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30c. At least a part of the protruding portion of the signal terminal 93H extends in the same direction as the power supply terminal 91. The signal terminal 93H is disposed between the two P terminals 91P in the X direction. That is, the external connection terminals 90 protruding from the side surface 30c are arranged in the order of the N terminal 91N, the P terminal 91P, the two signal terminals 93H, the P terminal 91P, and the N terminal 91N in the X direction.

[0082] The signal terminal 93L is electrically connected to the pad 40P of the semiconductor element 40L via a connection member such as a bonding wire 110. The number of signal terminals 93L is not particularly limited. The signal terminal 93L may include at least a terminal for applying a driving voltage to the gate electrode of the semiconductor element 40L. The semiconductor device 20 of the present embodiment includes four signal terminals 93L. One of the signal terminals 93L is a terminal for the gate electrode. The pads 40P for the gate electrodes of two semiconductor elements 40L are electrically connected to the signal terminal 93L for the gate electrode. The signal terminal 93L is disposed at a position overlapping the notch 550 of the relay wiring 55 in a plan view. In the signal terminal 93L, the joint portion with the bonding wire 110 faces the insulating base material 51 instead of the surface metal body 52. The four signal terminals 93L are arranged side by side in the X direction.

[0083] The signal terminal 93L extends in the Y direction from the joint portion with the bonding wire 110 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30d. At least a part of the protruding portion of the signal terminal 93L extends in the same direction as the output terminal 92. The signal terminal 93L is disposed between the two output terminals 92 in the X direction. That is, the external connection terminals 90 protruding from the side surface 30d are arranged in the X direction in the order of the output terminal 92, the four signal terminals 93L, and the output terminal 92.

[0084] The drain electrode 40D of the semiconductor element 40 is joined to the surface metal body 52 via a joining material 100. The source electrode 40S of the semiconductor element 40 is joined to the conductive spacer 70 via a joining material 101. The conductive spacer 70 is joined to the surface metal body 62 via a joining material 102. The joint portion 81 is joined to the metal bodies 52 and 62 via a joining material 103. Among the external connection terminals 90, the P terminal 91P, the N terminal 91N, which are main terminals, and the output terminal 92 are joined to the corresponding surface metal bodies 52 and 62 via a joining material 104.

[0085] The bonding materials 100 to 104 are conductive bonding materials. For example, solder can be adopted as the bonding materials 100 to 104. An example of the solder is a multi-component lead-free solder containing Cu, Ni, etc. in addition to Sn. Instead of the solder, a sintered bonding material such as sintered silver may be used. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly bonded to the corresponding surface metal bodies 52, 62 without passing through the bonding material 104. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly bonded to the surface metal bodies 52, 62 by, for example, ultrasonic bonding, friction stir bonding, laser welding, etc. When the joint portion 81 is provided separately from the substrates 50, 60, the joint portion 81 may be directly bonded to the surface metal bodies 52, 62.

[0086] As described above, in the semiconductor device 20, a plurality of semiconductor elements 40 constituting one-phase upper and lower arm circuits 9 are sealed by the sealing body 30. The sealing body 30 integrally seals a part of each of the plurality of semiconductor elements 40, a part of the substrate 50, a part of the substrate 60, the plurality of conductive spacers 70, the arm connection portion 80, and the external connection terminal 90. The sealing body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 on the substrates 50, 60.

[0087] The semiconductor element 40 is disposed between the substrates 50, 60 in the Z direction. The semiconductor element 40 is sandwiched by the opposed substrates 50, 60. Thereby, the heat of the semiconductor element 40 can be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the substrate 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the substrate 60 is substantially flush with the back surface 30b of the sealing body 30. Since the back surfaces 50b, 60b are exposed surfaces, the heat dissipation performance can be enhanced.

[0088] <Manufacturing Method> Next, based on FIG. 10, an example of the manufacturing method of the semiconductor device 20 will be described. In FIG. 10, the substrates 50 and 60 are shown facing each other for easy understanding of the subsequent assembly.

[0089] First, prepare a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, a joint portion 81, and a lead frame 94. As shown in FIG. 10, the lead frame 94 is provided with external connection terminals 90. The lead frame 94 is formed by processing a metal plate such as pressing. The external connection terminals 90 are supported by an outer peripheral frame 94b via tie bars 94a.

[0090] Next, join (connect) the semiconductor element 40, the joint portion 81, and the external connection terminals 90 to the substrate 50. Also, join the conductive spacer 70 to the semiconductor element 40.

[0091] At this time, the lead frame 94 and the semiconductor element 40 are arranged on the substrate 50. Also, the conductive spacer 70 is arranged on the source electrode 40S of the semiconductor element 40. Regarding the lead frame 94, a part of each of the external connection terminals 90 is arranged so as to overlap the substrate 50 in a plan view. Specifically, the P terminal 91P and the N terminal 91N are arranged so as to overlap the P wiring 54 of the surface metal body 52, and the output terminal 92 is arranged so as to overlap the relay wiring 55. Also, the signal terminal 93H is arranged so as to overlap the insulating base material 51 exposed from the notch 540, and the signal terminal 93L is arranged so as to overlap the insulating base material 51 exposed from the notch 550.

[0092] Then, join the drain electrode 40D of the semiconductor element 40 and the surface metal body 52 with a joining material 100. Join the source electrode 40S and the conductive spacer 70 with a joining material 101. Join the joint portion 81 and the surface metal body 52 with a joining material 103. Join the P terminal 91P and the output terminal 92 and the surface metal body 52 with a joining material 104. For example, in the case of solder, the joining can be performed all at once by reflow. FIG. 10 shows this joined state.

[0093] Next, electrically connect the pad 40P of the semiconductor element 40H and the signal terminal 93H with a bonding wire 110. Similarly, electrically connect the pad 40P of the semiconductor element 40L and the signal terminal 93L with a bonding wire 110.

[0094] Next, the substrate 60 is joined (connected). The source electrode 40S of the semiconductor element 40 and the surface metal body 62 are joined via the joining material 102. The joint portion 81 and the surface metal body 62 are joined via the joining material 103. The N terminal 91N and the surface metal body 62 are joined via the joining material 104. For example, in the case of solder, the joining can be performed all at once by reflow.

[0095] Next, the encapsulation body 30 is molded by the transfer molding method. Although not shown, in this embodiment, the encapsulation body 30 is molded so as to completely cover the substrates 50 and 60, and cutting is performed after molding. The encapsulation body 30 is cut together with a part of the back surface metal bodies 53 and 63 of the substrates 50 and 60. Thereby, the back surfaces 50b and 60b are exposed. The back surface 50b is substantially flush with one surface 30a of the encapsulation body 30, and the back surface 60b is substantially flush with the back surface 30b. Note that the encapsulation body 30 may be molded in a state where the back surfaces 50b and 60b are pressed against and adhered to the cavity wall surface of the molding die. In this case, when the encapsulation body 30 is molded, the back surfaces 50b and 60b are exposed from the encapsulation body 30. Therefore, cutting after molding becomes unnecessary.

[0096] Next, in the lead frame 94, unnecessary portions such as the tie bar 94a and the outer peripheral frame 94b are removed. Thus, the semiconductor device 20 can be obtained.

[0097] <Positional relationship> Next, based on FIGS. 14 and 15, the positional relationship among the semiconductor element 40, the circuit patterns of the surface metal bodies 52 and 62, the arm connection portion 80, and the external connection terminals 90 connected to the circuit patterns will be described. FIG. 14 is a diagram showing the circuit pattern of the surface metal body 52, the semiconductor element 40, and the arrangement of the terminals. FIG. 15 is a diagram showing the circuit pattern of the surface metal body 62, the semiconductor element 40, and the arrangement of the terminals. In FIGS. 14 and 15, for the sake of convenience, only the external connection terminals 90 connected to the circuit patterns are illustrated. In FIG. 14, the arrangement region of the semiconductor element 40 is indicated by D so that the main electrode (drain electrode 40D) connected to the surface metal body 52 is easily distinguishable. Similarly, in FIG. 15, the arrangement region of the semiconductor element 40 is indicated by S so that the main electrode (source electrode 40S) connected to the surface metal body 62 is easily distinguishable.

[0098] The virtual line CL1 shown in FIG. 14 is a virtual line passing through the midpoints of the two semiconductor elements 40 that constitute one arm. The virtual line CL1 passes through the midpoint (center) in the arrangement direction of the two semiconductor elements 40 and extends in the Y direction. The virtual line CL1 is, for example, a line passing through the midpoints of the two semiconductor elements 40H. Instead of the semiconductor element 40H, it may be a line passing through the midpoints of the semiconductor elements 40L.

[0099] As shown in FIG. 14, the arrangements of the two semiconductor elements 40H are substantially line-symmetric with respect to the virtual line CL1. Similarly, the arrangements of the two semiconductor elements 40L are also substantially line-symmetric with respect to the virtual line CL1. Here, the term "substantially line-symmetric" allows for errors within the range of manufacturing variations. The circuit pattern of the surface metal body 52 is also substantially line-symmetric with respect to the virtual line CL1. That is, each of the P wiring 54 and the relay wiring 55 is substantially line-symmetric with respect to the virtual line CL1.

[0100] The arrangement of the arm connection portion 80 connected to the relay wiring 55 is also substantially line-symmetric with respect to the virtual line CL1. The arrangement of the external connection terminals 90 connected to the surface metal body 52 is also substantially line-symmetric with respect to the virtual line CL1. That is, the arrangements of the two P terminals 91P are also substantially line-symmetric with respect to the virtual line CL1. The arrangements of the two output terminals 92 are also substantially line-symmetric with respect to the virtual line CL1.

[0101] Similar to FIG. 14, FIG. 15 also shows a virtual line CL1. The arrangement of the semiconductor elements 40H and 40L is the same as that in FIG. 14. As shown in FIG. 15, the circuit pattern of the surface metal body 62 is also substantially line-symmetric with respect to the virtual line CL1. That is, each of the N wiring 64 and the relay wiring 65 is substantially line-symmetric with respect to the virtual line CL1. The arrangement of the arm connection portion 80 connected to the relay wiring 65 is also substantially line-symmetric with respect to the virtual line CL1, similar to FIG. 14. The arrangement of the two N terminals 91N, which are external connection terminals 90 connected to the surface metal body 62, is also substantially line-symmetric with respect to the virtual line CL1.

[0102] <Circuit pattern> Next, based on FIG. 15, the circuit pattern of the surface metal body 62 will be described in more detail. The dashed-dotted lines shown in FIG. 15 indicate the boundaries of the respective regions.

[0103] As described above, the surface metal body 62 on the substrate 60 has the N wiring 64 and the relay wiring 65. The N wiring 64 has a base portion 640 and a pair of extending portions 641. The pair of extending portions 641 extend from the base portion 640 in the Y direction and toward the side surface 30c of the sealing body 30. The N wiring 64 defines the outer contour of the surface metal body 62. The relay wiring 65 is sandwiched between the pair of extending portions 641. The relay wiring 65 is disposed within the notch 642 of the N wiring 64.

[0104] As shown in FIG. 15, the relay wiring 65 has an end portion 650 as one end in the Y direction. The end portion 650 is the end portion on the base portion 640 side in the Y direction. On the other hand, the base portion 640 of the N wiring 64 has an opposing side 640a to the end portion 650. The opposing side 640a is the portion between the pair of extending portions 641 at the base portion 640. Further, the base portion 640 has an arrangement region 640b of the semiconductor element 40L. The arrangement region 640b is defined by the outer contour of the semiconductor element 40L as shown by the two-dot chain line in FIG. 15. The arrangement region 640b includes the region overlapping the semiconductor element 40L in plan view, and when including a plurality of semiconductor elements 40L, it also includes the region between the elements. The region between the elements is the opposing region between the semiconductor elements 40L in the arrangement direction of the semiconductor elements 40L.

[0105] Here, the lengths L1, L2, and L3 in the X direction are defined as follows. The length L1 is the length of the end portion 650 of the relay wiring 65 as shown in FIG. 15. The length L2 is the length of the opposing side 640a of the base portion 640. The length L3 is the length of the arrangement region 640b in the base portion 640. In the present embodiment, the relationship of L1 < L2 < L3 is satisfied.

[0106] The relay wiring 65 of the present embodiment has a width-reducing portion 651a. The width-reducing portion 651a includes the end portion 650. The width-reducing portion 651a is a portion within a predetermined range in the Y direction from the end portion 650. The length in the X direction of the width-reducing portion 651a, that is, the width, is minimum at the end portion 650. In the width-reducing portion 651a, the width W1 at an arbitrary first position is less than or equal to the width W2 at a second position farther from the end portion 650 than the first position.

[0107] The width of the width-reducing portion 651a may be reduced stepwise, for example, for each predetermined length in the Y direction. That is, the end portion in the X direction of the width-reducing portion 651a may change stepwise. In the present embodiment, the length in the X direction of the width-reducing portion 651a becomes shorter as it is closer to the base portion 640. That is, the width of the width-reducing portion 651a continuously decreases toward the base portion 640. The arm connection portion 80 is arranged in the width-reducing portion 651a.

[0108] The relay wiring 65 may have only the width-reducing portion 651a including the end portion 650. In this case, the semiconductor element 40H is also arranged in the width-reducing portion 651a. The relay wiring 65 of the present embodiment has a constant-width portion 651b. The constant-width portion 651b is continuous with the width-reducing portion 651a and is a portion having a constant width over a predetermined range in the Y direction. And the semiconductor element 40H is arranged in the constant-width portion 651b.

[0109] The relay wiring 65 of this embodiment further has a width-reducing portion 651c. The width-reducing portion 651c includes an end portion 652 opposite to the end portion 650. The width-reducing portion 651c is opposite to the width-reducing portion 651a and is continuous with the constant-width portion 651b. The width of the width-reducing portion 651c is the smallest at the end portion 652. In the width-reducing portion 651c, the width at any first position is less than or equal to the width at a second position farther from the end portion 652 than the first position. In this embodiment, the width of the width-reducing portion 651c continuously decreases toward the end portion 652. In the relay wiring 65, the width-reducing portions 651a and 651c become narrower as they are farther from the constant-width portion 651b.

[0110] In this embodiment, the distance between the N wiring 64 and the relay wiring 65 is substantially constant throughout the opposing region. The extending portion 641 of the N wiring 64 is patterned such that the distance from the relay wiring 65 is substantially constant. Each of the extending portions 641 has a widening portion 641a, a constant-width portion 641b, and a widening portion 641c.

[0111] The widening portion 641a is continuous with the base portion 640 and is a portion within a predetermined range in the Y direction from the boundary with the base portion 640. The length in the X direction of the widening portion 641a, that is, the width, is the largest at the boundary with the base portion 640. In the widening portion 641a, the width at any first position is greater than or equal to the width at a second position farther from the base portion 640 than the first position. The width of the widening portion 641a of this embodiment continuously increases toward the base portion 640. The constant-width portion 641b is continuous with the widening portion 641a and is a portion with a constant width over a predetermined range in the Y direction. The constant-width portion 641b faces the constant-width portion 651b of the relay wiring 65.

[0112] The widening portion 641c is connected to the constant-width portion 641b, opposite to the widening portion 641a. The widening portion 641a extends to a position closer to the side surface 30c than the narrowing portion 651c. The widening portion 641c includes the tip portion 641d of the extending portion 641. The width of the widening portion 641c is maximum at the tip portion 641d. In the widening portion 641c, the width at any first position is equal to or greater than the width at a second position farther from the tip portion 641d than the first position. In the present embodiment, the width of the widening portion 641c continuously expands toward the tip portion 641d at the opposing portion with the narrowing portion 651c. In the widening portion 641c, the portion on the tip portion 641d side from the opposing portion has a constant width. In the N wiring 64, a part of the widening portion 641c and the widening portion 641a become wider as they are farther from the constant-width portion 641b.

[0113] <Current path> Next, based on FIGS. 16 to 20, the current path will be described. FIG. 16 is a diagram showing the PN current loop of the reference example. In the reference example, the reference numerals of each element are those obtained by adding "r" to the end of the reference numerals of the related elements of the semiconductor device 20. The configuration of the reference example is substantially the same as that of the semiconductor device 20 except that the number of signal terminals 93Lr and the patterns of the N wiring 64r and the relay wiring 65r are different. FIG. 17 is a diagram showing the PN current loop in the semiconductor device 20 of the present embodiment. FIG. 18 is a diagram showing the PN current loop in a side view of the semiconductor device 20 viewed from the X direction. The PN current loop refers to the loop shape of the current path from the P terminal 91P to the N terminal 91N.

[0114] In considering the inductance, the PN current loop of P terminal 91P → P wiring 54 → semiconductor element 40H → relay wiring 65 → arm connection portion 80 → relay wiring 55 → semiconductor element 40L → N wiring 64 → N terminal 91N is considered. For this reason, in order to make the PN current loop easy to understand, the line connecting from the P terminal 91P to the N terminal 91N is shown as a solid line. Actually, the semiconductor elements 40H and 40L are controlled so as not to be turned on at the same time. For the sake of convenience, only the current path for one of the semiconductor elements 40H and one of the semiconductor elements 40L is shown, but the same applies to the other one of the semiconductor elements 40H and the other one of the semiconductor elements 40L.

[0115] Figures 19 and 20 show the results of electromagnetic field simulations. Figure 19 shows the current density of the reference example shown in Figure 18. Figure 20 shows the current density for the configuration of the present embodiment shown in Figure 16. The conditions of the electromagnetic field simulation were made common to each other except for the different circuit patterns of the surface metal body 62. In Figures 19 and 20, the lower the current density, the coarser (lighter color), and the higher the current density, the denser (darker color).

[0116] As shown in Figure 16, in the semiconductor device 20r of the reference example, the relay wiring 65r has a substantially rectangular planar shape. The length of the end portion 650r of the relay wiring 65r is substantially equal to the length of the arrangement region 640br of the semiconductor element 40Lr in the base portion 640r. The length of the opposing side 640ar in the base portion 640r is longer than the arrangement region 640br. For this reason, as shown by the solid arrow in Figure 16, current enters from one side 400r into the semiconductor element 40Lr having a substantially rectangular planar shape, and current exits from another side 401r. Side 400r is the opposing side to the relay wiring 65r. Side 401r is the side opposite to the side where the two semiconductor elements 40Lr face each other. In this way, since the current flows outward in the X direction from the semiconductor element 40Lr, the PN current loop is large. It is also clear from the simulation results shown in Figure 19 that the current flows outward in the X direction from the semiconductor element 40Lr through the base portion 640r.

[0117] On the other hand, in the semiconductor device 20 of the present embodiment, as described above, the N wiring 64 and the relay wiring 65 are patterned and satisfy a predetermined positional relationship with the semiconductor element 40L. Due to this positional relationship, as shown in Figure 17, the N wiring 64 (extended portion 641) also exists above one side 400 of the semiconductor element 40L in a plan view. Side 400 is the opposing side to the relay wiring 65. Therefore, current enters from side 400 of the semiconductor element 40L and exits from the same side 400. Among the currents flowing from the semiconductor element 40L toward the N terminal 91N, the Y-direction component increases particularly in the vicinity of the semiconductor element 40L. It is also clear from the simulation results shown in Figure 20 that the current flows from the semiconductor element 40L with a Y-direction component.

[0118] In this way, the current flowing through the N wiring 64 approaches the relay wiring 65, shortening the current path through the N wiring 64, that is, the current path between the semiconductor element 40L and the N terminal 91N. Therefore, the PN current loop is smaller than in the reference example. As shown in FIG. 18, the PN current loop is also small in the Z direction. The P wiring 54 and the N wiring 64 are opposed to each other in the Z direction. Also, the relay wiring 55 and the N wiring 64 are opposed to each other in the Z direction.

[0119] <Summary of the First Embodiment> When the inductance of the main circuit wiring is large, the surge voltage becomes large. If the semiconductor element is thickened to ensure withstand voltage, the steady-state loss increases. In order to reduce the steady-state loss, it is necessary to increase the element area. Also, the surge voltage can be reduced by suppressing the switching speed. In this case, the output to the motor generator becomes small. Thus, when the inductance is large, the size of the semiconductor element becomes large, or the output becomes small.

[0120] When members through which currents flow in opposite directions are arranged opposite to each other, the inductance can be reduced by the canceling effect of the magnetic fluxes generated by the currents. When the PN current loop of the main circuit wiring is smaller, the members through which currents flow in opposite directions approach each other, enhancing the canceling effect of the magnetic fluxes, so that the inductance can be reduced.

[0121] In the present embodiment, the semiconductor elements 40H and 40L are arranged side by side in the Y direction, and the arm connection portion 80 is arranged between the semiconductor elements 40H and 40L. Among the main terminals, the power supply terminals 91 (91P, 91N) are drawn out in the same direction. Also, in the Y direction, the P wiring 54 is arranged on the power supply terminal 91 side, and the relay wiring 55 is arranged on the opposite side. In the Y direction, the relay wiring 65 is arranged on the power supply terminal 91 side, and the base portion 640 of the N wiring 64 is arranged on the opposite side. Then, the extended portion 641 of the N wiring 64 is extended to the power supply terminal 91 side so as to sandwich the relay wiring 65.

[0122] With such a configuration, the PN current loop becomes smaller. As a result, the inductance of the main circuit wiring can be reduced. For example, by arranging the P terminal 91P and the N terminal 91N in parallel, the inductance can be reduced. The relay wiring 65 and the N wiring 64 are also arranged (in parallel) with a predetermined interval therebetween. As a result, the inductance can be reduced. Further, the extended portion 641 of the N wiring 64 faces the P wiring 54. As a result, the inductance can be reduced.

[0123] In this embodiment, the surface metal body 52 of the substrate 50 and the surface metal body 62 of the substrate 60 provide a wiring function for the semiconductor element 40. The surface metal bodies 52 and 62 are sealed by the sealing body 30. Since it is not necessary to secure a creepage distance as in the prior art, the N wiring 64 and the relay wiring 65 can be arranged closer to each other. As a result, the effect of magnetic flux cancellation is enhanced, and the inductance can be further reduced.

[0124] Also, as shown in FIG. 15, the length L1 of the end portion 650 of the relay wiring 65, the length L2 of the opposing side 640a of the base portion 640, and the length L3 of the arrangement region 640b of the semiconductor element 40L in the base portion 640 satisfy the relationship L1 < L2 < L3. By satisfying this dimensional relationship, as described above, current enters from one side 400 of the semiconductor element 40L and exits from the same side 400. Among the currents flowing from the semiconductor element 40L toward the N terminal 91N, particularly in the vicinity of the semiconductor element 40L, the Y-direction component increases. As a result, the current path through the N wiring 64, that is, the current path between the semiconductor element 40L and the N terminal 91N becomes shorter, and the PN current loop becomes smaller. Therefore, the inductance of the main circuit wiring can be further reduced.

[0125] Also, the higher the frequency of the current, the more the current concentrates on the opposing side between the extended portion 641 of the N wiring 64 and the relay wiring 65 due to the skin effect. As a result, the PN current loop can be further reduced, and thus the inductance can be further reduced.

[0126] In this embodiment, as shown in FIG. 15, the relay wiring 65 has a width-reduced portion 651a. As a result, in the extended portion 641, the width of the portion facing the width-reduced portion 651a can be widened. Therefore, heat generation due to energization can be suppressed without changing the size of the surface metal body 62 and thus the substrate 60. That is, heat generation can be suppressed while reducing the inductance.

[0127] Particularly in this embodiment, the length of the width-reduced portion 651a in the X direction becomes shorter as it is closer to the base portion 640. That is, the width of the width-reduced portion 651a continuously decreases toward the base portion 640. The width-reduced portion 651a of the relay wiring 65 has a tapered shape. This makes it easy to keep the distance between the relay wiring 65 and the extended portion 641 constant. That is, the extended portion 641 can be brought closer to the relay wiring 65, and the PN current loop can be made smaller. Also, the width of the extended portion 641 can be widened to suppress heat generation.

[0128] In this embodiment, the relay wiring 65 has a constant-width portion 651b. And the semiconductor element 40H is disposed in the constant-width portion 651b. The relay wiring 65 having the width-reduced portion 651a and the constant-width portion 651b has the same or a similar shape to a baseball home plate in plan view. According to this, compared with the configuration in which the semiconductor element 40H is disposed in the width-reduced portion 651a, the width of the extended portion 641 can be widened. Therefore, heat generation due to energization can be suppressed without changing the size of the surface metal body 62 and thus the substrate 60. That is, heat generation can be suppressed while reducing the inductance.

[0129] In this embodiment, the semiconductor device 20 includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged side by side in the X direction. Similarly, the two semiconductor elements 40L are arranged side by side in the X direction. In this way, the semiconductor elements 40 constituting one arm are arranged side by side in the direction (X direction) orthogonal to the arrangement direction (Y direction) of the semiconductor element 40H and the semiconductor element 40L. In the X direction, a pair of extended portions 641 sandwich the relay wiring 65. Thereby, current bias can be suppressed.

[0130] The semiconductor device 20 may include one N terminal 91N whose tip is bifurcated into two so as to be individually connected to a pair of extended portions 641. In the present embodiment, the semiconductor device 20 includes two N terminals 91N, and the N terminals 91N are individually connected to the pair of extended portions 641. According to this, it is easy to arrange other external connection terminals 90 between the two N terminals 91N. Since it is not necessary to avoid the externally connected terminal 90 arranged in between, the size can be reduced.

[0131] The semiconductor device 20 may include only one P terminal 91P. In the present embodiment, the semiconductor device 20 includes two P terminals 91P. And in the X direction, the N terminal 91N, the P terminal 91P, the signal terminal 93H, the P terminal 91P, and the N terminal 91N are arranged in this order. At both ends in the X direction, the P terminal 91P and the N terminal 91N are arranged side by side. Therefore, it is easy to reduce the PN current loop. Also, since the external connection terminals 90 are arranged regularly in the X direction, as described above, it becomes easy to ensure line symmetry with respect to the semiconductor element 40, the circuit patterns of the surface metal bodies 52 and 62, and the external connection terminals 90. Thereby, current bias can be suppressed.

[0132] In the present embodiment, the P terminal 91P and the N terminal 91N protrude from the side surface 30c of the sealing body 30, and the output terminal 92 protrudes from the side surface 30d. In this way, the P terminal 91P and the N terminal 91N connected to the smoothing capacitor 5 are drawn out in the same direction, and the output terminal 92 is drawn out in the opposite direction. Thereby, the connectivity with the smoothing capacitor 5 and the connectivity with the motor generator 3 can be improved. Also, by arranging the P terminal 91P and the N terminal 91N side by side, the inductance can be reduced. With such a terminal arrangement, it is easy to reduce the PN current loop.

[0133] <Modification example> As an example of including a plurality of each of the semiconductor elements 40H and 40L, an example of including two of each has been shown, but the present invention is not limited to this. Three or more may be included. For example, a configuration in which three semiconductor elements 40H are arranged side by side in the X direction and three semiconductor elements 40L are arranged side by side in the X direction may be adopted. The circuit pattern of the surface metal body 62 and the arrangement of the semiconductor elements 40 are not limited to the above-described examples. For example, it may be as shown in FIGS. 21 and 22. In FIGS. 21 and 22, for the sake of convenience, the sealing body 30 on the back surface 30b side with respect to the insulating base material 51 is omitted in the illustration. Also, among the substrates 60, the insulating base material 61 and the back surface metal body 63 are omitted in the illustration. Similar to FIG. 17, the PN current loop is indicated by a solid line arrow. In FIGS. 21 and 22, the semiconductor device 20 includes two signal terminals 93L.

[0134] In FIG. 21, the semiconductor device 20 includes two arm connection portions 80. The relay wiring 65 has a substantially rectangular planar shape. The two arm connection portions 80 are arranged side by side in the X direction in the vicinity of the end portion 650. The interval between the two semiconductor elements 40L is larger than that in the above-described example (see FIG. 17). The length of the arrangement region 640b of the semiconductor element 40L is longer than that in the above-described example. As a result, the relationship of L1 < L2 < L3 is satisfied. Therefore, current enters from the side 400 of the semiconductor element 40L and exits from the same side 400. Even with such a configuration, the current path by the N wiring 64 can be shortened and the PN current loop can be made smaller. However, in the configuration shown in FIG. 17, the width of the N wiring 64, particularly the width of the extension portion 641, can be made wider. Also, in the case of the configuration shown in FIG. 17, only one arm connection portion 80 may be provided.

[0135] In FIG. 22, the semiconductor device 20 includes only one semiconductor element 40H and one semiconductor element 40L respectively. In this example, the arrangement region 640b coincides with the outer contour of the semiconductor element 40L. The length of one semiconductor element 40H or 40L in the X direction is longer than that in the above-described example (see FIG. 17). Thus, the relationship of L1 < L2 < L3 is satisfied. Therefore, current enters from side 400 of the semiconductor element 40L and exits from the same side 400. Even with such a configuration, the current path by the N wiring 64 can be shortened, and the PN current loop can be reduced.

[0136] The arrangement of the external connection terminals 90 is not limited to the above-described example. For example, the P terminal 91P may be arranged on the outer side in the X direction and the N terminal 91N may be arranged on the inner side. In this case, as shown in FIGS. 23 and 24, the semiconductor element 40 and the circuit pattern are also reversed. FIG. 23 shows the substrate 50. FIG. 24 shows the substrate 60.

[0137] As shown in FIG. 23, the circuit pattern of the surface metal body 52 of the substrate 50 is the same as the circuit pattern of the surface metal body 62 of the substrate 60 shown in FIG. 15. The P wiring 54 has the same pattern as the N wiring 64 shown in FIG. 15. The semiconductor element 40H is arranged on the N wiring 64. The relay wiring 55 has the same pattern as the relay wiring 65 shown in FIG. 15. The semiconductor element 40L and the arm connection portion 80 are arranged on the relay wiring 55.

[0138] As shown in FIG. 24, the circuit pattern of the surface metal body 62 of the substrate 60 is the same as the circuit pattern of the surface metal body 52 of the substrate 50 shown in FIG. 14. The N wiring 64 has the same pattern as the P wiring 54 shown in FIG. 14. The semiconductor element 40L is arranged on the N wiring 64. The relay wiring 65 has the same pattern as the relay wiring 55 shown in FIG. 14. The semiconductor element 40H and the arm connection portion 80 are arranged on the relay wiring 65.

[0139] In the case of the configuration shown in FIGS. 23 and 24, the above-described first and second relationships are reversed. The semiconductor element 40L is the first element, and the semiconductor element 40H is the second element. The source electrode 40S is the first main electrode, and the drain electrode 40D is the second main electrode. The substrate 60 is the first substrate, and the substrate 50 is the second substrate. The insulating base material 61 is the first insulating base material, the surface metal body 62 is the first surface metal body, and the back metal body 63 is the first back metal body. The insulating base material 51 is the second insulating base material, the surface metal body 52 is the second surface metal body, and the back metal body 53 is the second back metal body.

[0140] (Second Embodiment) This embodiment is a modified example based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In order to suppress the transient current imbalance during switching, as described in this embodiment, the surface metal body to which a plurality of semiconductor elements are connected in parallel may have a predetermined structure.

[0141] <Semiconductor Device> First, based on FIG. 25, the semiconductor device 20 of this embodiment will be described. FIG. 25 is a cross-sectional view showing the semiconductor device 20 according to this embodiment. FIG. 25 corresponds to FIG. 8.

[0142] The semiconductor device 20 of this embodiment has the same configuration as the configuration described in the preceding embodiment (see FIGS. 2 to 15). The semiconductor device 20 constitutes a one-phase upper and lower arm circuit 9. As shown in FIG. 25, the semiconductor device 20 includes a plurality of semiconductor elements 40 including two semiconductor elements 40H that are upper arm elements, substrates 50 and 60 arranged so as to sandwich the semiconductor elements 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D, which is the first main electrode on the high potential side of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S, which is the second main electrode on the low potential side of the semiconductor element 40. Although not shown, the semiconductor device 20 includes two semiconductor elements 40L that are lower arm elements.

[0143] The surface metal body 62 is substantially line-symmetric with respect to the virtual line CL1, as in the previous embodiment. As shown in FIG. 25, in this embodiment, the relay wiring 65 of the surface metal body 62 has a slit 653. As will be described later, the N wiring 64 has a slit 643.

[0144] <Suppression effect of transient current imbalance> Next, based on FIGS. 26 and 27, the suppression effect of transient current imbalance during switching will be described. FIG. 26 is an equivalent circuit diagram of two semiconductor elements 40 (MOSFET11) constituting one arm. FIG. 27 is an image diagram (potential diagram) showing the potential clearly.

[0145] In FIGS. 26 and 27, one of the MOSFETs 11 connected in parallel is shown as MOSFET1, and the other is shown as MOSFET2. The inductance of the wiring on the drain electrode side (hereinafter referred to as the drain wiring) is shown as Ld, and the inductance of the wiring on the source electrode side (hereinafter referred to as the source wiring) is shown as Ls. The gate potential is shown as Vg, the potential of the source electrode of MOSFET1 is shown as Vks1, the potential of the source electrode of MOSFET2 is shown as Vks1, and the common source potential is shown as Vs. The midpoint potential between the potential Vks1 and the potential Vks2 is shown as Vm. The midpoint potential Vm is constant. Vm = (Vks1 + Vks2) / 2.

[0146] Also, the gate voltage of MOSFET1 is shown as Vgs1, and the gate voltage of MOSFET2 is shown as Vgs2. The current flowing through MOSFET1 due to turn-on is shown as I1, and the voltage generated between both ends of the inductance Ls when the current I1 flows is shown as ΔVs1. Similarly, the current flowing through MOSFET2 due to turn-on is shown as I2, and the voltage generated between both ends of the inductance Ls when the current I2 flows is shown as ΔVs2. ΔVs1 = Ls × dI1 / dt. ΔVs2 = Ls × dI2 / dt.

[0147] Due to the characteristic variations of MOSFET11, as shown in Fig. 26, assume that a current I2 (I2 > I1) larger than the current I1 flows. At this time, the voltage ΔVs generated in the inductance Ls satisfies ΔVs1 < ΔVs2. That is, as shown in Fig. 27, the potential Vks2 of the source electrode rises with respect to the midpoint potential Vm, and the potential Vks1 drops. Therefore, the gate voltage Vgs1 > the gate voltage Vgs2. To throttle the gate voltage Vgs2, the current I2 decreases. Thus, the inductance Ls of the source wiring has a function of suppressing the transient current imbalance during switching due to the characteristic variations of the semiconductor elements 40 (MOSFET11) connected in parallel.

[0148] However, if the inductance Ls of the source wiring is small, the function of suppressing the above-mentioned transient current imbalance is impaired. As a result, the switching loss becomes biased, and it becomes necessary to provide a margin for thermal design.

[0149] <Circuit pattern of the substrate> Next, based on Fig. 28, the circuit pattern of the surface metal body 62 in the semiconductor device 20 of the present embodiment will be described. Fig. 28 corresponds to Fig. 15. In Fig. 28, similar to Fig. 15, in order to clarify the main electrodes to be connected, the source electrode 40S is shown as S.

[0150] The N wiring 64 and the relay wiring 65 are source wirings to which the source electrode 40S of the semiconductor element 40 is connected. The N wiring 64 is different from the pattern of the previous embodiment in that it has a slit 643. Similarly, the relay wiring 65 is different from the pattern of the previous embodiment by having a slit 653. Except for having the slits 643 and 653, it has the same configuration as that described in the previous embodiment.

[0151] The slit 643 penetrates the N wiring 64 in its thickness direction (Z direction). The slit 643 is provided at a position overlapping the opposing region of the two semiconductor elements 40L in the base 640. The opposing region is a region where the semiconductor elements 40L face each other in the arrangement direction of the semiconductor elements 40L. That is, the slit 643 is provided between the semiconductor elements 40L which are lower arm elements in a plan view in the Z direction. The slit 643 is provided in the base 640 between the electrical connection portions with the semiconductor elements 40L. The slit 643 extends in the Y direction, which is the arrangement direction of the semiconductor elements 40H and 40L, from between the semiconductor elements 40L. The slit 643 opens to the opposing side 640a of the base 640. The slit 643 is provided at a substantially central position of the N wiring 64 in the X direction.

[0152] In this way, the slit 643 extends from the source electrode 40S of the semiconductor element 40L in the Y direction to the arrangement side of the N terminal 91N which is the main terminal, that is, the side where the current flows. The slit 643 does not open to the end portion 640c of the base 640. The slit 643 is provided up to the vicinity of the lower end of the opposing region of the semiconductor element 40L. The slit 643 divides the N wiring 64 into a region to which one of the semiconductor elements 40L is connected and a region to which the other is connected. The slit 643 separates the current path of the source electrode 40S of the semiconductor element 40L, that is, the source current path.

[0153] The slit 653 penetrates the relay wiring 65 in its thickness direction (Z direction). The slit 653 is provided at a position overlapping the opposing region of the two semiconductor elements 40H in the relay wiring 65. That is, the slit 653 is provided between the semiconductor elements 40H in a plan view. The slit 653 is provided in the relay wiring 65 between the electrical connection portions with the semiconductor elements 40H. The slit 653 extends in the Y direction from between the semiconductor elements 40H. The slit 653 opens to the end portion 652. The slit 653 extends from the end portion 652 across the space between the semiconductor elements 40H (opposing region) to the vicinity of the arm connection portion 80. The slit 653 is provided at a substantially central position of the relay wiring 65 in the X direction.

[0154] Thus, the slit 653 extends from the source electrode 40S of the semiconductor element 40H in the Y direction toward the arm connection portion 80. The slit 653 extends from the source electrode 40S of the semiconductor element 40H toward the side where the current flows. The slit 653 does not open at the end 650. The slit 643 is provided up to the front of the arm connection portion 80. The slit 653 divides the relay wiring 65 into a region to which one semiconductor element 40H is connected and a region to which another one is connected. The slit 653 separates the current path of the source electrode 40S of the semiconductor element 40H, that is, the source current path.

[0155] <Summary of the Second Embodiment> FIG. 29 shows the source current path. The solid arrows indicate the source current paths on the semiconductor element 40H side, and the dashed arrows indicate the source current paths on the semiconductor element 40L side. As described above, in the present embodiment, the slits 643 and 653 are provided in the surface metal body 62 to which the source electrode 40S, which is the main electrode on the low potential side, is connected.

[0156] The slit 643 is provided between adjacent semiconductor elements 40L in the N wiring 64 to which the semiconductor elements 40L are connected in parallel. The slit 643 divides the N wiring 64 and separates the source current paths of the respective semiconductor elements 40L. Thereby, it is possible to suppress the current (source current) flowing out from the source electrode 40S of the semiconductor element 40L from merging in the vicinity of the source electrode 40S. That is, the merging point of the source current moves away from the source electrode 40S in a plan view. Therefore, in the parallel circuit of the two semiconductor elements 40L (MOSFET11), the inductance Ls of the source wiring can be made larger than in a configuration without the slit 643. Since the inductance Ls is large, even if there are variations (deviations) in the characteristics of the two semiconductor elements 40L, it is possible to suppress the transient current imbalance during switching. By providing the slit 643, it is possible to suppress the transient current imbalance while maintaining the high integration of the semiconductor element 40L.

[0157] Similarly, the relay wiring 65 has a slit 653. The slit 653 is provided between two semiconductor elements 40H. The slit 653 partitions the relay wiring 65 and separates the source current paths of the respective semiconductor elements 40H. Thereby, it is possible to suppress the current (source current) flowing out from the source electrode 40S of the semiconductor element 40H from merging in the vicinity of the source electrode 40S. That is, the merging point of the source currents moves away from the source electrode 40S in a plan view. Therefore, in the parallel circuit of the two semiconductor elements 40H, the inductance Ls of the source wiring can be made larger than in a configuration without the slit 653. Since the inductance Ls is large, even if there are variations (deviations) in the characteristics of the two semiconductor elements 40H, it is possible to suppress the transient current imbalance during switching. By providing the slit 653, it is possible to suppress the transient current imbalance while maintaining the high integration of the semiconductor element 40H.

[0158] In the present embodiment, the slit 643 extends in the Y direction from between adjacent semiconductor elements 40L toward the N terminal 91N side. The slit 643 extends from the source electrode 40S of the semiconductor element 40L to the side where the current flows. Thereby, the source current paths of the respective semiconductor elements 40L can be separated over a longer distance. Therefore, in the parallel circuit of the semiconductor elements 40L, the inductance Ls of the source wiring can be made larger. That is, the effect of suppressing the transient current imbalance can be enhanced.

[0159] Similarly, the slit 653 extends in the Y direction from between adjacent semiconductor elements 40H toward the arm connection portion 80 side. The slit 653 extends from the source electrode 40S of the semiconductor element 40H to the side where the current flows. Thereby, the source current paths of the respective semiconductor elements 40L can be separated over a longer distance. Therefore, in the parallel circuit of the semiconductor elements 40H, the inductance Ls of the source wiring can be made larger. That is, the effect of suppressing the transient current imbalance can be enhanced.

[0160] FIG. 30 is a cross-sectional view taken along the XXX-XXX line of FIG. 29. In the present embodiment, a joint portion 81, a bonding material 103 that connects the joint portion 81 and the relay wiring 55, and a bonding material 103 that connects the joint portion 81 and the relay wiring 65 constitute an arm connection portion 80 that electrically connects the relay wirings 55 and 65. The joint portion 81 is a member separate from the substrates 50 and 60. The arm connection portion 80 electrically connects the relay wiring 65 connected to the source electrode 40S of the semiconductor element 40H and the relay wiring 55 connected to the drain electrode 40D of the semiconductor element 40L.

[0161] <Modification Example> In the above-described example, an example in which a plurality of semiconductor elements 40 each include two semiconductor elements 40H and 40L has been shown, but the present invention is not limited to this. A configuration in which one of the semiconductor elements 40H and 40L includes two and the other includes one may be employed. In this case, a slit may be provided in the wiring (64, 65) of the two of the surface metal bodies 62 in which a plurality of semiconductor elements 40 are connected in parallel to form one arm. For example, in the case of a configuration including two semiconductor elements 40H and one semiconductor element 40L, a slit 643 may not be provided in the N wiring 64, and a slit 653 may be provided in the relay wiring 65 to which the semiconductor element 40H is connected. As described above, the plurality of semiconductor elements 40 may include two arm elements of at least one of the semiconductor elements 40H and 40L.

[0162] The number of semiconductor elements 40 connected in parallel is not limited to two. Three or more semiconductor elements 40 may be connected in parallel to form one arm. For example, in the case of a configuration including three semiconductor elements 40H, slits 653 may be provided between adjacent semiconductor elements 40H in a plan view with respect to the three semiconductor elements 40H arranged side by side in the X direction. The plurality of semiconductor elements 40 may include a plurality of arm elements of at least one of the semiconductor elements 40H and 40L. The plurality of semiconductor elements 40 may include both a plurality of arm elements, that is, a plurality of semiconductor elements 40H and a plurality of semiconductor elements 40L.

[0163] The arrangement of the N terminal 91N is not limited to the above example. For example, the P terminal 91P may protrude from the side surface 30c of the sealing body 30, and the N terminal 91N may protrude from the side surface 30d. In this case, the pattern of the N wiring 64 has a shape similar to, for example, the P wiring 54 or the relay wiring 55. That is, the extending portion 641 extends from the base portion 640 toward the side surface 30d side of the sealing body 30. Also in the case of this configuration, the slit 643 may be provided at least between the semiconductor elements 40L. Further, by configuring the slit 643 to extend from the opposing region of the semiconductor element 40L to the outside of the opposing region and toward the N terminal 91N side, the inductance Ls can be made larger.

[0164] Although the slits 643 and 653 provided between the semiconductor elements 40 are regarded as one, it is not limited to this. At least one of the slits 643 and 653 may be plural.

[0165] Although an example in which the slits 643 and 653 open at one of the ends of the surface metal body 62 is shown, it is not limited to this. For example, in the examples shown in FIGS. 31 and 32, the slit 643 extends in the Y direction from the opposing side 640a of the base portion 640 to the end portion 640c. The slit 643 bisects the base portion 640 and thus the N wiring 64. The slit 643 crosses the opposing region of the semiconductor element 40L. One of the semiconductor elements 40L is arranged on one of the divided N wirings 64, and the other of the semiconductor elements 40L is arranged on the other of the divided N wirings 64. Similarly, the slit 653 extends in the Y direction from the end portion 652 to the end portion 650 of the relay wiring 65. The slit 653 bisects the relay wiring 65. One of the semiconductor elements 40H is arranged on one of the divided relay wirings 65, and the other of the semiconductor elements 40H is arranged on the other of the divided relay wirings 65.

[0166] The slits 643 and 653 are connected to each other and form a single slit extending in the Y direction. The surface metal body 62 is substantially line-symmetric with respect to the virtual line CL1. FIG. 33 shows the source current path. The solid arrows indicate the source current path of the semiconductor element 40H, and the dashed arrows indicate the source current path of the semiconductor element 40L. As described above, the slit 643 divides the N wiring 64 into two parts. As a result, one source current of the semiconductor element 40L and the other source current do not merge on the substrate 60. Since the merging point of the source currents is further away, the inductance Ls of the source wiring can be further increased.

[0167] Similarly, the slit 653 divides the relay wiring 65 into two parts. As a result, the source current of the semiconductor element 40H and the other source current do not merge on the substrate 60. Since the merging point of the source currents is further away, the inductance Ls of the source wiring can be further increased. Thus, the effect of suppressing the transient current imbalance can be enhanced. FIGS. 31, 32, and 33 are diagrams showing modified examples. FIG. 31 corresponds to FIG. 28. FIG. 32 corresponds to FIG. 11. FIG. 33 corresponds to FIG. 29.

[0168] In the example shown in FIGS. 31 to 33, in accordance with the division of the relay wiring 65, the arm connection portion 80 is divided into the same number as the relay wiring 65. The arm connection portion 80 is individually connected to the relay wiring 65. According to this, since the source currents do not merge even in the arm connection portion 80, the inductance Ls can be made larger.

[0169] In the configuration of the above-described modified example, a slit may be further provided in the surface metal body 52 of the substrate 50. As shown in FIGS. 34 and 35, among the surface metal bodies 52, the relay wiring 55 has a slit 553. The slit 553 opens at the end 551a of the relay wiring 55. The end 551a faces the P wiring 54 in the Y direction. The slit 553 extends in the Y direction, crosses the two-split arm connection portion 80, and reaches the opposing region (space) of the semiconductor element 40L. The slit 553 is provided up to the vicinity of the lower end of the opposing region of the semiconductor element 40L.

[0170] When such a configuration is adopted, as shown in FIG. 35, the first current path formed by a set of semiconductor elements 40H and 40L and the second current path formed by another set of semiconductor elements 40H and 40L are almost completely separated within the semiconductor device 20. The current merging point is provided outside the N terminal 91N. Therefore, the inductance Ls of the source wiring can be further increased. FIGS. 34 and 35 are diagrams showing a modified example. FIG. 34 corresponds to FIG. 32. FIG. 35 corresponds to FIG. 33. Note that the semiconductor device 20 may include an N bus bar that connects a plurality of N terminals 91N. In this case, the current merges at the N bus bar. The N bus bar that connects the N terminals 91N may be provided, for example, on the side of the smoothing capacitor 5.

[0171] Although an example in which the arm connection portion 80 is composed of the joint portion 81 and the bonding materials 103 arranged on both end sides of the joint portion 81 has been shown, the present invention is not limited thereto. In the example shown in FIG. 36, the joint portion 81 is provided integrally with the substrate 60. The joint portion 81 is provided as a protrusion extending in the Z direction from the relay wiring 65. The conductive spacer 70 is also provided integrally with the surface metal body 62 as a protrusion, similar to the joint portion 81.

[0172] The surface metal body 62 having protrusions may be formed, for example, by patterning a metal plate of a special-shaped strip by pressing and attaching it to the insulating base material 61. The surface metal body 62 having protrusions may be formed by etching thick Cu. It may also be formed by directly joining a metal body that is a separate member from the substrate 60 to the surface metal body 62. In the configuration shown in FIG. 36, the joint portion 81, which is a protrusion of the relay wiring 65, and the bonding material 103 interposed between the tip of the joint portion 81 and the relay wiring 55 constitute the arm connection portion 80. FIG. 36 is a diagram corresponding to FIG. 30.

[0173] In the example shown in FIG. 37, the joint portion 81 is excluded. The bonding material 103 electrically connects the relay wirings 55 and 65. The bonding material 103 constitutes the arm connection portion 80. In FIG. 37, the conductive spacer 70 is also excluded, and the source electrode 40S of the semiconductor element 40 is connected to the surface metal body 62 via the bonding material 101. Although not shown, the arm connection portion 80 may be configured to include only the joint portion 81 without the bonding material 103. In this case, the joint portion 81 is directly joined to the relay wirings 55 and 65.

[0174] The circuit patterns of the substrates 50 and 60 are not limited to the above examples. The substrate 60 shown in FIG. 38 shows an example in which the slits 643 and 653 are applied to the circuit pattern shown in FIG. 24. In the example shown in FIG. 38, the slit 643 is provided between adjacent semiconductor elements 40L. The slit 643 extends from between the semiconductor elements 40L in the Y direction toward the N terminal 91N side, that is, the side where the source current flows. The slit 653 is provided between adjacent semiconductor elements 40H. The slit 653 extends from between the semiconductor elements 40H in the Y direction toward the arm connection portion 80 side.

[0175] In this embodiment, the arrangement of the external connection terminals 90 is not limited to the illustrated example. The P terminal 91P may be connected to the P wiring 54, for example, at both ends in the X direction. The N terminal 91N may be connected to the N wiring 64, for example, at both ends in the X direction. In this case, the N terminal 91N may be connected to the extension portion 641. It may be connected to the base portion 640, excluding the extension portion 641 from the N wiring 64. The output terminal 92 may be connected to the relay wiring 55, for example, at both ends in the X direction.

[0176] The configuration described in this embodiment can be combined with any of the configurations described in the first embodiment and its modifications.

[0177] (Third Embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In order to effectively release the heat of the semiconductor element, as described in this embodiment, the upper thickness and the lower thickness above the semiconductor element may satisfy a predetermined relationship.

[0178] <Warpage at High Temperature> As a result of intensive studies, it has been clarified that even when insulating substrates 51 and 61 made of resin are adopted and the coefficient of linear expansion is made close to that of the metal bodies 52, 53, 62, and 63 by adding a filler, the semiconductor device 20 can be warped as shown in FIG. 39. FIG. 39 shows the state of the semiconductor device 20 during the operation of the semiconductor element 40, that is, at high temperature. The alternate long and short dash line in the figure is a reference line indicating the direction of warpage.

[0179] The configuration shown in FIG. 39 is the same as the configuration described in the previous embodiment (see FIG. 5). In FIG. 39, for the sake of convenience, the external connection terminal 90 is omitted from the illustration. In FIG. 39, the heat exchange part 121 of the semiconductor device 20 and the cooler 120 are arranged side by side in the Z direction, which is a predetermined direction. The heat exchange part 121 is arranged on both sides of the semiconductor device 20 in the Z direction so as to sandwich the semiconductor device. A heat conduction member 130 such as silicone gel is arranged between each of the heat exchange parts 121 and the semiconductor device 20. The cooler 120 cools the semiconductor device 20 by allowing a refrigerant to flow through the flow path of the heat exchange part 121. As the refrigerant flowing through the flow path, a phase-changing refrigerant such as water or ammonia, or a non-phase-changing refrigerant such as an ethylene glycol-based refrigerant can be used. The heat conduction member 130 is sometimes referred to as a thermal interface material (TIM). The heat conduction member 130 follows the opposing surfaces of the heat exchange part 121 and the semiconductor device 20 and fills the gap between the opposing surfaces.

[0180] As described above, in the semiconductor element 40, the drain electrode 40D, which is the main electrode on the high potential side, has a larger electrode area than the source electrode 40S, which is the main electrode on the low potential side. Also, a conductive spacer 70 is interposed between the source electrode 40S and the substrate 60, whereas no conductive spacer 70 is interposed between the drain electrode 40D and the substrate 50. That is, the thermal resistance of the heat transfer path from the semiconductor element 40 to the substrate 50 is smaller than that of the heat transfer path from the semiconductor element 40 to the substrate 60. In the semiconductor device 20 having such a configuration, it is required to effectively dissipate heat to the substrate 50 side.

[0181] As shown in FIG. 39, when a warp occurs such that the substrate 50 side is concave and the substrate 60 side is convex, the facing distance between the back surface 50b of the substrate 50, which is the exposed surface, and the heat exchange portion 121 becomes longer, and the intervening heat conduction member 130 becomes thicker. As a result, the thermal resistance between the substrate 50 and the heat exchange portion 121 increases, making it difficult for heat transfer (heat exchange) to occur between the semiconductor device 20 and the cooler 120 (heat exchange portion 121). The warped state shown in FIG. 39 is not preferable for effectively releasing the heat of the semiconductor element 40, that is, for efficiently cooling the semiconductor device 20. FIG. 39 shows an example of a double-sided cooling structure in which coolers 120 (heat exchange portions 121) are arranged on both sides of the semiconductor device 20. However, the single-sided cooling structure in which the cooler 120 is arranged only on the substrate 50 side in the Z direction also has the same problem.

[0182] <Structure of Semiconductor Device> As a result of intensive studies, it has become clear that the warp of the semiconductor device 20 can be controlled by the magnitude relationship between the thickness of the portion on the substrate 50 side and the thickness of the portion on the substrate 60 side in the semiconductor device 20, relative to the semiconductor element 40. The semiconductor device 20 of the present embodiment has a configuration based on this finding. FIG. 40 is a cross-sectional view showing the semiconductor device 20 of the present embodiment. FIG. 40 shows an ideal state in which the semiconductor device 20 has no warp.

[0183] The semiconductor device 20 of the present embodiment has the same configuration as the configuration described in the previous embodiment (see FIGS. 2 to 13). In FIG. 40, as in FIG. 39, the heat exchange portion 121 of the cooler 120 and the heat conduction member 130 are shown together with the semiconductor device 20. That is, FIG. 40 shows a semiconductor module 140 including the semiconductor device 20, the cooler 120, and the heat conduction member 130. As an example, the semiconductor module 140 has a double-sided cooling structure in which the semiconductor device 20 is sandwiched between a pair of heat exchange portions 121. The semiconductor device 20 is arranged side by side with the cooler 120 (heat exchange portion 121) in the Z direction, which is a predetermined direction. The cooler 120 is arranged on both sides of the semiconductor device 20.

[0184] The back metal bodies 53 and 63 are exposed from the sealing body 30 as the back surfaces 50b and 60b of the substrates 50 and 60. One of the heat exchange portions 121 of the cooler 120 is disposed to face the front surface 30a and the back surface 50b of the sealing body 30, and the other of the heat exchange portions 121 is disposed to face the back surface 30b and the back surface 60b of the sealing body 30. Heat conduction members 130 are respectively disposed between the opposing surfaces of the semiconductor device 20 and the heat exchange portion 121. The heat conduction members 130 are in close contact with the semiconductor device 20 and the heat exchange portion 121.

[0185] The semiconductor device 20 is configured such that the thickness T1 on the substrate 50 side relative to the semiconductor element 40 and the thickness T2 on the substrate 60 side relative to the semiconductor element 40 satisfy the relationship T1 ≧ T2. For other configurations, they are the same as those described in the previous embodiment (see FIG. 5). The thickness T1 is the total thickness of the respective thicknesses of the bonding material 101, the conductive spacer 70, the bonding material 102, and the substrate 60. The thickness T2 is the total thickness of the respective thicknesses of the bonding material 100 and the substrate 50. In order to satisfy the relationship T1 ≧ T2, the substrate 50 is thicker than the substrate 60. The substrate 50 is thicker than the conductive spacer 70. In the substrate 50, the metal bodies 52 and 53 are thicker than the insulating base material 51. In the substrate 60, the metal bodies 62 and 63 are thicker than the insulating base material 61. The configuration of the portion excluding the thickness relationship is the same as the configuration described in the first embodiment.

[0186] <Simulation Results> Figures 41 to 43 show the results of the thermal stress simulation. Figure 41 shows the state of the semiconductor device 20 at room temperature (RT) shown in Figure 40. Figure 42 shows the state of the semiconductor device 20 at high temperature. The high temperature means when the semiconductor element 40 generates heat due to energization, that is, during the operation of the semiconductor element 40. As shown in Figures 41 and 42, warping occurs in the semiconductor device 20 at high temperature. In the present embodiment, since the relationship of T1≧T2 is satisfied as described above, as shown by the dashed arrow in Figure 42, the amount of expansion on the substrate 50 side is larger than the amount of expansion on the substrate 60 side. This is because the linear expansion coefficient of Cu constituting the metal bodies 52, 53, 62, 63 is the largest and the substrate 50 is thick. As a result, warping convex on the substrate 50 side which is the first substrate and concave on the substrate 60 side which is the second substrate occurs. The dashed line in Figure 42 is a reference line indicating the direction of warping.

[0187] Figure 43 shows the relationship between the ratio of the thicknesses T1, T2 and the amount of warping at high temperature. In this simulation, the semiconductor element 40, the conductive spacer 70, and the bonding materials 100, 101, 102 were made the same (common), and the thicknesses of the substrates 50 and 60 were adjusted so that the thickness ratio T1:T2 became a predetermined value. The material composition was made the same (common). The vertical axis shown in Figure 43 indicates the amount of warping and is in arbitrary units (a.u.). When the amount of warping is above 0 (zero), it indicates warping convex on the substrate 50 side and concave on the substrate 60 side, and when it is below 0 (zero), it indicates warping concave on the substrate 50 side and convex on the substrate 60 side. T1:T2 was set to four levels of 1:2, 1:1.3, 1:1, and 1.5:1.

[0188] As shown in Fig. 43, when T1:T2 = 1:2, a warp with a concave shape on the substrate 50 side and a convex shape on the substrate 60 side occurred, and the amount of convex warp on the substrate 60 side was the largest among the four levels. When T1:T2 = 1:1.3, a warp with a concave shape on the substrate 50 side and a convex shape on the substrate 60 side occurred, and the amount of convex warp on the substrate 60 side became smaller than that when T1:T2 = 1:2. When T1:T2 = 1:1, it changed to a warp with a convex shape on the substrate 50 side and a concave shape on the substrate 60 side. When T1:T2 = 1.5:1, a warp with a convex shape on the substrate 50 side and a concave shape on the substrate 60 side occurred, and the amount of convex warp on the substrate 50 side was the largest among the four levels.

[0189] Thus, it became clear that when T1 < T2, a warp with a concave shape on the substrate 50 side and a convex shape on the substrate 60 side occurred, and when T1 ≥ T2, a warp with a convex shape on the substrate 50 side and a concave shape on the substrate 60 side occurred. That is, it became clear that by satisfying the relationship of T1 ≥ T2, the warp generated at high temperature can be controlled to a warp with a convex shape on the substrate 50 side and a concave shape on the substrate 60 side. Also, it became clear that the larger T2 is with respect to T1, the larger the amount of convex warp on the substrate 60 side becomes, and the larger T1 is with respect to T2, the larger the amount of convex warp on the substrate 50 side becomes.

[0190] <Summary of the Third Embodiment> In this embodiment, the semiconductor device 20 satisfies the relationship of the above-described thickness T1 ≥ thickness T2. The thickness T1 on the side where the conductive spacer 70 is not interposed between the semiconductor element 40 and the substrate 50 is equal to or greater than the thickness T2 on the side where the conductive spacer 70 is interposed between the semiconductor element 40 and the substrate 60. Thereby, when the semiconductor element 40 operates (at high temperature), a warp with a convex shape on the substrate 50 side and a concave shape on the substrate 60 side occurs in the semiconductor device 20. Therefore, the facing distance between the semiconductor device 20 and the cooler 120 (heat exchange part 121) on the substrate 50 side, which has a high contribution rate to heat dissipation, can be made narrower compared to a configuration that satisfies the relationship of thickness T1 < thickness T2. Since the facing distance becomes narrower, the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller. Thereby, the heat generated by the semiconductor element 40 can be efficiently released to the outside of the semiconductor device 20. In other words, the cooling efficiency of the semiconductor device 20 can be increased.

[0191] Specifically, the thickness of the heat conduction member 130 interposed between the semiconductor device 20 and the cooler 120 becomes thinner compared to a configuration that satisfies the relationship of thickness T1 < thickness T2. As a result, the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller, and heat exchange between the semiconductor device 20 and the cooler 120 becomes easier. Therefore, the heat generated by the semiconductor element 40 can be efficiently released to the outside of the semiconductor device 20.

[0192] In the present embodiment, the back surface metal body 53 is exposed from the sealing body 30. Heat dissipation can be enhanced compared to a configuration in which the back surface metal body 53 is covered by the sealing body 30. Similarly, the back surface metal body 63 is exposed from the sealing body 30. Heat dissipation can be enhanced compared to a configuration in which the back surface metal body 63 is covered by the sealing body 30.

[0193] <Modification Example> Although an example of a double-sided heat dissipation structure has been shown, the present invention is not limited to this. The semiconductor device 20 mainly wants to efficiently release heat from the substrate 50 side. Therefore, for the semiconductor device 20, the cooler 120 (heat exchange unit 121) may be disposed only on the substrate 50 side in the Z direction. Even in such a single-sided heat dissipation structure, by satisfying the relationship of T1 ≧ T2, a convex warp occurs on the substrate 50 side at high temperatures. As a result, the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller. Therefore, the heat generated by the semiconductor element 40 can be efficiently released.

[0194] Although an example in which both the back surface metal bodies 53 and 63 are exposed from the sealing body 30 has been shown, the present invention is not limited to this. For example, only the back surface metal body 53 may be exposed.

[0195] Although an example in which the semiconductor device 20 includes the semiconductor element 40H that constitutes the upper arm 9H and the semiconductor element 40 that constitutes the lower arm 9L has been shown, the present invention is not limited to this. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. The semiconductor device 20 may include, for example, only one semiconductor element 40. The semiconductor device 20 may include the semiconductor element 40, a pair of substrates 50 and 60 disposed so as to sandwich the semiconductor element 40, and a conductive spacer 70 interposed between the semiconductor element 40 and the substrate 60.

[0196] In the substrate 50, the relationship between the thicknesses of the metal bodies 52 and 53 was not particularly mentioned. For example, as shown in FIG. 44, the surface metal body 52 may be made thicker than the back surface metal body 53. The drain electrode 40D, which is the first main electrode of the semiconductor element 40, is joined to the surface metal body 52. The thermal resistance between the surface metal body 52 and the semiconductor element 40 is small. By making the surface metal body 52 closer to the semiconductor element 40 thicker, the heat generated by the semiconductor element 40 can be effectively diffused. That is, the heat of the semiconductor element 40 can be efficiently released. FIG. 44 is a cross-sectional view showing a modified example. FIG. 44 corresponds to FIG. 41.

[0197] As shown in FIG. 44, the surface metal body 62 may be made thicker than the back surface metal body 63. By making the surface metal body 62 closer to the semiconductor element 40 thicker, the heat generated by the semiconductor element 40 can be effectively diffused.

[0198] As described above, the heat of the semiconductor element 40 having main electrodes on both sides mainly transfers to the substrate 50 side with a small thermal resistance. Therefore, as shown in FIG. 45, the surface metal body 62 may be made thinner than the back surface metal body 63. Thereby, the thickness of the substrate 60 can be made thinner, and thus the size of the semiconductor device 20 can be reduced. Since a thick metal body becomes unnecessary, the cost can also be reduced. FIG. 45 is a cross-sectional view showing a modified example. FIG. 45 corresponds to FIG. 44. In FIG. 45, the surface metal body 52 is thicker than the back surface metal body 53, and the surface metal body 62 is thinner than the back surface metal body 63. Therefore, while efficiently releasing the heat of the semiconductor element 40, the size can be reduced and the cost can be reduced.

[0199] The configuration described in the present embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, and the modified examples.

[0200] (Fourth Embodiment) This embodiment is a modified example based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In order to enhance connection reliability, as described in this embodiment, the substrate and the signal terminal may be arranged to satisfy a predetermined positional relationship.

[0201] <Semiconductor device> First, based on FIGS. 46 and 47, the semiconductor device 20 of this embodiment will be described. FIG. 46 shows the periphery of the signal terminal 93 in the semiconductor device 20 according to this embodiment. In FIG. 46, in order to show the positional relationship between the substrate 50 and the signal terminal 93, a part of the elements of the semiconductor device 20 is shown with omission. FIG. 47 is a cross-sectional view taken along line XLVII-XLVII of FIG. 46. In FIGS. 46 and 47, as an example, the signal terminal 93L on the lower arm 9L side will be described.

[0202] The semiconductor device 20 of this embodiment has the same configuration as the configuration described in the preceding embodiment (see FIGS. 2 to 13). As shown in FIG. 46, the semiconductor device 20 includes two semiconductor elements 40L. The semiconductor element 40L has a drain electrode 40D, which is a first main electrode, on one surface, and a source electrode 40S, which is a second main electrode, and a signal pad 40P on the back surface. The semiconductor device 20 includes four signal terminals 93L. Each signal terminal 93L extends in the Y direction and protrudes outward from the side surface 30d of the sealing body 30. The four signal terminals 93L are arranged side by side in the X direction between the output terminals 92 in a plan view in the Z direction.

[0203] <Shape and arrangement of signal terminals> Next, based on FIGS. 46 and 47, the shape, arrangement, etc. of the signal terminal 93 will be described.

[0204] As shown in FIG. 46, each signal terminal 93L has an overlapping portion 930 that overlaps the substrate 50 in a plan view and a non-overlapping portion 931 that does not overlap the substrate 50. The overlapping portion 930 faces the substrate 50 in the Z direction.

[0205] The overlapping portion 930 is a portion within a predetermined range from the end on the semiconductor element 40L side at the signal terminal 93L. The non-overlapping portion 931 is the portion excluding the overlapping portion 930. The overlapping portion 930 overlaps the insulating base material 51 among the substrates 50 to which the drain electrode 40D is electrically connected. The entire overlapping portion 930 overlaps the insulating base material 51. The overlapping portion 930 overlaps the exposed portion 510 exposed from the surface metal body 52 on the insulating base material 51. Thus, the signal terminal 93L extends up to the substrate 50. That is, the signal terminal 93L is inserted and arranged to a position overlapping the substrate 50 in plan view.

[0206] Among the four, two signal terminals 93L have an overlapping portion 930 having a main portion 930a and a protruding portion 930b. The other two signal terminals 93L do not have the protruding portion 930b. The main portion 930a extends in the Y direction which is the main extending direction of the signal terminal 93L. The protruding portion 930b is continuous with the main portion 930a and protrudes from the main portion 930a. The protruding portion 930b extends in a direction different from the main portion 930a. The protruding portion 930b may be referred to as a branching portion. The planar shape of the main portion 930a can adopt various shapes such as a substantially L-shaped, substantially Y-shaped, and substantially T-shaped in plan view. In the example shown in FIG. 46, one of the signal terminals 93L has a substantially L-shaped in plan view, and the other one of the signal terminals 93L has a substantially T-shaped in plan view.

[0207] As described in the previous embodiment (see FIG. 11), the relay wiring 55 of the surface metal body 52 has a notch 550. The overlapping portion 930 of the signal terminal 93L overlaps the portion exposed from the notch 550 on the insulating base material 51. The four signal terminals 93L are arranged side by side in the X direction between the output terminals 92 in plan view. Each signal terminal 93L has a tie bar mark 93a. The tie bar mark 93a is a trace remaining on the side surface of the signal terminal 93L when the tie bar 94a of the lead frame 94 is cut off as described in the previous embodiment (see FIG. 10). The tie bar mark 93a may be referred to as a cutting mark. Each signal terminal 93L has tie bar marks 93a on both side surfaces in the X direction. The tie bar marks 93a are provided at external positions of the sealing body 30 in the non-overlapping portion 931.

[0208] As shown in FIG. 47, each signal terminal 93L has a joint portion 93b, a tip portion 93c, a bent portion 93d, and an extended portion 93e. The joint portion 93b is the portion where the bonding wire 110, which is a connection member, is joined. The joint portion 93b preferably includes a portion substantially parallel to the XY plane. The joint portion 93b is the portion closest to the surface of the insulating base material 51 (exposed portion 510) in the signal terminal 93L. The joint portion 93b of the present embodiment floats with respect to the surface of the insulating base material 51. The joint portion 93b is not in contact with the insulating base material 51, and the sealing body 30 enters the gap between the lower surface of the joint portion 93b and the surface of the insulating base material 51 to fill the gap. The bonding wire 110 electrically connects the pad 40P formed on the same surface as the source electrode 40S and the signal terminal 93L.

[0209] The tip portion 93c is the portion on the tip side, that is, the semiconductor element 40 (40L) side, of the joint portion 93b. The tip portion 93c is disposed at a position above the joint portion 93b, that is, away from the surface of the insulating base material 51 in the Z direction. The tip portion 93c is lifted upward as it moves away from the joint portion 93b. The tip portion 93c has an R shape in the ZY cross section. The bent portion 93d is provided between the joint portion 93b and the extended portion 93e, which is the portion on the rear end side of the joint portion 93b. The bent portion 93d is bent so that the extended portion 93e is positioned above the joint portion 93b, that is, away from the surface of the insulating base material 51. The bent portion 93d has a smaller cross-sectional area, that is, is thinner, than the other portions of the signal terminal 93, specifically, the joint portion 93b, the tip portion 93c, and the extended portion 93e, by bending. The extended portion 93e is the portion on the rear end side of the joint portion 93b. The extended portion 93e extends in the Y direction and is disposed across the inside and outside of the sealing body 30.

[0210] At least a part of the joint portion 93b, the tip portion 93c, and the bent portion 93d is included in the overlapping portion 930 described above. At least a part of the extending portion 93e is included in the non-overlapping portion 931. In the present embodiment, the entire extending portion 93e is included in the non-overlapping portion 931. Each signal terminal 93L is formed by press punching. In the signal terminal 93L, the surface facing the insulating base material 51 is the press R surface 93f, and the back surface of the facing surface is the burr surface 93g where burrs are generated by punching. The configuration other than the above is the same as the configuration described in the first embodiment.

[0211] <Bonding Wire Connection Method> Next, based on FIG. 48, a method of connecting the signal terminal 93 having the above-described structure and the bonding wire 110 will be described. FIG. 48 is a diagram for explaining wire bonding. Reference numeral 111 shown in FIG. 48 is a jig for pressing the signal terminal 93L. Reference numeral 112 is a tool for ultrasonic bonding. The tool 112 is sometimes referred to as an ultrasonic bonding device. The alternate long and short dash line shown in FIG. 48 indicates the position of the signal terminal 93L bent by being pressed by the jig 111.

[0212] As shown in FIG. 48, first, the overlapping portion 930 of the signal terminal 93L is positioned so as to overlap the insulating base material 51 and set at the portion where the wire 110a is to be joined. Then, pressure is applied in the Z direction by the jig 111 to elastically deform the signal terminal 93L and bring the overlapping portion 930 into contact with the surface of the insulating base material 51. The jig 111 presses the overlapping portion 930 of the signal terminal 93L or the vicinity thereof.

[0213] Then, with the signal terminal 93L in contact with the insulating base material 51, ultrasonic bonding is performed by the tool 112. Since the insulating base material 51 receives the signal terminal 93L, it is not necessary to separately prepare a receiving jig. When the ultrasonic bonding is completed and the tool 112 and the jig 111 are separated from the signal terminal 93L, it is released from the elastically deformed state and returns to the position before pressurization. The signal terminal 93L is a part of the lead frame 94. Since the signal terminal 93L is supported by the outer peripheral frame 94b by the tie bar 94a, it returns to its original position when the pressing force is released.

[0214] In the above description, the signal terminal 93L has been described as an example. However, the above configuration may be applied to the signal terminal 93H on the upper arm 9H side. Both the signal terminals 93H and 93L may have the above configuration. In the configuration described in the previous embodiment (see FIG. 11), each of the signal terminals 93H and 93L overlaps with the exposed portion of the insulating base material 51. The P wiring 54 of the surface metal body 52 has a notch 540, and the signal terminal 93H overlaps with the surface of the insulating base material 51 exposed from the notch 540.

[0215] <Summary of the Fourth Embodiment> In this embodiment, the signal terminal 93 (93L) overlaps with the exposed portion 510 of the insulating base material 51. However, the signal terminal 93 is non-bonded to the exposed portion 510. That is, the signal terminal 93 is not fixed to the insulating base material 51, and thus to the substrate 50. Thereby, the signal terminal 93 can absorb dimensional variations within the tolerances of the elements constituting the semiconductor device 20, assembly variations when assembling the elements, and the like. Therefore, when the sealing body 30 is molded, it is possible to suppress stress from concentrating on the electrical connection portion (bonding portion) between the signal terminal 93 and the semiconductor element 40. As a result, a semiconductor device 20 with high connection reliability can be provided.

[0216] In this embodiment, the signal terminal 93 is inserted and arranged up to a position overlapping the substrate 50, that is, onto the substrate 50. By adopting such an arrangement, in the Y direction, the signal terminal 93 approaches the pad 40P of the semiconductor element 40 (40L). Therefore, compared with a configuration in which the signal terminal 93 is arranged only at a position not overlapping the substrate 50, the length of the bonding wire 110, which is a connection member, can be shortened. Since the length of the bonding wire 110 can be shortened, when the sealing body 30 is molded by the transfer molding method or the like, it is possible to suppress wire flow, short circuits due to wire flow, wire breakage, and the like.

[0217] In this embodiment, the overlapping portion 930 of the signal terminal 93 floats with respect to the surface of the exposed portion 510 of the insulating base material 51. And a sealing body 30 is interposed between the lower surface of the overlapping portion 930 and the surface of the exposed portion 510. The sealing body 30 is also interposed between the joint portion 93b and the exposed portion 510. According to this, even if there are large manufacturing variations in the plate thickness direction, the variations can be absorbed. Also, since the signal terminal 93 is located above the insulating base material 51, it becomes easier to secure an insulation distance from the back surface metal body 53.

[0218] In this embodiment, the surface metal body 52 has a notch 550 (540). The notch 550 opens at an end in the Y direction, which is a direction orthogonal to the Z direction. And the overlapping portion 930 of the signal terminal 93 overlaps the surface of the exposed portion 510 exposed from the notch 550. In this way, by providing the notch 550 in the surface metal body 52 of the substrate 50, it is possible to suppress an increase in the size of the substrate 50 while securing an insulation distance between the surface metal body 52 and the signal terminal 93.

[0219] In this embodiment, the non-overlapping portion 931 of the signal terminal 93 has a tie bar mark 93a. As described above, the signal terminal 93L is a part of the lead frame 94 and is supported by the outer peripheral frame 94b by the tie bar 94a. Therefore, the signal terminal 93 can be bent by pressure to contact the exposed portion 510 of the insulating base material 51, and the bonding wire 110 can be bonded by ultrasonic bonding in this contact state. Then, by releasing the pressure after the bonding is completed, it returns to its original position.

[0220] In this embodiment, the signal terminal 93 has a bent portion 93d between the joint portion 93b and the extended portion 93e. Due to the bent portion 93d, the extended portion 93e is arranged at a position farther from the exposed portion 510 (insulating base material 51) than the joint portion 93b in the Z direction. By having the bent portion 93d in this way, it is possible to suppress an increase in the size in the Z direction while securing an insulation distance between the signal terminal 93 and the back surface metal body 53.

[0221] In this embodiment, the signal terminal 93 has a tip portion 93c. The tip portion 93c is farther from the exposed portion 510 (insulating base material 51) than the joint portion 93b in the Z direction. Thereby, it is possible to suppress the tip of the signal terminal 93 from damaging the insulating base material 51 during the above-described joining (ultrasonic joining). That is, it is possible to suppress a decrease in insulation performance. In particular, in this embodiment, since the tip portion 93c is lifted upward as it is farther from the joint portion 93b, it is difficult for the tip portion 93c to come into contact with the insulating base material 51. Further, since the tip portion 93c has an R shape in the ZY cross section, even if it comes into contact, it is possible to suppress damage to the insulating base material 51.

[0222] When the opposing surface is the burr surface 93g, there is a risk that the insulating base material 51 will be damaged and the insulation performance will deteriorate. In this embodiment, the signal terminal 93 is configured such that the surface on the side facing the exposed portion 510 is the press R surface 93f, and the back surface on the opposing surface side is the burr surface 93g. Thereby, it is possible to suppress a decrease in the insulation performance of the insulating base material 51.

[0223] <Modification> The non-joined configuration between the signal terminal 93 and the exposed portion 510 is not limited to the above example. For example, in FIG. 49, the overlapping portion 930 of the signal terminal 93 has a slight height gap such that the sealing body does not enter between the overlapping portion 930 and the surface of the exposed portion 510, and floats on the insulating base material 51. The sealing body 30 has a gap 31 between the lower surface of the overlapping portion 930 and the surface of the exposed portion 510. The signal terminal 93 is not fixed to the insulating base material 51 (exposed portion 510). Therefore, the same effect as the configuration shown in FIG. 47 can be achieved. FIG. 49 is a cross-sectional view showing a modification and corresponds to FIG. 47.

[0224] In FIG. 50, the overlapping portion 930 of the signal terminal 93 is in contact with the surface of the exposed portion 510. Although the signal terminal 93 is in contact with the insulating base material 51 (exposed portion 510), it is not fixed. Therefore, the same effect as the configuration shown in FIG. 47 can be achieved. FIG. 50 is a cross-sectional view showing a modified example and corresponds to FIG. 47. Note that a part of the lower surface of the joint portion 93b may be in contact with the insulating base material 51 and the other part may be non-contact.

[0225] In the example shown in FIG. 47, the substrate 60 was arranged so as not to overlap the signal terminal 93 in plan view. That is, the substrate 60 was not arranged above the signal terminal 93. By adopting such an arrangement, the size of the substrate 60 can be reduced. Also, it becomes easier to secure the insulation distance between the surface metal body 62 and the signal terminal 93. However, the positional relationship between the signal terminal 93 and the substrate 60 is not limited to the example shown in FIG. 47. For example, as shown in FIG. 51, the overlapping portion 930 of the signal terminal 93 also overlaps the substrate 60. The surface metal body 62 of the substrate 60 overlaps the overlapping portion 930 and the exposed portion 510 of the insulating base material 51 in plan view. According to this, the heat dissipation can be improved. FIG. 51 is a cross-sectional view showing a modified example and corresponds to FIG. 47.

[0226] In FIG. 52, with respect to FIG. 51, the surface metal body 62 is patterned so as not to overlap the overlapping portion 930 of the signal terminal 93. The insulating base material 61 and the back surface metal body 63 are located above the overlapping portion 930. According to this, by reducing the surface metal body 62, it becomes easier to secure the insulation distance between the surface metal body 62 and the signal terminal 93. Since the back surface metal body 63 is large, the heat dissipation can be enhanced. FIG. 52 is a cross-sectional view showing a modified example and corresponds to FIG. 47.

[0227] An example was shown in which the length of the bonding wire 110 (connecting member) can be shortened by inserting the signal terminal 93 onto the substrate 50. Instead of this, the length of the bonding wire 110 may be shortened by using the relay substrate 150 shown in FIGS. 53 to 55. FIG. 53 is a plan view showing a modified example and corresponds to FIG. 46. In FIG. 53, in order to show the positional relationship among the substrate 50, the signal terminal 93, and the relay substrate 150, a part of the elements of the semiconductor device 20 is shown with omission. FIG. 54 is a cross-sectional view showing the relay substrate. FIG. 55 is a cross-sectional view taken along the LV-LV line in FIG. 53. Here, as an example, the relay wiring 55 and the signal terminal 93L are shown, but the same configuration can be adopted for the P wiring 54 and the signal terminal 93H.

[0228] The semiconductor device 20 further includes a relay substrate 150. As shown in FIGS. 53 and 55, the relay substrate 150 is disposed on the surface metal body 52 (relay wiring 55) of the substrate 50. As shown in FIG. 54, the relay substrate 150 has an insulating base material 151 and a conductor portion 152 disposed on the insulating base material 151. A part of the conductor portion 152 provides a wiring function. The relay substrate 150 may be referred to as a printed circuit board or a wiring board.

[0229] The conductor portion 152 has lands 152a and 152b. The lands 152a and 152b are exposed on one surface of the relay substrate 150. Specifically, they are exposed from a solder resist 153 provided on one surface 151a of the insulating base material 151. The land 152a is electrically connected to the pad 40P via the bonding wire 110. The signal terminal 93 overlaps the substrate 50 in a plan view. The signal terminal 93 is connected to the land 152b.

[0230] The conductor part 152 has wirings 152c and via conductors 152d other than lands 152a and 152b. At least a part of the wiring 152c is an inner layer wiring disposed inside the insulating base material 151. The land 152a and the land 152b are electrically connected via the wiring 152c and the via conductor 152d. The plurality of lands 152a include two lands 152a individually connected to pads 40P for gate electrodes of the two semiconductor elements 40. The two lands 152a for gate electrodes are electrically connected to one land 152b for gate electrodes via the wiring 152c and the via conductor 152d.

[0231] Thus, when using the relay substrate 150, the connection target (land 152a) of the bonding wire 110 can be brought closer to the pad 40P. Thereby, the length of the bonding wire 110 that electrically connects the pad 40P and the signal terminal 93 can be shortened. Also, the wiring 152c can be freely routed within the relay substrate 150. Thereby, in a configuration where the semiconductor elements 40 are connected in parallel, it is possible to avoid the bonding wires 110 from crossing each other. Therefore, it is possible to suppress contact between the wires during the molding of the sealing body 30. Also, with the micro-wiring technology of the printed circuit board, it is possible to achieve a size reduction comparable to the configuration shown in FIG. 47.

[0232] The conductor part 152 further has a fixing land 152e. The fixing land 152e is a land for fixing the relay substrate 150 to the substrate 50. The fixing land 152e does not provide an electrical connection function, that is, a wiring function. The fixing land 152e is disposed on the back surface 151b of the insulating base material 151. The fixing land 152e (relay substrate 150) is joined to the surface metal body 52 via a joining material 154. As the joining material 154, for example, solder can be used.

[0233] Thus, in order to fix the relay substrate 150 to the surface metal body 52, wire bonding can be stably performed. As the bonding material 154, solder containing Ni balls may be used. In this case, the thickness of the bonding material 154 can be controlled by the Ni balls. Also, the inclination of the relay substrate 150 can be suppressed.

[0234] The wiring function provided by the conductor part 152 is electrically separated from the surface metal body 52 by the insulating base material 151. For example, the insulating base material 151 may have a non-arrangement region 151c where the conductor part 152 is not arranged and an arrangement region 151d where the conductor part 152 is arranged in the Z direction. In the Z direction, the non-arrangement region 151c is provided at the center of the insulating base material 151, and the arrangement regions 151d are provided on the surface layers on both sides. The non-arrangement region 151c may be referred to as a core layer. In this way, since the insulating base material 151 has the non-arrangement region 151c, the conductor part 152 that provides the wiring function and is arranged on one surface 151a side can be electrically separated from the fixing land 152e and thus the surface metal body 52.

[0235] The solder resist 153 has low adhesion to the sealing body 30. Also, the peeling of the sealing body 30 due to thermal stress progresses starting from the outer peripheral edge of the relay substrate 150. For example, the insulating base material 151 may have an exposed part 151e that is exposed from the solder resist 153. The exposed part 151e is provided at the outer peripheral edge on one surface 151a of the insulating base material 151. The insulating base material 151 has higher adhesion to the sealing body 30 than the solder resist 153. At the exposed part 151e, the sealing body 30 adheres to the relay substrate 150. Thereby, the peeling of the sealing body 30 from the relay substrate 150 can be suppressed. Since the sealing body 30 adheres at the outer peripheral edge, the conductor parts 152 such as the lands 152a and 152b that are exposed from the solder resist 153 can be protected.

[0236] As shown in FIG. 55, the signal terminal 93 (93L) has a first extended portion 93h, a second extended portion 93i, and a bent portion 93j. The first extended portion 93h and the second extended portion 93i extend in the Y direction. The first extended portion 93h is disposed inside the sealing body 30. The second extended portion 93i is disposed across the inside and outside of the sealing body 30. The bent portion 93j is provided between the first extended portion 93h and the second extended portion 93i. The first extended portion 93h is a portion on the tip side with respect to the bent portion 93j, and the second extended portion 93i is a portion on the rear end side with respect to the bent portion 93j.

[0237] The signal terminal 93 may have a protrusion 93k. The protrusion 93k is provided near the tip of the signal terminal 93. The protrusion 93k protrudes from the first extended portion 93h in the Z direction and toward the land 152b. The protrusion 93k is joined to the land 152b. In the signal terminal 93, the tip portion of the first extended portion 93h and the protrusion 93k overlap the land 152b in a plan view in the Z direction. The continuous portion of the tip portion of the first extended portion 93h and the protrusion 93k is a thick portion, and the other portions of the signal terminal 93 are thin portions. By providing the protrusion 93k in this way, since the signal terminal 93 (the first extended portion 93h) moves away from the surface metal body 52, it becomes easy to secure an insulation distance from the surface metal body 52.

[0238] FIG. 56 shows an example different from FIG. 54. FIG. 56 corresponds to FIG. 54. In FIG. 56, the relay substrate 150 is fixed to the exposed portion 510 of the insulating base material 51. In this case, due to the thickness of the bonding material 154 and the relay substrate 150, an insulation distance between the signal terminal 93 and the back surface metal body 53 can be ensured. When using the solder containing Ni balls described above as the bonding material 154, a predetermined thickness can be ensured, so it becomes easy to ensure the insulation distance. Further, the inclination of the relay substrate 150 can be suppressed.

[0239] The surface metal body 52 (intermediate wiring 55) has a notch 550 as shown in FIG. 46, for example, to expose the insulating base material 51. For example, the surface metal body 52 may have a chamfered portion 554. The chamfered portion 554 is provided at least on the surface where a virtual straight line connecting the semiconductor element 40 and the intermediate substrate 150 intersects among the end faces defining the notch 550. The chamfered portion 554 is provided at the upper end of the end face. Thereby, an insulating distance between the bonding wire 110 and the surface metal body 52 can be ensured.

[0240] An example in which the semiconductor device 20 includes a substrate 60 electrically connected to the source electrode 40S is shown. That is, an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 is shown. However, the present invention is not limited to this example. The present invention is also applicable to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected. Although an example in which both the back surface metal bodies 53 and 63 are exposed from the sealing body 30 is shown, the present invention is not limited to this.

[0241] An example in which the semiconductor device 20 includes a semiconductor element 40H constituting the upper arm 9H and a semiconductor element 40 constituting the lower arm 9L is shown, but the present invention is not limited to this. The semiconductor device 20 may include only a semiconductor element 40 that constitutes one of the arms. For example, the semiconductor device 20 may include only one semiconductor element 40.

[0242] The configuration described in the present embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, and the modified example.

[0243] (Fifth Embodiment) This embodiment is a modified example based on the preceding embodiments, and the description of the preceding embodiments can be incorporated. In order to achieve both ensuring insulation reliability and reducing the physical size, as described in the present embodiment, the connection portion between the metal member and the surface metal body via the bonding material may have a predetermined structure.

[0244] <Semiconductor Device> First, based on FIG. 57, the semiconductor device 20 of this embodiment will be described. FIG. 57 corresponds to FIG. 5.

[0245] The semiconductor device 20 of this embodiment has the same configuration as the configuration described in the previous embodiment (see FIGS. 2 to 13). As shown in FIG. 57, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 arranged so as to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D which is the main electrode of the semiconductor element 40. The surface metal body 52 is connected to the P terminal 91P which is the main terminal and the output terminal 92 via the bonding material 104. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S which is the main electrode of the semiconductor element 40. The surface metal body 62 is connected to the N terminal 91N (not shown) which is the main terminal via the bonding material 104. The sealing body 30 seals a part of each of the semiconductor element 40, the substrates 50 and 60, the main terminals, and the bonding material 104.

[0246] <Bonding structure of main terminals> Next, based on FIGS. 57 to 60, the bonding structure of the main terminals will be described. FIG. 58 is a plan view of the periphery of the output terminal 92 in FIG. 57 as viewed from the LVIII direction. In FIG. 58, for clarity, some hatching is applied. FIG. 59 is an enlarged view of the region LVIX indicated by the dashed-dotted line in FIG. 57. FIG. 60 is a view showing the state in which the bonding material 104 is removed from FIG. 59. In FIGS. 59 and 60, for convenience, the sealing body 30 is omitted from the illustration.

[0247] As shown in FIG. 57, the bonding structure of the P terminal 91P which is the main terminal and the output terminal 92 with the substrate 50 is different from the configuration described in the previous embodiment (see FIG. 5). Although not shown, the bonding structure of the N terminal 91N which is the main terminal is also different. Regarding other configurations, they are the same as the configurations described in the previous embodiment. Hereinafter, the output terminal 92 will be described as an example. The bonding material 104 spreads wetting the metal surface during bonding. As an example, the bonding material 104 is solder.

[0248] As shown in FIG. 57, the substrate 50 has end portions 50c and 50d in the Y direction. The end portion 50c is the end portion on the side of the side surface 30c of the sealing body 30, and the end portion 50d is the end portion on the side of the side surface 30d. The output terminal 92 extends in the Y direction across the end portion 50d of the substrate 50. In a plan view in the Z direction, a part of the output terminal 92 overlaps with the surface metal body 52 (relay wiring 55), and the other part does not overlap. As shown in FIGS. 58 to 60, the output terminal 92 has an opposing surface 920 and a housing portion 921.

[0249] The opposing surface 920 is a portion of the lower surface of the output terminal 92 that faces the surface metal body 52 (relay wiring 55) of the substrate 50 in the Z direction. The opposing surface 920 is macroscopically a flat surface and ideally contacts the upper surface 52a of the surface metal body 52 over the entire surface. The opposing surface 920 microscopically has minute irregularities on the surface and at least a part thereof contacts the upper surface 52a. The opposing surface 920 may be referred to as a metal touch surface. The opposing surface 920 is a portion within a predetermined range in the Y direction from the position overlapping with the end portion 52b of the surface metal body 52 in a plan view. The end portion 52b is the end surface (side surface) on the side of the side surface 30d of the sealing body 30 in the Y direction and is continuous with the upper surface 52a. The end portion 52b forms a part of the end portion 50d. The opposing surface 920 has a substantially rectangular shape in plan.

[0250] The housing portion 921 is provided adjacent to the opposing surface 920 and provides a housing space for the bonding material 104. For example, the housing portion 921 is a recess that is recessed in a direction away from the upper surface 52a with respect to the opposing surface 920. The housing portion 921, which is a recess, is a surface including a Z-direction component and has a side surface 921a continuous with the opposing surface 920 and a bottom surface 921b continuous with the side surface 921a. The side surface 921a is, for example, a surface substantially parallel to the Z direction. The housing portion 921 opens at the front end surface 922, which is the side surface on the prior application side of the output terminal 92 in the Y direction. The housing portion 921 opens at the side surfaces 923 and 924 on both sides of the output terminal 92 in the X direction. The housing portion 921 is provided within a predetermined range from the front end surface 922 of the output terminal 92 in the Y direction. The housing portion 921 has a substantially rectangular shape in plan. The housing portion 921 is provided side by side with the X direction in the Y direction.

[0251] The output terminal 92 houses the bonding material 104 in the housing portion 921 with the opposing surface 920 in contact with the surface metal body 52. The bonding material 104 may be disposed only within the housing portion 921, or as shown in FIG. 59, a part of the bonding material 104 may be disposed outside the housing portion 921. In FIG. 59, the bonding material 104 forms a fillet with respect to the tip surface 922. The output terminal 92 is connected (bonded) to the surface metal body 52 via the bonding material 104 disposed in the housing portion 921.

[0252] <Bonding method of main terminal> The bonding structure between the output terminal 92 and the surface metal body 52 is formed as follows, for example. With the bonding material 104 (solder) disposed in the housing portion 921, the upper portion of the opposing surface 920 of the output terminal 92 in the Z direction and toward the substrate 50 side is pressed so that the opposing surface 920 comes into strong contact with the upper surface 52a. Reflow is performed with the opposing surface 920 in strong contact with the upper surface 52a. For this reason, during reflow, the bonding material 104 does not spread by wetting to the opposing surface 920 side, or even if it spreads by wetting, it only enters the recesses of the minute irregularities on the surface of the opposing surface 920.

[0253] <Summary of the fifth embodiment> In this embodiment, the opposing surface 920 of the output terminal 92, which is a metal member, comes into contact (metal touch) with the upper surface 52a of the surface metal body 52. Thereby, it is possible to suppress the overflow of the bonding material 104 from the housing portion 921 to the opposing surface 920 side. Thereby, the wetting spread of the bonding material 104 in an unintended direction is suppressed, and insulation reliability can be ensured. Further, the output terminal 92, which is a single member, has both the housing portion 921 and the opposing surface 920. As a result, it is possible to provide the semiconductor device 20 that can achieve both insulation reliability and miniaturization of the physical size.

[0254] In the configuration including the substrate 50, when the bonding material 104 wets and spreads on the end portion 52b (end face) of the surface metal body 52, and thus on the insulating base material 51, the portion at the same potential as the surface metal body 52 spreads, and the distance to the back surface metal body 53 becomes shorter. There is also a possibility that the bonding material 104 contacts the back surface metal body 53. In the present embodiment, the opposing surface 920 is provided at a position closer to the end portion 50d of the substrate 50, that is, the end portion 52b of the surface metal body 52, than the accommodating portion 921. By disposing the opposing surface 920 on the end portion 52b side, it is possible to suppress the bonding material 104 from wetting and spreading on the surfaces of the output terminal 92 and / or the surface metal body 52 and reaching the end portion 52b, and thus the insulating base material 51. Thereby, the insulation reliability can be enhanced without increasing the size.

[0255] As described above, the metal member including the opposing surface and the accommodating portion can also be applied to the P terminal 91P and the N terminal 91N which are other main terminals. The P terminal 91P is connected to the surface metal body 52 (P wiring 54) of the substrate 50 via the bonding material 104. By the opposing surface of the P terminal 91P contacting the surface metal body 52, it is possible to suppress the overflow of the bonding material 104 from the accommodating portion of the P terminal 91P to the opposing surface side. As shown in FIG. 57, by providing the opposing surface on the end portion 50c side of the substrate 50, it is possible to suppress the bonding material 104 from wetting and spreading on the end portion of the surface metal body 52 and the insulating base material 51.

[0256] The N terminal 91N is connected to the surface metal body 62 (N wiring 64) of the substrate 60 via the bonding material 104. By the opposing surface of the N terminal 91N contacting the surface metal body 62, it is possible to suppress the overflow of the bonding material 104 from the accommodating portion of the N terminal 91N to the opposing surface side. Further, by providing the opposing surface on the end portion 60c side of the substrate 60 shown in FIG. 57, it is possible to suppress the bonding material 104 from wetting and spreading on the end portion of the surface metal body 62 and the insulating base material 61. The end portion 60c is the end face (side face) on the side face 30c side of the sealing body 30 in the Y direction.

[0257] <Modification example> The arrangement of the opposing surface 920 and the accommodating portion 921 is not limited to the above-described example. For example, the configurations shown in FIGS. 61 and 62 may be adopted. FIG. 61 is a plan view showing a modified example and corresponds to FIG. 58. FIG. 62 is a plan view seen from the LXII direction shown in FIG. 61. In this example, the accommodating portion 921 does not have openings in the side surfaces 923 and 924, and has an opening only in the front end surface 922. The accommodating portion 921 has an opening 921c in the front end surface 922 which is a side surface.

[0258] The opposing surface 920 has a first opposing portion 920a and a second opposing portion 920b. The first opposing portion 920a is provided on the side opposite to the opening 921c with respect to the accommodating portion 921. In the Y direction which is the extending direction of the output terminal 92, the first opposing portion 920a is adjacent to the accommodating portion 921. The second opposing portion 920b is adjacent to the accommodating portion in the X direction. In the example shown in FIGS. 61 and 62, the opposing surface 920 has a pair of second opposing portions 920b. The pair of second opposing portions 920b sandwich the accommodating portion 921 in the X direction. The opposing surface 920 has a substantially U-shaped plane (substantially U-shaped). Since the opposing surface 920 is arranged on three sides with respect to the accommodating portion 921, the overflow direction of the bonding material 104 from the accommodating portion 921 can be restricted to one direction on the side of the opening 921c. Thereby, the insulation reliability can be further enhanced.

[0259] Note that the opposing surface 920 may be configured to include only one second opposing portion 920b. In this case, the opposing surface 920 has a substantially L-shaped plane. Since the opposing surface 920 is arranged on two sides with respect to the accommodating portion 921, the overflow direction of the bonding material 104 from the accommodating portion 921 can be restricted with respect to the arrangement in FIG. 58. Thereby, the insulation reliability can be enhanced.

[0260] Although the example in which the housing portion 921 opens to the side surface of the output terminal 92 has been shown, the present invention is not limited to this. Further, the planar shape of the housing portion 921 is not limited to a substantially rectangular shape. For example, as shown in FIG. 63, a housing portion 921 having no opening on the side surface may be provided. FIG. 63 is a plan view showing a modification and corresponds to FIG. 58. In FIG. 63, the housing portion 921 has a substantially circular planar shape. The housing portion 921 is a hole that opens to the lower surface of the output terminal 92. The housing portion 921 shown in FIG. 63 is an unperforated hole. The housing portion 921 that is an unperforated hole has a side surface 921a and a bottom surface 921b that are continuous with the opposing surface 920, similar to the housing portion 921 described above. Alternatively, a through hole that opens to the upper surface of the output terminal 92 may be employed. The housing portion 921 that is a through hole has no bottom surface 921b and has a side surface 921a.

[0261] The metal member including the opposing surface and the housing portion is not limited to the main terminal. For example, as shown in FIGS. 64 and 65, in the semiconductor device 20 that constitutes the upper and lower arm circuits 9, the joint portion 81 may be provided with an opposing surface and a housing portion. FIG. 64 is a cross-sectional view showing a modification and corresponds to FIG. 57. FIG. 65 is an enlarged view of a region LXV indicated by a one-dot chain line in FIG. 64. In FIG. 65, for convenience, the sealing body 30 is omitted from the illustration.

[0262] As described in the previous embodiment, the semiconductor device 20 includes a semiconductor element 40H that is a first semiconductor element constituting the upper arm 9H and a semiconductor element 40L that is a second semiconductor element constituting the lower arm 9L. The joint portion 81 electrically connects the source electrode 40S of the semiconductor element 40H and the drain electrode 40D of the semiconductor element 40L. The joint portion 81 is a metal columnar body extending in the Z direction. The end portion 81a of the joint portion 81 is connected to the relay wiring 55 that is the first wiring of the substrate 50 via the bonding material 103. The end portion 81b opposite to the end portion 81a is connected to the relay wiring 65 that is the third wiring of the substrate 60 via the bonding material 103. The surface metal body 52 has a P wiring 54 that is a second wiring provided with a predetermined interval from the relay wiring 55. The surface metal body 62 has an N wiring 64 that is a fourth wiring provided with a predetermined interval from the relay wiring 65.

[0263] In the examples shown in FIGS. 64 and 65, opposing surfaces 810 and receiving portions 811 are provided at respective ends 81a and 81b of the joint portion 81. The configurations of the opposing surface 810 and the receiving portion 811 are the same as those of the above-described opposing surface 920 and receiving portion 921. At the end 81a, the opposing surface 810 faces the upper surface 52a of the surface metal body 52 (intermediate wiring 55). The opposing surface 810 is in contact with the upper surface 52a. The receiving portion 811 is a recess recessed with respect to the opposing surface 810. The receiving portion 811 has a side surface 811a continuous with the opposing surface 810 and a bottom surface 811b. The receiving portion 811 houses the bonding material 103.

[0264] The opposing surface 810 and the receiving portion 811 are provided side by side in the Y direction. The opposing surface 810 is provided at a position close to the P wiring 54, which is a wiring different from the intermediate wiring 55 to which the joint portion 81 is connected, on the wiring gap 52G side that separates the intermediate wiring 55 and the P wiring 54. The receiving portion 811 opens to the side surface 812 of the joint portion 81 in the Y direction and does not open to the side surface 813 opposite to the side surface 812. The receiving portion 811 may open only to the side surface 812, or may open to three side surfaces including two side surfaces adjacent to the side surface 812.

[0265] In this way, the opposing surface 810 of the joint portion 81 comes into contact (metal touch) with the surface metal body 52. Thereby, it is possible to suppress the overflow of the bonding material 103 from the receiving portion 811 to the opposing surface 810 side. Therefore, it is possible to provide the semiconductor device 20 that can achieve both insulation reliability and miniaturization of the physical size.

[0266] Further, when the bonding material 103 wets and spreads within the wiring gap 52G of the surface metal body 52, the portion at the same potential as the intermediate wiring 55 spreads, and the distance from the P wiring 54 becomes closer. The bonding material 103 may come into contact with the P wiring 54. On the other hand, in the above-described example, the opposing surface 810 is provided at a position closer to the P wiring 54, that is, the wiring gap 52G, than the receiving portion 811. Thereby, it is possible to suppress the bonding material 103 from reaching the wiring gap 52G. Therefore, it is possible to improve the insulation reliability without increasing the physical size.

[0267] The configuration of the end portion 81b is the same as that of the end portion 81a side. In the end portion 81b, the opposing surface 810 faces the upper surface 62a of the surface metal body 62 (relay wiring 65). The opposing surface 810 is in contact with the upper surface 52a. The accommodating portion 811 is a recess. The accommodating portion 811 accommodates the bonding material 103. The opposing surface 810 and the accommodating portion 811 are provided side by side in the Y direction. The opposing surface 810 is provided on the side of the wiring gap 62G that separates the relay wiring 65 and the N wiring 64, that is, at a position close to the N wiring 64 which is a wiring different from the relay wiring 65 to which the joint portion 81 is connected. The accommodating portion 811 opens to the side surface 813 of the joint portion 81 in the Y direction and does not open to the side surface 812. The accommodating portion 811 may open only to the side surface 813, or may open to three side surfaces including two side surfaces adjacent to the side surface 813.

[0268] In this way, the opposing surface 810 of the joint portion 81 comes into contact (metal touch) with the surface metal body 62. Thereby, the overflow of the bonding material 103 from the accommodating portion 811 to the opposing surface 810 side can be suppressed. Therefore, the semiconductor device 20 capable of achieving both insulation reliability and miniaturization of the physical size can be provided. Further, the opposing surface 810 is provided at a position closer to the N wiring 64, that is, the wiring gap 62G than the accommodating portion 811. Thereby, the bonding material 103 can be suppressed from reaching the wiring gap 62G. Therefore, the insulation reliability can be enhanced without increasing the physical size.

[0269] In the above example, the overflow of the bonding material was suppressed by the contact of the surface metal body by the opposing surface of the metal member. By further adding an uneven oxide film formed by laser irradiation to this configuration, the function of suppressing the overflow may be enhanced. An example is shown in FIGS. 66 and 67. FIG. 66 is a cross-sectional view corresponding to FIG. 65, and for convenience, the sealing body 30 is omitted. FIG. 67 is an enlarged view of the region LXVII indicated by the dashed-dotted line in FIG. 66, and only the surface metal body 52 is shown.

[0270] In the example shown in FIG. 66, corresponding to the joint portion 81, uneven oxide films 520 and 620 are provided on the surface metal bodies 52 and 62, respectively. Hereinafter, the uneven oxide film 520 will be described as an example. As shown in FIG. 67, the surface metal body 52 has a base material 521, a metal film 522 provided on the surface of the base material 521, and an uneven oxide film 520. The base material 521 forms the main part of the surface metal body 52. The base material 521 is formed using, for example, a Cu-based material. The metal film 522 is formed including a material having higher wettability to solder than the base material 521. The metal film 522 is formed over the entire upper surface 52a. The metal film 522 of the present embodiment is formed over the entire surface of the base material 521. The uneven oxide film 520 is locally formed on the upper surface 52a.

[0271] The uneven oxide film 520 is locally formed on the metal film 522 on the upper surface 52a by irradiating the metal film 522 with laser light. The metal film 522 has an underlying film mainly composed of Ni (nickel) and an upper layer film mainly composed of Au (gold). In the present embodiment, an electroless Ni plating film containing P (phosphorus) is employed as the underlying film. When the bonding material 103 is solder, among the metal film 522 exposed from the uneven oxide film 520, the upper layer film (Au) of the portion where the bonding material 103 contacts diffuses into the solder during reflow. Among the metal film 522, the upper layer film (Au) of the portion where the uneven oxide film 520 is formed is removed by irradiation with laser light when forming the uneven oxide film 520. The uneven oxide film 520 is a film of an oxide mainly composed of Ni. For example, among the components constituting the uneven oxide film 520, 80% is NI2O3, 10% is NiO, and 10% is Ni.

[0272] The recesses 523 on the surface of the metal film 522 are formed by irradiating laser light with pulse oscillation. One recess 523 is formed for each pulse. The concavo-convex oxide film 520 is formed by melting, vaporizing, and depositing the surface layer portion of the metal film 522 by irradiating laser light. The concavo-convex oxide film 520 is an oxide film derived from the metal film 522. The concavo-convex oxide film 520 is a film of an oxide of the metal (Ni) which is the main component of the metal film 522. The concavo-convex oxide film 520 is formed following the unevenness on the surface of the metal film 522 having the recesses 523. On the surface of the concavo-convex oxide film 520, unevenness is formed at a pitch finer than the width of the recesses 523. That is, very fine unevenness (roughened portions) is formed.

[0273] Such a concavo-convex oxide film 520 can be formed by the steps shown below. First, the upper surface 52a of the surface metal body 52 on which the metal film 522 is formed on the base material 521 is irradiated with laser light with pulse oscillation to melt and evaporate the surface of the metal film 522. The laser light with pulse oscillation is adjusted so that the energy density is greater than 0 J / cm2 and 100 J / cm2 or less, and the pulse width is 1 μs or less. To satisfy this condition, a YAG laser, a YVO4 laser, a fiber laser, etc. can be employed. For example, in the case of a YAG laser, the energy density may be 1 J / cm2 or more. In the case of electroless Ni plating, for example, the metal film 522 can be processed even at about 5 J / cm2.

[0274] At this time, by relatively moving the light source of the laser light and the surface metal body 52, the laser light is scanned and irradiated in order at a plurality of positions. By irradiating the laser light and melting and vaporizing the surface of the metal film 522, recesses 523 are formed on the surface of the metal film 522. The average thickness of the portion of the metal film 522 irradiated with the laser light becomes thinner than the average thickness of the portion not irradiated with the laser light. Also, the plurality of recesses 523 formed corresponding to the spots of the laser light are continuous and, for example, become scaly. A spot is the irradiation range by one pulse. For example, the laser light is scanned so that the spots of the laser light adjacent in the X direction partially overlap and the spots of the laser light adjacent in the Y direction partially overlap.

[0275] Next, the molten portion of the metal film 522 is solidified. Specifically, the melted and vaporized metal film 522 is deposited on the irradiated portion of the laser beam and its peripheral portion. Thus, by depositing the melted and vaporized metal film 522, the concavo-convex oxide film 520 is formed on the surface of the metal film 522.

[0276] In FIG. 66, the concavo-convex oxide film 520 is not provided in the first region 524 that overlaps the accommodating portion 811 of the joint portion 81 in a plan view among the upper surfaces 52a of the surface metal body 52. The concavo-convex oxide film 520 is selectively provided in the second region 525 that overlaps the opposing surface 810. The configurations of the surface metal body 62 and the concavo-convex oxide film 620 are the same as those of the surface metal body 52 and the concavo-convex oxide film 520. The concavo-convex oxide film 620 is not provided in the first region 624 that overlaps the accommodating portion 811 of the joint portion 81 in a plan view among the upper surfaces 62a of the surface metal body 62. The concavo-convex oxide film 620 is selectively provided in the second region 625 that overlaps the opposing surface 810.

[0277] The oxide films (concavo-convex oxide films 520, 620) have lower wettability with respect to the bonding material 103 than the metal film. Since the concavo-convex oxide films 520, 620 have fine irregularities on the surface, the contact area with the bonding material 103 becomes small, and a part of the bonding material 103 becomes spherical due to surface tension. That is, the contact angle becomes large. As a result, the wettability with respect to the bonding material 103 is low. Therefore, due to the effect of the decrease in wettability by the concavo-convex oxide films 520, 620 and the effect of contact by the opposing surface 810, it is difficult for the bonding material 103 to pass between the opposing surface 810 and the second regions 525, 625. Thereby, the overflow of the bonding material 103 can be more effectively suppressed. Since laser light is used for the formation of the concavo-convex oxide films 520, 620 as described above, patterning is easy.

[0278] As shown in FIG. 68, the concavo-convex oxide films 520 and 620 may be provided in the peripheral regions 526 and 626. The peripheral region 526 is a region around the second region 525 in a plan view, excluding the first region 524. The peripheral region 626 is a region around the second region 625 in a plan view, excluding the first region 624. Even if the bonding material 103 passes directly below the opposing surface 810 of the joint portion 81 by any chance, it can be blocked by the concavo-convex oxide films 520 and 620. Further, since very fine irregularities are formed on the surfaces of the concavo-convex oxide films 520 and 620, the sealing body 30 gets entangled and an anchor effect occurs. Also, the contact area with the sealing body 30 increases. Therefore, the adhesion of the surface metal bodies 52 and 62 to the sealing body 30 can be enhanced.

[0279] Note that the concavo-convex oxide films 520 and 620 may be provided in the second regions 525 and 625 and the peripheral regions 526 and 626. Only one of the concavo-convex oxide films 520 and 620 may be provided. The concavo-convex oxide films 520 and 620 may be used for the joints with the main terminals which are metal members, that is, the P terminal 91P, the N terminal 91N, and the output terminal 92.

[0280] An example in which the semiconductor device 20 includes a substrate 60 electrically connected to the source electrode 40S (the second main electrode) has been shown. That is, an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 has been shown. However, it is not limited to this example. It is also applicable to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (the first main electrode) is connected. In the semiconductor device 20 including a pair of substrates 50 and 60, the above structure may be applied only to the joint between one of the substrates 50 and 60 and the metal member. Although an example in which both the back surface metal bodies 53 and 63 are exposed from the sealing body 30 has been shown, it is not limited to this.

[0281] An example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L has been shown, but it is not limited to this. It may include only the semiconductor element 40 that constitutes one of the arms. The semiconductor device 20 may include, for example, only one semiconductor element 40.

[0282] The configuration described in this embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, and the modification examples.

[0283] (Sixth Embodiment) This embodiment is a modification example based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In order to improve the reliability of the semiconductor device, as described in this embodiment, the physical properties of the encapsulant and the physical properties of the insulating substrate may satisfy a predetermined relationship.

[0284] <Semiconductor Device and Heat Dissipation Structure> Based on FIG. 69, the semiconductor device 20 of this embodiment and its heat dissipation structure will be described. FIG. 69 is a cross-sectional view showing the semiconductor device 20 according to this embodiment. FIG. 69 is an enlarged view of a part of FIG. 5. In FIG. 69, for convenience, the external connection terminal 90 is omitted.

[0285] The semiconductor device 20 of this embodiment has the same structure as the structure described in the preceding embodiment (see FIGS. 2 to 13). As shown in FIG. 69, the semiconductor device 20 includes a semiconductor element 40 (40H), substrates 50 and 60 arranged so as to sandwich the semiconductor element 40 in the Z direction, and an encapsulant 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D which is the main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S which is the main electrode of the semiconductor element 40. The back metal bodies 53 and 63 are exposed from the encapsulant 30. The insulating substrates 51 and 61 contain resin. The encapsulant 30 contains resin. Although not shown, the semiconductor device 20 includes a semiconductor element 40L.

[0286] In FIG. 69, together with the semiconductor device 20, the heat exchange portion 121 of the cooler 120 and the heat conductive member 130 such as heat dissipation gel are shown. That is, FIG. 69 shows a semiconductor module 140 including the semiconductor device 20, the cooler 120, and the heat conductive member 130. As an example, the semiconductor module 140 has a double-sided cooling structure in which the semiconductor device 20 is sandwiched by a pair of heat exchange portions 121. The semiconductor device 20 is arranged side by side with the cooler 120 (heat exchange portion 121) in the Z direction which is a predetermined direction. The cooler 120 is arranged on both sides of the semiconductor device 20.

[0287] The back metal bodies 53 and 63 are exposed from the sealing body 30 as the back surfaces 50b and 60b of the substrates 50 and 60. One of the heat exchange portions 121 of the cooler 120 is arranged to face one surface 30a and the back surface 50b of the sealing body 30, and the other one of the heat exchange portions 121 is arranged to face the back surface 30b and the back surface 60b of the sealing body 30. Heat conductive members 130 are respectively arranged between the opposing surfaces of the semiconductor device 20 and the heat exchange portion 121. The heat conductive members 130 are in close contact with the semiconductor device 20 and the heat exchange portion 121.

[0288] <Relationship of glass transition points> Next, based on FIGS. 69 and 70, the relationship between the glass transition points of the sealing body 30 and the insulating base materials 51 and 61 will be described.

[0289] FIG. 70 is a diagram showing an example of the relationship between the glass transition point Tgs and the linear expansion coefficient αs of the sealing body 30, and the glass transition point Tgi and the linear expansion coefficient αi of the insulating base materials 51 and 61. In FIG. 70, the vertical axis represents the linear expansion coefficient α, and the horizontal axis represents the temperature. In FIG. 70, the solid line represents the linear expansion coefficient αs of the sealing body 30, and the broken line represents the linear expansion coefficient αi of the insulating base materials 51 and 61. Among the linear expansion coefficients αs, α1s represents the linear expansion coefficient at a temperature lower than the glass transition point Tgs, that is, the linear expansion coefficient in the α1 region. α2s represents the linear expansion coefficient at a temperature higher than the glass transition point Tgs, that is, the linear expansion coefficient in the α2 region. The same applies to the linear expansion coefficient αi. α1i represents the linear expansion coefficient in the α1 region, and α2s represents the linear expansion coefficient in the α2 region.

[0290] As shown in FIG. 69, the sealing body 30 is in close contact with the semiconductor element 40. The insulating base materials 51 and 61 are thermally connected to the semiconductor element 40 via the bonding materials 100, 101, 102 and the surface metal bodies 52, 62. Therefore, during the operation (heat generation) of the semiconductor element 40, the temperature at the peripheral position MP1 of the semiconductor element 40 in the sealing body 30 is higher than the temperatures at the positions MP2 and MP3 of the insulating base materials 51 and 61 that overlap the semiconductor element 40. Thus, the sealing body 30 becomes hotter than the insulating base materials 51 and 61.

[0291] When the temperature of the sealing body 30 exceeds the glass transition point Tgs, the Young's modulus decreases, and the sealing function of the sealing body 30 deteriorates. Due to the deterioration of the sealing function, thermal stress concentrates on the drain electrode 40D, the source electrode 40S, and their joints, and there is a risk of cracks or the like occurring. That is, there is a risk that the connection reliability will decrease. In contrast, in the present embodiment, as shown in FIG. 70, the relationship Tgs > Tgi is satisfied.

[0292] <Relationship of coefficient of linear expansion> Next, based on FIGS. 70 to 72, the relationship between the coefficients of linear expansion of the sealing body 30 and the insulating base materials 51 and 61 will be described. FIGS. 71 and 72 are schematic diagrams showing the warping of the semiconductor device 20. In FIGS. 71 and 72, only the resin elements constituting the semiconductor device 20, that is, only the sealing body 30 and the insulating base materials 51 and 61 are shown.

[0293] During the operation (heat generation) of the semiconductor element 40, if the coefficient of linear expansion αs of the sealing body 30 is larger than the coefficient of linear expansion αi of the insulating base materials 51 and 61, as indicated by the dashed arrow in FIG. 71, the amount of expansion of the sealing body 30 becomes larger than the amount of expansion of the insulating base materials 51 and 61. That is, the amount of expansion is large at the center in the Z direction and small at both ends. Therefore, a concave shape with both ends in the Z direction recessed is formed.

[0294] In this embodiment, as shown in FIG. 70, the relationship of αi > αs is satisfied. Specifically, in the α1 region, the relationship of α1i > α1s is satisfied, and in the α2 region, the relationship of α2i > α2s is satisfied. As described above, since the relationship of Tgs > Tgi is satisfied, the relationship of αi > αs is satisfied throughout the operating temperature range. Therefore, during the operation (heat generation) of the semiconductor element 40, as indicated by the dashed arrow in FIG. 72, the expansion amount of the insulating substrates 51 and 61 becomes larger than the expansion amount of the sealing body 30. That is, the expansion amount becomes smaller at the center in the Z direction and larger at both ends. Therefore, as shown in FIG. 72, the shape of the semiconductor device 20 bulges at both ends in the Z direction.

[0295] <Summary of the Sixth Embodiment> According to this embodiment, the glass transition point Tgs of the sealing body 30 is higher than the glass transition points Tgi of the insulating substrates 51 and 61. As a result, for the sealing body 30 that reaches a higher temperature during the operation of the semiconductor element 40, it becomes difficult for the temperature to exceed the glass transition point Tgs. The temperature of the sealing body 30 does not exceed the glass transition point Tgs or exceeds it only slightly. Therefore, the Young's modulus of the sealing body 30 decreases, and it is possible to suppress a decrease in the sealing function. Since a decrease in the sealing function can be suppressed, it is possible to suppress stress concentration at the drain electrode 40D, the source electrode 40S, which are the main electrodes, and their joint portions. That is, the connection reliability can be improved.

[0296] The glass transition point Tgs of the sealing body 30 may be made substantially equal to the glass transition points Tgi of the insulating substrates 51 and 61. Compared with Tgs < Tgi, it becomes difficult for the temperature of the sealing body 30, which becomes higher during heat generation, to exceed the glass transition point Tgs.

[0297] Further, the linear expansion coefficients αi of the insulating substrates 51 and 61 are greater than the linear expansion coefficient αs of the sealing body 30. As a result, during the operation of the semiconductor element 40, the expansion amounts of the insulating substrates 51 and 61 become larger than the expansion amount of the sealing body 30. That is, the expansion amount is small at the center in the Z direction and large at both ends. Thereby, a convex warp occurs on the outside in the Z direction in the semiconductor device 20. Therefore, the facing distance between the semiconductor device 20 and the cooler 120 (121) becomes narrow, and the thermal resistance between the semiconductor device 20 and the cooler 120 becomes small. Specifically, the thickness of the heat conducting member 130 becomes thin and the thermal resistance becomes small. Since the heat of the semiconductor element 40 can be efficiently released, it is possible to suppress the semiconductor element 40 from entering an overheated state. That is, the heat dissipation performance can be enhanced.

[0298] The linear expansion coefficient αi of the insulating substrates 51 and 61 may be made substantially equal to the linear expansion coefficient αs of the sealing body 30. In this case, the expansion amounts at the center and both ends in the Z direction become substantially equal, and it is possible to suppress the formation of a concave shape in which both ends in the Z direction are recessed. That is, it is possible to suppress an increase in the thermal resistance between the semiconductor device 20 and the cooler 120 due to the formation of the concave shape.

[0299] In this way, by satisfying the relationship of Tgs≧Tgi and αi≧αs, a highly reliable semiconductor device 20 can be provided.

[0300] <Modification Example> Although an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 has been shown, the present invention is not limited to this. The present invention is also applicable to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected.

[0301] Although an example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L has been shown, the present invention is not limited to this. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. The semiconductor device 20 may include, for example, only one semiconductor element 40.

[0302] The configuration described in this embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, and the modification examples.

[0303] (Seventh Embodiment) This embodiment is a modification example based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In order to suppress the peeling of the sealing body, as described in this embodiment, the surface metal body may have a predetermined structure.

[0304] <Semiconductor Device> FIG. 73 is a cross-sectional view showing a semiconductor device 20 according to this embodiment. FIG. 73 corresponds to FIG. 8.

[0305] The semiconductor device 20 of this embodiment has the same configuration as the configuration (see FIGS. 2 to 13) described in the preceding embodiment. As shown in FIG. 73, the semiconductor device 20 includes two semiconductor elements 40 (40H), substrates 50 and 60 arranged so as to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D, which is the main electrode of the semiconductor element 40, via the bonding material 100. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S, which is the main electrode of the semiconductor element 40, via the bonding material 102. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the bonding materials 100 and 102. Among the substrates 50 and 60, the back surface metal bodies 53 and 63 are exposed from the sealing body 30. Although not shown, the semiconductor device 20 includes two semiconductor elements 40L.

[0306] As shown in FIG. 73, the surface metal bodies 52 and 62 have roughened portions 527 and 627 and non-roughened portions 528 and 628.

[0307] <Convex and Concave Oxide Film> Next, based on FIGS. 74 and 75, the convex and concave oxide film 520 constituting the roughened portion 527 will be described in detail. FIG. 74 is an enlarged view of region LXXIV in FIG. 73. FIG. 75 is a diagram showing a method of forming the roughened portion.

[0308] The surface metal bodies 52 and 62 have uneven oxide films 520 and 620, similar to the structure described in the modification of the fifth embodiment (see FIGS. 66 and 67). The uneven oxide films 520 and 620 provide roughened portions 527 and 627 on the surfaces of the surface metal bodies 52 and 62. Among the surfaces of the surface metal bodies 52 and 62, portions where the uneven oxide films 520 and 620 are not formed provide non-roughened portions 528 and 628. Hereinafter, the surface metal body 52 will be described as an example.

[0309] As shown in FIG. 74, the surface metal body 52 has a base material 521, a plating film 522p provided on the surface of the base material 521, and an uneven oxide film 520. The base material 521 forms the main part of the surface metal body 52. The base material 521 is formed using, for example, a Cu-based material. The plating film 522p is formed including a material having a higher wettability with respect to a bonding material 100 such as solder than the base material 521. The plating film 522p is formed over the entire upper surface 52a and the entire side surface 52c of the surface metal body 52. The side surface 52c is a surface that connects the upper surface 52a and the lower surface 52d facing the insulating base material 51 in the surface metal body 52.

[0310] The uneven oxide film 520 is formed by irradiating the plating film 522p with laser light as described in the modification of the fifth embodiment. In the present embodiment, the upper surface 52a and the side surface 52c of the surface metal body 52 are irradiated with laser light. The roughened portion 527 provided by the uneven oxide film 520 is a portion of the upper surface 52a excluding the non-roughened portion 528. The roughened portion 527 is formed, for example, over the entire area of the side surface 52c. At the end of the surface metal body 52, the roughened portion 527 is continuously provided from the side surface 52c to the upper surface 52a. The roughened portion 527 is provided on a part of the upper surface 52a and the side surface 52c. The roughened portion 527 may be provided only at the edge of the upper surface 52a. The non-roughened portion 528 is provided on a part of the upper surface 52a and includes at least the arrangement region (bonding region) of the bonding material 100. The non-roughened portion 528 may be provided only in the bonding region or may include a region other than the bonding region. The roughened portion 527 is provided on at least a part of the side surface 52c. The roughened portion 527 may be provided only on a part of the side surface 52c. For example, so that the uneven oxide film 520 does not contact the insulating base material 51, the roughened portion 527 may be provided only on a part of the side surface 52c.

[0311] The plating film 522p of the present embodiment has an underlying film mainly composed of Ni (nickel) and an upper layer film mainly composed of Au (gold). Specifically, an electroless Ni plating film containing P (phosphorus) is adopted as the underlying film. When the bonding material 100 is solder, among the plating film 522p exposed from the uneven oxide film 520, the upper layer film (Au) of the portion where the bonding material 100 contacts diffuses into the solder during reflow. Among the plating film 522p, the upper layer film (Au) of the portion where the uneven oxide film 520 is formed is removed by irradiation with laser light when forming the uneven oxide film 520. The uneven oxide film 520 is a film of an oxide mainly composed of Ni. The uneven oxide film 520 is continuously provided from the side surface 52c to the upper surface 52a at the end of the surface metal body 52.

[0312] As described in the modification of the fifth embodiment, the concavo-convex oxide film 520 is formed by melting, vaporizing, and depositing the surface layer portion of the plating film 522p by irradiation with laser light. The concavo-convex oxide film 520 is an oxide film derived from the plating film 522p. The concavo-convex oxide film 520 is a film of an oxide of the metal (Ni) that is the main component of the plating film 522p. Fine irregularities (roughened portions) are always formed on the surface of the concavo-convex oxide film 520. The surface of the concavo-convex oxide film 520 has continuous irregularities.

[0313] In the present embodiment, the area of the lower surface 52d of the surface metal body 52 is larger than the area of the upper surface 52a. For this reason, as shown in FIG. 74, the lower surface 52d protrudes with respect to the upper surface 52a. That is, in a plan view in the Z direction, at least a part of the side surface 52c is located outside the upper surface 52a. Therefore, as shown in FIG. 75, by irradiating the laser light in the Z direction, the concavo-convex oxide film 520 can be formed on the upper surface 52a and the side surface 52c.

[0314] <Summary of the Seventh Embodiment> In the configuration in which the plating film 522p is provided on the upper surface 52a and the side surface 52c of the surface metal body 52, peeling of the surface metal body 52 from the sealing body 30, that is, from the side surface 52c, is likely to occur due to thermal stress. On the other hand, in the present embodiment, the roughened portion 527 is provided on the portion of the upper surface 52a excluding the non-roughened portion 528 and the side surface 52c. Thereby, the adhesion between the side surface 52c of the surface metal body 52 and the sealing body 30 is higher than that in the configuration in which the roughened portion 527 is not provided. Therefore, it is possible to suppress the peeling of the sealing body 30 from the side surface 52c of the surface metal body 52. By suppressing the peeling, it is possible to suppress the concentration of thermal stress on the joint portion such as the bonding material 100 in the surface metal body 52. As a result, a highly reliable semiconductor device 20 can be provided.

[0315] The surface metal body 62 has the same configuration as the surface metal body 52. The surface metal body 62 has a roughened portion 627 on the portion of the upper surface 62a excluding the non-roughened portion 628 and the side surface 62c. Thereby, it is possible to suppress the peeling of the sealing body 30 from the side surface 62c of the surface metal body 62.

[0316] In this embodiment, the roughened portions 527 and 627 are continuously provided over the side surfaces 52c and 62c and the upper surfaces 52a and 62a. Thereby, it is possible to suppress the peeling of the sealing body 30 in the vicinity of the end portions of the surface metal bodies 52 and 62.

[0317] As the roughening treatment for forming the roughened portions 527 and 627, roughening plating, sandblasting, chemical solution treatment, etc. are possible. In this embodiment, laser roughening is employed. By irradiating the plating film with laser light, the uneven oxide films 520 and 620 are formed. The surface metal bodies 52 and 62 have the uneven oxide films 520 and 620 in the roughened portions 527 and 627.

[0318] The surfaces of the uneven oxide films 520 and 620 have continuous unevenness, and the sealing body 30 is entangled to produce an anchor effect. Also, the contact area with the sealing body 30 increases. Therefore, the adhesive force to the sealing body 30 can be enhanced in the roughened portions 527 and 627. Also, the uneven oxide films 520 and 620 have lower wettability with respect to the bonding materials 100 and 102 than the plating film (plating film 522p). Since the uneven oxide films 520 and 620 have fine unevenness on the surface, the contact area with the bonding materials 100 and 102 becomes small, and a part of the bonding materials 100 and 102 becomes spherical due to surface tension. That is, the contact angle becomes large. Therefore, it is possible to suppress the overflow of the bonding materials 100 and 102. By adopting the uneven oxide films 520 and 620 in this way, it is possible to enhance the adhesive force to the sealing body 30 and suppress the overflow of the bonding materials 100 and 102 from the joint portion.

[0319] In this embodiment, the areas of the surface metal bodies 52 and 62 are larger on the lower surfaces 52d and 62d than on the upper surfaces 52a and 62a. The lower surfaces 52d and 62d protrude with respect to the upper surfaces 52a and 62a. Therefore, it is easy to physically roughen the side surfaces 52c and 62c from the Z direction. In the case of the above-described laser roughening, by irradiating the laser light in the Z direction, the uneven oxide films 520 and 620 can be formed not only on the upper surfaces 52a and 62a but also on the side surfaces 52c and 62c.

[0320] <Modification Example> The side surface shapes of the surface metal bodies 52 and 62 are not limited to the above-described examples. When patterning the surface metal bodies 52 and 62 by press working, etching, cutting, etc., the side surfaces can be processed into a predetermined shape. FIG. 76 is a cross-sectional view showing a modification example of the side surface shape. In FIG. 76, the surface metal body 52 is shown as an example, and for convenience, the plating film 522p is omitted from the illustration. Although not shown, the same configuration can be adopted for the surface metal body 62.

[0321] In the example shown in FIG. 76, the surface metal body 52 has a side surface 52c that is substantially parallel to the Z direction. That is, the area of the surface metal body 52 is substantially constant in the Z direction. To physically roughen such a surface metal body 52, for example, roughening can be performed separately on the upper surface 52a and the side surface 52c. In the case of laser roughening, laser light is irradiated onto the side surface 52c from a direction different from the irradiation direction of the laser light with respect to the upper surface 52a, for example, a direction inclined with respect to the Z direction. Thereby, the concavo-convex oxide film 520 can be provided on the side surface 52c.

[0322] FIG. 77 is a cross-sectional view showing a modification example of the side surface shape and corresponds to FIG. 76. In the example shown in FIG. 77, the area of the surface metal body 52 orthogonal to the Z direction becomes larger as it approaches the lower surface 52d. The side surface 52c has an R shape. In this case, in plan view, the entire area of the side surface 52c is located outside the upper surface 52a. Therefore, physical roughening of the side surface 52c from the Z direction, for example, laser roughening, is easier to perform than in the configuration shown in FIG. 75.

[0323] FIG. 78 is a cross-sectional view showing a modification example of the side surface shape and corresponds to FIG. 76. Also in the example shown in FIG. 78, the area of the surface metal body 52 orthogonal to the Z direction becomes larger as it approaches the lower surface 52d. The surface metal body 52 has, for example, a substantially trapezoidal shape in the ZY plane. Also in this case, since the entire area of the side surface 52c is located outside the upper surface 52a in plan view, it is easy to physically roughen the side surface 52c from the Z direction.

[0324] Although an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 has been shown, the present invention is not limited thereto. The present invention is also applicable to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected. In a configuration including a pair of substrates 50 and 60, the structure of the roughened portion including the above-described side surface may be applied to only one of the substrates 50 and 60.

[0325] Although an example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L has been shown, the present invention is not limited thereto. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. For example, the semiconductor device 20 may include only one semiconductor element 40.

[0326] The configuration described in the present embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, and the modification examples.

[0327] (Eighth Embodiment) This embodiment is a modification example based on the preceding embodiments, and the description of the preceding embodiments can be incorporated. For reducing the inductance, as described in the present embodiment, the thickness of the surface metal body and the interval of the wiring may satisfy a predetermined relationship.

[0328] <Semiconductor Device> First, based on FIG. 79, the semiconductor device 20 according to the present embodiment, particularly the circuit patterns of the surface metal bodies 52 and 62, will be described. FIG. 79 is a cross-sectional view showing the semiconductor device 20 according to the present embodiment. In FIG. 79, a part of the configuration (see FIG. 8) described in the preceding embodiment is illustrated.

[0329] The semiconductor device 20 of this embodiment has the same configuration as the configuration (see FIGS. 2 to 13) described in the previous embodiment. As shown in FIG. 79, the semiconductor device 20 includes a semiconductor element 40 (40H), substrates 50 and 60 arranged so as to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is electrically connected to the drain electrode 40D which is the main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S which is the main electrode of the semiconductor element 40. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the bonding materials 100 and 102. Among the substrates 50 and 60, the back surface metal bodies 53 and 63 are exposed from the sealing body 30. Although not shown, the semiconductor device 20 includes a semiconductor element 40L that constitutes the lower arm 9L.

[0330] <Relationship between wiring interval and thickness> Next, based on FIGS. 79 and 80, the relationship between the wiring interval and the thickness will be described. FIG. 80 is an enlarged view of the region LXXX in FIG. 79. In FIG. 80, only the substrate 60 is shown.

[0331] The surface metal bodies 52 and 62 have wiring gaps 52G and 62G in the same manner as the configuration (see FIG. 65) described in the previous embodiment. As shown in FIGS. 79 and 80, the wiring gap 62G separates the adjacent N wiring 64 and the relay wiring 65. The wiring gap 62G is a predetermined gap provided between wirings having different potentials in the surface metal body 62.

[0332] As shown in FIG. 80, in the present embodiment, the distance L10 between the N wiring 64 and the relay wiring 65 is equal to or less than the thickness T10 of the surface metal body 62 (L10≤T10). The distance L10 is the length of the wiring gap 62G, that is, the pattern distance between the N wiring 64 and the relay wiring 65. In FIGS. 79 and 80, the distance L10 and the thickness T10 in the surface metal body 62 satisfy the relationship L10<T10. Although not shown, the substrate 50 provided with the surface metal body 52 has the same configuration as the substrate 60. In the surface metal body 52, the distance L10 between the P wiring 54 and the relay wiring 55 is equal to or less than the thickness T10 of the surface metal body 52 (L10≤T10).

[0333] <Simulation Results> FIGS. 81 to 83 show the results of the electromagnetic field simulation. FIG. 81 is a diagram summarizing the simulation results in terms of the relationship between the length (distance, thickness) and the inductance. The circles (○) at the measurement points show the results of three levels of the thickness T10 (0.3 mm, 1.5 mm, 2.5 mm) when the distance L10 is fixed at 1.5 mm. The solid line in the figure shows the change in the inductance accompanying the change in the thickness T10 when the distance L10 is fixed. The squares (□) at the measurement points show the results of three levels of the distance L10 (0.5 mm, 1.5 mm, 2.5 mm) when the thickness T10 is fixed at 1.5 mm. The broken line in the figure shows the change in the inductance accompanying the change in the distance L10 when the thickness T10 is fixed. The length on the horizontal axis shown in FIG. 81 indicates the length of the thickness T10 when the distance L10 is fixed, and indicates the length of the distance L10 when the thickness T10 is fixed.

[0334] FIG. 82 is a diagram showing the simulation results when L10>T10. FIG. 82 shows the simulation results under the first condition C1 shown in FIG. 81, specifically, when the distance L10 = 1.5 mm and the thickness T10 = 0.3 mm. FIG. 83 is a diagram showing the simulation results when L10<T10. FIG. 83 shows the simulation results under the second condition C2 shown in FIG. 81, specifically, when the distance L10 = 1.5 mm and the thickness T10 = 2.5 mm. In the simulation, the conditions other than the distance L10 and the thickness T10 are common.

[0335] From the results shown in FIG. 81, it is clear that the inductance can be reduced in the range satisfying the relationship L10 ≦ T10. In particular, it is clear that the inductance can be effectively reduced in the range satisfying the relationship L10 < T10.

[0336] As shown in FIG. 82, when L10 > T10, although the current is dispersed in the width direction in the extended portion 641 of the N wiring 64, it flows biased toward the end side of the surface metal body 62 (substrate 60). For this reason, the PN current loop (see FIG. 17) described in the previous embodiment is large. Since the current path flowing through the extended portion 421 is far from the relay wiring 65, the magnetic flux cancellation effect by the current in the reverse direction component is weakened. FIG. 82 shows that the inductance becomes larger compared to the case where the relationship L10 ≦ T10 is satisfied.

[0337] As shown in FIG. 83, when L10 < T10, the current flows biased toward the end on the relay wiring 65 side in the width direction of the extended portion 641. For this reason, the PN current loop is small. Since the current path flowing through the extended portion 421 is close to the relay wiring 65, the magnetic flux cancellation effect by the current in the reverse direction component is enhanced. FIG. 83 shows that the inductance becomes smaller compared to the case where the relationship L10 > T10 is satisfied.

[0338] <Summary of the Eighth Embodiment> In this embodiment, the surface metal body 52 has a P wiring 54 that is a first wiring and a relay wiring 55 that is a second wiring having a different potential from the first wiring. And the interval L10 between the P wiring 54 and the relay wiring 55 and the thickness T1 of the surface metal body 52 satisfy the relationship L10 ≦ T10. Similarly, the surface metal body 62 has an N wiring 64 that is a first wiring and a relay wiring 65 that is a second wiring having a different potential from the first wiring. And the interval L10 between the N wiring 64 and the relay wiring 65 and the thickness T1 of the surface metal body 62 satisfy the relationship L10 ≦ T10.

[0339] When the relationship of L10 ≦ T10 is satisfied, since the distance between adjacent wirings is narrow, the cancellation effect between the magnetic flux due to the current flowing through the first wiring and the magnetic flux due to the current flowing through the second wiring is enhanced, and the inductance can be reduced. Also, since the surface metal body is thick, the cross-sectional area of the current path becomes large, and the inductance can be reduced. As described above, the semiconductor device 20 of the present embodiment can reduce the inductance. In particular, when the relationship of L1 < T10 is satisfied, the above-described effects are enhanced, and the inductance can be reduced more effectively.

[0340] <Modification Example> Although an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 has been shown, the present invention is not limited thereto. The present invention is also applicable to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected. In a configuration including a pair of substrates 50 and 60, only one of the surface metal bodies 52 and 62 may satisfy the relationship of L10 ≦ T10 described above. That is, in at least one substrate electrically connected to the main electrode of the semiconductor element, the surface metal body may have a first wiring and a second wiring and satisfy the relationship of L10 ≦ T10. Also, although an example in which the relationship of L10 ≦ T10 is satisfied in all of the opposing regions between the N wiring 64 as the first wiring and the relay wiring 65 as the second wiring having a different potential from the first wiring has been shown, the present invention is not limited thereto. The relationship of L10 ≦ T10 may be satisfied in at least a part of the opposing region. The same applies to the opposing region between the P wiring 54 as the first wiring and the relay wiring 55 as the second wiring having a different potential from the first wiring.

[0341] Although an example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L has been shown, the present invention is not limited thereto. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. The semiconductor device 20 may include, for example, only one semiconductor element 40.

[0342] The configuration described in the present embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, the seventh embodiment, and the modification example.

[0343] (Embodiment 9) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. For improving heat dissipation and reliability, as described in this embodiment, the side surface shape of the substrate may be set to a predetermined shape.

[0344] <Semiconductor device> First, based on FIG. 84, the semiconductor device 20 according to this embodiment will be described. FIG. 84 is a cross-sectional view corresponding to FIG. 5. In FIG. 84, for convenience, the illustration of the external connection terminals 90 is omitted.

[0345] The semiconductor device 20 of this embodiment has the same configuration as the configuration described in the preceding embodiment (see FIGS. 2 to 13). As shown in FIG. 84, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 arranged so as to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is electrically connected to the drain electrode 40D which is the main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S which is the main electrode of the semiconductor element 40. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the bonding materials 100 and 102.

[0346] <Substrate> Next, based on FIGS. 84 to 86, the substrates 50 and 60 will be described. FIG. 85 is a plan view showing the center of the substrate. FIG. 85 corresponds to FIG. 12. FIG. 86 is an enlarged view of the region LXXXVI indicated by the dashed-dotted line in FIG. 84. Hereinafter, "inside" and "outside" indicate the relative positional relationship with reference to the centers 50sc and 60sc of the substrates 50 and 60 in a plan view in the Z direction. The side closer to the center is the inside, and the farther side is the outside. In FIG. 85, as an example, the center 50sc of the substrate 50 is shown. Although FIG. 84 is a cross-sectional view, for convenience of explanation, the centers 50sc and 60sc are shown.

[0347] In the substrates 50 and 60 of the present embodiment, the insulating substrates 51 and 61 contain resin. The surface metal bodies 52 and 62 are disposed on the surfaces 51a and 61a of the insulating substrates 51 and 61. The surface metal bodies 52 and 62 are patterned as described in the previous embodiment. As a result, the insulating substrates 51 and 61 have exposed portions 510 and 610 that are exposed from the surface metal bodies 52 and 62. The exposed portion 510 of the insulating substrate 51, which is the first exposed portion, and the exposed portion 610 of the insulating substrate 61, which is the second exposed portion, at least partially overlap each other in a plan view in the Z direction. The exposed portions 510 and 610 overlap. That is, at least a part of the exposed portion 510 faces the exposed portion 610 in the Z direction.

[0348] The back surface metal bodies 53 and 63 are disposed on the back surfaces 51b and 61b of the insulating substrates 51 and 61. The back surface metal bodies 53 and 63 are exposed from the sealing body 30. In the back surface metal bodies 53 and 63, the surfaces opposite to the opposing surfaces 53a and 63a with the insulating substrate 51 are the exposed surfaces 53b and 63b. The exposed surface 53b is exposed substantially flush with one surface 30a of the sealing body 30. The exposed surface 63b is exposed substantially flush with the back surface 30b of the sealing body 30. The exposed surfaces 53b and 63b form the back surfaces 50b and 60b of the substrates 50 and 60. The sealing body 30 has side surfaces 30e as a second surface continuous with one surface 30a, which is the first surface, and the back surface 30b. The side surfaces 30e include the side surfaces 30c and 30d in the Y direction and also include the side surfaces in the X direction. The side surfaces 30e include all the side surfaces. The side surface 30e, which is the second surface, is a tapered surface inclined with respect to the Z direction for die extraction during molding. The side surface 30e has a draft. In the previous embodiment, for the sake of convenience, the draft is omitted in the drawing. The side surface 30e has a bent portion near the approximate center in the Z direction, and approaches the semiconductor element 40 in a plan view in the Z direction as it approaches the one surface 30a and the back surface 30b from the bent portion. That is, in a plan view, the bent portion is in an outer position and the one surface 30a and the back surface 30b are in an inner position. Hereinafter, the one surface 30a and the back surface 30b of the sealing body 30 may be referred to as the first surfaces 30a and 30b.

[0349] As shown in FIGS. 84 and 86, substrates 50 and 60 have laminates 500 and 600. Laminate 500 is a laminate having a two-layer structure of an insulating base material 51 and a back surface metal body 53. Similarly, laminate 600 is a laminate having a two-layer structure of an insulating base material 61 and a back surface metal body 63. In laminates 500 and 600, the side surfaces connecting the surfaces 51a and 61a of the insulating base materials 51 and 61 and the exposed surfaces 53b and 63b of the back surface metal bodies 53 and 63 have a so-called V-cut shape. The side surfaces of laminates 500 and 600 have a shape in which the central portion bulges outward with respect to the upper surfaces 51a and 61a which are the upper ends and the exposed surfaces 53b and 63b which are the lower ends.

[0350] The side surfaces of laminates 500 and 600 have first inclined portions 501 and 601, second inclined portions 502 and 602, and intermediate portions 503 and 603. First, laminate 500 will be described.

[0351] The first inclined portion 501 is a portion within a predetermined range from the surface 51a. The first inclined portion 501 has an inclination such that the distance from the center 50sc in plan view is closest at the upper end on the surface 51a side and is farther from the upper end side at the lower end. That is, in the first inclined portion 501, the lower end is located outside the upper end. As shown in FIG. 85, the first inclined portion 501 is provided at the edge of the substrate 50. The first inclined portion 501 is annular so as to surround the surface metal body 52.

[0352] In the present embodiment, the first inclined portion 501 has an inclination of being farther from the center 50sc in plan view as it is farther from the surface 51a in the Z direction. That is, in the upper portion of the laminate 500 including the first inclined portion 501, the area orthogonal to the surface 51a in the Z direction is the smallest, and the area increases as it is farther from the surface 51a. The inclination of the first inclined portion 501 can allow for manufacturing variations. The first inclined portion 501 macroscopically has the above-described inclination. The first inclined portion 501 is a tapered surface.

[0353] The second inclined portion 502 is a portion within a predetermined range from the exposed surface 53b. The second inclined portion 502 has an inclination such that the distance from the center 50sc in plan view is closest at the lower end on the exposed surface 53b side and is farther from the lower end side at the upper end. That is, in the second inclined portion 502, the upper end is located outside the lower end. The second inclined portion 502 is provided at the edge of the substrate 50 like the first inclined portion 501. The second inclined portion 502 forms an annular shape so as to surround the back metal body 53.

[0354] In the present embodiment, the second inclined portion 502 has an inclination of being farther from the center 50sc in plan view as it is farther from the exposed surface 53b in the Z direction. That is, in the lower part including the second inclined portion 502 of the laminate 500, the area is the smallest at the exposed surface 53b, and the area becomes larger as it is farther from the exposed surface 53b. The inclination of the second inclined portion 502 can tolerate manufacturing variations. The second inclined portion 502 macroscopically has the above-described inclination. The second inclined portion 502 is a tapered surface. If the first inclined portion 501 is a forward taper, the second inclined portion 502 is a reverse taper.

[0355] The intermediate portion 503 is connected to the first inclined portion 501 and the second inclined portion 502. The intermediate portion 503 is a portion connecting the first inclined portion 501 and the second inclined portion 502 and has a predetermined length in the Z direction. The intermediate portion 503 is the vertex portion of the side surface of the laminate 500. The side surface of the laminate 500 is farthest from the center 50sc at the intermediate portion 503. The intermediate portion 503 is the outermost part of the laminate 500 in plan view. The laminate 500 has the largest area orthogonal to the Z direction at the intermediate portion 503. In the intermediate portion 503, the area of the laminate 500 is substantially constant. The distance from the center 50sc in plan view of the first inclined portion 501 becomes shorter as it is farther from the intermediate portion 503. The distance from the center 50sc in plan view of the second inclined portion 502 becomes shorter as it is farther from the intermediate portion 503.

[0356] The laminate 600 has the same configuration as the laminate 500. The first inclined portion 601 is a portion within a predetermined range from the surface 61a. The first inclined portion 601 has an inclination such that the distance from the center 60sc in plan view is closest at the upper end on the surface 61a side and is farther from the upper end at the lower end. That is, in the first inclined portion 601, the lower end is located outside the upper end. The first inclined portion 601 is provided at the edge of the substrate 60. The first inclined portion 601 forms an annular shape so as to surround the surface metal body 62.

[0357] In the present embodiment, the first inclined portion 601 has an inclination of being farther from the center 60sc in plan view as it is farther from the surface 61a in the Z direction. That is, in the upper part of the laminate 600 including the first inclined portion 601, the area orthogonal to the Z direction on the surface 61a is the smallest, and the area increases as it is farther from the surface 61a. The inclination of the first inclined portion 601 can tolerate manufacturing variations. The first inclined portion 601 macroscopically has the above-described inclination. The first inclined portion 601 is a tapered surface.

[0358] The second inclined portion 602 is a portion within a predetermined range from the exposed surface 63b. The second inclined portion 602 has an inclination such that the distance from the center 60sc in plan view is closest at the lower end on the exposed surface 63b side and is farther from the lower end at the upper end. That is, in the second inclined portion 602, the upper end is located outside the lower end. The second inclined portion 602 is provided at the edge of the substrate 60 in the same manner as the first inclined portion 501. The second inclined portion 602 forms an annular shape so as to surround the back surface metal body 63.

[0359] In the present embodiment, the second inclined portion 602 has an inclination such that it is farther from the center 60sc in plan view as it is farther from the exposed surface 63b in the Z direction. That is, in the lower part of the laminate 600 including the second inclined portion 602, the area is the smallest at the exposed surface 63b, and the area increases as it is farther from the exposed surface 63b. The inclination of the second inclined portion 602 can tolerate manufacturing variations. The second inclined portion 602 macroscopically has the above-described inclination. The second inclined portion 602 is a tapered surface. When the first inclined portion 601 is a forward taper, the second inclined portion 602 is a reverse taper.

[0360] The intermediate portion 603 is continuous with the first inclined portion 601 and the second inclined portion 602. The intermediate portion 603 is a portion connecting the first inclined portion 601 and the second inclined portion 602, and has a predetermined length in the Z direction. The intermediate portion 603 is the vertex portion of the side surface of the laminate 600. The side surface of the laminate 600 is farthest from the center 60sc at the intermediate portion 603. The intermediate portion 603 is the outermost part of the laminate 600 in plan view. The laminate 600 has the largest area at the intermediate portion 603. At the intermediate portion 603, the area of the laminate 600 is substantially constant. The first inclined portion 601 is closer to the center 60sc in plan view as it is farther from the intermediate portion 603. The second inclined portion 602 is closer to the center 60sc in plan view as it is farther from the intermediate portion 603.

[0361] <Dimensions and Angles> Next, based on FIG. 87, the dimensions and angles of the laminates 500 and 600 will be described. FIG. 87 is a figure corresponding to FIG. 86 and shows the dimensions and angles. Hereinafter, the laminate 500 will be described as an example.

[0362] The length L11 shown in FIG. 87 is the length of the first inclined portion 501 in plan view, that is, the width of the annular first inclined portion 501. The length L12 is the length of the second inclined portion 502 in plan view, that is, the width of the annular second inclined portion 502. The length L21 is the length of the first inclined portion 501 in the Z direction, that is, the height of the first inclined portion 501. The length L22 is the length of the second inclined portion 502 in the Z direction, that is, the height of the second inclined portion 502. The length L23 is the length of the intermediate portion 503 in the Z direction, that is, the height of the intermediate portion 503. The length L24 is the length of the insulating base material 51 in the Z direction, that is, the thickness of the insulating base material 51. The length L25 is the length of the back surface metal body 53 in the Z direction, that is, the thickness of the back surface metal body 53.

[0363] The angle R1 is the inclination angle of the back surface metal body 53 with respect to the Z direction, which is the thickness direction of the semiconductor element 40, in the first inclined portion 501. The angle R2 is the inclination angle of the back surface metal body 53 with respect to the Z direction in the second inclined portion 502. The angle R3 is the inclination angle of the insulating base material 51 with respect to the Z direction in the first inclined portion 501. The angle R4 is the inclination angle of the second inclined portion 502 with respect to the exposed surface 53b of the back surface metal body 53. The angle R5 is the inclination angle of the side surface 30e with respect to one surface 30a of the sealing body 30.

[0364] As shown in FIG. 87, in the present embodiment, the length of the second inclined portion 502 is shorter than the length of the first inclined portion 501. That is, the relationship L11 > L12 is satisfied. The angle R1 satisfies the relationship 0° < R1 ≤ 45°, and the angle R2 satisfies the relationship 0° < R2 < 45°. The closer the angle R1 is to 45°, the more effectively the heat generated by the semiconductor element 40 can be diffused. The closer the angle R2 is to 45°, the smaller the thermal resistance can be, as will be described later.

[0365] Furthermore, the first inclined portion 501 is provided from the insulating base material 51 to the back surface metal body 53, and the second inclined portion 502 is provided on the back surface metal body 53. That is, the relationship of L21>L24 and L22<L25 is satisfied. In the configuration including the intermediate portion 503, the intermediate portion 503 is provided on the back surface metal body 53. That is, the relationship of L24<(L24+L25-L23) / 2 is satisfied.

[0366] Furthermore, in the configuration in which the first inclined portion 501 is provided from the insulating base material 51 to the back surface metal body 53, the inclination angle of the back surface metal body 53 and the inclination angle of the insulating base material 51 are substantially equal. That is, the relationship of R1=R3 is satisfied.

[0367] Furthermore, the inclination angle of the second inclined portion 502 with respect to the exposed surface 53b of the back surface metal body 53 is smaller than the inclination angle of the side surface 30e (second surface) with respect to the one surface 30a (first surface) of the sealing body 30. That is, the relationship of R4<R5 is satisfied. Although the description is omitted, the laminate 600 also has the same configuration as the laminate 500.

[0368] <Method for manufacturing laminate> Next, an example of the method for manufacturing the above-described laminate 500 will be described. First, a mother substrate having a two-layer structure of an insulating base material 51 containing resin and a back surface metal body 53 is formed. Next, the surface 51a of the insulating base material 51 and both sides of the exposed surface 53b are simultaneously cut (V-cut) with a blade. In this cutting, the first inclined portion 501 and the second inclined portion 502 are formed without completely separating the mother substrate. In the mother substrate, adjacent laminates 500 are connected at the intermediate portion 503. Then, by separating (cutting off) the adjacent laminates 500 at the intermediate portion 503, a laminate 500 having a V-cut-shaped side surface can be obtained.

[0369] FIG. 88 is a side view of the laminate 500 obtained by the above-described manufacturing method. By cutting (machining) using a blade, the first inclined portion 501 has a machining mark 501a along the circumferential direction. Similarly, the second inclined portion 502 has a machining mark 502a along the circumferential direction. In order to separate adjacent laminates 500 at the intermediate portion 503, the intermediate portion 503 has uneven portions 503a. Although the description is omitted, the laminate 600 is also formed by the same method as the laminate 500.

[0370] <Summary of the Ninth Embodiment> In this embodiment, the sides of the laminates 500 and 600 have the first inclined portions 501 and 601 and the second inclined portions 502 and 602. That is, the sides have a bent shape (substantially V-shaped). Thus, even if the peeling that occurs in the sealing body 30 starting from the interface with the exposed surfaces 53b and 63b progresses along the second inclined portions 502 and 602, the bent shape can suppress the progression to the first inclined portions 501 and 601. Therefore, it is possible to suppress the progression of peeling to the surface metal bodies 52 and 62, the semiconductor element 40, the joints between the surface metal bodies 52 and 62 and the semiconductor element 40, etc. That is, it is possible to suppress the concentration of thermal stress on the above-described surface metal bodies 52 and 62, the semiconductor element 40, etc., and the reduction of connection reliability and the like. Thus, reliability can be ensured.

[0371] Since they have the second inclined portions 502 and 602, it is also possible to suppress the back surface metal bodies 53 and 63 from falling off (dropping) from the sealing body 30 when the above-described peeling occurs.

[0372] Heat ideally spreads at an angle of 45 degrees. In the present embodiment, the laminates 500 and 600 have first inclined portions 501 and 601 on the semiconductor element 40 side in the Z direction. As a result, the heat generated by the semiconductor element 40 diffuses above the bent portion, that is, in the portions corresponding to the first inclined portions 501 and 601. On the other hand, by having the second inclined portions 502 and 602, the heat transfer path in the portion corresponding to the second inclined portions 502 and 602 is narrower than the heat transfer path in the portion corresponding to the first inclined portions 501 and 601. The heat resistance increases due to the narrow heat transfer path. In the present embodiment, the length L12 of the second inclined portions 502 and 602 is made shorter than the length L11 of the first inclined portions 501 and 601 (L11 > L12). Thereby, compared with a configuration that satisfies L11 ≤ L12, the length L22 in the Z direction of the second inclined portions 502 and 602 can be shortened, and thus the heat resistance below the bent portion can be reduced. That is, the heat diffused in the upper portions of the laminates 500 and 600 can be efficiently radiated from the exposed surfaces 53b and 63b. From the above, the semiconductor device 20 of the present embodiment can ensure reliability while enhancing heat dissipation.

[0373] The first inclined portions 501 and 601 may be provided on the insulating substrates 51 and 61, and the second inclined portions 502 and 602 may be provided on the back surface metal bodies 53 and 63. The first inclined portions 501 and 601 may be provided on the insulating substrates 51 and 61, and the second inclined portions 502 and 602 may be provided across the insulating substrates 51 and 61 and the back surface metal bodies 53 and 63. In the present embodiment, the first inclined portions 501 and 601 are provided across the insulating substrates 51 and 61 and the back surface metal bodies 53 and 63, and the second inclined portions 502 and 602 are provided on the back surface metal bodies 53 and 63. That is, the bent portion exists within the back surface metal bodies 53 and 63. Therefore, even if peeling that occurs in the sealing body 30 starting from the interface with the exposed surfaces 53b and 63b progresses along the second inclined portions 502 and 602, it is possible to suppress the peeling from progressing to the interface with the insulating substrates 51 and 61. Thereby, it is possible to suppress the heat stress from concentrating on the insulating substrates 51 and 61 and reducing the insulation reliability. That is, the reliability can be further enhanced.

[0374] The first inclined portions 501 and 601 and the second inclined portions 502 and 602 may be configured to be continuous. In the present embodiment, intermediate portions 503 and 603 are provided between the first inclined portions 501 and 601 and the second inclined portions 502 and 602. In this configuration, the intermediate portions 503 and 603 form bent portions. By providing the intermediate portions 503 and 603, as described above, even if cutting (machining) is performed simultaneously from both the front surfaces 51a and 61a of the insulating substrates 51 and 61 and the exposed surfaces 53b and 63b of the back surface metal bodies 53 and 63, contact between the blades can be avoided. Further, since the intermediate portions 503 and 603 are provided on the back surface metal bodies 53 and 63, it is possible to suppress the peeling from progressing to the interface with the insulating substrates 51 and 61, as described above.

[0375] In a configuration in which the first inclined portions 501 and 601 are provided from the insulating substrates 51 and 61 to the back surface metal bodies 53 and 63, the inclination angle R1 of the back surface metal bodies 53 and 63 and the inclination angle R3 of the insulating substrates 51 and 61 may be made different. For example, when R1 < R3, since thermal stress concentrates at the ends of the insulating substrates 51 and 61 containing resin, there is a risk of deterioration of the insulation performance. When R1 > R3, thermal stress concentrates at the interface between the insulating substrates 51 and 61 and the back surface metal bodies 53 and 63, and there is a risk of interface peeling. In the present embodiment, the inclination angle R1 and the inclination angle R3 are made substantially equal (R1 = R3). That is, in the first inclined portions 501 and 601, the inclined surfaces of the insulating substrates 51 and 61 and the inclined surfaces of the back surface metal bodies 53 and 63 are substantially flush and continuous. The inclined surfaces of the insulating substrates 51 and 61 and the inclined surfaces of the back surface metal bodies 53 and 63 are continuous and form a single flat surface. Thereby, it is possible to suppress the concentration of thermal stress at the triple point of the sealing body 30, the insulating substrates 51 and 61, and the back surface metal bodies 53 and 63.

[0376] The inclination angles R4 of the second inclined portions 502 and 602 with respect to the exposed surfaces 53b and 63b may be set to be equal to or greater than the inclination angle R5 of the side surface 30e (second surface) with respect to the first surfaces 30a and 30b of the sealing body 30. In the present embodiment, the inclination angle R4 is made smaller than the inclination angle R5 (R4 < R5). As described in the previous embodiment (see, for example, FIG. 72), when the semiconductor element 40 generates heat, the semiconductor device 20 warps. As described above, when adopting a configuration having a warped shape with high heat dissipation, due to the warp convex in the Z direction, peeling is likely to occur at the interface between the back surface metal bodies 53 and 63 and the sealing body 30. By adopting a configuration that satisfies the relationship of R4 < R5, even if peeling occurs, it is possible to suppress the back surface metal bodies 53 and 63 from falling off from the sealing body 30.

[0377] In the present embodiment, the exposed portion 510 of the insulating base material 51 which is the first exposed portion and the exposed portion 610 of the insulating base material 61 which is the second exposed portion overlap each other in a plan view in the Z direction. Thereby, it is possible to suppress the imbalance in the arrangement of the surface metal body 52 of the substrate 50 which is the first substrate and the surface metal body 62 of the substrate 60 which is the second substrate, and thus suppress the imbalance in the warp of the semiconductor device 20. It is possible to suppress the occurrence of interfacial peeling between the back surface metal bodies 53 and 63 and the sealing body 30 on the side where the deformation is large due to the uneven warp.

[0378] In the present embodiment, the first inclined portion 501 and the second inclined portion 502 have cutting marks 501a and 502a along the circumferential direction. By having the cutting marks 501a and 502a, an anchor effect is generated and the adhesion to the sealing body 30 is enhanced. Thereby, it is possible to suppress the sealing body 30 from peeling off from the laminate 500 and 600. Note that cutting marks along the circumferential direction may be provided only on one of the first inclined portion 501 and the second inclined portion 502. In the present embodiment, since the intermediate portion 503 also has the uneven portion 503a, peeling suppression due to the anchor effect can be expected.

[0379] <Modification Example> Although an example of the semiconductor device 20 with a double-sided heat dissipation structure including a pair of substrates 50 and 60 has been shown, the present invention is not limited thereto. The present invention is also applicable to a semiconductor device 20 with a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected. In a configuration including a pair of substrates 50 and 60, the above-described structure (V-cut shape) may be applied to only one of the substrates 50 and 60.

[0380] Although an example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L has been shown, the present invention is not limited thereto. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. For example, the semiconductor device 20 may include only one semiconductor element 40.

[0381] The configuration described in the present embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, the seventh embodiment, the eighth embodiment, and the modification example.

[0382] (Tenth Embodiment) This embodiment is a modification example based on the preceding embodiments, and the descriptions of the preceding embodiments can be incorporated by reference. In order to improve the connection reliability, as described in the present embodiment, the sintered member, which is a bonding material, may be arranged in a predetermined manner.

[0383] <Semiconductor Device> First, based on FIG. 89, the semiconductor device 20 according to the present embodiment will be described. FIG. 89 is a cross-sectional view corresponding to FIG. 5. In FIG. 89, for the sake of convenience, the illustration of the external connection terminal 90 is omitted.

[0384] The semiconductor device 20 of this embodiment has the same configuration as the configuration (see FIGS. 2 to 13) described in the previous embodiment. As shown in FIG. 89, the semiconductor device 20 includes a semiconductor element 40 (40H, 40L), substrates 50 and 60 which are wiring members arranged so as to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 which is the first wiring member is connected to the drain electrode 40D which is the first main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 which is the second wiring member is connected to the source electrode 40S which is the second main electrode of the semiconductor element 40 via a conductive spacer 70 which is the second wiring member. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the conductive spacer 70. The source electrode 40S and the conductive spacer 70 are joined by a sintered member 101A which is a joining material 101.

[0385] <Semiconductor element> Next, the semiconductor element 40 will be described with reference to FIGS. 90 and 91. FIG. 90 is a plan view showing the semiconductor element 40 (40H). FIG. 91 is an enlarged view of the region XCI in FIG. 89. FIG. 91 is a cross-sectional view corresponding to the XCI-XCI line in FIG. 90. In FIG. 91, the semiconductor element 40H is illustrated, but since the semiconductor element 40L also has the same configuration, it will be described as the semiconductor element 40 below.

[0386] As described above, the semiconductor element 40 has a semiconductor substrate 41 on which a switching element is formed. The semiconductor substrate 41 has a substantially rectangular planar shape. The drain electrode is provided on one surface of the semiconductor substrate 41, and the source electrode 40S and the pad 40P are provided on the back surface of the semiconductor substrate 41. The source electrode 40S has a multilayer structure. The source electrode 40S has a base electrode 42 and a connection electrode 43. The pad 40P also has the same configuration as the source electrode 40S.

[0387] The semiconductor element 40 further has a protective film 44. The protective film 44 is an insulating film provided on the back surface of the semiconductor substrate 41 so as to cover the peripheral portion of the source electrode 40S. As the material of the insulating film, for example, polyimide, silicon nitride film, etc. can be adopted. The protective film 44 has an opening 440 that defines the connection region in the source electrode 40S. The opening 440 exposes the source electrode 40S so that it can be joined. The protective film 44 has an opening 441 that defines the connection region in the pad 40P. Both the openings 440 and 441 are through holes that penetrate the protective film 44 in the Z direction. Among the source electrode 40S (connection electrode 43), the portion exposed from the opening 440 of the protective film 44 forms a joint with the sintered member 101A.

[0388] The protective film 44 of the present embodiment is made of polyimide. The protective film 44 covers the peripheral portion 420 of the underlying electrode 42, which will be described later. The protective film 44 is not provided, for example, in a scribing region within a predetermined range from the outer peripheral end of the semiconductor substrate 41. The opening shape of the opening 440, that is, the inner peripheral surface 442 of the protective film 44 that defines the opening 440, is substantially rectangular in plan view. The inner peripheral surface 442 may be referred to as the inner peripheral end or the opening end.

[0389] The underlying electrode 42 is a metal layer formed adjacent to the semiconductor substrate 41 in the multi-layer source electrode 40S. The underlying electrode 42 may be referred to as a lower electrode, a lower layer electrode, a wiring electrode, a underlying layer, a first metal layer, etc. The underlying electrode 42 is connected to the back surface of the semiconductor substrate 41. The underlying electrode 42 is formed using, for example, a material mainly composed of Al (aluminum). In the present embodiment, an AlSi-based alloy such as AlSi or AlSiCu is used as the material.

[0390] In plan view, the underlying electrode 42 extends over the outer peripheral region surrounding the element region (active region), which is not shown in the figure, of the semiconductor substrate 41 while enclosing it. The peripheral portion 420 of the underlying electrode 42 is substantially rectangular annular in plan view. The peripheral portion 420 is covered by the protective film 44.

[0391] The connection electrode 43 is laminated on the base electrode 42. The connection electrode 43 is also referred to as an upper base electrode, an upper electrode, an upper layer electrode, an upper layer, or a second metal layer. The connection electrode 43 contains at least a noble metal such as Au (gold), Ag (silver), Pt (platinum), or Pd (palladium) for bonding with the sintered member 101A. The connection electrode 43 may contain a base metal together with the noble metal.

[0392] The connection electrode 43 of the present embodiment contains Ni (nickel). Ni is harder than the Al alloy constituting the base electrode 42. The connection electrode 43 contains Ni and a noble metal, such as Au or Ag. The connection electrode 43 is formed in multiple layers, for example, by plating. At least a part of the noble metal of the connection electrode 43 diffuses into the sintered member 101A during bonding.

[0393] The connection electrode 43 is laminated on the base electrode 42 at the opening 440 of the protective film 44. The outer peripheral end of the connection electrode 43 is in contact with the inner peripheral surface 442 of the protective film 44 over the entire circumference.

[0394] <Bonding structure> Next, based on FIGS. 90 to 92, the bonding structure of the semiconductor element 40 will be described. In FIG. 90, the outer peripheral end of the sintered member 101A is indicated by a broken line, and the outer peripheral end of the conductive spacer 70 is indicated by a two-dot chain line. FIG. 92 is a cross-sectional view showing the arrangement of the sintered member 101A. FIG. 92 corresponds to FIG. 91. Hereinafter, "inside" and "outside" indicate the relative positional relationship with the center of the semiconductor element 40 as the reference position. The side closer to the center is the inside, and the side farther away is the outside.

[0395] In the present embodiment, the substrate 60 and the conductive spacer 70 are wiring members (second wiring members) that are electrically connected to the source electrode 40S. As shown in FIGS. 90 and 91, the sintered member 101A is interposed between the source electrode 40S of the semiconductor element 40 and the conductive spacer 70. The sintered member 101A bonds the source electrode 40S and the conductive spacer 70.

[0396] The sintered member 101A is made of Ag or Cu. The sintered member 101A is a sintered body of Ag particles or Cu particles. The sintered member 101A can be joined at a lower temperature compared to solder. As shown in Fig. 92, the sintered member 101A is arranged with a predetermined distance L30 from the inner peripheral surface 442 of the protective film 44. As shown in Figs. 90 to 92, the sintered member 101A is arranged inside the inner peripheral surface 442. The sintered member 101A has, for example, a substantially rectangular planar shape. The outer peripheral end of the sintered member 101A is non-contact with the protective film 44 over the entire circumference. That is, the inner peripheral surface 442 of the protective film 44 encloses the sintered member 101A in a plan view.

[0397] The conductive spacer 70 has a metal film (not shown) on the joint surface with the sintered member 101A. The metal film contains at least a noble metal, like the connection electrode 43. In this embodiment, the metal film is a plating film containing Ni and a noble metal, such as Au or Ag.

[0398] As shown in Figs. 90 to 92, the conductive spacer 70 is arranged inside the inner peripheral surface 442. The conductive spacer 70 has, for example, a substantially rectangular planar shape. The outer peripheral end of the conductive spacer 70 is arranged outside or substantially coinciding with the outer peripheral end of the sintered member 101A in a plan view. That is, the conductive spacer 70 is arranged to enclose the sintered member 101A or substantially coincide with the sintered member 101A in a plan view. In this embodiment, the conductive spacer 70 encloses the sintered member 101A.

[0399] <Joining method> Next, based on Fig. 93, the method for forming the above-described joining structure, that is, the joining method, will be described. Fig. 93 is a cross-sectional view showing the joining method. Fig. 93 corresponds to Fig. 91.

[0400] In this embodiment, a sintering sheet 105 is used to form the sintered member 101A. The sintering sheet 105 is sometimes referred to as a sintering film. The sintering sheet 105 contains Ag or Cu. As shown in FIG. 93, the sintering sheet 105 is disposed on the source electrode 40S (connection electrode 43) of the semiconductor element 40. The sintering sheet 105 has a predetermined size that does not contact the protective film 44 in a plan view.

[0401] Next, a conductive spacer 70 is disposed on the sintering sheet 105. Then, while heating, pressure is applied from the side of the conductive spacer 70 with a pressure device (not shown). As a result, the sintering sheet 105 is pushed and expanded between the opposing surfaces of the connection electrode 43 and the conductive spacer 70, becoming thinner, and is sintered to form the sintered member 101A. The size of the sintering sheet 105 is determined so that the sintered member 101A has the above-described predetermined positional relationship with respect to the inner peripheral surface 442 of the protective film 44 and the conductive spacer 70.

[0402] <Simulation Results> FIG. 94 shows the results of a thermal stress simulation. In this simulation, the strain amplitude generated in the base electrode 42 was measured in a power cycle test in which room temperature and 150° C. were alternately repeated. FIG. 94 shows the relationship between the above-described distance L30 and the strain amplitude. In FIG. 94, when the distance L30 is 0 (zero), it is the position that coincides with the inner peripheral surface 442 of the protective film 44 in a plan view. A negative numerical value of the distance L30 indicates the distance from the inner peripheral surface 442 to the inside, and a positive numerical value indicates the distance to the outside.

[0403] As shown in FIG. 94, it became clear that when the distance L30 is 5 μm or more, the strain amplitude generated in the base electrode 42 becomes almost 0 (zero). In this embodiment, based on this finding, the predetermined distance L30 is set to 5 μm.

[0404] <Summary of the Tenth Embodiment> FIG. 95 shows a connection structure using solder 101B as the bonding material 101. FIG. 95 corresponds to FIG. 93. In the case of solder 101B, the solder 101B is reflowed for bonding. At the time of bonding, the molten solder 101B wets and spreads on the surface of the connection electrode 43. Therefore, as shown by the dashed line in FIG. 95, a triple point of the sealing body 30, the source electrode 40S (connection electrode 43), and the solder 101B (bonding material 101) is formed. Thermal stress based on the difference in the linear expansion coefficient concentrates at the triple point. The thermal stress concentrates at the portion immediately below the outer peripheral end of the connection electrode 43 in the base electrode 42. Therefore, there is a risk that cracks may occur in the base electrode 42 and, consequently, damage may occur to the semiconductor substrate 41.

[0405] In this embodiment, instead of the solder 101B, a sintered member 101A is employed. The sintered member 101A is formed by heating at a temperature lower than the melting point. The sintered member 101A does not become molten like the solder 101B during bonding. The sintered member 101A has lower wettability with respect to the connection electrode 43 and the conductive spacer 70 than the solder 101B. Therefore, the sintered member 101A does not wet and spread on the surface of the connection electrode 43 or the surface of the conductive spacer 70 like the solder 101B during bonding.

[0406] Since the sintered member 101A is easy to hold in a predetermined position, it can be arranged with a predetermined distance L30 from the inner peripheral surface 442 of the protective film 44. As a result, a triple point of the sealing body 30, the source electrode 40S (connection electrode 43), and the sintered member 101A (bonding material 101) is not formed. Therefore, it is possible to suppress the concentration of thermal stress and provide a semiconductor device 20 with high connection reliability. Further, the sintered member 101A has a higher thermal conductivity than the solder 101B. Thereby, the heat dissipation performance can also be improved.

[0407] The distance L30 is not particularly limited. The sintered member 101A only needs to be separated from at least the inner peripheral surface 442. In the present embodiment, the distance L30 between the sintered member 101A and the inner peripheral surface 442 of the protective film 44 is set to 5 μm or more. According to this, the strain amplitude of the base electrode 42 due to thermal stress can be effectively reduced. That is, the connection reliability can be further enhanced.

[0408] In a plan view, the positional relationship between the conductive spacer 70 and the sintered member 101A is not particularly limited. For example, in a plan view, the sintered member 101A may protrude from the conductive spacer 70. As described above, the sintered member 101A is formed by sintering Ag particles or Cu particles by heating and pressing. Since the portion protruding from the conductive spacer 70 is not pressurized, it remains unsintered and may fall as a conductive foreign matter. That is, there is a risk of short circuit or the like occurring.

[0409] In the present embodiment, in a plan view, the inner peripheral surface 442 of the protective film 44 encloses the conductive spacer 70, and the conductive spacer 70 coincides with or encloses the sintered member 101A. Thereby, pressure can be applied to the entire area of the sintered member 101A (sintering sheet 105) before sintering through the conductive spacer 70. Therefore, it is possible to suppress the occurrence of sintering residue while avoiding contact between the sintered member 101A and the protective film 44.

[0410] <Modification example> Although an example in which the sintering sheet 105 is used to form the sintered member 101A has been shown, the present invention is not limited to this. For example, a sintering paste in which Ag particles or Cu particles are dispersed in a solvent may be used. The sintering sheet 105 is easier to hold at a predetermined position than the sintering paste.

[0411] Although an example in which the second wiring member to which the source electrode 40S is connected includes the wiring board substrate 60 and the conductive spacer 70 has been shown, the present invention is not limited to this. Instead of the conductive spacer 70, a convex portion may be provided on the surface metal body 62. That is, the second wiring member may be configured to include only the substrate 60 without the conductive spacer 70. In this case, the sintered member 101A is interposed between the tip surface of the convex portion of the surface metal body 62 and the source electrode 40S (connection electrode 43).

[0412] Although an example of the substrate 50 has been shown as the first wiring member, the present invention is not limited to this. Instead of the substrate 50, a metal plate (lead frame) may be employed. Although an example of the substrate 60 has been shown as the second wiring member, the present invention is not limited to this. Instead of the substrate 60, a metal plate (lead frame) may be employed. The second wiring member may have a metal plate and the conductive spacer 70, or instead of the conductive spacer 70, a convex portion may be provided on the metal plate.

[0413] Although an example in which the semiconductor device 20 includes the semiconductor elements 40H and 40L has been shown, the present invention is not limited to this. The semiconductor device 20 may include only the semiconductor element 40 that constitutes one of the arms. For example, the semiconductor device 20 may include only one semiconductor element 40.

[0414] The configuration described in the present embodiment can be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, the seventh embodiment, the eighth embodiment, the ninth embodiment, and the modified example.

[0415] (11th Embodiment) This embodiment is a modified example based on the preceding embodiment, and the description of the preceding embodiment can be incorporated herein. In order to enhance heat dissipation, as described in the present embodiment, a sintered member may be used at the joint between the main electrode and the wiring member.

[0416] <Semiconductor Device> First, the semiconductor device 20 according to the present embodiment will be described with reference to FIG. 96. FIG. 96 is a cross-sectional view corresponding to FIG. 5. In FIG. 96, for convenience, the external connection terminal 90 is not shown.

[0417] The semiconductor device 20 of this embodiment has the same configuration as the configuration (see FIGS. 2 to 13) described in the previous embodiment. As shown in FIG. 96, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 which are wiring members arranged so as to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D which is the first main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S which is the second main electrode of the semiconductor element 40 via a conductive spacer 70. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the conductive spacer 70. The drain electrode 40D and the surface metal body 52 of the substrate 50 are joined by a sintered member 100A which is a joining material 100.

[0418] <Arrangement of Sintered Member and Concavo-Convex Oxide Film> Next, based on FIGS. 97 to 99, the arrangement of the sintered member 100A and the concavo-convex oxide film 520 with respect to the semiconductor element 40 will be described. FIG. 97 is an enlarged view of region XCVII in FIG. 96. FIG. 98 is a plan view showing the positional relationship among the semiconductor element 40, the sintered member 100A, and the concavo-convex oxide film 520. FIG. 99 is an enlarged view of region XCVIX in FIG. 97.

[0419] As shown in FIGS. 97 and 98, the upper surface 52a of the surface metal body 52 has a mounting portion 529a, an outer peripheral portion 529b, and an intermediate portion 529c. The concavo-convex oxide film 520 is not provided on the mounting portion 529a, but is provided on the outer peripheral portion 529b and the intermediate portion 529c.

[0420] The mounting portion 529a includes a portion that overlaps with the semiconductor element 40 (drain electrode 40D) in a plan view in the Z direction, and is a portion where the drain electrode 40D is joined via the sintered member 100A. The outer peripheral portion 529b includes a portion outside the outer peripheral end 402 of the semiconductor element 40 in a plan view, and is a portion that surrounds the semiconductor element 40. The intermediate portion 529c is a portion between the mounting portion 529a and the outer peripheral portion 529b, and surrounds the mounting portion 529a. In the present embodiment, the mounting portion 529a substantially coincides with the semiconductor element 40 (drain electrode 40D) in a plan view. The intermediate portion 529c has a substantially rectangular ring shape in a plane, and the inner peripheral end of the intermediate portion 529c substantially coincides with the outer peripheral end 402 of the semiconductor element 40. The entire intermediate portion 529c is located outside the semiconductor element 40 in a plan view.

[0421] As shown in FIGS. 97 to 99, the surface metal body 52 of the substrate 50 has an uneven oxide film 520, similar to the configuration described in the previous embodiment (see FIGS. 67 and 74). As shown in FIG. 99, the surface metal body 52 has a base material 521, a metal film 522 provided on the surface of the base material 521, and an uneven oxide film 520.

[0422] The metal film 522 of the present embodiment has an underlying film mainly composed of Ni and an upper layer film mainly composed of a noble metal capable of joining with the sintered member 100A, such as Au or Ag. Specifically, as the underlying film, a Ni plating film containing P and an Au plating film are employed. Among the upper surfaces 52a of the metal film 522, a plurality of recesses 523 are formed in the outer peripheral portion 529b. No recesses 523 are formed in the mounting portion 529a and the intermediate portion 529c. In the portion where no recesses 523 are formed, the film thickness of the metal film 522 is, for example, about 10 μm. That is, the film thickness before the irradiation of the laser light is about 10 μm. The recesses 523 are formed by the irradiation of pulsed oscillation laser light. One recess 523 is formed for each pulse. In the outer peripheral portion 529b, the surface of the metal film 522 has a scaly shape due to the plurality of recesses 523. The outer peripheral portion 529b is the laser light irradiation area, and the mounting portion 529a and the intermediate portion 529c are non-irradiation areas.

[0423] The concavo-convex oxide film 520 is formed on the metal film 522. The concavo-convex oxide film 520 is not formed on the mounting portion 529a, but is formed on the outer peripheral portion 529b and the intermediate portion 529c which are the portions around the mounting portion 529a. As described in the previous embodiment, the concavo-convex oxide film 520 is formed by irradiating the metal film 522 with laser light. The concavo-convex oxide film 520 is a laser-irradiated film formed by irradiation with laser light. The main component of the concavo-convex oxide film 520 is an oxide of the main component metal of the metal film 522.

[0424] In the outer peripheral portion 529b, that is, in the laser light irradiation area, the average film thickness of the concavo-convex oxide film 520 is set to be 10 nm to several hundreds of nm. The concavo-convex oxide film 520 is formed following the unevenness on the surface of the metal film 522 having the concave portions 523. Further, unevenness is formed on the surface of the concavo-convex oxide film 520 at a pitch finer than the width of the concave portions 523. That is, very fine unevenness (roughened portions) is formed. In other words, a plurality of convex portions 520a (columnar bodies) are formed at a fine pitch. For example, the average width of the convex portions 520a is 1 nm to 300 nm, and the average interval between the convex portions 520a is 1 nm to 300 nm. Further, the average height of the convex portions 520a is 10 nm to several hundreds of nm.

[0425] Since the concavo-convex oxide film 520 is formed by irradiating the metal film 522 with laser light and melting and vapor-depositing the surface layer of the metal film 522, it is formed not only in the outer peripheral portion 529b which is the laser light irradiation area, but also in the periphery (vicinity) of the outer peripheral portion 529b. In the present embodiment, among the non-irradiation areas of the laser light, the concavo-convex oxide film 520 is formed over the entire area of the intermediate portion 529c, and the concavo-convex oxide film 520 is not formed on the mounting portion 529a. The width of the intermediate portion 529c having the concavo-convex oxide film 520 over the entire area is, for example, 0.2 mm to 0.3 mm.

[0426] Since the laser light is not directly irradiated to the uneven oxide film 520 in the middle part 529c, the average film thickness of the uneven oxide film 520 in the middle part 529c is thinner than that of the uneven oxide film 520 in the outer peripheral part 529b and thicker than the natural oxide film. Specifically, it is 0.1 nm to 10 nm. Further, the height of the convex part 520a on the surface of the uneven oxide film 520 is also made lower than that of the outer peripheral part 529b. Specifically, it is 0.1 nm to 10 nm. Note that the average width and average interval of the convex part 520a are about the same as those of the outer peripheral part 529b.

[0427] As described above, the uneven oxide film 520 has a thick film part 520X and a thin film part 520Y. The thick film part 520X is a part of the uneven oxide film 520 provided in the irradiation area of the laser light, that is, the outer peripheral part 529b. The thin film part 520Y is a part of the uneven oxide film 520 provided in the non-irradiation area of the laser light, that is, the middle part 529c. The thin film part 520Y has a thinner film thickness of the uneven oxide film 520 and a lower height of the convex part 520a than the thick film part 520X. The thick film part 520X is provided in the outer peripheral part 529b. The thin film part 520Y is provided in the middle part 529c.

[0428] Since the height of the convex part 520a of the thick film part 520X is higher than that of the thin film part 520Y, the sealing body 30 gets entangled and the anchor effect occurs. Further, the contact area with the sealing body 30 increases. Thereby, the sealing body 30 is in close contact with the outer peripheral part 529b. The thick film part 520X may be referred to as a roughened part or an adhering part.

[0429] The sintered member 100A is made of Ag or Cu, similar to the sintered member 101A described in the previous embodiment. The sintered member 100A is a sintered body made of Ag particles or Cu particles. The sintered member 100A can be joined at a lower temperature compared to solder. The sintered member 100A is formed by heating and pressing a sintered sheet or a sintered paste. The sintered member 100A protrudes outward beyond the outer peripheral end 402 of the semiconductor element 40 in a plan view. The sintered member 100A is arranged so as to overlap with the mounting portion 529a and the intermediate portion 529c in a plan view. In the present embodiment, the outer peripheral end of the sintered member 100A substantially coincides with the outer peripheral end of the intermediate portion 529c. The sintered member 100A overlaps the entire area of the mounting portion 529a and the entire area of the intermediate portion 529c in a plan view.

[0430] <Summary of the 11th Embodiment> As described above, the intermediate portion 529c has the thin film portion 520Y of the concavo-convex oxide film 520. By having the thin film portion 520Y, the wettability of the intermediate portion 529c with respect to solder is lower than that of the mounting portion 529a. As a result, solder is less likely to spread by wetting from the mounting portion 529a to the intermediate portion 529c side.

[0431] In the present embodiment, instead of solder, the sintered member 100A is used. The sintered member 100A is formed by heating at a temperature lower than the melting point. The sintered member 100A does not become a molten state like solder during joining. The sintered member 100A does not spread by wetting the surface of the surface metal body 52 like solder during joining.

[0432] The sintered member 100A is expanded between the opposing surfaces of the drain electrode 40D and the surface metal body 52 during pressure sintering. By being expanded, the sintered member 100A is disposed not only on the mounting portion 529a but also on the intermediate portion 529c. The sintered member 100A is not wetted and spread, but is expanded by pressure and contacts the thin film portion 520Y. Thereby, not only the joint portion between the sintered member 100A and the mounting portion 529a but also the contact portion between the sintered member 100A and the intermediate portion 529c functions as a heat dissipation path. As a result, the semiconductor device 20 with high heat dissipation can be provided. Further, the sintered member 100A has a higher thermal conductivity than solder. Thereby, the heat dissipation can also be enhanced.

[0433] Also, the height of the convex portion 520a of the thin film portion 520Y is lower than that of the thick film portion 520X. That is, the adhesion of the intermediate portion 529c to the sealing body 30 is lower than that of the outer peripheral portion 529b. Thereby, the sealing body 30 is difficult to adhere to the intermediate portion 529c. In the present embodiment, the sintered member 100A is in contact with the intermediate portion 529c. The sintered member 100A covers a portion with low adhesion on the upper surface 52a. Therefore, it is possible to suppress the peeling of the sealing body 30 from the upper surface 52a in the vicinity of the periphery of the semiconductor element 40. Thereby, it is possible to suppress the concentration of thermal stress on the joint portion of the sintered member 100A and the drain electrode 40D, and thus improve the connection reliability.

[0434] In the present embodiment, the entire intermediate portion 529c is located outside the semiconductor element 40. According to this, the joint portion between the sintered member 100A and the mounting portion 529a c...

Claims

1. A semiconductor element (40) having a first main electrode (40D) provided on one surface, a second main electrode (40S) provided on the back surface opposite to the one surface in the plate thickness direction, a signal pad (40P) provided at a position different from the second main electrode on the back surface, and a protective film (44) provided on the back surface and having openings for individually exposing the second main electrode and the pad; A first wiring member (50) disposed on the first main electrode side in the plate thickness direction so as to enclose the semiconductor element in a plan view in the plate thickness direction and electrically connected to the first main electrode; A second wiring member (60) disposed on the second main electrode side in the plate thickness direction so as to enclose the semiconductor element in the plan view and electrically connected to the second main electrode; A bonding wire (110) bonded to the pad; A sealing body (30) for sealing the semiconductor element, at least a part of the first wiring member including the surface facing the semiconductor element, at least a part of the second wiring member including the surface facing the semiconductor element, and the bonding wire; Comprising; At least one of the first wiring member and the second wiring member has an adhesion portion (527, 570, 627) provided on the surface facing the semiconductor element and in close contact with the sealing body; The second wiring member is a region that is continuous with the electrical connection portion between the semiconductor element on the surface facing the semiconductor element and provides a flat surface together with the connection portion, and is provided in a portion that at least overlaps the pad in the plan view, and has a non-adhesion portion (628, 671) with lower adhesion to the sealing body than the adhesion portion; The second wiring member has the non-adhesion portion and the adhesion portion provided at a position different from the non-adhesion portion on the surface facing the semiconductor element, a semiconductor device.

2. The semiconductor device according to claim 1, wherein in the arrangement direction of the second main electrode and the pad, the adhesion portion is provided between an end of the surface facing the semiconductor element and the non-adhesion portion.

3. The semiconductor device according to claim 1 or claim 2, wherein the first wiring member has the adhesion portion on the surface facing the semiconductor element.

4. The semiconductor device according to any one of claims 1 to 3, wherein the adhesion portion is a roughened portion and the non-adhesion portion is a non-roughened portion.

5. The semiconductor device according to claim 4, wherein an oxide film (620) made of the same metal as the main component metal of the conductor forming the surface that is continuously uneven and forms the facing surface with the semiconductor element is formed on the roughened portion.

6. The semiconductor device according to any one of claims 1 to 3, wherein the adhesion portion is a coating portion on which a resin film for enhancing the adhesion to the sealing body is formed.

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