Display device

The display device synchronizes pixel gradation values with backlight timing through preset periods, addressing display quality issues in high-definition VR and AR systems by aligning liquid crystal molecule driving with backlight timing, thus maintaining image clarity.

JP2025110530APending Publication Date: 2025-07-29MAGNOLIA WHITE CORP
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Patent Information

Application Number
JP2024004414
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-16
Publication Date
2025-07-29

AI Technical Summary

Technical Problem

Existing display devices face a decrease in display quality due to batch presetting of pixel gradation values, which can lead to misalignment between liquid crystal molecule driving and backlight timing, especially in high-definition VR and AR systems requiring high frame rates.

Method used

A display device with a signal processing circuit that sets preset gradation values for all pixels based on a frame image, utilizing a display panel with preset periods before writing periods to align with the frame image display, incorporating a light source and a display panel with pixels arranged in orthogonal directions, and a signal processing circuit to control the panel and light source.

Benefits of technology

This approach enhances display quality by synchronizing pixel gradation values with backlight timing, reducing luminance discrepancies and maintaining high-definition image clarity in VR and AR applications.

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Abstract

To provide a display device capable of suppressing deterioration of display quality caused by collective presetting of a pixel gradation value.SOLUTION: A display device includes: a display panel having a display region in which multiple pixels are lined up in a first direction and in a second direction orthogonal to the first direction; a light source for applying light to the display panel; and a signal processing circuit for controlling the display panel and the light source. The signal processing circuit sets a preset gradation value written to all the pixels of a display region on the basis of a frame image for one frame displayed in the display region. The display panel has preset periods PSPR, PSPG, PSPB for writing a preset gradation value to all the pixels of the display region before writing periods SCPR, SCPG, SCPB for writing a gradation value for each pixel of a frame image during a one-frame period F for displaying the frame image.SELECTED DRAWING: Figure 6
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Description

Technical Field

[0001] The present invention relates to a display device.

Background Art

[0002] For example, display devices such as VR (Virtual Reality) and AR (Augmented Reality) are known, which place an HMD (Head Mounted Display) in front of a user's eyes and change the display of an image as the viewpoint moves. In such a display device, since the display image is magnified by a lens, pixels are easily visible. Therefore, higher definition of the display panel is required.

[0003] As a method for achieving higher definition of a display panel, a field sequential color liquid crystal display device is known, which drives pixels by time-division multiplexing a single frame period into a plurality of sub-field periods and irradiates a display area with light of different colors for each sub-field period to display a color image. In the field sequential method, since a single pixel can represent multiple colors, higher definition can be achieved compared to the color filter method in which one pixel is composed of multiple color sub-pixels.

[0004] On the other hand, in a VR system using an HMD, in order to reduce delay and afterimage phenomena in the displayed image, in addition to higher definition, a higher frame rate is required. Conventionally, in order to achieve a higher frame rate in a liquid crystal display device, a method is known in which a signal of a predetermined gradation is written to all pixels and then the gradation of the video signal is written (for example, Patent Document 1). Thereby, the response performance of the liquid crystal can be improved and a higher frame rate can be achieved.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] In the above prior art, regardless of the gradation value of the video signal, a fixed gradation value is written to all pixels in advance. Therefore, depending on the gradation value of the video signal, the driving of the liquid crystal molecules may not keep up with the lighting timing of the backlight, and the display quality may deteriorate.

[0007] The present disclosure has been made in view of the above problems, and an object thereof is to provide a display device capable of suppressing a decrease in display quality caused by batch presetting of pixel gradation values.

Means for Solving the Problems

[0008] A display device according to an aspect of the present disclosure includes a display panel having a display area in which a plurality of pixels are arranged in a first direction and a second direction orthogonal to the first direction, a light source that irradiates the display panel with light, and a signal processing circuit that controls the display panel and the light source. The signal processing circuit sets preset gradation values to be written to all pixels in the display area based on a frame image for one frame to be displayed in the display area. The display panel has a preset period in which the preset gradation values are written to all pixels in the display area before a writing period in which the gradation value of each pixel of the frame image is written during a one-frame period in which the frame image is displayed.

Brief Description of the Drawings

[0009]

Figure 1

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Figure 5B

Figure 5C

Figure 5D

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Figure 9A

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Figure 12

Embodiments for Carrying Out the Invention

[0010] Embodiments for implementing the present disclosure will be described in detail with reference to the drawings. Note that the present disclosure is not limited by the content described in the following embodiments. Also, the constituent elements described below include those that can be easily assumed by those skilled in the art and substantially identical ones. Furthermore, the constituent elements described below can be combined as appropriate. Also, the disclosure is merely an example, and those that can be easily conceived by those skilled in the art with appropriate modifications while maintaining the gist of the disclosure are naturally included in the scope of the present disclosure. Also, for the purpose of making the description clearer, the drawings may schematically represent the width, thickness, shape, etc. of each part compared to the actual aspect, but this is merely an example and does not limit the interpretation of the present disclosure. Also, in this specification and each drawing, the same reference numerals may be assigned to the same elements as those described above with respect to the previously presented drawings, and detailed descriptions may be omitted as appropriate.

[0011] FIG. 1 is a schematic diagram showing an example of the block configuration of a display device according to an embodiment. FIG. 2 is a schematic diagram showing a configuration example of a display panel according to an embodiment. The display device 1 according to the embodiment includes, as main block configurations, a signal processing circuit 20, a display panel 40, and a light source 60. The display panel 40 includes a signal output circuit 31 and a scanning circuit 32. In the present disclosure, the display panel 40 is an active matrix type color liquid crystal display panel driven by a so-called field sequential color (FSC) method.

[0012] The display panel 40 is driven and controlled based on signals from the signal processing circuit 20. In the present disclosure, the display panel 40 is a liquid crystal display panel in which polymer dispersed liquid crystal (PDLC) (hereinafter also simply referred to as "liquid crystal") is encapsulated between substrates arranged opposite to each other. The light source 60 illuminates the display panel 40 from the back. The display panel 40 displays an image by signals from the signal processing circuit 20 and light from the light source 60.

[0013] As shown in FIG. 2, the display panel 40 is provided with a display area 41 in which a plurality of pixels 48 are arranged in the X direction (first direction) and the Y direction (second direction). The Y direction (second direction) is a direction intersecting the X direction (first direction). More specifically, in the example shown in FIG. 1, the Y direction (second direction) is a direction orthogonal to the X direction (first direction).

[0014] The plurality of pixels 48 each include a switching element and a pixel electrode. The liquid crystal molecules included in the liquid crystal layer of the display panel 40 determine their orientation corresponding to the potential of the pixel electrode. Thereby, the light transmittance of each pixel 48 is controlled.

[0015] The switching element is a switching element using a semiconductor, such as a thin film transistor (TFT: Thin Film Transistor). One of the source or drain of the switching element is connected to the signal line DTL. The other of the source or drain of the switching element is connected to the pixel electrode. The gate of the switching element is connected to the scanning line SCL.

[0016] The signal processing circuit 20 outputs various signals for controlling the operations of the signal output circuit 31, the scanning circuit 32, and the light source control circuit 61 according to an input signal from the outside.

[0017] The signal output circuit 31 outputs a pixel signal SIG having a gradation value corresponding to the frame image IS supplied from the signal processing circuit 20 to each of the plurality of pixels arranged in the X direction (first direction). In the present disclosure, the number of signal lines DTL is set to M (M is a natural number). In the following description, the m-th (m is a natural number from 1 to M) signal line DTL arranged in the X direction (first direction) is referred to as "signal line DTL" <m>」, also referred to as. Also, from the signal output circuit 31 to the signal line DTL <m>The pixel signal SIG supplied thereto is "pixel signal SIG" <m>is also referred to as "」.

[0018] The scanning circuit 32 sequentially outputs a driving signal GATE to the scanning lines SCL arranged in the Y direction (second direction). The scanning circuit 32 scans the display panel 40 by shifting the scanning line SCL to which the driving signal is output. In the present disclosure, the number of scanning lines SCL is set to N (N is a natural number). In the following description, the nth (n is a natural number from 1 to N) scanning line SCL arranged in the Y direction (second direction) is referred to as "scanning line SCL" <n>」, also referred to as. Further, from the scanning circuit 32 to the scanning line SCL <n>The drive signal GATE output to is "drive signal GATE" <n>Also referred to as "」".

[0019] More specifically, the signal output circuit 31 receives the drive signal GATE from the scanning circuit 32 <n>Scanning line SCL to which is supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIG are respectively supplied <m>Supply it.

[0020] Note that the drive signal GATE <n>The output target is from the scan line SCL<1> to the scan line SCL <n>It may be a mode of transitioning toward [the target], and the scanning line SCL <n>It may also be a mode of transitioning toward the scanning line SCL<1>. In the present disclosure, the drive signal GATE <n>The output target is from the scanning line SCL<1> to the scanning line SCL <n>An example of transition towards it will be described.

[0021] The light source 60 includes a plurality of light emitting units 62. The light source 60 is connected to a light source control circuit 61. The light source 60 is called a side light source, and the light irradiated from the light emitting bodies arranged in plurality at the end of the light guide plate passes through the light guide plate and the light irradiated from the light source 60 passes through the display panel 40.

[0022] The light emitting unit 62 includes a first light emitting body 63R that emits light of a first color (for example, red), a second light emitting body 63G that emits light of a second color (for example, green), and a third light emitting body 63B that emits light of a third color (for example, blue). Each light emitting body is, for example, an LED (Light Emitting Diode), but is not limited thereto, and may be, for example, a CCFL (Cold Cathode Fluorescent Lamp) or the like. Each light emitting body is connected to the light source control circuit 61 respectively. The light source control circuit 61 controls the light emission timing, light emission time, and light emission intensity of each light emitting body under the operation control of the signal processing circuit 20.

[0023] Specifically, the light source control circuit 61 controls the first light emitting body 63R, the second light emitting body 63G, and the third light emitting body 63B to emit light in a time-division manner based on the light source control signal from the signal processing circuit 20.

[0024] To the signal processing circuit 20, as input signals, a number of frame images IS corresponding to the frame rate (fps) are sequentially input. The frame rate (fps) indicates the number of frame images IS displayed in the display area 41 in a predetermined time (for example, 1 second).

[0025] FIG. 3 is a diagram showing an example of one frame period according to a comparative example. Hereinafter, the period for displaying one frame image (one screen) in the display area is defined as one frame period F. Also, in the present disclosure, one frame period F is, for example, 16.7 ms. That is, in the present disclosure, the frame rate is set to 60 Hz.

[0026] As shown in FIG. 3, in the comparative example, one frame period F is equally divided into three parts, namely, the first sub-field period SFR, the second sub-field period SFG, and the third sub-field period SFB.

[0027] In the first sub-field period SFR, a writing period SCPR for the first color is provided. Also, a response period RESPR is provided between the writing period SCPR and the light emission period LMPR of the first light emitter 63R.

[0028] In the second sub-field period SFG, a writing period SCPG for the second color is provided. Also, a response period RESPG is provided between the writing period SCPG and the light emission period LMPG of the second light emitter 63G.

[0029] In the third sub-field period SFB, a writing period SCPB for the third color is provided. Also, a response period RESPB is provided between the writing period SCPB and the light emission period LMPB of the third light emitter 63B.

[0030] In the comparative example shown in FIG. 3, the first sub-field period SFR, the second sub-field period SFG, and the third sub-field period SFB are each set to 5.6 ms. Also, the writing periods SCPR, SCPG, and SCPB are each set to 2.8 ms. Also, the response periods RESPR, RESPG, and RESPB are each set to 2.3 ms. Also, the light emission periods LMPR, LMPG, and LMPB are each set to 0.4 ms.

[0031] In the following description, the pixel signal SIG corresponding to the first color (for example, red) of the frame image IS <m>as simply "pixel signal SIGR" <m>」, also referred to as. Further, a pixel signal SIG corresponding to the second color (for example, green) of the frame image IS <m>be simply referred to as "pixel signal SIGG" <m>is also referred to as. The pixel signal SIG corresponding to the third color (for example, blue) of the frame image IS <m>be simply referred to as "pixel signal SIGB" <m>Also referred to as "」".

[0032] During the write period SCPR, the scanning circuit 32 scans from the scanning line SCL<1> to the scanning line SCL <n>towards the drive signal GATE <n>Transfer the output target. Also, the signal output circuit 31 receives the drive signal GATE from the scanning circuit 32 <n>Scanning line SCL to which is supplied <n>For each of a plurality of pixels 48 connected to , a pixel signal SIGR corresponding to the first color of the frame image IS <m>Supply.

[0033] Then, in the light emission period LMPR after the response period RESPR, the light source control circuit 61 turns on the first light emitter 63R.

[0034] In the subsequent writing period SCPG, the scanning circuit 32 scans from the scanning line SCL<1> to the scanning line SCL <n>towards the drive signal GATE <n>Transfer the output target. Also, the signal output circuit 31 receives the drive signal GATE from the scanning circuit 32 <n>Scanning line SCL to which is supplied <n>For each of a plurality of pixels 48 connected to , a pixel signal SIGG corresponding to a second color of the frame image IS <m>Supply it.

[0035] Then, in the light emission period LMPG after the response period RESPG, the light source control circuit 61 turns on the second light emitter 63G.

[0036] In the subsequent writing period SCPB, the scanning circuit 32 scans from the scanning line SCL<1> to the scanning line SCL <n>towards the drive signal GATE <n>Transfer the output target. Also, the signal output circuit 31 receives a drive signal GATE from the scanning circuit 32 <n>The scanning line SCL to which is supplied <n>For each of a plurality of pixels 48 connected to , a pixel signal SIGB corresponding to a third color of the frame image IS <m>Supply it.

[0037] Then, the light source control circuit 61 turns on the third light emitter 63B during the light emission period LMPB after the response period RESPB.

[0038] As a result, the frame image IS for one frame is visually recognized by the user.

[0039] In the comparative example shown in FIG. 3, further, reset periods RSTPR, RSTPG, and RSTPB for writing a fixed gradation value to all the pixels 48 included in the display area 41 are provided immediately before the writing periods SCPR, SCPG, and SCPB. Hereinafter, in the comparative example, the gradation values written in the reset periods RSTPR, RSTPG, and RSTPB will be described.

[0040] In the following description, the pixel signal SIG <m>It will be described as an 8-bit gradation value. When the gradation value GV is the maximum value "255", the degree of light transmission through the pixel 48 is in the state with the largest degree. Also, when the gradation value GV is the minimum value "0", the degree of light transmission through the pixel 48 is in the state with the smallest degree.

[0041] Also, in the following description, the first sub-field period SFR, the second sub-field period SFG, and the third sub-field period SFB may be simply referred to as the "sub-field period SF". Also, the writing periods SCPR, SCPG, SCPB may be simply referred to as the "writing period SCP". Also, the response periods RESPR, RESPG, RESPB may be simply referred to as the "response period RESP". Also, the light emission periods LMPR, LMPG, LMPB may be simply referred to as the "light emission period LMP". Also, the reset periods RSTPR, RSTPG, RSTPB may be simply referred to as the "reset period RSTP".

[0042] The response time associated with the update of the gradation value varies depending on the gradation value before update and the gradation value after update. The response time is the time measured as the time from when the potential corresponding to the gradation value after update is applied to the pixel electrode until it reaches 90% of the gradation value after update. FIG. 4 is a diagram showing an example of the response time required for the update of the pixel gradation value.

[0043] In FIG. 4, "0", "45", "79", "118", "145", "207", "255" are exemplified as the gradation value before update and the gradation value after update, but these are representative values, and the gradation value before update and the gradation value after update are not limited to these values.

[0044] Taking a specific example by focusing on the gradation value after update, when the gradation value after update is the minimum value "0", when the gradation value before update is "255", the maximum value of the response time RT is 1.4 ms. Also, when the gradation value after update is the maximum value "255", when the gradation value before update is "0", the maximum value of the response time RT is 2.0 ms.

[0045] On the one hand, when the updated gradation value is "118" and the gradation value before update is "0", the maximum value of the response time RT is 2.8 ms. Also, when the updated gradation value is "145", and the gradation value before update is "0", the maximum value of the response time RT is 3.2 ms.

[0046] Thus, when the updated gradation value is an intermediate gradation, the response time RT tends to be longer compared to the case where the updated gradation value is the minimum value "0" or the maximum value "255".

[0047] Here, focusing on the gradation value before update, when the gradation value before update is "118", for all of the updated gradation values of "0", "45", "79", "118", "145", "207", "255", the response time RT is within the response period RESP (2.3 ms). Also, when the updated gradation value is "118", for all of the gradation values before update of "0", "45", "79", "118", "145", "207", "255", the response time RT is within the writing period SCP (2.8 ms).

[0048] From the above, it is conceivable to set the gradation value written to the reset period RSTP to "118".

[0049] Figure 5A is the first figure showing an operation example according to a comparative example. Figure 5B is the second figure showing an operation example according to a comparative example. Figure 5C is the third figure showing an operation example according to a comparative example. Figure 5D is the fourth figure showing an operation example according to a comparative example.

[0050] In Figures 5A, 5B, 5C, and 5D, the scanning line SCL <n>This illustrates the change in the gradation value of pixel 48 connected thereto. Also, in the examples shown in FIGS. 5A, 5B, 5C, and 5D, the gradation value written in the write period SCPR of the first sub-field period SFR is defined as the target gradation value TGV(R). Also, the gradation value written in the write period SCPG of the second sub-field period SFG is defined as the target gradation value TGV(G). Also, the gradation value written in the write period SCPB of the third sub-field period SFB is defined as the target gradation value TGV(B). Note that each of the target gradation values TGV(R), TGV(G), and TGV(B) is also simply referred to as the "target gradation value TGV".

[0051] Also, in FIGS. 5A, 5B, 5C, and 5D, in each of the reset periods RSTPR, RSTPG, and RSTPB provided in the first sub-field period SFR, the second sub-field period SFG, and the third sub-field period SFB, the gradation value "118" written to all the pixels 48 included in the display area 41 is defined as the reset gradation value RGV.

[0052] Note that in FIGS. 5A, 5B, 5C, and 5D, for ease of explanation, it is described that the reset gradation value RGV set in the reset period RSTP reaches 100% within the write period SCP (2.8 ms).

[0053] In FIG. 5A, the pixel signal SIGR <m>, pixel signal SIGG <m>, and pixel signal SIGB <m>This shows an example where each gradation value is the minimum value "0", that is, the frame image IS is a completely black image with 0% brightness.

[0054] In the example shown in FIG. 5A, the scanning line SCL <n>When the target gradation value TGV = "0" is written as the gradation value of the pixel 48 connected to , at 1.1 ms after the start of the response period RESP, with respect to the luminance corresponding to the reset gradation value RGV = "118", the luminance reaches a value that is 90% of the luminance difference from the luminance corresponding to the reset gradation value RGV = "118" to the luminance corresponding to the target gradation value TGV = "0". In FIG. 5A, an example is shown in which the light emitting portion 62 is lit during the light emission period LMP before reaching the luminance corresponding to the target gradation value TGV = "0". As a result, at the lower part of the display area 41, there is a possibility that the luminance floats by a difference ΔGV with respect to the luminance corresponding to the target gradation value TGV = "0".

[0055] In FIG. 5B, the pixel signal SIGR <m>, pixel signal SIGG <m>, and pixel signal SIGB <m>An example is shown in which each gradation value is the maximum value "255", that is, the frame image IS is a completely white image with 100% luminance.

[0056] In the example shown in FIG. 5B, the scanning line SCL <n>When the target gradation value TGV = "255" is written as the gradation value of the pixel 48 connected to , at 1.9 ms after the start of the response period RESP, with respect to the luminance corresponding to the reset gradation value RGV = "118", the luminance reaches the luminance obtained by adding 90% of the luminance difference from the luminance corresponding to the target gradation value TGV = "255" to the luminance corresponding to the reset gradation value RGV = "118". In FIG. 5B, an example is shown in which the light emitting portion 62 is lit during the light emission period LMP before reaching the luminance corresponding to the target gradation value TGV = "255". As a result, at the lower part of the display area 41, there is a possibility that the luminance decreases by the difference ΔGV with respect to the luminance corresponding to the target gradation value TGV = "255".

[0057] In FIG. 5C, the pixel signal SIGR <m>, pixel signal SIGG <m>, and pixel signal SIGB <m>An example where each gradation value is "207" is shown.

[0058] In the example shown in FIG. 5C, the scanning line SCL <n>When the target gradation value TGV = "207" is written as the gradation value of the pixel 48 connected to , at 2.3 ms after the start of the response period RESP, with respect to the luminance corresponding to the reset gradation value RGV = "118", the luminance reaches the luminance obtained by adding 90% of the luminance difference from the luminance corresponding to the target gradation value TGV = "207" to the luminance corresponding to the reset gradation value RGV = "118". In FIG. 5C, an example is shown in which the light emitting portion 62 lights up during the light emission period LMP before reaching the luminance corresponding to the target gradation value TGV = "207". As a result, there is a possibility that the luminance decreases by the difference ΔGV with respect to the luminance corresponding to the target gradation value TGV = "207" at the lower part of the display area 41.

[0059] In FIG. 5D, the pixel signal SIGR <m>The gradation value is the minimum value "0", and the pixel signal SIGG <m>The gradation value is the maximum value "255", and the pixel signal SIGB <m>An example is shown where the gradation value is the minimum value "0", that is, the frame image IS is a full green image.

[0060] In the example shown in FIG. 5D, the scanning line SCL <n>As the gradation value of the pixel 48 connected to , when the target gradation value TGV(R) = "0" of the first color (here, red) is written, at 1.1 ms after the start of the response period RESPR, with respect to the luminance corresponding to the reset gradation value RGV = "118", the luminance reaches a value that is 90% of the luminance difference from the luminance corresponding to the reset gradation value RGV = "118" to the luminance corresponding to the target gradation value TGV(R) = "0". In FIG. 5D, an example is shown in which the first light emitter 63R lights up during the light emission period LMPR before reaching the luminance corresponding to the target gradation value TGV(R) = "0". As a result, at the lower part of the display area 41, there is a possibility that the red luminance floats by a difference ΔGVR with respect to the luminance corresponding to the target gradation value TGV(R) = "0".

[0061] Also, in the example shown in FIG. 5D, the scanning line SCL <n>As the gradation value of the pixel 48 connected to , when the target gradation value TGV(G) = "255" of the second color (here, green) is written, at 1.9 ms after the start of the response period RESPG, with respect to the luminance corresponding to the reset gradation value RGV = "118", the luminance reaches a value obtained by adding 90% of the luminance difference from the luminance corresponding to the target gradation value TGV(G) = "255" to the luminance corresponding to the reset gradation value RGV = "118". In FIG. 5D, an example is shown in which the second light emitter 63G lights up during the light emission period LMPG before the luminance corresponding to the target gradation value TGV(G) = "255" is reached. As a result, at the lower part of the display area 41, there is a possibility that the green luminance decreases by the difference ΔGVG with respect to the luminance corresponding to the target gradation value TGV(G) = "255".

[0062] Also, in the example shown in FIG. 5D, the scanning line SCL <n>As the gradation value of the pixel 48 connected to is written with the target gradation value TGV(B) of the third color (here, blue) being "0", at 1.1 ms after the start of the response period RESPB, with respect to the luminance corresponding to the reset gradation value RGV = "118", the luminance reaches a value that is 90% of the luminance difference from the luminance corresponding to the reset gradation value RGV = "118" to the luminance corresponding to the target gradation value TGV(B) = "0". In FIG. 5D, an example is shown in which the third light emitter 63B lights up during the light emission period LMPB before reaching the luminance corresponding to the target gradation value TGV(B) = "0". As a result, at the lower part of the display area 41, there is a possibility that the blue luminance floats by a difference ΔGVB with respect to the luminance corresponding to the target gradation value TGV(B) = "0".

[0063] In the example shown in FIG. 5D, the green luminance is the original pixel signal SIGG <m>Not only does it not reach the luminance corresponding to the gradation value "255", but the frame image IS visible to the user becomes a mixed color in which red and blue are mixed with respect to green.

[0064] FIG. 6 is a diagram showing an example of one frame period according to the embodiment. As shown in FIG. 6, in the embodiment, instead of the reset periods RSTPR, RSTPG, and RSTPB provided immediately before the writing periods SCPR, SCPG, and SCPB of the comparative example, preset periods PSPR, PSPG, and PSPB for writing preset gradation values PSGV(R), PSGV(G), and PSGV(B) set in advance according to the frame image IS supplied from the signal processing circuit 20 are provided. Hereinafter, in each of the preset periods PSPR, PSPG, and PSPB provided in the first sub-field period SFR, the second sub-field period SFG, and the third sub-field period SFB, a configuration and operation capable of setting the preset gradation values PSGV(R), PSGV(G), and PSGV(B) to be written to all the pixels 48 included in the display area 41, and a method for setting the preset gradation values PSGV(R), PSGV(G), and PSGV(B) will be described.

[0065] In the following description, the pixel signal SIGR corresponding to the pixels 48 of m columns and n rows <m>Let it be the "pixel signal SIGR<m,n>". Also, the pixel signal SIGG corresponding to the pixel 48 of m columns and n rows <m>is defined as "pixel signal SIGG<m,n>". Also, the pixel signal SIGB corresponding to the pixel 48 of m columns and n rows <m>Let it be "pixel signal SIGB<m,n>".

[0066] FIG. 7 is a block diagram showing an example of the detailed configuration of the display device according to the embodiment. FIG. 8 is a timing chart showing a driving example of the display device according to the embodiment.

[0067] As shown in FIG. 7, in the present disclosure, the signal processing circuit 20 includes a frame memory 21, a gradation setting unit 22, and a timing control unit 23.

[0068] As shown in FIG. 8, in the present disclosure, a frame image IS and a first synchronization signal VSYNC are input to the signal processing circuit 20 as input signals. The first synchronization signal VSYNC is a signal that defines a frame period F for displaying a frame image IS for one frame.

[0069] In the frame period F_1, the signal processing circuit 20 acquires a frame image IS(1) for one frame and stores it in the frame memory 21 as the frame image IS+(1).

[0070] The gradation setting unit 22 sets preset gradation values PSGV(R), PSGV(G), and PSGV(B) based on the frame image IS(1) for one frame acquired in the frame period F_1.

[0071] In the present disclosure, the gradation setting unit 22 sets the average value SIGRave of all pixel signals SIGR<m,n> corresponding to the first color (here, red) of the frame image IS for one frame as the preset gradation value PSGV(R). The preset gradation value PSGV(R) is represented by the following formula (1).

[0072]

Equation

[0073] In addition, in the present disclosure, the gradation setting unit 22 sets the average value SIGGave of all pixel signals SIGG<m,n> corresponding to the second color (here, green) of the frame image IS for one frame as the preset gradation value PSGV(G). The preset gradation value PSGV(G) is represented by the following formula (2).

[0074] [Number]

[0075] In addition, in the present disclosure, the gradation setting unit 22 sets the average value SIGBave of all pixel signals SIGB<m,n> corresponding to the third color (here, blue) of the frame image IS for one frame as the preset gradation value PSGV(B). The preset gradation value PSGV(B) is represented by the following formula (3).

[0076] [Number]

[0077] In the above formulas (1), (2), and (3), an example is shown in which the average value of the gradation values of each color for each pixel 48 of the frame image IS is set as the preset gradation values PSGV(R), PSGV(G), and PSGV(B) of each color. However, the preset gradation values PSGV(R), PSGV(G), and PSGV(B) are not limited to the average values of the gradation values of each color for each pixel 48 of the frame image IS.

[0078] Based on the first synchronization signal VSYNC, the timing control unit 23 generates a second synchronization signal FSYNC that defines one subfield period SF and outputs it to the display panel 40.

[0079] In the preset period PSPR of the first sub-field period SFR in the next frame period F_2, the scanning circuit 32 applies the gate-on potential VGH to all the scanning lines SCL in the display area 41. Specifically, the scanning circuit 32 applies the gate-on potential VGH to all the scanning lines SCL in the display area 41 in synchronization with the second synchronization signal FSYNC. Further, the signal output circuit 31 supplies the preset gradation value PSGV(R) to all the data lines DTL in the display area 41. Thereby, a potential corresponding to the preset gradation value PSGV(R) is applied to the pixel electrodes of all the pixels 48 in the display area 41.

[0080] In the subsequent writing period SCPR, the scanning circuit 32 sequentially applies the drive signal GATE to the scanning lines SCL arranged in the Y direction (second direction). <n>is output. Also, the signal output circuit 31 receives the drive signal GATE from the scanning circuit 32 <n>The scanning line SCL being supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIGR(1) respectively <m>is supplied. As a result, the pixel signal SIGR(1) of the frame image IS+(1) stored in the frame memory 21 <m>are sequentially written.

[0081] In the preset period PSPG of the subsequent second sub-field period SFG, the scanning circuit 32 applies a gate-on potential VGH to all the scanning lines SCL in the display area 41. Specifically, the scanning circuit 32 applies a gate-on potential VGH to all the scanning lines SCL in the display area 41 in synchronization with the second synchronization signal FSYNC. Further, the signal output circuit 31 supplies a preset gradation value PSGV(G) to all the signal lines DTL in the display area 41. Thereby, a potential corresponding to the preset gradation value PSGV(G) is applied to the pixel electrodes of all the pixels 48 in the display area 41.

[0082] In the subsequent writing period SCPG, the scanning circuit 32 sequentially applies a drive signal GATE to the scanning lines SCL arranged in the Y direction (second direction). <n>is output. Also, the signal output circuit 31 receives a drive signal GATE from the scanning circuit 32 <n>Scanning line SCL being supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIGG(1), respectively <m>is supplied. As a result, the pixel signal SIGG(1) of the frame image IS+(1) stored in the frame memory 21 <m>are sequentially written.

[0083] In the preset period PSPB of the subsequent third sub-field period SFB, the scanning circuit 32 applies a gate-on potential VGH to all the scanning lines SCL in the display area 41. Specifically, the scanning circuit 32 applies a gate-on potential VGH to all the scanning lines SCL in the display area 41 in synchronization with the second synchronization signal FSYNC. Further, the signal output circuit 31 supplies a preset gradation value PSGV(B) to all the signal lines DTL in the display area 41. Thereby, a potential corresponding to the preset gradation value PSGV(B) is applied to the pixel electrodes of all the pixels 48 in the display area 41.

[0084] In the subsequent writing period SCPB, the scanning circuit 32 sequentially applies a drive signal GATE to the scanning lines SCL arranged in the Y direction (second direction). <n>is output. Also, the signal output circuit 31 receives the drive signal GATE from the scanning circuit 32 <n>The scanning line SCL to which is supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIGB(1) respectively <m>is supplied. Thereby, the pixel signal SIGB(1) of the frame image IS+(1) stored in the frame memory 21 <m>are sequentially written.

[0085] Also, in the frame period F_2, the signal processing circuit 20 acquires a frame image IS(2) for one frame and stores it in the frame memory 21 as the frame image IS+(2).

[0086] The gradation setting unit 22 sets preset gradation values PSGV(R), PSGV(G), and PSGV(B) based on the frame image IS(2) for one frame acquired in the frame period F_2.

[0087] In the preset period PSPR of the first subfield period SFR in the next frame period F_3, the scanning circuit 32 applies the gate-on potential VGH to all the scanning lines SCL in the display area 41. Specifically, the scanning circuit 32 applies the gate-on potential VGH to all the scanning lines SCL in the display area 41 in synchronization with the second synchronization signal FSYNC. Also, the signal output circuit 31 supplies the preset gradation value PSGV(R) to all the signal lines DTL in the display area 41. As a result, a potential corresponding to the preset gradation value PSGV(R) is applied to the pixel electrodes of all the pixels 48 in the display area 41.

[0088] In the subsequent writing period SCPR, the scanning circuit 32 sequentially applies the drive signal GATE to the scanning lines SCL arranged in the Y direction (second direction). <n>is output. Further, the signal output circuit 31 receives a drive signal GATE from the scanning circuit 32 <n>The scanning line SCL being supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIGR(2), respectively <m>is supplied. As a result, the pixel signal SIGR(2) of the frame image IS+(2) stored in the frame memory 21 <m>are sequentially written.

[0089] In the preset period PSPG of the subsequent second sub-field period SFG, the scanning circuit 32 applies a gate-on potential VGH to all the scanning lines SCL in the display area 41. Specifically, the scanning circuit 32 applies a gate-on potential VGH to all the scanning lines SCL in the display area 41 in synchronization with the second synchronization signal FSYNC. Further, the signal output circuit 31 supplies a preset gradation value PSGV(G) to all the signal lines DTL in the display area 41. Thereby, a potential corresponding to the preset gradation value PSGV(G) is applied to the pixel electrodes of all the pixels 48 in the display area 41.

[0090] In the subsequent writing period SCPG, the scanning circuit 32 sequentially applies a drive signal GATE to the scanning lines SCL arranged in the Y direction (second direction). <n>is output. Also, the signal output circuit 31 receives a drive signal GATE from the scanning circuit 32 <n>Scanning line SCL to which is supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIGG(2), respectively <m>is supplied. Thereby, the pixel signal SIGG(2) of the frame image IS+(2) stored in the frame memory 21 <m>are sequentially written.

[0091] In the preset period PSPB of the subsequent third sub-field period SFB, the scanning circuit 32 applies the gate-on potential VGH to all the scanning lines SCL in the display area 41. Specifically, the scanning circuit 32 applies the gate-on potential VGH to all the scanning lines SCL in the display area 41 in synchronization with the second synchronization signal FSYNC. Further, the signal output circuit 31 supplies the preset gradation value PSGV(B) to all the signal lines DTL in the display area 41. As a result, a potential corresponding to the preset gradation value PSGV(B) is applied to the pixel electrodes of all the pixels 48 in the display area 41.

[0092] In the subsequent writing period SCPB, the scanning circuit 32 sequentially applies the drive signal GATE to the scanning lines SCL arranged in the Y direction (second direction). <n>is output. Also, the signal output circuit 31 receives a drive signal GATE from the scanning circuit 32 <n>The scanning line SCL being supplied <n>For a plurality of pixels 48 connected thereto, pixel signals SIGB(2), respectively <m>is supplied. As a result, the pixel signal SIGB(2) of the frame image IS+(2) stored in the frame memory 21 <m>are sequentially written.

[0093] Thereafter, by repeating the same operation, the frame image IS displayed in the display area 41 is updated every one frame period F.

[0094] FIG. 9A is a first diagram showing an operation example of the display device according to the embodiment. FIG. 9B is a second diagram showing an operation example of the display device according to the embodiment. FIG. 9C is a third diagram showing an operation example of the display device according to the embodiment. FIG. 9D is a fourth diagram showing an operation example of the display device according to the embodiment.

[0095] In FIGS. 9A, 9B, 9C, and 9D, similar to FIGS. 5A, 5B, 5C, and 5D, the scanning line SCL <n>This illustrates the change in the gradation value of the pixel 48 connected thereto. Also, in the examples shown in FIGS. 9A, 9B, 9C, and 9D, similar to FIGS. 5A, 5B, 5C, and 5D, the gradation value written in the write period SCPR of the first sub-field period SFR is defined as the target gradation value TGV(R). Also, the gradation value written in the write period SCPG of the second sub-field period SFG is defined as the target gradation value TGV(G). Further, the gradation value written in the write period SCPB of the third sub-field period SFB is defined as the target gradation value TGV(B). Note that, similar to FIGS. 5A, 5B, 5C, and 5D, each of the target gradation values TGV(R), TGV(G), and TGV(B) is also simply referred to as the "target gradation value TGV".

[0096] Also, in FIGS. 9A, 9B, 9C, and 9D, this illustrates the change in the gradation value when the average value of the gradation values of each color for the pixel 48 of the frame image IS is set as the preset gradation values PSGV(R), PSGV(G), and PSGV(B) of each color.

[0097] In the operation example of the display device 1 according to the embodiment, in the preset period PSPR provided in the first sub-field period SFR, the preset gradation value PSGV(R) set by the gradation setting unit 22 is written. Also, in the preset period PSPG provided in the second sub-field period SFG, the preset gradation value PSGV(G) set by the gradation setting unit 22 is written. Further, in the preset period PSPB provided in the third sub-field period SFB, the preset gradation value PSGV(B) set by the gradation setting unit 22 is written. Note that each of the preset gradation values PSGV(R), PSGV(G), and PSGV(B) is also simply referred to as the "preset gradation value PSGV".

[0098] In FIG. 9A, similar to FIG. 5A, the pixel signal SIGR <m>, pixel signal SIGG <m>, and pixel signal SIGB <m>An example is shown in which each gradation value is the minimum value "0", that is, the frame image IS is a completely black image with 0% luminance. In this example, the scanning line SCL <n>The target gradation values TGV(R), TGV(G), and TGV(B) of each pixel 48 connected to are all set to the common target gradation value TGV = "0" for all pixels 48.

[0099] In the example shown in FIG. 9A, the preset gradation values PSPGV to be written in each preset period PSPR, PSPG, and PSPB are the same "0" as the target gradation value TGV. Therefore, in each light emission period LMPR, LMPG, and LMPB after each response period RESPR, RESPG, and RESPB, the difference ΔGV with respect to the luminance corresponding to the target gradation value TGV = "0" does not occur in principle.

[0100] In particular, when the frame image IS is a full - black image with 0% luminance, even a slight luminance fluctuation is likely to be visually recognized, giving an impression of poor black solidity. Also, in this case, the contrast ratio of the display panel deteriorates.

[0101] Therefore, it is desirable that the preset gradation values PSGV(R), PSGV(G), and PSGV(B) set based on the frame image IS be values such that when the frame image IS is a full - black image with 0% luminance, the luminance of the frame image IS visually recognized by the user is the luminance corresponding to the target gradation value TGV = "0". Specifically, for example, as described above, the average value of the gradation values of each color for each pixel 48 of the frame image IS may be set as the preset gradation values PSGV(R), PSGV(G), and PSGV(B) of each color.

[0102] In FIG. 9B, similar to FIG. 5B, the pixel signal SIGR <m>, pixel signal SIGG <m>, and pixel signal SIGB <m>An example is shown in which each gradation value is the maximum value "255", that is, the frame image IS is a completely white image with 100% luminance. In this example, the scanning line SCL <n>The target gradation values TGV(R), TGV(G), and TGV(B) of each pixel 48 connected thereto all become the common target gradation value TGV = "255" for all pixels 48.

[0103] In the example shown in FIG. 9B, the preset gradation values PSGV written in each preset period PSPR, PSPG, and PSPB are the same "255" as the target gradation value TGV. Therefore, in each light emission period LMPR, LMPG, and LMPB after each response period RESPR, RESPG, and RESPB has elapsed, the difference ΔGV with respect to the luminance corresponding to the target gradation value TGV = "255" does not occur in principle.

[0104] In particular, when the frame image IS is a full - white image with 100% luminance, it will give the impression that the contrast has decreased due to the decrease in luminance. Also, in this case, the contrast ratio of the display panel will deteriorate.

[0105] Therefore, the preset gradation values PSGV(R), PSGV(G), and PSGV(B) set based on the frame image IS are desirably values such that when the frame image IS is a full - white image with 100% luminance, the luminance of the frame image IS visually recognized by the user becomes the luminance corresponding to the target gradation value TGV = "255". Specifically, for example, as described above, the average value of the gradation values of each color for each pixel 48 of the frame image IS may be set as the preset gradation values PSGV(R), PSGV(G), and PSGV(B) of each color.

[0106] In FIG. 9C, similar to FIG. 5C, the pixel signal SIGR <m>, pixel signal SIGG <m>and pixel signal SIGB <m>An example is shown where each gradation value is the maximum value "207". In this example, the scanning line SCL <n>The target gradation values TGV(R), TGV(G), and TGV(B) of each pixel 48 connected thereto all become the common target gradation value TGV = "207" for all pixels 48.

[0107] In the example shown in FIG. 9C, the preset gradation values PSGV written in each of the preset periods PSPR, PSPG, and PSPB become the same "207" as the target gradation value TGV. For this reason, in each of the light emission periods LMPR, LMPG, and LMPB after each of the response periods RESPR, RESPG, and RESPB has elapsed, the difference ΔGV with respect to the luminance corresponding to the target gradation value TGV = "207" does not occur in principle.

[0108] In FIG. 9D, similar to FIG. 5D, the pixel signal SIGR <m>The gradation value is the minimum value "0", and the pixel signal SIGG <m>The gradation value is the maximum value "255", and the pixel signal SIGB <m>shows an example where the gradation value is the minimum value "0", that is, the frame image IS is a completely green image. In this example, the scanning line SCL <n>The target gradation value TGV(R) of the pixel 48 connected thereto becomes the target gradation value TGV(R) = "0" common to all the pixels 48. Also, the scanning line SCL <n>The target gradation value TGV(G) of the pixel 48 connected to is the target gradation value TGV(G) = "255" common to all the pixels 48. Also, the scanning line SCL <n>The target gradation value TGV(B) of the pixel 48 connected to [[ID=]] is the common target gradation value TGV(B) = "0" for all pixels 48.

[0109] In the example shown in FIG. 9D, the preset gradation value PSPV(R) written in the preset period PSPR is the same "0" as the target gradation value TGV(R). Therefore, in the light emission period LMPR after the elapse of the response period RESPR, the differential ΔGVR with respect to the luminance of the target gradation value TGV(R) = "0" does not occur in principle.

[0110] Also, in the example shown in FIG. 9D, the preset gradation value PSPV(G) written in the preset period PSPG is the same "255" as the target gradation value TGV(G). When the preset gradation value PSPV(R) = "255" is written in the preset period PSPG, at 2.0 ms after the start of the preset period PSPG, the luminance corresponding to the preset gradation value PSPV(G) = "255" is added to the luminance corresponding to the target gradation value TGV(R) = "0" by 90% of the luminance difference from the luminance corresponding to the preset gradation value PSPV(G) = "255" to the luminance corresponding to the target gradation value TGV(R) = "0". In FIG. 9D, an example is shown in which the luminance corresponding to the target gradation value TGV(G) = "255" is generally reached after the elapse of the response period RESPG, and the second light emitter 63G is lit in the light emission period LMPG. As a result, in the lower part of the display area 41, the differential ΔGVG with respect to the luminance corresponding to the target gradation value TGV(G) = "255" can be made substantially zero (ΔGVG≒0).

[0111] Also, in the example shown in FIG. 9D, the preset gradation value PSGV(B) written in the preset period PSPB becomes the same "0" as the target gradation value TGV(B). When the preset gradation value PSGV(B) = "255" is written in the preset period PSPB, at 1.4 ms after the start of the preset period PSPB, with respect to the luminance corresponding to the target gradation value TGV(G) = "255", the luminance reaches a value that reduces 90% of the luminance difference from the luminance corresponding to the target gradation value TGV(G) = "255" to the luminance corresponding to the preset gradation value PSGV(B) = "0". In FIG. 9D, an example is shown in which after the response period RESPB has elapsed, the luminance corresponding to the target gradation value TGV(B) = "0" is generally reached, and the third light emitter 63B lights up during the light emission period LMPB. As a result, in the lower part of the display area 41, the difference ΔGVB with respect to the luminance corresponding to the target gradation value TGV(B) = "0" can be made approximately zero (ΔGVB≒0).

[0112] In the example shown in FIG. 9D, immediately before each writing period SCPR, SCPG, SCPB, a preset period PSPR for writing the preset gradation values PSGV(R), PSGV(G), PSGV(B) to all the pixels 48 in the display area 41 is provided, and by writing the preset gradation values PSGV(R), PSGV(G), PSGV(B) (for example, the average value of the gradation values of each color for each pixel 48 of the frame image IS) preset according to the frame image IS, the green luminance is the original pixel signal SIGG <m>It reaches the luminance corresponding to the gradation value "255". Also, it is possible to prevent the frame image IS visually recognized by the user from becoming a mixed color in which red and blue are mixed with respect to green.

[0113] In the configuration according to the above-described embodiment, based on the frame image IS for one frame to be displayed in the display area 41, a preset gradation value PSGV to be written to all the pixels 48 in the display area 41 is set, and in one frame period F for displaying the frame image IS, before the writing period SCP for writing the gradation value of the pixel signal SIGR<m,n> for each pixel 48 of the frame image IS, a preset period PSP for writing the preset gradation value PSGV to all the pixels 48 in the display area 41 is provided.

[0114] More specifically, in the configuration according to the above-described embodiment, the average value SIGRave of the gradation values of the pixel signals SIGR<m,n> for each pixel 48 of the frame image IS is set as the preset gradation value PSGV(R), and in the first sub-field period SFR of one frame period F for displaying the frame image IS, immediately before the writing period SCPR for writing the gradation value of the pixel signal SIGR<m,n> for each pixel 48 of the frame image IS, a preset period PSPR for writing the preset gradation value PSGV(R) to all the pixels 48 in the display area 41 is provided.

[0115] Also, in the configuration according to the above-described embodiment, the average value SIGGave of the gradation values of the pixel signals SIGG<m,n> for each pixel 48 of the frame image IS is set as the preset gradation value PSGV(G), and in the second sub-field period SFG of one frame period F for displaying the frame image IS, immediately before the writing period SCPG for writing the gradation value of the pixel signal SIGG<m,n> for each pixel 48 of the frame image IS, a preset period PSPG for writing the preset gradation value PSGV(G) to all the pixels 48 in the display area 41 is provided.

[0116] Also, in the configuration according to the above-described embodiment, the average value SIGBave of the gradation values of the pixel signals SIGB<m,n> for each pixel 48 of the frame image IS is set as the preset gradation value PSGV(B), and in the third sub-field period SFB of one frame period F for displaying the frame image IS, immediately before the writing period SCPB for writing the gradation value of the pixel signal SIGB<m,n> for each pixel 48 of the frame image IS, a preset period PSPG for writing the preset gradation value PSGV(B) to all the pixels 48 in the display area 41 is provided.

[0117] Then, in the first sub-field period SFR, after the writing period SCPR, the first light emitter 63R is turned on during the light emission period LMPR after the elapse of the response period RESPR. Also, in the second sub-field period SFG, after the writing period SCPG, the second light emitter 63G is turned on during the light emission period LMPG after the elapse of the response period RESPG. Also, in the third sub-field period SFB, after the writing period SCPB, the third light emitter 63G is turned on during the light emission period LMPB after the elapse of the response period RESPB. Thereby, it is possible to suppress a decrease in display quality due to the batch preset of the pixel gradation values.

[0118] (Modification example) In the above-described embodiment, as the display panel 40, an active matrix type color liquid crystal display panel driven by the FSC method has been exemplified and described, but the configuration to which the present disclosure is applicable is not limited thereto. Hereinafter, a configuration according to a modification example of an embodiment to which the present disclosure is applicable will be described.

[0119] FIG. 10 is a schematic diagram showing an example of the block configuration of a display device according to a modification example of the embodiment. FIG. 11 is a schematic diagram showing an example of the configuration of a display panel according to a modification example of the embodiment. The display device 1a according to a modification example of the embodiment includes, as main block configurations, a signal processing circuit 20a, a display panel 40a, and a light source 60a. The display panel 40a includes a signal output circuit 31a and a scanning circuit 32a.

[0120] As shown in FIG. 10, the display panel 40a is provided with a display area 41 in which a plurality of pixels 48 are arranged in the X direction (first direction) and the Y direction (second direction).

[0121] As shown in FIG. 11, for example, the pixel 48a includes a first sub-pixel 49R that displays a first color (for example, red (R)), a second sub-pixel 49G that displays a second color (for example, green (G)), and a third sub-pixel 49B that displays a third color (for example, blue (B)). In the example shown in FIG. 11, an example of a pixel configuration having a stripe arrangement in which the first sub-pixel 49R, the second sub-pixel 49G, and the third sub-pixel 49B are arranged in the X direction is illustrated.

[0122] The display panel 40a is, for example, a transmissive color liquid crystal display panel. A first color filter that overlaps the position where the pixel electrode of the first sub-pixel 49R is provided and passes the first color is disposed on the display panel 40a. Also, a second color filter that overlaps the position where the pixel electrode of the second sub-pixel 49G is provided and passes the second color is disposed. Further, a third color filter that overlaps the position where the pixel electrode of the third sub-pixel 49B is provided and passes the third color is disposed.

[0123] The liquid crystal molecules included in the liquid crystal layer of the display panel 40a determine their orientation corresponding to the potential of the pixel electrode. Thereby, the light transmittance of the first sub-pixel 49R, the second sub-pixel 49G, and the third sub-pixel 49B is controlled.

[0124] The light source 60a is disposed on the back surface of the display panel 40a. The light source 60a irradiates light toward the display panel 40a.

[0125] As shown in FIG. 10, the light source 60a is composed of a plurality of light emitters. The plurality of light emitters can be arranged in a planar manner in the light source 60a, or the light emitters can be arranged at the end of the light guide plate to irradiate light onto the display surface of the display panel 40a (side light source). The light emitter is, for example, an LED, but is not limited thereto, and may be, for example, a CCFL or the like. The plurality of light emitters are connected to a light source control circuit 61a. The light source control circuit 61a controls the light emission timing, light emission time, and light emission intensity of each light emitter under the operation control of the signal processing circuit 20a.

[0126] FIG. 12 is a diagram showing an example of one frame period according to a modified example of the embodiment. Also in the configuration according to the modified example of the embodiment, similar to the embodiment, the average value SIGave of the gradation values of the pixel signals SIG<m,n> for each pixel 48a of the frame image IS is set as the preset gradation value PSGV, and in the one frame period F for displaying the frame image IS, immediately before the writing period SCP for writing the gradation values of the pixel signals SIG<m,n> for each pixel 48a of the frame image IS, a preset period PSP for writing the preset gradation value PSGV to all the pixels 48a in the display area 41a is provided.

[0127] Then, after the writing period SCP, the plurality of light emitters of the light source 60a are turned on during the light emission period LMP after the response period RESP has elapsed. Thereby, similar to the embodiment, it is possible to suppress a decrease in display quality caused by batch presetting of pixel gradation values.

[0128] In the present disclosure, as the frame image IS, a so-called raster image in which the gradation values of the pixel signals of all pixels in the display area are the same has been exemplified and described. However, the frame image IS is not limited to a raster image. In the present disclosure, even in an actual display image assuming that the gradation values of the pixel signals SIG<m,n> of each pixel in the display area are different, by setting the average value SIGave of the gradation values of the pixel signals SIG<m,n> for each pixel of the frame image IS as the preset gradation value PSGV, the difference between the gradation value of the pixel signal SIG<m,n> for each pixel 48a of the frame image IS written in the writing period SCP and the preset gradation value PSGV written in the preset period PSP can be statistically reduced. Therefore, regardless of the frame image IS, it is possible to suppress a decrease in display quality due to batch presetting of pixel gradation values.

[0129] Also, in the present disclosure, an example in which the average value of the gradation values of each color for each pixel 48 of the frame image IS is set as the preset gradation value PSGV has been shown. However, as described above, the preset gradation value PSGV is not limited to the average value of the gradation values of each color for each pixel 48 of the frame image IS.

[0130] Specifically, when the frame image IS is a full black image with 0% luminance, the preset gradation value PSGV may be, for example, the minimum gradation value (= "0") of the display panel 40 set as the target gradation value TGV. Alternatively, when the frame image IS is a full black image with 0% luminance, the preset gradation value PSGV may be, for example, an approximate value of the minimum gradation value (= "0") of the display panel 40 set as the target gradation value TGV.

[0131] Also, when the frame image IS is a full white image with 100% luminance, the preset gradation value PSGV may be, for example, the maximum gradation value (= "255") of the display panel 40 set as the target gradation value TGV. Alternatively, when the frame image IS is a full white image with 100% luminance, the preset gradation value PSGV may be, for example, an approximate value of the maximum gradation value (= "255") of the display panel 40 set as the target gradation value TGV.

[0132] Although the preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to such embodiments. The content disclosed in the embodiments is merely an example, and various modifications are possible without departing from the spirit of the present disclosure. For example, appropriate modifications made without departing from the spirit of the present disclosure also naturally belong to the technical scope of the present invention.

Explanation of Reference Numerals

[0133] 1, 1a Display device 20, 20a Signal processing circuit 21 Frame memory 22 Tone setting unit 23 Timing control unit 31, 31a Signal output circuit 32, 32a Scanning circuit 40, 40a Display panel 41, 41a Display area 48, 48a Pixel 49R First sub-pixel 49G Second sub-pixel 49B Third sub-pixel 60, 60a Light source 61, 61a Light source control circuit 62 Light emitting unit 63R First light emitter 63G Second light emitter 63B Third light emitter DTL Signal line IS Frame image SCL Scanning line< / m> < / n> < / n> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / m> < / m> < / n> < / n> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / m> < / n> < / m> < / m> < / n> < / n> < / n> < / n> < / m> < / n> < / n> < / n> < / n> < / m> < / n> < / n> < / n> < / n> < / m> < / m> < / m> < / m> < / m> < / m> < / n> < / n> < / n> < / n> < / n> < / m> < / n> < / n> < / n> < / n> < / n> < / m> < / m> < / m>

Claims

1. A display panel having a display area in which a plurality of pixels are arranged in a first direction and a second direction orthogonal to the first direction; A light source that irradiates light onto the display panel; A signal processing circuit that controls the display panel and the light source; Comprising: The signal processing circuit: Based on a frame image for one frame to be displayed in the display area, sets preset gradation values to be written to all pixels in the display area; The display panel: In a one-frame period for displaying the frame image, has a preset period in which the preset gradation values are written to all pixels in the display area before a writing period in which gradation values for each pixel of the frame image are written. A display device.

2. The display panel: After writing the gradation values for each pixel of the frame image, has a light emission period in which the light source is turned on after a predetermined response period has elapsed. The display device according to Claim 1.

3. The signal processing circuit: Sets the average value of the gradation values for each pixel of the frame image as the preset gradation value. The display device according to Claim 1 or 2.

4. The signal processing circuit: When the gradation values of all pixels of the frame image are the minimum gradation value of the display panel, sets the preset gradation value to the minimum gradation value. The display device according to Claim 1 or 2.

5. The signal processing circuit: When the gradation values of all pixels of the frame image are the maximum gradation value of the display panel, sets the preset gradation value to the maximum gradation value. The display device according to Claim 1 or 2.

6. One frame period for displaying the frame image includes a plurality of sub-field periods for performing displays of different colors. The display device according to Claim 1.

7. The plurality of sub-field periods: A first sub-field period for performing a display of a first color; A second sub-field period for performing a display of a second color; A third sub-field period for performing a display of a third color; Including: The display device according to Claim 6.

8. The light source: A first light emitter that emits light of the first color; A second light emitter that emits light of the second color; A third light emitter that emits light of the third color; Including: The display device according to Claim 7.

9. The display panel: In the first sub-field period, after writing the gradation values of the first color for each pixel of the frame image, has a light emission period in which the first light emitter is turned on after a predetermined response period has elapsed. The display device according to Claim 8.

10. The signal processing circuit sets the average value of the gradation values of the pixels of the first color in the frame image as a preset gradation value in the first sub-field period. The display device according to claim 9.

11. The signal processing circuit sets the preset gradation value in the first sub-field period to the minimum gradation value when the gradation values of the pixels of the first color in all the pixels of the frame image are the minimum gradation value of the display panel. The display device according to claim 9.

12. The signal processing circuit sets the preset gradation value in the first sub-field period to the maximum gradation value when the gradation values of the pixels of the first color in all the pixels of the frame image are the maximum gradation value of the display panel. The display device according to claim 9.

13. The display panel has a preset period in which the preset gradation value in the first sub-field period is written to all the pixels in the display area before the writing period in which the gradation value of the first color for each pixel of the frame image is written in the first sub-field period. The display device according to any one of claims 10 to 12.

14. The display panel has a light emission period in which the second light emitter is turned on after a predetermined response period has elapsed after the gradation value of the second color for each pixel of the frame image is written in the second sub-field period. The display device according to claim 8.

15. The signal processing circuit sets the average value of the gradation values of the pixels of the second color in the frame image as a preset gradation value in the second sub-field period. The display device according to claim 14.

16. The signal processing circuit sets the preset gradation value in the second sub-field period to the minimum gradation value when the gradation values of the pixels of the second color in all the pixels of the frame image are the minimum gradation value of the display panel. The display device according to claim 14.

17. The signal processing circuit sets the preset gradation value in the second sub-field period to the maximum gradation value when the gradation values of the pixels of the second color in all the pixels of the frame image are the maximum gradation value of the display panel. The display device according to claim 14.

18. The display panel In the second sub-field period, before the writing period for writing the gradation value of the second color for each pixel of the frame image, there is a preset period for writing the preset gradation value to all the pixels in the display area. The display device according to any one of claims 15 to 17.

19. The display panel is In the third sub-field period, after writing the gradation value of the third color for each pixel of the frame image, after a predetermined response period has elapsed, there is a light emission period for lighting the third light emitter. The display device according to claim 8.

20. The signal processing circuit is The average value of the gradation values for each pixel of the third color of the frame image is set as the preset gradation value in the third sub-field period. The display device according to claim 19.

21. The signal processing circuit is When the gradation values of the third color of all the pixels of the frame image are the minimum gradation value of the display panel, the preset gradation value in the third sub-field period is set to the minimum gradation value. The display device according to claim 19.

22. The signal processing circuit is When the gradation values of the third color of all the pixels of the frame image are the maximum gradation value of the display panel, the preset gradation value in the third sub-field period is set to the maximum gradation value. The display device according to claim 19.

23. The display panel is In the third sub-field period, before the writing period for writing the gradation value of the third color for each pixel of the frame image, there is a preset period for writing the preset gradation value to all the pixels in the display area. The display device according to any one of claims 20 to 22.

Citation Information

Patent Citations

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    JP2018136495A