Integrated circuit device and motor driver

Abstract

To provide an integrated circuit device and the like, capable of reducing an influence of noise generated by a bridge circuit, and reducing an error between a drive current for driving a motor and a target current value.SOLUTION: An integrated circuit device 100 includes: a first bridge circuit 151; a first current detection circuit 111; a control circuit 120; a first terminal TSA connected to one end of a first sense resistor RS1 and the first bridge circuit 151; a second terminal TSB connected to one end of the first sense resistor RS1; and a first wiring LN1. The first bridge circuit 151 is provided closer to a first side HN1 than the control circuit 120. The first current detection circuit 111 is provided closer to a second side HN2 than the control circuit 120. The first terminal TSA and the second terminal TSB are provided closer to the first side HN1 than the control circuit 120. The first wiring LN1 connects the second terminal TSB and an input node of the first current detection circuit 111.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to an integrated circuit device, a motor driver, and the like.

Background Art

[0002] Patent Document 1 discloses a circuit device for driving a motor. The circuit device includes a bridge circuit, a first terminal, a second terminal, a third terminal, and a differential amplifier circuit. The third terminal is connected to the source side of the transistor on the low side included in the bridge circuit and one end of the sense resistor. The first terminal is connected to one end of the sense resistor and the first input node of the differential amplifier circuit. The second terminal is connected to the other end of the sense resistor and the second input node of the differential amplifier circuit.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] FIG. 6 of Patent Document 1 shows a layout configuration example of the above circuit device. In the first direction from the second side, a first bridge circuit region, a driver circuit region, an analog circuit region, and a logic circuit region are arranged in this order. The analog circuit region includes a detection circuit having a differential amplifier circuit. In Patent Document 1, since the analog circuit region is closer to the bridge circuit than the logic circuit region, it is easily affected by the noise generated by the bridge circuit. Further, Patent Document 1 does not disclose or suggest the layout of circuits, terminals, wirings, etc. when the analog circuit region and the bridge circuit are arranged separately.

Means for Solving the Problems

[0005] One aspect of the present disclosure relates to an integrated circuit device including a first bridge circuit that drives a motor, a first current detection circuit that detects a first current flowing through a first sense resistor, a control circuit that controls the first bridge circuit based on a detection result of the first current detection circuit, a first terminal connected to one end of the first sense resistor and the first bridge circuit, a second terminal connected to the one end of the first sense resistor, and a first wiring. The first bridge circuit is provided on a first side of the integrated circuit device from the control circuit, the first current detection circuit is provided on a second side of the first side when the opposite side of the first side is defined as a second side of the integrated circuit device from the control circuit, the first terminal and the second terminal are provided on the first side from the control circuit, and the first wiring connects the second terminal provided on the first side from the control circuit and an input node of the first current detection circuit provided on the second side from the control circuit.

[0006] Another aspect of the present disclosure relates to a motor driver including the above integrated circuit device and the first sense resistor.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Embodiments for Carrying Out the Invention

[0008] Hereinafter, preferred embodiments of the present disclosure will be described in detail. Note that the embodiments described below do not unduly limit the content described in the claims, and not all of the configurations described in these embodiments are essential constituent elements.

[0009] For example, in the following, an example in which an integrated circuit device drives a two-phase stepping motor will be described, but the integrated circuit device may drive a single-phase motor such as a DC motor. The latter integrated circuit device may include only a single-phase circuit and layout among the two-phase circuits and layouts of the integrated circuit device described below.

[0010] 1. First and second layout configuration examples Using FIGS. 1 and 2, problems in a motor driver will be described.

[0011] FIG. 1 is a first layout configuration example of an integrated circuit device. The motor driver 300 is a driver that drives the motor 10, and includes the integrated circuit device 100, the first sense resistor RS1, and the second sense resistor RS2. The motor 10 is a two-phase stepping motor and includes a first coil 11 and a second coil 12. Note that the sense resistor is also called a shunt resistor.

[0012] The integrated circuit device 100 is a semiconductor chip in which a plurality of circuit elements are integrated on a semiconductor substrate. Let the opposite side of the first side HN1 of the semiconductor chip be the second side HN2, the side intersecting the first side HN1 and the second side HN2 be the third side HN3, and the opposite side of the third side HN3 be the fourth side HN4. The direction from the first side HN1 to the second side HN2 is the first direction DR1, the opposite direction of the first direction DR1 is the second direction DR2, the direction from the third side HN3 to the fourth side HN4 is the third direction DR3, and the opposite direction of the third direction DR3 is the fourth direction DR4.

[0013] The integrated circuit device 100 includes a first bridge circuit 151 that drives a first coil 11 of a motor 10, a first current detection circuit 111 that detects a first current flowing through a first sense resistor RS1, and a terminal TSA connected to one end of the first sense resistor RS1, the first bridge circuit 151, and the first current detection circuit 111. The integrated circuit device 100 also includes a terminal TDA connected to one end of the first coil 11 and the first bridge circuit 151, and a terminal TDB connected to the other end of the first coil 11 and the first bridge circuit 151. The other end of the first sense resistor RS1 is connected to a ground node. The absolute value of the first current is the same as the absolute value of the drive current IS1 of the first coil 11. That is, the first current detection circuit 111 substantially detects the drive current IS1 of the first coil 11. The terminals TSA, TDA, and TDB are arranged on the first side HN1 side.

[0014] The integrated circuit device 100 also includes a second bridge circuit 152 that drives a second coil 12 of the motor 10, a second current detection circuit 112 that detects a second current flowing through a second sense resistor RS2, and a terminal TSC connected to one end of the second sense resistor RS2, the second bridge circuit 152, and the second current detection circuit 112. The integrated circuit device 100 also includes a terminal TDC connected to one end of the second coil 12 and the second bridge circuit 152, and a terminal TDD connected to the other end of the second coil 12 and the second bridge circuit 152. The other end of the second sense resistor RS2 is connected to a ground node. The absolute value of the second current is the same as the absolute value of the drive current IS2 of the second coil 12. That is, the second current detection circuit 112 substantially detects the drive current IS2 of the second coil 12. The terminals TSC, TDC, and TDD are arranged on the first side HN1 side.

[0015] The terminals TSA, TSC, TDA to TDD of the integrated circuit device 100 are pads provided on the semiconductor chip. The semiconductor chip of the integrated circuit device 100 is housed in a package, and the packaged integrated circuit device 100, the first sense resistor RS1, and the second sense resistor RS2 are mounted on a circuit board such as a printed circuit board. Although the terminals TSA, TSC, TDA to TDD of the integrated circuit device 100 are shown on the side of the semiconductor chip, these terminals may be arranged near the illustrated side and do not necessarily have to be in contact with the side.

[0016] Note that the definitions of the sides and directions, the basic operations of each circuit, the points regarding implementation, and the relationship between the terminals and the sides described above are the same also in FIGS. 2 and later.

[0017] In the layout configuration example of FIG. 1, the control circuit 120 is arranged on the second side HN2 side. Then, the first current detection circuit 111 and the second current detection circuit 112 are arranged in the second direction DR2 of the control circuit 120. The first bridge circuit 151 is arranged in the second direction DR2 of the first current detection circuit 111, and the second bridge circuit 152 is arranged in the second direction DR2 of the second current detection circuit 112.

[0018] The first bridge circuit 151 and the second bridge circuit 152 generate noise because they drive the motor 10 by switching as will be described later with reference to FIG. 4. In the layout configuration example of FIG. 1, since the first current detection circuit 111 and the first bridge circuit 151 are arranged adjacent to each other, the noise NS1 generated by the first bridge circuit 151 is likely to be transmitted to the first current detection circuit 111 through a semiconductor substrate or the like. Also, since the second current detection circuit 112 and the second bridge circuit 152 are arranged adjacent to each other, the noise NS2 generated by the second bridge circuit 152 is likely to be transmitted to the second current detection circuit 112 through a semiconductor substrate or the like. For this reason, there is a possibility that the first current detection circuit 111 or the second current detection circuit 112 malfunctions and the motor 10 is not properly driven. For example, the detected current values may include errors due to the noises NS1 and NS2, and the drive currents IS1 and IS2 may deviate from the desired current values, or the abnormality detection may operate due to the noises NS1 and NS2 and the drive may stop.

[0019] FIG. 2 is a second layout configuration example of the integrated circuit device. Description of parts similar to those in FIG. 1 will be omitted.

[0020] In the layout configuration example of FIG. 2, the first current detection circuit 111 and the second current detection circuit 112 are arranged on the second side HN2. The control circuit 120 is arranged in the second direction DR2 of the first current detection circuit 111 and the second current detection circuit 112. The first bridge circuit 151 is arranged in the second direction DR2 of the control circuit 120 and the first current detection circuit 111. The second bridge circuit 152 is arranged in the second direction DR2 of the control circuit 120 and the second current detection circuit 112.

[0021] The integrated circuit device 100 also includes a terminal TSB connected to one end of a first sense resistor RS1 and a first current detection circuit 111, and a terminal TSD connected to one end of a second sense resistor RS2 and a second current detection circuit 112. The terminal TSB and the terminal TSD are arranged on the second side HN2. The terminal TSB and one end of the first sense resistor RS1 are connected by a wiring LNB1 on the circuit board. That is, one end of the first sense resistor RS1 is not connected to the first current detection circuit 111 via the terminal TSA, but is connected to the first current detection circuit 111 via the wiring LNB1 on the circuit board and the terminal TSB. Similarly, the terminal TSD and one end of the second sense resistor RS2 are connected by a wiring LNB2 on the circuit board.

[0022] By arranging the control circuit 120 between the first current detection circuit 111 and the first bridge circuit 151, the first current detection circuit 111 is arranged away from the first bridge circuit 151, so that it is less affected by the noise from the first bridge circuit 151. Also, by arranging the control circuit 120 between the second current detection circuit 112 and the second bridge circuit 152, the second current detection circuit 112 is arranged away from the second bridge circuit 152, so that it is less affected by the noise from the second bridge circuit 152. As a result, malfunctions of the first current detection circuit 111 and the second current detection circuit 112 are less likely to occur, and the motor 10 can be driven appropriately. For example, it is possible to prevent abnormal detection from operating and the drive from stopping due to a malfunction of the first current detection circuit 111 or the second current detection circuit 112.

[0023] However, since the wirings LNB1 and LNB2 are provided on the circuit board, how they are routed depends on the design of the circuit board, and it is uncertain what resistance values the wirings LNB1 and LNB2 will have. As a result, current detection errors may occur, and the driving accuracy of the motor 10 may decrease. For example, there may be an error in the drive current IS1 or the drive current IS2 with respect to the desired current value. Or, from the perspective of a two-phase stepping motor, if the resistance values of the wirings LNB1 and LNB2 are different, the amplitudes of the drive current IS1 and the drive current IS2 may be different, and the stepping motor may not be controlled appropriately.

[0024] More specifically, the wiring LNB1 is connected to the input node of the amplifier circuit in the first current detection circuit 111 via the terminal TSB, and the wiring LNB2 is connected to the input node of the amplifier circuit in the second current detection circuit 112 via the terminal TSD. Therefore, the resistances of the wiring LNB1 and the wiring LNB2 are added to the input resistance of the amplifier circuit, resulting in an error in the gain of the amplifier circuit. This gain error causes an error in current detection, and there is a risk of the problems described above occurring.

[0025] 2. Third layout configuration example FIG. 3 shows a third layout configuration example of the integrated circuit device. In the layout configuration example of FIG. 3, each circuit is arranged in the same manner as in the layout configuration example of FIG. 2. As a result, the first current detection circuit 111 is less likely to be affected by the noise from the first bridge circuit 151, and the second current detection circuit 112 is less likely to be affected by the noise from the second bridge circuit 152, making it less likely for malfunction of the motor drive to occur.

[0026] Hereinafter, descriptions of parts similar to those in FIG. 1 or FIG. 2 will be omitted. In FIG. 3, the terminals TSA, TSB, TSC, and TSD will be referred to as the first terminal, the second terminal, the third terminal, and the fourth terminal, respectively.

[0027] In the layout configuration example of FIG. 3, the second terminal TSB and the fourth terminal TSD are arranged on the first side HN1 side of the integrated circuit device 100. The integrated circuit device 100 includes a first wiring LN1 that connects the second terminal TSB and the first current detection circuit 111, and a second wiring LN2 that connects the fourth terminal TSD and the second current detection circuit 112. The first wiring LN1 is provided along the outer periphery of the integrated circuit device 100 on the third side HN3 side. The second wiring LN2 is provided along the outer periphery of the integrated circuit device 100 on the fourth side HN4 side.

[0028] More specifically, one end of the first wiring LN1 is connected to the second terminal TSB, and the other end is connected to the input node of the amplifier circuit in the first current detection circuit 111. One end of the second wiring LN2 is connected to the fourth terminal TSD, and the other end is connected to the input node of the amplifier circuit in the second current detection circuit 112. The first wiring LN1 is provided between the first current detection circuit 111, the control circuit 120, the first bridge circuit 151, and the third side HN3 along the first direction DR1. Note that the first wiring LN1 may further include a portion provided along the third direction in addition to the portion provided along the first direction DR1. For example, the other end side of the first wiring LN1 may be provided between the first current detection circuit 111 and the second side HN2 along the third direction DR3. The second wiring LN2 is provided between the second current detection circuit 112, the control circuit 120, the second bridge circuit 152, and the fourth side HN4 along the first direction DR1. Note that the second wiring LN2 may further include a portion provided along the fourth direction in addition to the portion provided along the first direction DR1. For example, the other end side of the second wiring LN2 may be provided between the second current detection circuit 112 and the second side HN2 along the fourth direction DR4. The first wiring LN1 and the second wiring LN2 are arranged symmetrically with respect to the center line between, for example, the third side HN3 and the fourth side HN4. The center line is a virtual straight line connecting the midpoint of the third side HN3 and the midpoint of the fourth side HN4.

[0029] According to this layout configuration example, since the first wiring LN1 and the second wiring LN2 are provided in the integrated circuit device 100, the resistance values of the first wiring LN1 and the second wiring LN2 are not affected by the circuit board and can be estimated when designing the integrated circuit device 100. As a result, the gain error of the amplifier circuit in the first current detection circuit 111 and the second current detection circuit 112 is not affected by the circuit board, and appropriate drive currents IS1 and IS2 are realized. From the perspective of a two-phase stepping motor, it is possible to make the resistance values of the first wiring LN1 and the second wiring LN2 the same, and the amplitudes of the drive current IS1 and the drive current IS2 can be made the same, so that the stepping motor is appropriately controlled.

[0030] FIG. 4 is a circuit configuration example of an integrated circuit device. The integrated circuit device 100 includes a first current detection circuit 111, a second current detection circuit 112, a control circuit 120, a first bridge circuit 151, a second bridge circuit 152, a first terminal TSA, a second terminal TSB, a third terminal TSC, a fourth terminal TSD, and terminals TDA to TDD.

[0031] The first current detection circuit 111 detects whether the input voltage VIP1 from the second terminal TSB exceeds a voltage corresponding to the first target current value, and outputs an output signal COUT1 which is the detection result. The input voltage VIP1 is a voltage corresponding to the current flowing through the first sense resistor RS1, and VIP1 = RS1 × IS1 during the charge period.

[0032] The second current detection circuit 112 detects whether the input voltage VIP2 from the fourth terminal TSD exceeds a voltage corresponding to the second target current value, and outputs an output signal COUT2 which is the detection result. The input voltage VIP2 is a voltage corresponding to the current flowing through the second sense resistor RS2, and VIP2 = RS2 × IS2 during the charge period.

[0033] The control circuit 120 outputs pre-drive signals CSA1 to CSD1 for switching the switch elements of the first bridge circuit 151 based on the output signal COUT1 of the first current detection circuit 111. Also, the control circuit 120 outputs pre-drive signals CSA2 to CSD2 for switching the switch elements of the second bridge circuit 152 based on the output signal COUT2 of the second current detection circuit 112.

[0034] The first bridge circuit 151 includes switch elements SWA1 to SWD1. One end of the switch element SWA1 is connected to a power supply node to which the power supply voltage VDD is supplied, and the other end is connected to the terminal TDA. One end of the switch element SWB1 is connected to the power supply node, and the other end is connected to the terminal TDB. One end of the switch element SWC1 is connected to the terminal TDA, and the other end is connected to the first terminal TSA. One end of the switch element SWD1 is connected to the terminal TDB, and the other end is connected to the first terminal TSA. The switch element SWA1 is controlled to be turned on or off by the pre-drive signal CSA1. Similarly, the switch elements SWB1 to SWD1 are controlled to be turned on or off by the pre-drive signals CSB1 to CSD1. The switch elements SWA1 and SWB1 are so-called high-side transistors, which are P-type MOS transistors or N-type MOS transistors. The switch elements SWC1 and SWD1 are so-called low-side transistors, which are N-type MOS transistors.

[0035] The second bridge circuit 152 includes switch elements SWA2 to SWD2. One end of the switch element SWA2 is connected to a power supply node to which the power supply voltage VDD is supplied, and the other end is connected to the terminal TDC. One end of the switch element SWB2 is connected to the power supply node, and the other end is connected to the terminal TDD. One end of the switch element SWC2 is connected to the terminal TDC, and the other end is connected to the third terminal TSC. One end of the switch element SWD2 is connected to the terminal TDD, and the other end is connected to the third terminal TSC. The switch element SWA2 is controlled to be turned on or off by the pre-drive signal CSA2. Similarly, the switch elements SWB2 to SWD2 are controlled to be turned on or off by the pre-drive signals CSB2 to CSD2. The switch elements SWA2 and SWB2 are so-called high-side transistors, which are P-type MOS transistors or N-type MOS transistors. The switch elements SWC2 and SWD2 are so-called low-side transistors, which are N-type MOS transistors.

[0036] A case where the first bridge circuit 151 outputs a positive drive current IS1 will be described. The control circuit 120 turns on the switch elements SWA1 and SWD1 and turns off the switch elements SWB1 and SWC1 during the charge period. The control circuit 120 turns off the switch elements SWA1 and SWD1 and turns on the switch elements SWB1 and SWC1 during the decay period. When the charge period and the decay period are combined as the drive cycle, the drive current IS1 is controlled by the duty ratio of the charge period with respect to the cycle. The control circuit 120 controls the duty ratio of the charge period so that the drive current IS1 corresponding to the target current value is obtained by controlling the first bridge circuit 151 based on the output signal COUT1 of the first current detection circuit 111.

[0037] When the first bridge circuit 151 outputs a negative drive current IS1, the on / off states of the switch elements SWA1 to SWD1 are opposite to those when the first bridge circuit 151 outputs a positive drive current IS1. The control of the second bridge circuit 152 is the same as the control of the first bridge circuit 151. That is, the control circuit 120 controls the second bridge circuit 152 based on the output signal COUT2 of the second current detection circuit 112 to control the duty ratio of the charge period so that the drive current IS2 corresponding to the target current value is obtained.

[0038] FIG. 5 is a detailed circuit configuration example of the first current detection circuit. Hereinafter, the first current detection circuit 111 will be described as an example, but the second current detection circuit 112 has the same configuration. The first current detection circuit 111 includes an amplifier circuit 160, a D / A conversion circuit 190, and a comparison circuit 115.

[0039] The amplifier circuit 160 amplifies the input voltage VIP1 and outputs the amplified voltage as the output voltage VOUT. The amplifier circuit 160 includes an operational amplifier 161, a first resistor RIP, a second resistor RFP, a third resistor RIN, and a fourth resistor RFN.

[0040] One end of the first resistor RIP is connected to the first input terminal of the operational amplifier 161, and the other end is connected to the terminal TSB. The input voltage VIP1 is input from the second terminal TSB to the other end of the first resistor RIP. One end of the second resistor RFP is connected to the first input terminal of the operational amplifier 161, and the other end is connected to the ground node. A reference voltage may be input to the other end of the second resistor RFP. Here, an example where the reference voltage is the ground voltage is shown. One end of the third resistor RIN is connected to the second input terminal of the operational amplifier 161, and the other end is connected to the ground node. One end of the fourth resistor RFN is connected to the second input terminal of the operational amplifier 161, and the other end is connected to the output terminal of the operational amplifier 161. The output voltage VOUT1 is output from the output terminal of the operational amplifier 161. In the example of FIG. 5, the first input terminal of the operational amplifier 161 is the positive input terminal, and the second input terminal is the negative input terminal.

[0041] When RIP = RIN and RFP = RFN, and the gain of the amplifier circuit 160 is K, then K = RFP / RIP, and VOUT = K × VIP1. Assuming the voltage of the ground node is 0V, the voltage difference across both ends of the first sense resistor RS1 is VIP1 - 0V, which means the amplifier circuit 160 amplifies the voltage difference across both ends of the first sense resistor RS1.

[0042] The D / A conversion circuit 190 D / A-converts the target current value SDAC and outputs the result as the output voltage VDAC. The D / A conversion circuit 190 includes, for example, a ladder resistor circuit and a selection circuit. The ladder resistor circuit divides the power supply voltage VDD into a plurality of voltages. The selection circuit selects a voltage corresponding to the target current value SDAC from the plurality of voltages and outputs the selected voltage as the output voltage VDAC. The target current value SDAC is written, for example, from an external processing device of the integrated circuit device 100 into a register (not shown) in the integrated circuit device 100. Alternatively, the integrated circuit device 100 may include a target value correction circuit, and the target value correction circuit corrects the target setting value written from an external processing device into a register or the like, and outputs the obtained correction value as the target current value SDAC.

[0043] The output voltage VOUT of the amplifier circuit 160 is input to the first input terminal of the comparison circuit 115, and the output voltage VDAC of the D / A conversion circuit 190 is input to the second input terminal. The comparison circuit 115 compares the output voltage VOUT of the amplifier circuit 160 with the output voltage VDAC of the D / A conversion circuit 190, and outputs the result as an output signal COUT1. The comparison circuit 115 is also called a comparator. In the example of FIG. 5, the first input terminal is the positive input terminal and the second input terminal is the negative input terminal, but it is not limited thereto.

[0044] FIG. 6 is a detailed circuit configuration example of the control circuit. The control circuit 120 includes an arithmetic circuit 130, a first switch control circuit 141, and a second switch control circuit 142.

[0045] The arithmetic circuit 130 generates a switching control signal CSW1 from the output signal COUT1 of the first current detection circuit 111, and generates a switching control signal CSW2 from the output signal COUT2 of the second current detection circuit 112. Hereinafter, the generation process of the switching control signal CSW1 will be described as an example, but the generation process of the switching control signal CSW2 is the same. As an example, the arithmetic circuit 130 incorporates a timer. Here, it is assumed that the comparison circuit 115 outputs a high-level output signal COUT1 when VOUT>VDAC. Also, it is assumed that the charge period is when the switching control signal CSW1 is at a high level, and the decay period is when the switching control signal CSW1 is at a low level. The arithmetic circuit 130 sets the switching control signal CSW1 from a low level to a high level and starts the timer at the rising edge of the output signal COUT1. The arithmetic circuit 130 sets the switching control signal CSW1 from a high level to a low level and stops the timer when the measurement time of the timer reaches a predetermined time. Thereafter, the same operation is repeated, so that the charge period and the decay period are repeated.

[0046] The first switch control circuit 141 generates pre-drive signals CSA1 to CSD1 from the switching control signal CSW1. Specifically, the first switch control circuit 141 includes a logic circuit that generates on / off control signals for the switch elements SWA1 to SWD1 from the switching control signal CSW1, and a buffer circuit that buffers the on / off control signals for the switch elements SWA1 to SWD1 and outputs the pre-drive signals CSA1 to CSD1.

[0047] The second switch control circuit 142 generates pre-drive signals CSA2 to CSD2 from the switching control signal CSW2. Specifically, the second switch control circuit 142 includes a logic circuit that generates on / off control signals for the switch elements SWA2 to SWD2 from the switching control signal CSW2, and a buffer circuit that buffers the on / off control signals for the switch elements SWA2 to SWD2 and outputs the pre-drive signals CSA2 to CSD2.

[0048] FIG. 7 is a diagram for explaining a driving method when the integrated circuit device drives a stepping motor. In the following, the driving of a 4-pole bipolar motor will be described as an example, but it is not limited thereto.

[0049] As shown in FIG. 7, the stepping motor makes one revolution in the first to fourth steps T1 to T4. In the first step T1, the drive current IS1 of the first bridge circuit 151 is positive, and the drive current IS2 of the second bridge circuit 152 is zero. The first pole MP1 becomes an N pole and attracts the S pole of the rotor RTR, and the second pole MP2 becomes an S pole and attracts the N pole of the rotor RTR. The rotation angle of the stepping motor is 0 degrees. In the second step T2, the drive current IS1 of the first bridge circuit 151 is zero, and the drive current IS2 of the second bridge circuit 152 is positive. The third pole MP3 becomes an N pole and attracts the S pole of the rotor RTR, and the fourth pole MP4 becomes an S pole and attracts the N pole of the rotor RTR. The rotation angle of the stepping motor is 90 degrees. In the third step T3, the drive current IS1 of the first bridge circuit 151 is negative, and the drive current IS2 of the second bridge circuit 152 is zero. The first pole MP1 becomes an S pole and attracts the N pole of the rotor RTR, and the second pole MP2 becomes an N pole and attracts the S pole of the rotor RTR. The rotation angle of the stepping motor is 180 degrees. In the fourth step T4, the drive current IS1 of the first bridge circuit 151 is zero, and the drive current IS2 of the second bridge circuit 152 is negative. The third pole MP3 becomes an S pole and attracts the N pole of the rotor RTR, and the fourth pole MP4 becomes an N pole and attracts the S pole of the rotor RTR. The rotation angle of the stepping motor is 270 degrees.

[0050] FIG. 8 is a first detailed layout configuration example of the integrated circuit device. Description of parts similar to those in FIG. 3 is omitted.

[0051] The integrated circuit device 100 includes a fifth terminal TSE and a sixth terminal TSF connected to a ground node on the circuit board on which the integrated circuit device 100 is mounted. The fifth terminal TSE is connected to the ground node of the amplifier circuit included in the first current detection circuit 111 by wiring within the integrated circuit device 100. Specifically, the fifth terminal TSE is connected to the other end of the third resistor RIN in the arithmetic circuit 130 of FIG. 5 by wiring within the integrated circuit device 100. Similarly, the sixth terminal TSF is connected to the ground node of the amplifier circuit included in the second current detection circuit 112 by wiring within the integrated circuit device 100.

[0052] The second terminal TSB and the fifth terminal TSE are arranged at the corner where the first side HN1 and the third side HN3 intersect. The fourth terminal TSD and the sixth terminal TSF are arranged at the corner where the first side HN1 and the fourth side HN4 intersect.

[0053] The integrated circuit device 100 includes terminals TVDD1 and TVDD2. The terminal TVDD1 is a terminal connected to a power supply node on the circuit board and for supplying a power supply voltage VDD to the first bridge circuit 151. The terminal TVDD2 is a terminal connected to a power supply node on the circuit board and for supplying a power supply voltage VDD to the second bridge circuit 152.

[0054] The terminals TVDD1, TDA, TDB, and the first terminal TSA are arranged within the arrangement region of the first bridge circuit 151. The terminals TDA and TDB are arranged along the fourth direction DR4 near the center of the arrangement region of the first bridge circuit 151. The first terminal TSA is arranged at a corner near the second terminal TSB within the arrangement region of the first bridge circuit 151. The terminal TVDD1 is arranged at a diagonal corner of the corner where the first terminal TSA is arranged within the arrangement region of the first bridge circuit 151.

[0055] The terminals TVDD2, TDC, TDD, and the third terminal TSC are arranged within the arrangement region of the second bridge circuit 152. The terminals TDC and TDD are arranged along the third direction DR3 near the center of the arrangement region of the second bridge circuit 152. The third terminal TSC is arranged at a corner near the fourth terminal TSD within the arrangement region of the second bridge circuit 152. The terminal TVDD2 is arranged at a diagonal corner of the corner where the third terminal TSC is arranged within the arrangement region of the second bridge circuit 152.

[0056] The integrated circuit device 100 includes terminals TVSS1 and TVSS2. The terminals TVSS1 and TVSS2 are connected to the ground node on the circuit board and are terminals for supplying the ground potential to the entire integrated circuit device 100. The integrated circuit device 100 also includes I / O regions 191 to 193. A plurality of pads for inputting and outputting signals to and from the outside of the integrated circuit device 100 are arranged in each I / O region.

[0057] The I / O region 191 is arranged along the third side HN3 between the third side HN3 and the first current detection circuit 111, the control circuit 120, and the first bridge circuit 151. The I / O region 192 is arranged along the second side HN2 between the second side HN2 and the first current detection circuit 111 and the second current detection circuit 112. The I / O region 193 is arranged along the fourth side HN4 between the fourth side HN4 and the second current detection circuit 112, the control circuit 120, and the second bridge circuit 152. The terminal TVSS1 is arranged on the third side HN3. Specifically, the terminal TVSS1 is arranged between the first bridge circuit 151 and the third side HN3 and is arranged in the second direction DR2 of the I / O region 191. The terminal TVSS2 is arranged on the fourth side HN4. Specifically, the terminal TVSS2 is arranged between the second bridge circuit 152 and the fourth side HN4 and is arranged in the second direction DR2 of the I / O region 193.

[0058] FIG. 9 is a second detailed layout configuration example of the integrated circuit device. Here, a layout example in the periphery between the first bridge circuit 151 and the first side HN1 and the third side HN3 is shown. Note that the layout in the periphery between the second bridge circuit 152 and the first side HN1 and the fourth side HN4 is line-symmetric to FIG. 9 with respect to the center line between the third side HN3 and the fourth side HN4.

[0059] The integrated circuit device 100 is housed in the package 200. The integrated circuit device 100 includes lead terminals bonded to the pads of the integrated circuit device 100. The pads of the integrated circuit device 100 are connected to the wiring on the circuit board via the lead terminals of the package. FIG. 9 shows a lead terminal TVSS1L bonded to the terminal TVSS1, a lead terminal TSAL bonded to the first terminal TSA, a lead terminal TSBL bonded to the second terminal TSB, and a lead terminal TSEL bonded to the fifth terminal TSE. On the circuit board, the lead terminals TSAL and TSBL are connected to one end of the first sense resistor RS1, and the lead terminal TSEL is connected to the other end of the first sense resistor RS1, that is, the ground node. Also on the circuit board, the lead terminal TVSS1L is connected to the ground node.

[0060] The first wiring LN1 connecting the second terminal TSB and the first current detection circuit 111 is provided along the first direction DR1 between the I / O region 191 where a plurality of pads TPD are arranged and the third side HN3. Similarly, the wiring LNG1 connecting the fifth terminal TSE and the first current detection circuit 111 is provided along the first direction DR1 between the I / O region 191 and the third side HN3. The ground wiring LNVS is connected to the terminal TVSS1 and is provided along the first direction DR1 in the third direction DR3 of the I / O region 191. Although only a part of the ground wiring LNVS is shown in FIG. 9, the ground wiring LNVS is wired up to the terminal TVSS2 along the inside of the I / O regions 191 to 193. Each of the first wiring LN1, the wiring LNB1, and the ground wiring LNVS includes the topmost metal layer of the integrated circuit device 100. The topmost metal layer is, for example, the metal layer used for the pads.

[0061] In this way, by arranging the first wiring LN1 and the wiring LNB1 along the outer periphery of the integrated circuit device 100, the terminals TSB, TSE and the first current detection circuit 111 can be connected at the shortest distance without being affected by the wiring in the circuit.

[0062] In addition to pads, electrostatic protection circuits are provided in the I / O regions 191 to 193, and a ground wiring LNVS for connecting to the electrostatic protection circuits is provided along the I / O regions 191 to 193. By providing the first wiring LN1 and the wiring LNB1 between the I / O region 191 and the third side HN3, the first wiring LN1 and the wiring LNB1 can be arranged using the topmost metal layer with a small resistance value while avoiding the ground wiring LNVS provided inside the I / O region 191. By using the topmost metal layer, the parasitic resistance values of the first wiring LN1 and the wiring LNB1 can be reduced, and the gain error of the amplifier circuit due to the parasitic resistance can be reduced.

[0063] FIG. 10 is a third detailed layout configuration example of the integrated circuit device. Here, a layout example in the periphery between the first current detection circuit 111, the second side HN2, and the third side HN3 is shown. Note that the layout in the periphery between the second current detection circuit 112, the second side HN2, and the fourth side HN4 is line-symmetric with FIG. 10 with respect to the center line between the third side HN3 and the fourth side HN4.

[0064] In FIG. 10, at the corner where the second side HN2 and the third side HN3 intersect, a plurality of pads TPD of the I / O region are arranged on both the second side HN2 and the third side HN3. Inside the plurality of pads TPD provided along the third side HN3, a wiring LNX extends along the first direction DR1. Further, inside the plurality of pads TPD provided along the second side HN2, a wiring LNX extends along the third direction DR3, and one end of the wiring LNX is connected to the pad TPD. In the example of FIG. 10, one end of the wiring LNX is connected to the pad TPD on the third direction DR3 side among the three pads TPD provided along the second side HN2. The wiring LNX includes the topmost metal layer.

[0065] The first wiring LN1 extends along the first direction DR1 between the pad TPD and the third side HN3 and extends along the third direction DR3 between the pad TPD and the second side HN2. Then, the first wiring LN1 extends in the second direction DR2 through the third direction DR3 side of the pad TPD to which one end of the wiring LNX is connected, and is connected to the amplifier circuit 160 of the first current detection circuit 111.

[0066] FIG. 11 shows a fourth detailed layout configuration example of the integrated circuit device. Here, a layout example in the periphery between the first current detection circuit 111 and the second side HN2 and the third side HN3 is shown. Note that the layout in the periphery between the second current detection circuit 112 and the second side HN2 and the fourth side HN4 is line-symmetrical to FIG. 11 with respect to the center line between the third side HN3 and the fourth side HN4.

[0067] In FIG. 11, at the corner where the second side HN2 and the third side HN3 intersect, a plurality of pads TPD of the I / O region are arranged on the third side HN3, and no pad TPD is arranged on the second side HN2. Inside the plurality of pads TPD provided along the third side HN3, a wiring LNX extends along the first direction DR1, and one end of the wiring LNX is connected to the pad TPD. In the example of FIG. 11, one end of the wiring LNX is connected to the pad TPD on the most first direction DR1 side among the five pads TPD provided along the third side HN3. The wiring LNX includes the topmost metal layer.

[0068] The first wiring LN1 extends along the first direction DR1 between the pad TPD and the third side HN3. Then, the first wiring LN1 extends in the third direction DR3 through the first direction DR1 side of the pad TPD to which one end of the wiring LNX is connected, and is connected to the amplifier circuit 160 of the first current detection circuit 111.

[0069] In this embodiment, the integrated circuit device 100 includes a first bridge circuit 151 that drives a motor 10 and a first current detection circuit 111 that detects a first current flowing through a first sense resistor RS1. The integrated circuit device 100 also includes a control circuit 120 that controls the first bridge circuit 151 based on the detection result of the first current detection circuit 111. The integrated circuit device 100 further includes a first terminal TSA connected to one end of the first sense resistor RS1 and the first bridge circuit 151, a second terminal TSB connected to one end of the first sense resistor RS1, and a first wiring LN1. Let the opposite side of the first side HN1 of the integrated circuit device 100 be the second side HN2. The first bridge circuit 151 is provided on the first side HN1 side by the control circuit 120. The first current detection circuit 111 is provided on the second side HN2 side by the control circuit 120. The first terminal TSA and the second terminal TSB are provided on the first side HN1 side by the control circuit 120. The first wiring LN1 connects the second terminal TSB provided on the first side HN1 side by the control circuit 120 and the input node of the first current detection circuit 111 provided on the second side HN2 side by the control circuit 120.

[0070] As described with reference to FIG. 2, when one end of the first sense resistor RS1 and the input node of the first current detection circuit 111 are connected by wiring on the circuit board on which the integrated circuit device 100 is mounted, the parasitic resistance value of the wiring varies depending on the design of the circuit board, leading to a detection error in the first current detection circuit 111. According to this embodiment, one end of the first sense resistor RS1 and the input node of the first current detection circuit 111 are connected by the first wiring LN1 within the integrated circuit device 100. The parasitic resistance value of the first wiring LN1 is not affected by the circuit board on which the integrated circuit device 100 is mounted and can be estimated when designing the integrated circuit device 100, reducing the detection error of the first current detection circuit 111. Thereby, the error between the drive current IS1 for driving the motor 10 and the target current value can be reduced.

[0071] Note that FIG. 3 shows an example in which the first terminal TSA and the second terminal TSB are provided on the first side HN1, and FIG. 8 shows an example in which the first terminal TSA and the second terminal TSB are arranged near the corner where the first side HN1 and the third side HN3 intersect. However, the first terminal TSA and the second terminal TSB may be provided on the first side HN1 side from the control circuit 120. For example, the first terminal TSA and the second terminal TSB may be provided between the first bridge circuit 151 and the first side HN1, between the first bridge circuit 151 and the third side HN3, or within the arrangement region of the first bridge circuit 151.

[0072] In this embodiment, the direction from the first side HN1 to the second side HN2 may be defined as the first direction DR1. The first wiring LN1 is wired along the first direction DR1.

[0073] By wiring the first wiring LN1 along the first direction DR1, the second terminal TSB provided on the first side HN1 side from the control circuit 120 and the input node of the first current detection circuit 111 provided on the second side HN2 side from the control circuit 120 can be connected linearly, that is, with the shortest possible distance. By shortening the first wiring LN1, the parasitic resistance value can be reduced, and the detection error of the first current detection circuit 111 can be reduced.

[0074] In this embodiment, the side intersecting the first side HN1 and the second side HN2 may be defined as the third side HN3 of the integrated circuit device 100. The first wiring LN1 may be wired along the first direction DR1 between the first bridge circuit 151, the control circuit 120, and the first current detection circuit 111 and the third side HN3.

[0075] According to this embodiment, the first wiring LN1 can be wired along the outer periphery of the integrated circuit device 100. As a result, the first wiring LN1 can be made linear, that is, with the shortest possible distance, without being affected by the wiring within the circuit of the integrated circuit device 100. Also, since it is not affected by the wiring within the circuit of the integrated circuit device 100, the first wiring LN1 can be configured using a metal layer with the lowest possible resistance value. From the above, the parasitic resistance value of the first wiring LN1 can be reduced.

[0076] Also, in the present embodiment, the integrated circuit device 100 includes a plurality of pads provided along the third side HN3. The first wiring LN1 may be wired between the plurality of pads and the third side HN3. Also, in the present embodiment, the first wiring LN1 may be wired along the first direction DR1 between the plurality of pads and the third side HN3.

[0077] The area between the pad and the side is usually an area where no circuit is arranged. According to the present embodiment, by wiring the first wiring LN1 between the plurality of pads and the third side HN3, the first wiring LN1 can be wired over as short a distance as possible.

[0078] Also, in the present embodiment, the first wiring LN1 may be wiring formed by the top metal layer of the integrated circuit device 100. Also, in the present embodiment, a ground wiring LNVS formed by the top metal layer may be wired along the first direction DR1 inside the plurality of pads. The first wiring LN1 formed by the top metal layer may be wired along the first direction DR1 between the plurality of pads and the third side HN3.

[0079] According to the present embodiment, the first wiring LN1 is wired between the plurality of pads and the third side HN3. Thereby, the first wiring LN1 formed by the top metal layer can be wired while avoiding the ground wiring LNVS formed by the top metal layer wired inside the plurality of pads. Since the top metal layer has a lower resistance value than other metal layers, the parasitic resistance value of the first wiring LN1 can be reduced.

[0080] Also, in the present embodiment, the first terminal TSA and the second terminal TSB may be arranged at the corner where the third side HN3 and the first side HN1 of the integrated circuit device 100 intersect.

[0081] Since a drive current IS1 flows between the first bridge circuit 151 and the first sense resistor RS1, it is desirable that the first terminal TSA on the current path be disposed near the first bridge circuit 151. According to the present embodiment, the first bridge circuit 151 is disposed on the first side HN1 side from the control circuit 120, and the first terminal TSA and the second terminal TSB are disposed at a corner portion where the third side HN3 and the first side HN1 intersect. Thereby, the first terminal TSA is disposed near the first bridge circuit 151. Also, in the circuit board, the first terminal TSA and the second terminal TSB are connected to one end of the first sense resistor RS1. Since the first terminal TSA and the second terminal TSB are disposed at the same corner portion, the wiring on the circuit board between one end of the first sense resistor RS1 and the second terminal TSB becomes short. Thereby, the influence of the wiring resistance of the circuit board on the parasitic resistance value between one end of the first sense resistor RS1 and the input node of the first current detection circuit 111 is reduced.

[0082] Also, in the present embodiment, the first current detection circuit 111 may include an amplifier circuit 160 that amplifies an input voltage VIP1 corresponding to the first current.

[0083] According to the present embodiment, the input node of the first current detection circuit 111 is the input node of the amplifier circuit 160. The parasitic resistance value of the first wiring LN1 is added to the input resistance value of the amplifier circuit 160, which becomes a factor of gain error. As described above, by reducing the variation in the parasitic resistance value of the first wiring LN1 or reducing the parasitic resistance value, the gain error of the amplifier circuit 160 can be reduced, and the detection error of the first current detection circuit 111 can be reduced.

[0084] Also, in the present embodiment, the amplifier circuit 160 may include an operational amplifier 161, a first resistor RIP, a second resistor RFP, a third resistor RIN, and a fourth resistor RFN. One end of the first resistor RIP may be connected to the first input terminal of the operational amplifier 161, and an input voltage VIP1 may be input to the other end. One end of the second resistor RFP may be connected to the first input terminal of the operational amplifier 161. One end of the third resistor RIN may be connected to the second input terminal of the operational amplifier 161, and the other end may be connected to the ground node. One end of the fourth resistor RFN may be connected to the second input terminal of the operational amplifier 161, and the other end may be connected to the output terminal of the operational amplifier 161.

[0085] In the present embodiment, the other end of the first resistor RIP to which the input voltage VIP1 is input corresponds to the input node of the first current detection circuit 111. That is, the first wiring LN1 is a wiring that connects the second terminal TSB and the other end of the first resistor RIP.

[0086] Also, in the present embodiment, the first current detection circuit 111 may include a D / A conversion circuit 190 that D / A-converts the target current value SDAC of the first current, and a comparison circuit 115 that compares the output voltage VOUT1 of the amplifier circuit 160 and the output voltage VDAC of the D / A conversion circuit. The control circuit 120 may control the first bridge circuit 151 based on the output signal COUT1 of the comparison circuit 115.

[0087] According to the present embodiment, the first bridge circuit 151 is controlled so that the first current flowing through the first sense resistor RS1, that is, the drive current IS1 with which the first bridge circuit 151 drives the motor 10, becomes the current value indicated by the target current value SDAC.

[0088] In this embodiment, the integrated circuit device 100 may also include a second bridge circuit 152 that drives the motor 10 and a second current detection circuit 112 that detects a second current flowing through the second sense resistor RS2. The integrated circuit device 100 may also include a third terminal TSC connected to one end of the second sense resistor RS2 and the second bridge circuit 152, a fourth terminal TSD connected to one end of the second sense resistor RS2, and a second wiring LN2. The control circuit 120 may control the second bridge circuit 152 based on the detection result of the second current detection circuit 112. The second bridge circuit 152 may be provided on the first side HN1 side of the control circuit 120. The second current detection circuit 112 may be provided on the second side HN2 side of the control circuit 120. The third terminal TSC and the fourth terminal TSD may be provided on the first side HN1 side of the control circuit 120. The second wiring LN2 may connect the fourth terminal TSD provided on the first side HN1 side of the control circuit 120 and the input node of the second current detection circuit 112 provided on the second side HN2 side of the control circuit 120.

[0089] According to this embodiment, one end of the second sense resistor RS2 and the input node of the second current detection circuit 112 are connected by the second wiring LN2 in the integrated circuit device 100. The parasitic resistance value of the second wiring LN2 is not affected by the circuit board on which the integrated circuit device 100 is mounted and can be estimated when designing the integrated circuit device 100, and the detection error of the second current detection circuit 112 is reduced. As a result, the error between the drive current IS2 that drives the motor 10 and the target current value can be reduced. Also, from the viewpoint of a two-phase stepping motor, it becomes possible to make the resistance values of the first wiring LN1 and the second wiring LN2 the same, and the amplitudes of the drive current IS1 and the drive current IS2 can be made the same, so that the stepping motor is appropriately controlled.

[0090] Also, in the present embodiment, when the opposite side of the third side HN3 is defined as the fourth side HN4 of the integrated circuit device 100, the first wiring LN1 may be wired along the first direction DR1 between the first bridge circuit 151, the control circuit 120, the first current detection circuit 111, and the third side HN3. The second wiring LN2 may be wired along the first direction DR1 between the second bridge circuit 152, the control circuit 120, the second current detection circuit 112, and the fourth side HN4.

[0091] According to the present embodiment, by being able to wire the first wiring LN1 and the second wiring LN2 along the outer periphery of the integrated circuit device 100, the first wiring LN1 and the second wiring LN2 can be made linear, that is, as short as possible, without being affected by the wiring within the circuit of the integrated circuit device 100. Also, since they are not affected by the wiring within the circuit of the integrated circuit device 100, the first wiring LN1 and the second wiring LN2 can be configured using a metal layer with as low a resistance value as possible. From the above, the parasitic resistance values of the first wiring LN1 and the second wiring LN2 can be reduced.

[0092] Also, in the present embodiment, the first wiring LN1 and the second wiring LN2 may be symmetrically wired with respect to the center line between the third side HN3 and the fourth side HN4.

[0093] According to the present embodiment, since the first wiring LN1 and the second wiring LN2 are line-symmetric, it becomes possible to equalize the resistance values of the first wiring LN1 and the second wiring LN2. Since the amplitudes of the drive current IS1 and the drive current IS2 can be made the same, the stepping motor is appropriately controlled.

[0094] Although the present embodiment has been described in detail as above, those skilled in the art will easily understand that many modifications can be made without substantially departing from the novel matters and effects of the present disclosure. Therefore, all such modified examples are intended to be included within the scope of the present disclosure. For example, in the specification or drawings, a term that is described at least once together with a broader or synonymous different term can be replaced with that different term anywhere in the specification or drawings. Also, all combinations of the present embodiment and modified examples are included within the scope of the present disclosure. Further, the configurations and operations of the first current detection circuit, the second current detection circuit, the control circuit, the first bridge circuit, the second bridge circuit, the integrated circuit device, the package, the circuit board, the motor driver, the motor, etc. are not limited to those described in the present embodiment, and various modified implementations are possible.

Explanation of Reference Numerals

[0095] 10…Motor, 11…First coil, 12…Second coil, 100…Integrated circuit device, 111…First current detection circuit, 112…Second current detection circuit, 115…Comparison circuit, 120…Control circuit, 130…Arithmetic circuit, 141…First switch control circuit, 142…Second switch control circuit, 151…First bridge circuit, 152…Second bridge circuit, 160…Amplification circuit, 161…Operational amplifier, 190…D / A conversion circuit, 191~193…I / O region, 200…Package, 300…Motor driver, DR1…First direction, DR2…Second direction, DR3…Third direction, DR4…Fourth direction, HN1…First side, HN2…Second side, HN3…Third side, HN4…Fourth side, IS1…Drive current, IS2…Drive current, LN1…First wiring, LN2…Second wiring, LNVS…Ground wiring, RS1…First sense resistor, RS2…Second sense resistor, TSA…First terminal, TSB…Second terminal, TSC…Third terminal, TSD…Fourth terminal

Claims

1. A first bridge circuit for driving a motor, a first current detection circuit for detecting a first current flowing through a first sense resistor, a control circuit for controlling the first bridge circuit based on a detection result of the first current detection circuit, a first terminal connected to one end of the first sense resistor and the first bridge circuit, a second terminal connected to the one end of the first sense resistor, a first wiring, and including, wherein the first bridge circuit is provided on a first side of an integrated circuit device from the control circuit, when a side opposite to the first side is defined as a second side of the integrated circuit device, the first current detection circuit is provided on the second side from the control circuit, the first terminal and the second terminal are provided on the first side from the control circuit, the first wiring connects the second terminal provided on the first side from the control circuit and an input node of the first current detection circuit provided on the second side from the control circuit, and an integrated circuit device characterized by this.

2. In the integrated circuit device according to Claim 1, when a direction from the first side to the second side is defined as a first direction, the first wiring is wired along the first direction, and an integrated circuit device characterized by this.

3. In the integrated circuit device according to Claim 2, when a side intersecting the first side and the second side is defined as a third side of the integrated circuit device, the first wiring is wired along the first direction between the first bridge circuit, the control circuit, and the first current detection circuit, and the third side, and an integrated circuit device characterized by this.

4. In the integrated circuit device according to Claim 1, including a plurality of pads provided along a third side of the integrated circuit device intersecting the first side and the second side, the first wiring is wired between the plurality of pads and the third side, and an integrated circuit device characterized by this.

5. In the integrated circuit device according to Claim 4, when a direction from the first side to the second side is defined as a first direction, the first wiring is wired along the first direction between the plurality of pads and the third side, and an integrated circuit device characterized by this.

6. In the integrated circuit device according to Claim 4, the first wiring is wiring by the topmost metal layer of the integrated circuit device, and an integrated circuit device characterized by this.

7. In the integrated circuit device according to Claim 6, when a direction from the first side to the second side is defined as a first direction, Inside the plurality of pads, a ground wiring formed by the uppermost metal layer is wired along the first direction. The first wiring formed by the uppermost metal layer is wired along the first direction between the plurality of pads and the third side, and is characterized by an integrated circuit device.

8. In the integrated circuit device according to claim 1, The first terminal and the second terminal are arranged at a corner where the third side of the integrated circuit device intersecting the first side and the second side intersects the first side, and is characterized by an integrated circuit device.

9. In the integrated circuit device according to any one of claims 1 to 8, The first current detection circuit, An integrated circuit device characterized by including an amplifier circuit that amplifies an input voltage corresponding to the first current.

10. In the integrated circuit device according to claim 9, The amplifier circuit, An operational amplifier, A first resistor having one end connected to the first input terminal of the operational amplifier and the input voltage input to the other end, A second resistor having one end connected to the first input terminal of the operational amplifier and a ground voltage or a reference voltage input to the other end, A third resistor having one end connected to the second input terminal of the operational amplifier and the other end connected to a ground node, A fourth resistor having one end connected to the second input terminal of the operational amplifier and the other end connected to the output terminal of the operational amplifier, An integrated circuit device characterized by including.

11. In the integrated circuit device according to claim 9, The first current detection circuit, A D / A conversion circuit that D / A-converts a target current value of the first current, A comparison circuit that compares the output voltage of the amplifier circuit and the output voltage of the D / A conversion circuit, Including, The control circuit controls the first bridge circuit based on the output signal of the comparison circuit, and is characterized by an integrated circuit device.

12. In the integrated circuit device according to claim 1, A second bridge circuit that drives the motor, A second current detection circuit that detects a second current flowing through the second sense resistor, A third terminal connected to one end of the second sense resistor and the second bridge circuit, A fourth terminal connected to the one end of the second sense resistor, A second wiring, Including, The control circuit controls the second bridge circuit based on the detection result of the second current detection circuit, The second bridge circuit is provided on the first side of the control circuit, The second current detection circuit is provided on the second side of the control circuit. The third terminal and the fourth terminal are provided on the first side from the control circuit. The second wiring connects the fourth terminal provided on the first side from the control circuit and the input node of the second current detection circuit provided on the second side from the control circuit. An integrated circuit device characterized by this.

13. In the integrated circuit device according to claim 12, When the direction from the first side to the second side is defined as the first direction, the side intersecting the first side and the second side is defined as the third side of the integrated circuit device, and the opposite side of the third side is defined as the fourth side of the integrated circuit device, The first wiring is wired along the first direction between the first bridge circuit, the control circuit, and the first current detection circuit and the third side. The second wiring is wired along the first direction between the second bridge circuit, the control circuit, and the second current detection circuit and the fourth side. An integrated circuit device characterized by this.

14. In the integrated circuit device according to claim 12, When the side intersecting the first side and the second side is defined as the third side of the integrated circuit device, and the opposite side of the third side is defined as the fourth side of the integrated circuit device, The first wiring and the second wiring are symmetrically wired with respect to the center line between the third side and the fourth side. An integrated circuit device characterized by this.

15. An integrated circuit device according to any one of claims 1 to 8, The first sense resistor, A motor driver characterized by including.

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