Circuit board and electronic control device

Abstract

To realize both of a high-density mounting of a filter component mounted on a circuit board associated with a cable communication and high-frequency electrical characteristics.SOLUTION: In a circuit board 100, a first electronic component 2-1 is disposed on one surface layer of a dielectric layer 74, and a second electronic component 2-2 is disposed on the other surface layer of the dielectric layer 74 at a position overlapping at least a part of the first electronic component 2-1 in a direction orthogonal to a lamination direction of conductor layers 73. The plurality of conductor layers 73 include: removed portions 75-1 and 75-2 in which conductor patterns are removed in a range in which the first electronic component 2-1 and the second electronic component 2-2 overlap in a direction orthogonal to the lamination direction; and a porous part 76 in which a plurality of holes are formed in a range in which the first electronic component 2-1 and the second electronic component 2-2 overlap in a direction orthogonal to the lamination direction.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present invention relates to a circuit board such as a printed circuit board or a flexible printed circuit board, and an electronic control device including the same.

Background Art

[0002] In recent years, the sophistication of the automatic driving support system for automobiles has advanced, and hands-free (hands-off driving) is realized at the automatic driving level 2+ that is becoming popular among general vehicles, and eyes-free is realized at the automatic driving level 3. To realize such functions, electronic control devices for autonomous driving (Autonomous Driving - Electrical Control Unit: AD-ECU) and electronic control devices for advanced driver assistance systems (Advanced Driver-Assistance System - ECU: ADAS-ECU) are connected via cables to a number of sensors such as cameras, LiDAR, and sonars for acquiring information from the outside world.

[0003] In addition, the automotive electrical / electronic (E / E) architecture is changing to a vehicle centralized "zone architecture" that integrates the ECUs for processing in the power train, body domain, and safety domain into the vehicle's central computer while new functions such as connectivity, personalization, and infotainment are increasing. For this reason, a large number of cables are to be connected to the integrated ECU responsible for the vehicle's central computer for the purpose of backbone transmission with the zone ECUs arranged in each zone within the vehicle.

[0004] AD / ADAS-ECUs and integrated ECUs are required to be miniaturized due to space constraints within the vehicle. On the other hand, when the number of cable connections to the ECU increases, the number of cable connectors installed around the ECU housing increases. Therefore, an increase in the number of cables leads to an increase in the size of the ECU housing.

[0005] Examples of cables used for such cable communication include coaxial cables, twisted pair cables, and STP (Shielded Twist Pair) cables. A coaxial cable is a cable in which the periphery of a single-wire signal line is covered with a ground shield. A twisted pair cable is a cable in which differential wiring composed of two wires, positive (P) and negative (N), is twisted into a pair. An STP cable is a cable in which the periphery of a twisted pair cable is covered with a ground shield.

[0006] Examples of communication standards using coaxial cables include GMSL and MIPI A-Phy for communicating image data of camera sensors. In camera sensor communication, the weight of in-vehicle cables is reduced by eliminating the cable for power supply to the camera. In order to achieve weight reduction of in-vehicle cables, it is common to utilize the technology of Power over Coax (PoC) to superimpose signals and power on the same coaxial cable.

[0007] In addition, typical communication standards using twisted pair cables and STP cables include in-vehicle Ethernet represented by 100BASE-T1 for transmitting 100 Mbps and 1000BASE-T1 for transmitting 1 Gbps. Also in these standards, in order to achieve weight reduction of in-vehicle cables, standardization of the Power over Data Line (PoDL) technology for superimposing and transmitting power on the cable for signal transmission is underway.

[0008] An example of an ECU to which a large number of communication cables for various communication standards are connected is shown in FIG. 1. In this example, a configuration example in which coaxial cables for eight channels can be connected is shown. In actuality, a configuration in which twisted pair cables and STP cables are also mixed in addition to coaxial cables is common. The housing 7 of the ECU shown in FIG. 1 is provided with eight housing-side connectors 8 on the side surface of the housing 7 in order to connect coaxial cables 10 for eight channels to the housing 7. By inserting the cable-side connector 9 into this housing-side connector 8, cable communication between the ECU and an external device becomes possible. As can be seen from FIG. 1, the width of the housing 7 is almost occupied by the connector via (mounting hole), and an increase in the number of channels for cable communication has been a major issue for miniaturization of the ECU.

[0009] In response to such problems, the use of multi-pole connectors that enable connection to a plurality of cables with a single connector is progressing. An example of an ECU using a multi-pole connector is shown in FIG. 2. In this example, by using three four-pole connectors provided on the coaxial cable, a configuration is achieved in which coaxial cables for 12 channels can be connected. In actuality, a configuration in which twisted pair cables and STP cables are also mixed in addition to coaxial cables is common.

[0010] The housing 7 of the ECU shown in FIG. 2 is provided with three housing-side four-pole connectors 11 on the side surface of the housing in order to connect coaxial cables 10 for 12 channels to the housing. By inserting the cable-side four-pole connector 12 into this housing-side four-pole connector 11, cable communication between the ECU and an external device becomes possible. As can be seen from FIG. 2, although the number of channels has increased compared to the example of FIG. 1, the width of the housing 7 is narrower than that of FIG. 1, and the four-pole connector contributes to miniaturization of the housing 7.

[0011] However, the use of such multi-pole connectors causes problems from the viewpoint of component mounting density in the printed circuit board (PCB) inside the ECU housing. An example thereof will be described with reference to FIG. 3. Figure 3 is a top view showing an example of the printed circuit board 1 when filter components are mounted only on the surface when using a 4-pole connector. In Figure 3, a configuration example is shown in which a 4-pole connector is utilized for connecting four channels of coaxial cables. In the printed circuit board 1 within the ECU, in order to transmit signals from four channels of coaxial cables to the communication LSI 16 mounted on the printed circuit board 1, four signal lines from the housing-side 4-pole connector 11 are connected to the communication LSI 16 using the signal wirings 13-1 to 13-4 on the printed circuit board 1.

[0012] Furthermore, when adopting PoC (Power over Coax) communication in which power superposition is performed with a coaxial cable, in order to connect the signal line and the power line, one terminal of each of the filter components 14-1 to 14-4 called PoC filters is connected to the signal line (signal wirings 13-1 to 13-4), and the other terminal of each is connected to the power line (power line connection vias 15-1 to 15-4), requiring component mounting. As the PoC filter, an inductor (coil), capacitor, ESD protection element, etc. are used. Filter components utilized for the PoC filter are often relatively large components on the order of several millimeters square. Therefore, when mounting a plurality of filter components on the same substrate surface, the size of the area occupied by these filter components (the length in the direction orthogonal to the stacking direction) becomes larger than the width of the 4-pole connector, becoming an obstacle to high-density mounting of the connector and furthermore a constraint on miniaturization of the ECU housing.

[0013] As a method to solve this problem, there is a mounting method in which filter components are arranged so as to overlap on both sides of the substrate as shown in Figure 4. Figure 4 is a top view showing an example of the printed circuit board 1 when filter components are mounted on both the front and back surfaces when using a 4-pole connector.

[0014] On the printed circuit board 1 in the ECU shown in FIG. 4, in order to transmit signals from coaxial cables for four channels to the communication LSI 16 mounted on the printed circuit board 1, for the four signal wirings 13-1 to 13-4 from the housing-side four-pole connector 11, the surface signal wirings 13-1 to 13-2 and the back-layer signal wirings 18-1 to 18-2 on the printed circuit board 1 are used to connect to the communication LSI 16.

[0015] Furthermore, among the four PoC filters (filter components) for performing PoC method communication with power supply superposition by coaxial cable, two (filter components 14-2, 14-3) are mounted on the surface layer, and the remaining two (filter components 14-1, 14-4) are mounted on the back layer. At this time, the filter components 14-2, 14-3 and the filter components 14-1, 14-4 are arranged so as to overlap when viewed from the upper surface of the printed circuit board 1. By doing so, the size of the area occupied by the filter components can be suppressed to a spread similar to the connector width.

[0016] However, such double-sided mounting of filter components has problems from the viewpoint of the signal quality characteristics of high-speed communication signals. Two points that must be noted from the viewpoint of signal quality when mounting filter components are impedance mismatch and crosstalk. Regarding the first point of impedance mismatch, in order to connect a filter component to a signal wiring, a parasitic capacitance is generated between the filter component and the conductor pattern of the printed circuit board, and the impedance decreases in high-frequency signals. The conductor pattern is a ground pattern or a signal wiring pattern formed by a conductor layer. Regarding the second point of crosstalk, when electromagnetic coupling occurs between a plurality of filter components, the waveform quality deteriorates due to noise caused by crosstalk from other signal lines. Therefore, it is necessary to ensure isolation between each signal line.

[0017] Regarding the first point of impedance mismatch, in order to avoid capacitive coupling between the wiring such as a coil in the filter component and the conductor pattern of the printed circuit board, there is a mounting method of making holes in the conductor pattern directly under the filter component (prior art (1)). The problems of the prior art during the mounting of components on both sides will be described with reference to FIG. 5. FIG. 5 is a diagram showing a cross section of a printed circuit board according to the prior art (1). In FIG. 5, a filter component 2-1 is mounted on the surface of a dielectric layer 4 (substrate body) of the printed circuit board 1, and a filter component 2-2 is mounted on the back surface thereof. A plurality of conductor layers 3 are formed inside the dielectric layer 4. The conductor layer 3 constitutes a ground pattern or a signal wiring pattern. Generally, a metal having a high conductivity is used for the conductor layer 3. As described above, in order to avoid the coupling between the filter component having a size of several millimeters square and the conductor pattern, a distance at the millimeter level is required between the filter component and the conductor pattern.

[0018] However, generally, the thickness of the printed circuit board 1 (dielectric layer 4) used in the ECU is as thin as about 1.6 mm to 2.0 mm. Therefore, when holes are drilled in the conductor patterns (conductor layers 3) from both sides in a state where the filter components 2-1 and 2-2 are mounted on both sides, as shown in FIG. 5, the conductor pattern removal portion 5 has a shape that penetrates from the front surface to the back surface. The conductor pattern removal portion 5 is configured by removing a part of the conductor layer 3 that constitutes the conductor pattern. In this case, the capacitive coupling between the filter components 2-1 and 2-2 and the conductor patterns in the printed circuit board 1 can be reduced. However, since there is no electromagnetic barrier between the two, electromagnetic coupling occurs between the filter components 2-1 and 2-2, and a crosstalk problem occurs.

[0019] On the other hand, a substrate configuration considering crosstalk will be described with reference to FIG. 6. FIG. 6 is a diagram showing a cross-section of a printed circuit board according to the prior art (2). In the example shown in FIG. 6, at the center of the dielectric layer 4 of the printed circuit board 1, a shield layer 6 that serves as an electromagnetic shield is disposed between the filter component 2-1 mounted on the surface and the filter component 2-2 mounted on the back surface (prior art (2)). In this method, the electromagnetic coupling between the filter component 2-1 and the filter component 2-2 can be avoided and crosstalk can be sufficiently reduced. However, the removal depths of the conductor pattern removal portion 5-1 directly below the filter component 2-1 and the conductor pattern removal portion 5-2 directly above the filter component 2-2 are shallower than those in the prior art (1). For this reason, it is an issue that the capacitive coupling between the filter components 2-1 and 2-2 and the conductor pattern becomes large.

[0020] As a background art related to the present invention, the technique described in Patent Document 1 is known. In the printed wiring board described in Patent Document 1, in a passive element array composed of a plurality of coils, in order to ensure isolation between the passive element and its terminals, a configuration in which the arrangement of the coils and terminals is shifted vertically, horizontally, and diagonally is adopted. Thereby, isolation between the input / output terminals of adjacent coil elements and between the coils is ensured.

Prior Art Documents

Patent Documents

[0021]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0022] In the technique of Patent Document 1, by shifting the arrangement of the coils and the arrangement of the electrodes of the coils vertically, horizontally, and diagonally (especially horizontally), the facing area is reduced to suppress electromagnetic coupling. However, by shifting the arrangement of the coils and the arrangement of the electrodes of the coils vertically, horizontally, and diagonally (especially horizontally), the substrate size of the printed wiring board increases.

[0023] Under the above circumstances, there has been a demand for a method that can achieve both high-density mounting and high-frequency electrical characteristics of filter components mounted on a circuit board associated with cable communication.

Means for Solving the Problems

[0024] In order to solve the above problems, a circuit board according to an aspect of the present invention includes a plurality of conductor layers in which conductor patterns are formed inside a dielectric layer, and a plurality of electronic components to which signal wirings for transmitting signals are connected are arranged on the surface layer of the dielectric layer. In this circuit board, a first electronic component is arranged on one surface layer of the dielectric layer, and a second electronic component is arranged on the other surface layer of the dielectric layer at a position where at least a part thereof overlaps with the first electronic component in a direction orthogonal to the stacking direction of the conductor layers. The plurality of conductor layers include a removal portion where the conductor pattern is removed in a range where the first electronic component and the second electronic component in a direction orthogonal to the stacking direction overlap, and a porous portion where a plurality of holes are formed in a range where the first electronic component and the second electronic component in a direction orthogonal to the stacking direction overlap.

Effects of the Invention

[0025] According to at least one aspect of the present invention, it is possible to achieve both high-density mounting of electronic components such as filter components mounted on a circuit board associated with cable communication and high-frequency electrical characteristics. Problems, configurations, and effects other than those described above will be clarified by the description of the embodiments for carrying out the following invention.

Brief Description of the Drawings

[0026]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Embodiments for Carrying Out the Invention

[0027] Hereinafter, with reference to the accompanying drawings, examples of embodiments for carrying out the present invention (hereinafter referred to as "embodiments") will be described. In this specification and the accompanying drawings, the same or similar components are given the same reference numerals, and redundant descriptions may be omitted, or only descriptions centered on the differences may be provided. Also, when there are a plurality of identical or similar components, they may be described with different subscripts attached to the same reference numeral. Note that when it is not necessary to distinguish these multiple components, the subscripts may be omitted in the description. The number of each component may be singular or plural unless otherwise specified.

[0028] <First Embodiment> First, the printed circuit board according to the first embodiment of the present invention will be described with reference to FIGS. 7 and 8. The present invention relates to a printed circuit board for a signal transmission device and a signal transmission system. The printed circuit board is assumed to be mounted on various ECUs such as an electronic control unit for autonomous driving (AD-ECU) and an electronic control unit for advanced driver assistance systems (ADAS-ECU). Hereinafter, an example in which the present invention is applied to a printed circuit board will be described, but the present invention may also be applied to a flexible printed circuit board (Printed Circuit Board: PCB). This is the same in other embodiments.

[0029] FIG. 7 is a cross-sectional view showing an example of a printed circuit board 100 according to the first embodiment of the present invention. On the surface of the dielectric layer 74 (substrate body), the filter component 2-1 is mounted, and on the back surface thereof, the filter component 2-2 is mounted. Inside the dielectric layer 74, a plurality of conductor layers 73 are formed. On the conductor layer 73, a ground pattern or a signal wiring pattern is formed as a conductor pattern. A metal with high conductivity is used for the conductor layer 73. The filter component 2-1 on one surface and the filter component 2-2 on the other surface (back surface) of the dielectric layer 74 are arranged so that part or all of them overlap when viewed from above (stacking direction). Also, for the filter component 2-1 and the filter component 2-2, in the conductor layer 73 of the inner layer of the printed circuit board 100 (dielectric layer 4), from the surface layer to the intermediate layer, conductor pattern removal portions 75-1 and 75-2 are provided so that the conductor patterns do not overlap directly below the filter components.

[0030] Furthermore, in the intermediate layer, it is characterized in that a porous ground pattern 76 with a large number of holes formed in the conductor layer 73 is arranged. Here, the porous ground pattern is named as a representative of the ground pattern generally used as a shield. However, the same effect can be achieved by substituting it with a power supply pattern that is electrically connected with low impedance by a ground pattern and a decoupling capacitor or the like.

[0031] Also, although an example of the porous ground pattern formed in the two-layer conductor layer 73 is shown here, it may be composed of a single layer. The influence in the case of a single layer will be described in the description of another embodiment (the second embodiment).

[0032] Note that this configuration describes a part of the printed circuit board, and components other than those described here (for example, LSI, capacitors, power supply ICs, etc.) may be added, and the number of conductor layers of the printed circuit board does not have to be the same as this. Also, examples of filter components include PoC filters, PoDL filters, ESD protection elements, common mode choke coils, etc. The present invention may be applied to one kind or a plurality of kinds of them. Furthermore, the present invention may be applied to other components having similar functions.

[0033] Here, the effect of the printed circuit board of the present invention will be described with reference to FIG. 8. FIG. 8 is a graph showing an example of the effect of the printed circuit board of the present invention. In the upper graph of FIG. 8, the vertical axis represents the impedance Zo [Ω], and the horizontal axis represents the time [ns]. Also, in the lower graph of FIG. 8, the vertical axis represents the crosstalk S 41 [dB], and the horizontal axis represents the frequency [Hz].

[0034] Above Figure 8 shows an example of the result of measuring the impedance of the wiring part of a printed circuit board by a method called Time Domain Reflectometry (TDR). Here, an example of the measurement result for a single-line signal wiring is shown. The impedance of the "signal wiring part" is preferably as close as possible to the reference impedance of 50 Ω. However, as in the upper part of Figure 8, in the "filter mounting part", the impedance generally decreases due to the parasitic capacitance between the component and the substrate. If the impedance decreases by more than a certain level and falls below the criteria (standard value), there will be a problem in terms of signal quality.

[0035] The result of the prior art (1) (characteristic 85 shown by the dashed-dotted line in the figure) is the result in the case of the printed circuit board with the cross-sectional configuration shown in Figure 5 described above. By greatly removing the conductor pattern directly under the filter component, the influence of the impedance reduction is minimized. On the other hand, the result of the prior art (2) (characteristic 86 shown by the broken line in the figure) is the result in the case of the substrate cross-sectional configuration shown in Figure 6 described above. When removing the conductor pattern directly under the filter component, by leaving the conductor pattern in the intermediate layer, the influence of the impedance reduction becomes large and reaches the criteria.

[0036] In contrast, the result of the present invention (characteristic 80 shown by the solid line in the figure) is the result in the case of the printed circuit board with the cross-sectional configuration shown in Figure 7 described above. Although not as much as the prior art (1), the present invention adopts a porous ground pattern in the intermediate layer, reducing the facing area between the component and the metal surface, and as a result, the parasitic capacitance can be reduced. Therefore, the present invention realizes an impedance improvement of about 1 to 2 Ω compared to the prior art (2) and achieves an impedance exceeding the criteria.

[0037] Next, below Figure 8, regarding the crosstalk amount, the S parameter (S 41)The example of the measurement result which expresses the coupling amount in the angular frequency in decibels with the frequency parameter of ")" is shown. Note that here also the example of the measurement result with respect to the single-wire signal wiring is shown. In this figure, crosstalk is preferably small. As an example, the crosstalk criteria in a certain communication standard are shown by a broken line, and in this standard, it is specified that it should be -60 dB or less up to 1 MHz. When crosstalk exceeding this criteria occurs at a specific frequency, it becomes a problem.

[0038] The result of the prior art (1) (characteristic 87 shown by a one-dot chain line in the figure) is the result in the case of the printed circuit board having the cross-sectional configuration shown in FIG. 5 described above. By largely removing the conductor pattern directly under the filter component, the electromagnetic coupling between the front and back components increases. In this case, the crosstalk amount exceeds the criteria at about 1 GHz or more, which becomes a problem in terms of signal quality. On the other hand, although the prior art (2) is not shown in the lower graph of FIG. 8, by leaving a conductor pattern in the intermediate layer directly under the filter component, the intermediate layer functions as a shield layer and achieves crosstalk less than -200 dB, without problems.

[0039] In contrast, the present invention (characteristic 81 shown by a solid line in the figure: the present invention (1), characteristic 82 shown by a broken line: the present invention (2)) is the result in the case of the printed circuit board having the cross-sectional configuration shown in FIG. 7 described above. By adopting the porous ground pattern 76 in the intermediate layer, a crosstalk reduction effect of -60 dB to -100 dB is obtained with respect to the prior art (1), and a crosstalk amount below the criteria is achieved. Note that the difference in the effects between the present invention (1) and the present invention (2) is due to the difference in the way of forming holes in the porous ground pattern. This will be described in detail from the second embodiment onwards. Regarding the characteristic 80 in the upper graph of FIG. 8, similar results can be obtained for both the present invention (1) and the present invention (2).

[0040] As described above, the circuit board (for example, printed circuit board 100) according to the first embodiment is a circuit board in which a plurality of conductor layers (conductor layer 73) in which conductor patterns are formed inside a dielectric layer (dielectric layer 74) are laminated, and a plurality of electronic components to which signal wirings for transmitting signals are connected are arranged on the surface layer of the dielectric layer, and includes the following configuration. In this circuit board, a first electronic component (for example, filter component 2-1) is arranged on one surface layer of the dielectric layer, and a second electronic component (for example, filter component 2-2) is arranged at a position on the other surface layer of the dielectric layer where at least a part overlaps with the first electronic component in a direction orthogonal to the lamination direction of the conductor layers. The plurality of conductor layers include a removal portion (conductor pattern removal portions 75-1, 75-2) where the conductor patterns are removed in a range where the first electronic component and the second electronic component in a direction orthogonal to the lamination direction overlap, and a porous portion (porous ground pattern 76) in which a plurality of holes are formed in a range where the first electronic component and the second electronic component in a direction orthogonal to the lamination direction overlap.

[0041] In this way, by adopting the configuration according to this embodiment for the printed circuit board, even in a high-density substrate mounting state where filter components are mounted on both sides, it is possible to bring both the impedance and crosstalk specifications closer to appropriate values. Thereby, this embodiment can improve the total signal quality in the printed circuit board.

[0042] In this embodiment, the mounting density is improved by deliberately aligning the mounting positions of the filter components on the front and back of the printed circuit board (dielectric layer). Thereby, this embodiment can realize miniaturization of the printed circuit board due to an increase in the substrate wiring density (see, for example, FIGS. 12 and 13), and further miniaturization of the ECU housing size while achieving signal transmission performance of, for example, Gbps-class cable transmission.

[0043] In addition, in this embodiment, an example in which a porous ground pattern having a large number of holes is arranged in the intermediate layer of the printed circuit board 100 (dielectric layer 4) and used as a ground has been described, but the present invention is not limited to this example. For example, the present invention does not exclude a configuration in which a signal wiring pattern having a large number of holes is arranged in the intermediate layer of the dielectric layer 4 in the conductor layer 73 that transmits signals, thereby improving impedance and crosstalk.

[0044] Also, in this embodiment, the configuration is such that the holes in the entire conductor layer 73 are blocked when viewed from directly above the conductor layer 73. However, the present invention is effective even if it simply has a conductor layer with holes that do not completely block the entire layer when viewed from directly above the conductor layer 73. It is advisable to calculate through experiments, simulations, etc. how many holes remain when viewed from directly above the conductor layer 73 for the present invention to exhibit its effects.

[0045] <Second Embodiment> Next, the porous ground pattern of the printed circuit board according to the second embodiment of the present invention will be described with reference to FIG. 9. The overall configuration of the printed circuit board in this embodiment is the same as that of the first embodiment.

[0046] FIG. 9 is a top view showing an example of a printed circuit board according to the second embodiment of the present invention. FIG. 9 shows an example of a state in which only the porous ground pattern portion is cut out from the configuration of the printed circuit board and viewed from directly above (in the stacking direction) of the corresponding conductor layer 73. In this embodiment, the shape of the holes is circular. Also, among the holes 90 in the upper conductor layer 73 and the holes 91 in the lower conductor layer 73 in the porous ground pattern, it is characteristic that they are arranged so as not to overlap each other when viewed from above. Among the crosstalk characteristics in FIG. 8 described above, characteristic 82 of the present invention (2) is based on the second embodiment.

[0047] Also, the characteristics when the positions of the holes (lateral positions) in the upper conductor layer 73 and the lower conductor layer 73 are completely overlapped are the characteristics 81 of the present invention (1). In these two porous ground patterns, generally the same impedance characteristics results can be obtained. That is, by preventing the positions of the holes from overlapping in adjacent conductor layers 73, there is an effect of improving the shielding effect of the porous ground pattern composed of two layers by -40 dB.

[0048] As described above, in the circuit board according to the second embodiment (for example, the printed circuit board 100), the plurality of conductor layers (conductor layers 73) include a first conductor layer (for example, the upper layer side) including a first porous portion in which a plurality of holes (holes 90) are formed, and a second conductor layer (for example, the lower layer side) adjacent to the first conductor layer in the stacking direction. The second conductor layer includes a second porous portion in which a plurality of holes (holes 91) are formed so that the positions in the direction orthogonal to the stacking direction do not overlap with the plurality of holes (holes 90) formed in the first porous portion included in the first conductor layer.

[0049] Note that when the porous ground pattern 76 is composed of only one conductor layer 73 instead of two layers, since the positions of the holes cannot be shifted, only the effect (characteristic 81) of the present invention (1) can be obtained in FIG. 8.

[0050] In the present embodiment, the shape of the holes formed in the conductor layer 73 is described as a circle, but the shape of the holes is arbitrary. However, in order to minimize the path of the eddy current flowing around the holes to exhibit shielding properties, a circular shape is desirable. In the case of circular holes, the shielding effect can be obtained up to a higher frequency.

[0051] <Third Embodiment> Next, a printed circuit board according to the third embodiment of the present invention will be described with reference to FIG. 10.

[0052] FIG. 10 is a cross-sectional view showing an example of a printed circuit board 100A according to a third embodiment of the present invention. In the printed circuit board 100A, a filter component 2-1 and a filter component 2-2 are arranged on one surface and the other surface of a dielectric layer 74 (substrate body), respectively, so that part or all of them overlap when viewed from above. Further, for the filter component 2-1 and the filter component 2-2, in the conductor layer 73 of the inner layer of the printed circuit board 100A, from the surface layer to the intermediate layer, conductor pattern removal portions 75-1 and 75-2 are provided so that the conductor patterns (positions of holes in the upper layer and the lower layer) do not overlap directly below the filter components.

[0053] The conductor layer 73 has a total of N layers. Further, in the intermediate layer of the dielectric layer 74, a porous ground pattern 76 having a large number of holes is arranged in the conductor layer 73. This embodiment is characterized in that the conductor layer 73 in which the porous ground pattern 76 is formed is the N / 2 layer and the N / 2 + 1 layer when counted from the first layer on which the filter component 2-1 is mounted.

[0054] In this way, by providing the porous ground pattern 76 exactly in the middle two layers of the dielectric layer 74, the problem of impedance mismatch due to the conventional uniform shield layer can be solved for the filter components 2-1 and 2-2.

[0055] (When forming a porous ground pattern with a two-layer conductor layer) As described above, in the circuit board according to the third embodiment (for example, the printed circuit board 100A), the plurality of conductor layers (conductor layer 73) are composed of N layers, and the conductor layers located in the N / 2 layer and the (N / 2 + 1) layer from one surface layer of the dielectric layer (dielectric layer 74) correspond to the first conductor layer and the second conductor layer, and the other conductor layers include removal portions. For example, when there are 6-layer conductor layers 73, the conductor layers 73 of the third layer and the fourth layer have porous portions (porous ground pattern 76) when counted from one surface layer.

[0056] (When forming a porous ground pattern with a one-layer conductor layer) In addition, when the porous ground pattern 76 is formed only on one conductor layer 73, it can be configured as follows. In a printed circuit board, a plurality of conductor layers (conductor layer 73) are composed of N layers, and the conductor layer located in the N / 2-th layer or the (N / 2 + 1)-th layer from one surface layer of the dielectric layer (dielectric layer 74) includes a porous portion (porous ground pattern 76), and the other conductor layers include removal portions (conductor pattern removal portions 75-1, 75-2). For example, when there are six conductor layers 73, only the third conductor layer 73 counted from one surface layer has a porous portion (porous ground pattern 76).

[0057] <Fourth Embodiment> Next, a printed circuit board according to the fourth embodiment of the present invention will be described with reference to FIG. 11. FIG. 11 is a cross-sectional view showing an example of a printed circuit board 100B according to the fourth embodiment of the present invention. In the printed circuit board 100B, a filter component 2-1 and a filter component 2-2A are arranged on one surface and the other surface of the circuit board, respectively, so that part or all of them overlap when viewed from above. Here, when comparing the sizes of the filter component 2-1 and the filter component 2-2A, it is characteristic that the filter component 2-1 is larger. When utilizing a multi-pole connector in which different transmission standards are mixed, since the specifications of the filter components are also different, there are cases where it is necessary to mount filter components of different sizes on both sides in this way.

[0058] In addition, for the filter component 2-1 and the filter component 2-2A, in the conductor layer 73 of the inner layer of the printed circuit board, from the surface layer to the intermediate layer, conductor pattern removal portions 75-1A and conductor pattern removal portions 75-2A are provided so that the conductor patterns do not overlap directly below the filter components. In addition, the conductor layer 73 has a total of N layers.

[0059] Furthermore, in the intermediate layer, a porous ground pattern 76A with a large number of holes in the conductor pattern is arranged. The conductor layer on which this porous ground pattern 76A is arranged is characterized in that it is arranged in the (N / 2 + 1)-th layer or higher, counted from the first layer on which the larger-area filter component 2-1 is mounted. Generally, the larger the size of the filter component, the larger the area facing the conductor layer 73, and thus a larger parasitic capacitance will be generated. Therefore, it is desirable to provide the conductor pattern removal portion 75-1A deeper directly below the filter component with a large component size. This can solve the problem of impedance mismatch due to the conventional uniform shield layer for the filter components 2-1 and 2-2A.

[0060] (When forming a porous ground pattern with two conductor layers) As described above, in the circuit board (for example, the printed circuit board 100B) according to the fourth embodiment, the plurality of conductor layers (conductor layer 73) are composed of N layers. When the size of the first electronic component (filter component 2-1) in the direction orthogonal to the stacking direction is larger than that of the second electronic component (filter component 2-2A), the first conductor layer (for example, the upper layer side) and the second conductor layer (for example, the lower layer side) are located in the (N / 2 + 1)-th layer or higher from the surface layer on which the first electronic component of the dielectric layer (dielectric layer 74) is arranged, and the other conductor layers include removal portions (conductor pattern removal portions 75-1A and 75-2A). For example, when there are six conductor layers 73, the conductor layers 73 of the fourth and fifth layers have porous portions (porous ground pattern 76A) counted from one surface layer.

[0061] (When forming a porous ground pattern with one conductor layer) In the case where the porous ground pattern 76 is formed only on one conductor layer 73, it can be configured as follows. In a printed circuit board, when a plurality of conductor layers (conductor layer 73) are composed of N layers and the size of the first electronic component (filter component 2-1) in a direction orthogonal to the stacking direction is larger than that of the second electronic component (filter component 2-2A), the conductor layer located at the (N / 2 + 1)-th layer or above from the surface layer where the first electronic component of the dielectric layer (dielectric layer 74) is disposed includes a porous portion (porous ground pattern 76A), and the other conductor layers include removal portions (conductor pattern removal portions 75-1A, 75-2A). For example, when there are six conductor layers 73, only the conductor layer 73 of the fourth layer counted from one surface layer has a porous portion (porous ground pattern 76A).

[0062] <Fifth Embodiment> Next, a printed circuit board according to the fifth embodiment of the present invention will be described with reference to FIG. 12. FIG. 12 is a top view showing an example of a printed circuit board 100C according to the fifth embodiment of the present invention. The printed circuit board 100C in the ECU transmits signals from four coaxial cables to the communication LSI 16 mounted on the printed circuit board 100C. For this purpose, in the printed circuit board 100C, four signal lines from the housing-side four-pole connector 11 are connected to the communication LSI 16 using the surface-layer signal wirings 13-1 to 13-2 and the back-layer signal wirings 18-1 to 18-2 on the printed circuit board 100C.

[0063] Furthermore, among the four PoC filters (filter components) for performing PoC (Power over Coax) communication with power superimposition via a coaxial cable, two (filter components 14-2, 14-3) are mounted on the surface layer, and the remaining two (filter components 14-1, 14-4) are mounted on the back layer. At this time, by arranging the filter components 14-2, 14-3 and the corresponding filter components 14-1, 14-4 to overlap on both sides of the printed circuit board 100C, the size of the area occupied by the four filter components 14-1 to 14-4 can be suppressed to a spread comparable to the connector width.

[0064] In this configuration, for two sets of adjacent wirings to which the pins of the housing-side 4-pole connector 11 are connected, a pair of surface-layer wiring and back-surface wiring is formed, and a common porous ground pattern is formed in the inner layer for the filter components 14-1 to 14-4 connected to each of them.

[0065] As described above, in the circuit board (for example, printed circuit board 100C) according to the fifth embodiment, a multi-pole connector (for example, housing-side 4-pole connector 11) capable of connecting a plurality of coaxial cables and a communication circuit (communication LSI 16) are mounted on the circuit board. In this circuit board, the number of poles M (for example, 4 poles) of the multi-pole connector is a multiple of 2, and the multi-pole connector and the communication circuit are connected by the same number of signal wirings (signal wirings 13-1 to 13-2, 18-1 to 18-2) as the number of poles M, and one or more electronic components are connected to each of the signal wirings. One of the electronic components (filter components 14-2, 14-3) connected to adjacent signal wirings among the electronic components is mounted on the surface of the dielectric layer (dielectric layer 74), and the other electronic component (filter components 14-1, 14-4) connected to adjacent signal wirings among the electronic components is mounted on the back surface of the dielectric layer, and the positions of the electronic components mounted on the surface and the back surface of the dielectric layer in the direction orthogonal to the lamination direction of the conductor layer (conductor layer 73) overlap.

[0066] With such a configuration, the printed circuit board 100C according to the present embodiment can connect between the housing-side 4-pole connector 11 and the communication LSI 16 while mounting the filter components 14-1 to 14-4 at high density. In this example, a common porous ground pattern 76-1 is formed in the inner layer for the filter component 14-1 and the filter component 14-2, and a common porous ground pattern 76-2 is separately formed in the inner layer for the filter component 14-3 and the filter component 14-4.

[0067] Note that in this embodiment, a 4-pole connector is described as an example, but the number of channels (number of poles) is not limited to this example and may be 2 poles, 3 poles, or 4 poles or more.

[0068] <Sixth Embodiment> Next, a printed circuit board according to the sixth embodiment of the present invention will be described with reference to FIG. 13. FIG. 13 is a top view showing an example of a printed circuit board 100D according to the sixth embodiment of the present invention. The printed circuit board 100D in the ECU transmits signals from differential cables for two channels to a communication LSI 16 mounted on the printed circuit board 100D. For this purpose, the printed circuit board 100D in the ECU is connected to the communication LSI 16 using surface layer differential pair wiring 131 and back layer differential pair wiring 132 on the printed circuit board 100D for two pairs of differential signal wirings from the housing side two-pole differential connector 130.

[0069] Note that the connection from the surface layer to the back layer is switched using differential signal connection vias 133-1 and 133-2. In differential cable communication, in order to cut common mode components that are factors of noise radiation and immunity (Electromagnetic Susceptibility: EMS), it is common to insert a common mode choke coil between the housing side two-pole differential connector 130 and the communication LSI 16. The common mode choke coil is a four-terminal component and includes two pairs of coils.

[0070] In this configuration, a filter component 134-1 composed of a common mode choke coil for surface layer differential wiring is mounted on the surface layer, and a filter component 134-2 composed of a common mode choke coil for back layer differential wiring is mounted on the back layer. Then, by arranging these filter components 134-1 and 134-2 so that their lateral positions overlap on both sides of the printed circuit board 100D, it is possible to suppress the spread to about the same width as the connector width.

[0071] In this configuration, for two pairs of differential pair wirings 131 and 132 adjacent to the pins of the housing-side two-pole differential connector 130, a pair of surface wiring and back surface wiring is formed, and a common porous ground pattern is formed in the inner layer for the filter components 134-1 and 134-2 connected to each of them. The surface filter component 134-1 is connected to the housing-side two-pole differential connector 130 and the communication LSI 16 by the differential pair wiring 131. Also, the back surface filter component 134-2 is connected to the housing-side two-pole differential connector 130 by the differential pair wiring 132 via the differential signal connection via 133-1, and is connected to the communication LSI 16 by the differential pair wiring 132 via the differential signal connection via 133-2.

[0072] As described above, in the circuit board (for example, the printed circuit board 100D) according to the sixth embodiment, a multi-pole differential connector (for example, the housing-side two-pole differential connector 130) to which a plurality of differential cables can be connected and a communication circuit (communication LSI 16) are mounted on the circuit board. In this circuit board, the number of differential pairs M (for example, two pairs) of the multi-pole differential connector is a multiple of 2, and the multi-pole differential connector and the communication circuit are connected by the same number of differential pair wirings (differential pair wirings 131 and 132) as the number of differential pairs M, and one or more electronic components are connected to each of the differential pair wirings. One of the electronic components (filter component 134-1) connected to the adjacent differential pair wirings among the electronic components is mounted on the surface of the dielectric layer, and the other electronic component (filter component 134-2) connected to the adjacent differential pair wirings among the electronic components is mounted on the back surface of the dielectric layer, and the positions of the electronic components mounted on the surface and the back surface of the dielectric layer in the direction orthogonal to the stacking direction of the conductor layers overlap.

[0073] With such a configuration, the printed circuit board 100D according to the present embodiment can connect between the housing-side two-pole differential connector 130 and the communication LSI 16 while mounting the filter components 134-1 and 134-2 at high density. In this example, a common porous ground pattern 76 is formed in the inner layer for the filter component 134-1 and the filter component 134-2.

[0074] In the present embodiment, an example in which there are two pairs of differential pair wirings has been described. However, the present invention is not limited to this example, and the number of pairs of differential pair wirings may be three or more.

[0075] <Seventh Embodiment> Next, a printed circuit board according to the seventh embodiment of the present invention will be described with reference to FIG. 14. In particular, a suitable example of the size of the holes formed in the porous ground pattern will be described.

[0076] FIG. 14 is a top view showing an example of a printed circuit board according to the seventh embodiment of the present invention and a diagram showing an example of the effect of the hole size. FIG. 14 shows an example of a state seen from directly above the corresponding conductor layer 73 by cutting out only the porous ground pattern portion from the configuration of the printed circuit board. In this embodiment, the shape of the holes is circular. Further, among the porous ground patterns 76B, the holes 90 in the upper conductor layer 73 and the holes 91 in the lower conductor layer 73 are arranged so as not to overlap each other when viewed from above.

[0077] Here, below FIG. 14, a graph showing the crosstalk characteristics when the diameters of the holes 90 and 91 are changed in the range of, for example, 0.5 to 2.0 mm is shown. Similar to FIG. 8 described above, the characteristic 87 is an example in the case of the prior art (1). As can be seen from this graph, it can be seen that the smaller the hole diameter, the greater the crosstalk reduction effect. As can be seen from the graph below FIG. 14, when the hole diameter is Φ2.0 mm or less, a certain amount of crosstalk reduction effect is obtained with respect to the prior art (1), and this hole size becomes one index. For example, in the vicinity of 20 GHz where the crosstalk increases rapidly, it is desirable that the diameter of the hole be 1.0 mm or less in consideration of the margin.

[0078] <Eighth Embodiment> Next, a printed circuit board according to the eighth embodiment of the present invention will be described with reference to FIG. 15. In particular, a suitable example of the porous ground pattern and the size of the holes formed therein will be described.

[0079] FIG. 15 is a top view showing an example of a printed circuit board according to the eighth embodiment of the present invention. FIG. 15 shows an example of a state seen from directly above the corresponding conductor layer 73, with only the porous ground pattern portion cut out from the configuration of the printed circuit board. In this embodiment, the shape of the holes is circular. Also, among the porous ground patterns, the holes 90-1 and 90-2 in the upper layer and the holes 91-1 and 91-2 in the lower layer are arranged so as not to overlap each other when viewed from above.

[0080] Here, in FIG. 15, the component mounting area 150 is indicated by a dashed line. It is a feature of this embodiment that the diameter of the porous ground pattern directly under the component mounting area and the diameter of the porous ground pattern arranged around it are different as shown in FIG. 15. The diameters Φ_1 of the holes 90-2 and 91-2 inside the component mounting area 150 are smaller than the diameters Φ_2 of the holes 90-1 and 91-1 outside.

[0081] As an effect of such a configuration, while maintaining the crosstalk reduction effect, the impedance decrease due to parasitic capacitance can be suppressed lower. As shown above, since the smaller the hole diameter, the greater the crosstalk reduction effect, it is better for the ground hole diameter directly under the component arrangement to be smaller. On the other hand, considering the electric field coupling between the filter component and the conductor pattern, due to the fringe effect, the electric force lines spread outward. Therefore, the coupling due to the electric force lines that spread outward can be effectively reduced. Thereby, this embodiment has the effect of suppressing the decrease in the parasitic capacitance component even lower.

[0082] As described above, in the printed circuit board according to this embodiment, in the porous ground pattern 76B, the diameter of the holes (holes 90-2, 91-2) outside the region overlapping the electronic component is larger than the diameter of the holes (holes 90-2, 91-2) within the region where the position in the direction orthogonal to the stacking direction of the conductor layer 73 overlaps the electronic component.

[0083] As described above, this specification has been explained on the premise of an in-vehicle ECU (in-vehicle device), but the present invention is an invention that can also be applied to other applications using a similar communication system. For example, the present invention can similarly exhibit effects in communication between an industrial robot and an electronic camera.

[0084] Note that the present invention is not limited to the above-described embodiments, and it is needless to say that various other modifications and application examples can be adopted without departing from the gist of the invention described in the claims. For example, the above-described embodiments have described the configuration in detail and specifically for easy understanding of the present invention, and are not necessarily limited to those having all the components described. Also, it is possible to replace a part of the configuration of one embodiment with a component of another embodiment. Further, it is possible to add a component of another embodiment to the configuration of one embodiment. Also, it is possible to add, replace, or delete other components to a part of the configuration of each embodiment.

[0085] Also, in the above-described embodiments, the control lines and information lines show those considered necessary for explanation, and not necessarily all the control lines and information lines on the product are shown. In fact, it may be considered that almost all components are interconnected.

[0086] The positions, sizes, shapes, ranges, etc. of the components shown in the drawings may not represent the actual positions, sizes, shapes, ranges, etc. in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, ranges, etc. disclosed in the drawings.

[0087] Also, in this specification, terms such as "parallel" and "orthogonal" are used, but each term does not mean only strict "parallel" and "orthogonal", but includes strict "parallel" and "orthogonal", and further includes the meanings of "substantially parallel" and "substantially orthogonal" within the range where their functions can be exerted.

Explanation of Reference Numerals

[0088] 100, 100A to 100D... printed circuit boards, 2-1, 2-2... filter components, 73... conductor layer, 74... dielectric layer, 75-1, 75-2... conductor pattern removal parts, 76... porous ground pattern

Claims

1. A circuit board in which a plurality of conductor layers having conductor patterns formed inside a dielectric layer are laminated, and a plurality of electronic components to which signal wirings for transmitting signals are connected are arranged on the surface layer of the dielectric layer, wherein a first electronic component is arranged on one surface layer of the dielectric layer, and a second electronic component is arranged on the other surface layer of the dielectric layer at a position where at least a part thereof overlaps with the first electronic component in a direction orthogonal to the lamination direction of the conductor layers, wherein the plurality of conductor layers include, a removed portion where the conductor pattern is removed in a range where the first electronic component and the second electronic component in the direction orthogonal to the lamination direction overlap, and a porous portion in which a plurality of holes are formed in a range where the first electronic component and the second electronic component in the direction orthogonal to the lamination direction overlap. A circuit board.

2. The plurality of conductor layers include a first conductor layer including a first porous portion in which a plurality of holes are formed, and a second conductor layer adjacent to the first conductor layer in the lamination direction, wherein the second conductor layer includes a second porous portion in which a plurality of holes are formed so that positions in a direction orthogonal to the lamination direction do not overlap with the plurality of holes formed in the first porous portion included in the first conductor layer. The circuit board according to claim 1.

3. The plurality of conductor layers are composed of N layers, wherein the conductor layer located at the N / 2-th layer or the (N / 2 + 1)-th layer from one surface layer of the dielectric layer includes the porous portion, and the other conductor layers include the removed portion. The circuit board according to claim 1.

4. The plurality of conductor layers are composed of N layers, wherein the conductor layers located at the N / 2-th layer and the (N / 2 + 1)-th layer from one surface layer of the dielectric layer correspond to the first conductor layer and the second conductor layer, and the other conductor layers include the removed portion. The circuit board according to claim 2.

5. The plurality of conductor layers are composed of N layers, wherein when the size of the first electronic component in the direction orthogonal to the lamination direction is larger than that of the second electronic component, the conductor layer located at the (N / 2 + 1)-th layer or higher from the surface layer on which the first electronic component of the dielectric layer is arranged includes the porous portion, and the other conductor layers include the removed portion. The circuit board according to claim 1.

6. The plurality of conductor layers are composed of N layers, When the size of the first electronic component in the direction orthogonal to the stacking direction is larger than that of the second electronic component, the first conductor layer and the second conductor layer are located in the (N / 2 + 1)-th layer or higher from the surface layer where the first electronic component of the dielectric layer is disposed, and the other conductor layers include the removal portions. The circuit board according to claim 2.

7. A multi-pole connector capable of connecting a plurality of coaxial cables and a communication circuit are mounted on the circuit board. The number of poles M of the multi-pole connector is a multiple of 2. The multi-pole connector and the communication circuit are connected by the same number of signal wirings as the number of poles M. One or more of the electronic components are connected to each of the signal wirings. One of the electronic components connected to the adjacent signal wirings among the electronic components is mounted on the surface of the dielectric layer. The other of the electronic components connected to the adjacent signal wirings among the electronic components is mounted on the back surface of the dielectric layer. The positions of the electronic components mounted on the front and back surfaces of the dielectric layer in the direction orthogonal to the stacking direction of the conductor layers overlap. The circuit board according to claim 1.

8. A multi-pole differential connector capable of connecting a plurality of differential cables and a communication circuit are mounted on the circuit board. The number of differential pairs M of the multi-pole differential connector is a multiple of 2. The multi-pole differential connector and the communication circuit are connected by the same number of differential pair wirings as the number of differential pairs M. One or more of the electronic components are connected to each of the differential pair wirings. One of the electronic components connected to the adjacent differential pair wirings among the electronic components is mounted on the surface of the dielectric layer. The other of the electronic components connected to the adjacent differential pair wirings among the electronic components is mounted on the back surface of the dielectric layer. The positions of the electronic components mounted on the front and back surfaces of the dielectric layer in the direction orthogonal to the stacking direction of the conductor layers overlap. The circuit board according to claim 1.

9. The shape of the holes in the porous portion is circular. The diameter of the holes is 2.0 mm or less. The circuit board according to claim 1.

10. The shape of the holes in the porous portion is circular. The diameter of the holes outside the region overlapping the electronic component is larger than the diameter of the holes within the region overlapping the electronic component in the direction orthogonal to the stacking direction. The circuit board according to claim 2.

11. An electronic control device comprising a circuit board in which a plurality of conductor layers each having a conductor pattern formed therein are laminated, and a plurality of electronic components to which signal wirings for transmitting signals are connected are disposed on a surface layer of the dielectric layer, a first electronic component is disposed on one surface layer of the dielectric layer, a second electronic component is disposed at a position where at least a part thereof overlaps with the first electronic component in a direction orthogonal to the lamination direction of the conductor layers on the other surface layer of the dielectric layer, the plurality of conductor layers include a removal portion in which the conductor pattern is removed in a range where the first electronic component and the second electronic component in a direction orthogonal to the lamination direction overlap, and a porous portion in which a plurality of holes are formed in a range where the first electronic component and the second electronic component in a direction orthogonal to the lamination direction overlap, an electronic control device.

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