Electronic device and manufacturing method for electronic device

Abstract

To enable mounting of components on a substrate with high density without causing electric failure.SOLUTION: An electronic device includes semiconductor chips 20 and 21, and a circuit plate 12 having a front surface covered with a plating film 12a and having the semiconductor chips 20 and 21 disposed through first and second solders 16a and 16b in a predetermined component region on the front surface. The electronic device includes a liquid-repellent part 14 along a side part of the component region on the circuit plate 12. Therefore, the spread of the first and second solders 16a and 16b can be suppressed by forming the liquid-repellent part 14 between the semiconductor chips 20 and 21 while shortening the distance between the semiconductor chips 20 and 21.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to an electronic device in which components are soldered to a substrate and a method for manufacturing the electronic device.

Background Art

[0002] A semiconductor device, which is an example of an electronic device, includes a power device and is used as a power conversion device. The power device is, for example, a semiconductor chip including an IGBT (Insulated Gate Bipolar Transistor) or a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Such a semiconductor device includes the semiconductor chip and a ceramic circuit board on which the semiconductor chip is disposed via solder. The ceramic circuit board includes an insulating board and a plurality of circuit boards formed on the insulating board. The semiconductor chip is disposed via solder on any one of the plurality of circuit boards. Further, a slit may be formed around the component region of the semiconductor chip on the circuit board. Such a slit has functions such as alignment of the semiconductor chip and suppression of the spread of solder.

[0003] In such a semiconductor device, a semiconductor chip is placed on a circuit board of a ceramic circuit board via solder, and the solder is melted and solidified to fix the semiconductor chip to the circuit board. However, the melted solder flows out of the component area of the semiconductor chip. Furthermore, the flowed-out solder may even cross the slit. Therefore, various techniques have been proposed to prevent the outflow of solder. For example, a solder flow prevention part made of linear oxide is formed along the semiconductor chip on the circuit board (see, for example, Patent Document 1). Also, plating is formed on the surface of the circuit board, and a portion where solder does not wet is formed around the component area of the semiconductor chip of the plating (see, for example, Patent Document 2). Also, in a copper film on an insulating substrate, a copper oxide film is formed at a location where the semiconductor chip is not placed (see, for example, Patent Document 3). Also, a first region and a second region with lower solder wettability than the first region are respectively formed around a semiconductor chip joined by solder on the mounting surface of a mounting member (see, for example, Patent Document 4). Also, even when a ceramic circuit board is placed on a metal base plate via solder, a dam material is formed around the component area of the ceramic circuit board (see, for example, Patent Documents 5 and 6). Also, a partition layer is formed around the component area of the semiconductor chip of a mounting member on which the semiconductor chip is mounted via solder (see, for example, Patent Document 7). Furthermore, laser irradiation is performed around the semiconductor chip of a lead on which the semiconductor chip is placed, a groove is formed around the semiconductor chip, and an oxidized region is generated on both sides of the groove. The wall surface of the groove is composed of a part of the oxidized mother substrate and the oxidized plating material (see, for example, Patent Document 8).

[0004] Such a semiconductor device further has the semiconductor chip and the ceramic circuit board sealed by a sealing member. In the semiconductor device, in order to enhance the adhesion between the sealing member and the ceramic circuit board, an anchor layer formed by linear recesses is formed around the semiconductor chip on the circuit board (see, for example, Patent Document 9).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Patent Document 6

Patent Document 7

Patent Document 8

Patent Document 9

Summary of the Invention

Problems to be Solved by the Invention

[0006] In recent years, miniaturization and large capacity of semiconductor devices have been required. And, the mounting density of semiconductor chips has been improved, and the interval between semiconductor chips has been narrowed. For this reason, it has become difficult to form a member for restricting the outflow of solder between semiconductor chips. When the solder under the semiconductor chip melts, there is a high possibility that the semiconductor chips are bonded to each other and contact failure of the semiconductor chips occurs. For this reason, the reliability of the semiconductor device also decreases.

[0007] The present invention has been made in view of such points, and an object thereof is to provide an electronic device and a method for manufacturing an electronic device capable of mounting components on a substrate at high density without causing electrical defects.

Means for Solving the Problems

[0008] According to one aspect of the present invention, there are provided a plurality of first components which are semiconductor chips rectangular in plan view, and a circuit board whose front surface is coated with a plating film, and the plurality of first components are arranged in a line in one direction via a first solder in a first component region on the front surface. The front surface of the circuit board includes an oxide film formed by oxidizing the plating film along a side portion of the first component region of the circuit board, and a part of the plating film remains under the oxide film. The front surface includes a resist portion formed along the side portion of the first component region in plan view, and heat affected regions formed along the resist portion on both sides of the resist portion. The resist portion is formed with a liquid repellent portion that is separated from the first component by 300 μm or more. Only the long sides of the plurality of first components are adjacent to the liquid repellent portion in parallel with the forming direction in the one direction, and the short sides of the plurality of first components are arranged along the one direction without facing the liquid repellent portion. An electronic device and a method for manufacturing an electronic device are provided.

Advantages of the Invention

[0009] According to the disclosed technology, it is possible to provide an electronic device and a method for manufacturing an electronic device in which components can be mounted on a substrate at a high density without causing electrical defects and a decrease in reliability is suppressed.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Mode for Carrying Out the Invention

[0011] Hereinafter, embodiments will be described with reference to the drawings. In the following description, "front surface" and "upper surface" refer to the surface facing upward in the electronic device 50 of FIG. 1. Similarly, "up" refers to the upper direction in the electronic device 50 of FIG. 1. "Back surface" and "lower surface" refer to the surface facing downward in the electronic device 50 of FIG. 1. Similarly, "down" refers to the lower direction in the electronic device 50 of FIG. 1. The same directionality is meant in other drawings as necessary. "Front surface", "upper surface", "up", "back surface", "lower surface", "down", "side surface" are merely convenient expressions for specifying relative positional relationships and do not limit the technical idea of the present invention. For example, "up" and "down" do not necessarily mean the vertical direction with respect to the ground. That is, the directions of "up" and "down" are not limited to the direction of gravity.

[0012] The electronic device according to the embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a side view showing the electronic device according to the embodiment, and FIG. 2 is a plan view showing the electronic device according to the embodiment. In the present embodiment, the case where the electronic device is a semiconductor device will be described as an example. Further, in FIG. 1, the sealing member is represented by a broken line, and in FIG. 2, the illustration of the sealing member is omitted. Also, the description of the case for housing the ceramic circuit board 10 and the like in the electronic device 50 is omitted. In the present embodiment, the plurality of circuit boards 12, the plurality of semiconductor chips 20, 21, the plurality of contact components 30, the plurality of bonding wires 15, and the plurality of external connection terminals 40 will be described with the same reference numerals without distinction. Note that, for other configurations as well, those having a plurality will be described with the same reference numerals without distinction using the same reference numerals.

[0013] As shown in FIGS. 1 and 2, the electronic device 50 includes a ceramic circuit board 10 and semiconductor chips 20, 21 joined to the front surface of the ceramic circuit board 10. The electronic device 50 has contact components 30 joined to the front surface of the ceramic circuit board 10. The semiconductor chips 20, 21 and the contact components 30 are joined to the front surface of the ceramic circuit board 10 via solder (not shown) which is a joining member. Further, the electronic device 50 has bonding wires 15 that electrically connect the front surface of the ceramic circuit board 10 and the main electrodes of the semiconductor chips 20, 21. Also, external connection terminals 40 are press-fitted and attached to the contact components 30. Furthermore, the electronic device 50 is sealed with a sealing member 45 such that the tip portions of the external connection terminals 40 attached to the contact components 30 protrude together with the semiconductor chips 20, 21 on the front surface of the ceramic circuit board 10.

[0014] The ceramic circuit board 10 has an insulating board 11, a plurality of circuit boards 12 formed on the front surface of the insulating board 11, and a metal plate 13 formed on the back surface of the insulating board 11. The insulating board 11 is made of a material with excellent thermal conductivity. Such a material is a ceramic with high thermal conductivity. The ceramics are, for example, aluminum oxide, aluminum nitride, and silicon nitride. Also, the thickness of the insulating board 11 is 0.5 mm or more and 2.0 mm or less. The plurality of circuit boards 12 are made of a base material with excellent conductivity. Such a material is, for example, copper or a copper alloy. And, in order to improve the corrosion resistance of the surface of the circuit board 12, a plating film 12a (see FIG. 4) is formed by plating. The plating material used for the plating film is, for example, nickel or a nickel alloy. As the nickel alloy, a nickel-phosphorus alloy and a nickel-boron alloy are preferable. The metal plate 13 is made of a metal with excellent thermal conductivity. Such a metal is, for example, aluminum, iron, silver, copper, or an alloy containing at least one of these. The thickness of the metal plate 13 is 0.1 mm or more and 2.0 mm or less. A plating film may be formed on the surface of the metal plate 13 by plating in order to improve the corrosion resistance. The plating material used for the plating film is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. Also, a cooling module (not shown) may be attached to the back surface of the metal plate 13. Note that the insulating board 11 is, for example, rectangular in plan view. Also, the metal plate 13 is rectangular in plan view, with an area smaller than that of the insulating board 11 and larger than the total area of the circuit boards 12. Therefore, the ceramic circuit board 10 is, for example, rectangular in shape.

[0015] On the circuit board 12, a liquid repellent portion 14 is appropriately formed. The liquid repellent portion 14 is formed in the gap of the component region where the semiconductor chips 20 and 21 of the circuit board 12 are arranged. Also, the liquid repellent portion 14 is formed in the gap between the semiconductor chip 20 and the contact component 30 (external connection terminal 40). Further, the liquid repellent portion 14 is formed in the gap between the semiconductor chip 21 and the end portion of the circuit board 12 (the region where the bonding wire 15 is joined). Such a liquid repellent portion 14 is formed along the longitudinal direction or the short side direction of the ceramic circuit board 10. Note that the formation location and the formation direction of the liquid repellent portion 14 are examples, and it can be formed at a location and in a direction as required. The details of the liquid repellent portion 14 will be described later.

[0016] As the ceramic circuit board 10 having such a configuration, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate can be used. Also, a cooling module (not shown) may be attached to the back surface of the metal plate 13 of the ceramic circuit board 10 via a heat conductive bonding material. Thereby, the heat dissipation property of the electronic device 50 can be further improved. Note that the heat conductive bonding material is, for example, thermal grease, solder, or silver brazing alloy. Thermal grease is, for example, silicone mixed with a filler of metal oxide. A cooling module made of a metal excellent in heat conduction is applied. Such a metal is, for example, aluminum, iron, silver, copper, or an alloy containing at least one of these. Also, the cooling module has, for example, a heat sink having one or a plurality of fins and is a cooling device using a liquid refrigerant.

[0017] The semiconductor chip 20 includes switching elements such as IGBTs and power MOSFETs, which are made of silicon or silicon carbide. Such a semiconductor chip 20 has a rectangular shape in plan view. For example, a drain electrode (or collector electrode) as a main electrode is provided on the back surface, and a gate electrode and a source electrode (or emitter electrode) as control electrodes and main electrodes are provided on the front surface. Note that the gate electrode is provided at the center of the short side of the front surface of the semiconductor chip 20. The semiconductor chip 21 includes a diode. The diode is a FWD (Free Wheeling Diode) such as an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode. Such a semiconductor chip 21 is provided with a cathode electrode as a main electrode on the back surface and an anode electrode as a main electrode on the front surface. The back surfaces of the above semiconductor chips 20 and 21 are joined onto a predetermined circuit board (not shown). Note that the semiconductor chips 20 and 21 are joined onto the circuit board 12 via solder (not shown). The solder will be described later. Although not shown, instead of the semiconductor chips 20 and 21, an RC (Reverse-Conducting)-IGBT having the functions of an IGBT and an FWD may be used. An electronic component 22 is provided so as to straddle a pair of circuit boards 12. The electronic component 22 is, for example, a thermistor or a current sensor. Note that the thickness of such semiconductor chips 20 and 21 is, for example, 180 μm or more and 220 μm or less, and the average is about 200 μm.

[0018] The bonding wire 15 electrically connects between the semiconductor chips 20 and 21 and the circuit board 12, or between the plurality of semiconductor chips 20 and 21 as appropriate. Such a bonding wire 15 is made of a material having excellent conductivity. Such a material is, for example, gold, silver, copper, aluminum, or an alloy containing at least one of these. The diameter of the bonding wire 15 through which a control current flows is, for example, 110 μm or more and 200 μm or less. The diameter of the bonding wire 15 through which a main current flows may be, for example, 350 μm or more and 600 μm or less.

[0019] The contact component 30 includes a main body portion having a cylindrical through-hole formed therein and flanges respectively provided at the open end portions of the main body portion. This through-hole may have a cylindrical shape or a polygonal prism shape. The contact component 30 is made of a metal with excellent conductivity. Such a metal is, for example, silver, copper, nickel, or an alloy containing at least one of these. To improve the corrosion resistance of the surface of the contact component 30, a plating film may be formed by plating treatment. The plating material used for the plating film is, for example, nickel, nickel-phosphorus alloy, nickel-boron alloy.

[0020] The external connection terminal 40 has a rod-shaped main body portion and tapered tip portions respectively formed at both ends of the main body portion. The main body portion has a prismatic shape. The length of the diagonal of the cross-section of the external connection terminal 40 is several percent longer than the diameter of the main body portion of the contact component 30. Therefore, the external connection terminal 40 can be press-fitted into the contact component 30. Also, the external connection terminal 40 is also made of a metal with excellent conductivity. Such a metal is, for example, silver, copper, nickel, or an alloy containing at least one of these. To improve the corrosion resistance of the surface of the external connection terminal 40, a plating film may be formed by plating treatment. The plating material used for the plating film is preferably nickel or an alloy containing nickel. Examples of the alloy containing nickel are nickel-phosphorus alloy and nickel-boron alloy.

[0021] Also, the solder for joining the semiconductor chips 20, 21 and the contact component 30 to the circuit board 12 is based on lead-free solder. The lead-free solder mainly consists of, for example, at least one of alloys composed of tin and silver, alloys composed of tin and antimony, alloys composed of tin and zinc, and alloys composed of tin and copper. Further, the solder may contain additives. The additives are, for example, copper, bismuth, indium, nickel, germanium, cobalt or silicon. Also, it is preferable that the solder for joining the semiconductor chips 20, 21 and the solder for joining the contact component 30 have different solder compositions. In this case, the solder for joining the semiconductor chips 20, 21 is less likely to generate voids and has high temperature resistance. For example, such solder is an alloy mainly composed of tin and antimony. The solder for joining wiring terminals such as the contact component 30 has a lower elastic modulus than the solder under the semiconductor chips 20, 21. The solder under the contact component 30 is, for example, an alloy mainly composed of tin and silver. Also, the solder for joining the semiconductor chips 20, 21 may be thinner than the solder for joining the contact component 30. The thickness of the solder under the semiconductor chips 20, 21 is 0.05 mm or more and 0.25 mm or less. The thickness of the solder under the contact component 30 is 0.10 mm or more and 0.50 mm or less. Since the solder under the semiconductor chips 20, 21 has a higher elastic modulus than the solder under the contact component 30, the thickness of the solder of the semiconductor chips 20, 21 can be made thinner than that of the solder of the contact component 30. Therefore, heat generated by the semiconductor chips 20, 21 during the operation of the electronic device 50 can be dissipated well. As described above, the solder under the contact component 30 is thick. Therefore, the solder under the contact component 30 can withstand the stress when inserting the external connection terminal 40 into the through hole of the contact component 30, and can suppress the occurrence of cracks and peeling in the solder. Therefore, damage to the electronic device 50 can be prevented.

[0022] The sealing member 45 may be, for example, silicone gel. Further, for example, it includes a thermosetting resin such as an epoxy resin, a phenol resin, a maleimide resin, and a filler contained in the thermosetting resin. As an example of such a sealing member 45, it includes an epoxy resin and fillers such as silicon dioxide, aluminum oxide, boron nitride, or aluminum nitride as a filler in the epoxy resin.

[0023] Next, the liquid repellent portion 14 formed on the circuit board 12 will be described with reference to FIGS. 3 and 4. FIG. 3 is a plan view of the circuit board included in the electronic device of the embodiment, and FIG. 4 is a cross-sectional view of the circuit board included in the electronic device of the embodiment. Note that FIG. 3 shows an enlarged view of the broken line area in the circuit board 12 of FIG. 2. Further, FIG. 4 is a cross-sectional view taken along the dashed-dotted line Y-Y in FIG. 3. Note that FIGS. 3 and 4 show the plating film 12a formed on the surface of the circuit board 12.

[0024] The liquid-repellent portion 14 shown in FIG. 3 is linearly formed on the plating film 12a between the pair of semiconductor chips 20 and 21. In FIG. 3, three sets of the pair of semiconductor chips 20 and 21 are provided. Further, the long side of the semiconductor chip 20 is arranged along the formation direction of the liquid-repellent portion 14 described later. At this time, the semiconductor chip 20 is arranged such that the short side provided with the gate electrode does not face the liquid-repellent portion 14. When the long side of the semiconductor chip 20 is along the formation direction of the liquid-repellent portion 14, the position of the semiconductor chip 20 is more likely to be stable because the end of the solder is restricted in position at a longer distance compared to the case where the short side is along the formation direction of the liquid-repellent portion 14. The semiconductor chip 20 may be arranged so that the side provided with the gate electrode does not face the liquid-repellent portion 14 in consideration of the arrangement position of the wire. The liquid-repellent portion 14 can repel solder. Such a liquid-repellent portion 14 includes a resist portion 14a and a heat-affected region 14b. The resist portion 14a is an oxide film. The oxide film is, for example, a nickel oxide film. Such a resist portion 14a is formed by performing laser irradiation on the plating film 12a so that the plating film 12a is oxidized. The laser irradiation may be either a seam laser that continuously emits laser light or a spot laser that irradiates pulsed laser light. FIG. 3 shows the case of laser irradiation by a seam laser. Therefore, the liquid-repellent portion 14 in FIG. 3 is a linear (dotted line in the case of a spot laser) laser mark in plan view. Further, as described later, the liquid-repellent portion 14 is formed by laser scanning of laser irradiation. In particular, the resist portion 14a is formed by a plurality of laser marks formed in contact with each other or partially overlapping along each other for each laser scan. The resist portion 14a formed in this way preferably has a thickness of 40 nm or more before solder bonding. And the thickness of the resist portion 14a (oxide film) after solder bonding is preferably 25 nm or more. The reason why the thickness of the resist portion 14a (oxide film) decreases before and after solder bonding is considered to be that the oxide film is partially reduced by the flux contained in the solder. Also, the width of the resist portion 14a can be at least 150 μm.

[0025] The heat-affected region 14b is an oxide film formed along the resist portion 14a. As described above, in order to form the resist portion 14a, laser scanning by laser irradiation is performed on the plating film 12a. At this time, with the formation of the resist portion 14a, the plating films 12a on both sides of the resist portion 14a are affected by the heat of the laser. In this way, the heat-affected regions 14b are formed on both sides of the resist portion 14a. Further, the width of the heat-affected region 14b increases as the output of the laser for forming the resist portion 14a increases. Also, as the width of the resist portion 14a is increased, the width of the heat-affected region 14b also increases. However, when the width of the resist portion 14a becomes equal to or greater than a predetermined value, the width of the heat-affected region 14b also becomes constant. Such a heat-affected region 14b, as shown in FIG. 4, the influence of the heat by the laser decreases as it moves away from the resist portion 14a.

[0026] The liquid repellency of the liquid repellent portion 14 having such a configuration is higher in the resist portion 14a than in the heat-affected region 14b. Further, the liquid repellency of the heat-affected region 14b is higher on the resist portion 14a side than on the outer side. For this reason, as shown in FIG. 4, although the first and second solders 16a and 16b somewhat reach the outside of the liquid repellent portion 14, the first and second solders 16a and 16b cannot reach the central portion including the resist portion 14a. Also, since such a liquid repellent portion 14 is formed by laser irradiation, there are also portions where a part of the plating film 12a remains under the liquid repellent portion 14. The total thickness of the liquid repellent portion and the portion where a part of the plating film remains is preferably 6 μm or more. The thickness of the portion where a part of the plating film remains under the liquid repellent portion is preferably 5 μm or more.

[0027] Note that the formation of the liquid repellent portion 14 on the semiconductor chips 20 and 21 shown in FIG. 3 is an example. The resist portion 14a of the liquid repellent portion 14 is formed on the plating film 12a under the following conditions. First, the resist portion 14a is preferably at least 0.3 mm or more away from the semiconductor chips 20 and 21. Also, the resist portion 14a is preferably 0.5 mm or more away from the end of the circuit board 12. The width of the resist portion 14a is preferably 0.4 mm or more and 0.5 mm or less. However, when it is difficult for the resist portion 14a to be 0.3 mm or more away from the semiconductor chips 20 and 21, and when it is difficult for the resist portion 14a to be 0.5 mm or more away from the end of the circuit board 12, the width of the resist portion 14a is preferably 0.15 mm or more. Also, when the end of the resist portion 14a is 0.5 mm or more away from the end of the circuit board 12, its length preferably extends up to 1.0 mm at most from the end face of the semiconductor chips 20 and 21. Also, the resist portion 14a is preferably 0.3 mm or more away from the contact component 30. When the distance cannot be 0.3 mm or more, the width of the resist portion 14a is preferably 0.1 mm or more and 0.2 mm or less.

[0028] Next, regarding the manufacturing method of such an electronic device 50, each step will be described with reference to FIGS. 6 to 10 showing each step, along the flowchart shown in FIG. 5. FIG. 5 is a diagram showing a flowchart of the manufacturing method of the electronic device according to the embodiment. FIG. 6 is a plan view of the ceramic circuit board included in the electronic device according to the embodiment. FIG. 7 is a plan view showing the step of applying solder in the manufacturing method of the electronic device according to the embodiment. FIGS. 8 to 10 are plan views of the reflow soldering step of the manufacturing method of the electronic device according to the embodiment, corresponding to the portion of FIG. 3.

[0029] The electronic device 50 is manufactured along the following manufacturing process (flowchart). Each of the following manufacturing steps is executed manually or by a manufacturing apparatus as necessary.

[0030] [Step S10] Prepare the semiconductor chips 20 and 21, the ceramic circuit board 10, and the contact components 30. Not limited to these components, prepare in advance the components and the like necessary for manufacturing the electronic device 50. Note that the ceramic circuit board 10 has an insulating board 11, a plurality of circuit boards 12 (see FIG. 6) formed on the front surface of the insulating board 11, and a metal plate 13 formed on the back surface of the insulating board 11. Note that the rectangular broken lines attached to the plurality of circuit boards 12 in FIG. 6 represent the component regions 20a and 21a of the semiconductor chips 20 and 21 later. Also, although not shown in FIG. 6, a plating film is formed on the surface of the circuit board 12 by plating treatment.

[0031] [Step S11] With respect to the circuit board 12 of the ceramic circuit board 10, as shown in FIG. 6, the liquid repellent portions 14 are respectively formed by laser irradiation. The laser irradiation is, for example, by a YAG laser or a YVO4 laser. By such a laser device, the resist portion 14a is formed by repeatedly performing laser scanning on a predetermined region by seam laser or spot laser. The predetermined region is, for example, between the regions where the semiconductor chips 20 and 21 are arranged, and between the regions where the semiconductor chips 20 and 21 and the contact components 30 are respectively arranged (see FIG. 2). If necessary, it may also be between the regions where a plurality of contact components 30 are arranged. The width of the resist portion 14a can be appropriately controlled according to the number of scanning times of the laser scanning. The width of the resist portion 14a shown in FIG. 3 is an example. The width of the resist portion 14a can be made wider or narrower than the width of the resist portion 14a shown in FIG. 3 by increasing or decreasing the number of scanning times of the laser scanning compared to this case. The conditions of the laser irradiation can be appropriately set within a range where the scanning speed is 1000 mm / second, the scanning interval is 40 μm, the spot variation is -10 or more and 10 or less, and the pulse frequency is 25 kHz or more and 60 kHz or less. At this time, the plating film 12a on the surface of the circuit board 12 is oxidized by the laser irradiation, and the laser scanning and laser output are such that the base material portion of the circuit board 12 is not exposed. Further, as the resist portion 14a is formed, heat affected regions 14b are formed along the resist portion 14a on both sides of the resist portion 14a. The width of the heat affected region 14b on one side formed in this way is, for example, 50 μm or more.

[0032] [Step S12] As shown in FIG. 7, solder plates 31 are respectively arranged on the component regions 20a and 21a of the semiconductor chips 20 and 21 and the installation regions of the contact components 30 on the circuit board 12 of the ceramic circuit board 10. Instead of the solder plate 31, solder may be applied to the circuit board 12 of the ceramic circuit board 10 by, for example, dispensing. Note that the solder plates 31 shown in FIG. 7 are shown with squares for the ones for the semiconductor chips 20 and 21 and circles for the ones for the contact components 30.

[0033] Note that, in this case, the solder plate 31 of the same quality is used. The solder plate 31 is composed of a lead-free solder mainly containing at least one of alloys such as an alloy composed of tin-silver-copper, an alloy composed of tin-zinc-bismuth, an alloy composed of tin-copper, and an alloy composed of tin-silver-indium-bismuth. In addition, it contains a flux that functions to remove oxides on the circuit board 12 (plating film 12a). The flux contains, for example, an epoxy resin, a carboxylic acid, a rosin resin, an activator, and a solvent, and can further contain other components as necessary. Further, such a solder plate 31 may contain additives such as nickel, germanium, cobalt, or silicon.

[0034] [Step S13] On the solder plate 31 arranged in Step S12, the semiconductor chips 20, 21 and the contact components 30 are respectively set by a mounting device (not shown). At this time, the electronic component 22 is also set in the same manner.

[0035] [Step S14] The ceramic circuit board 10 with the semiconductor chips 20, 21 and the contact components 30 set via the solder plates 31 on the circuit board 12 is carried into a reflow furnace. At this time, the semiconductor chips 20, 21 on the circuit board 12 (plating film 12a) are, for example, in a state of being mounted on the solder plates 31 as shown in FIG. 8. In this state, the inside of the furnace is depressurized and heat treatment is performed at the reflow processing temperature (reflow soldering process). The reflow processing temperature is, for example, 250°C or higher and 300°C or lower. As a result, the solder plates 31 between the plating film 12a and the semiconductor chips 20, 21 melt. The first and second solders 16a, 16b melted from the solder plates 31 spread outside the semiconductor chips 20, 21 as shown in FIG. 9. At this time, the semiconductor chips 20, 21 may move on the spread first and second solders 16a, 16b. Also, the spread first and second solders 16a, 16b reach the liquid repellent portion 14. In some cases, the first and second solders 16a, 16b may bond on the liquid repellent portion 14. Thereafter, the first and second solders 16a, 16b on the liquid repellent portion 14 are repelled by the liquid repellent portion 14 due to the liquid repellency of the liquid repellent portion 14, creating a predetermined gap. Along with this, as shown in FIG. 10, the semiconductor chips 20, 21 that were misaligned on the spread first and second solders 16a, 16b also return to their predetermined arrangement positions. Then, the semiconductor chips 20, 21 are joined to the circuit board 12 (plating film 12a) by the first and second solders 16a, 16b solidified from the melted first and second solders 16a, 16b (see FIG. 4). The contact components 30 are similarly joined to the circuit board 12 (plating film 12a) by solder.

[0036] [Step S15] The ceramic circuit board 10 with the semiconductor chips 20, 21 and the contact components 30 joined to each circuit board 12 is taken out of the reflow furnace. Then, using an ultrasonic bonding tool (not shown), the predetermined regions of each circuit board 12 of the ceramic circuit board 10 and the semiconductor chips 20, 21 are electrically connected by bonding wires 15. Also, after connecting the bonding wires 15 in this way, external connection terminals (not shown) are press-fitted into each contact component 30.

[0037] [Step S16] The ceramic circuit board 10, in which the semiconductor chips 20 and 21 and the contact components 30 are joined to the respective circuit boards 12 and electrically connected by the bonding wires 15, is set in a case and sealed with a sealing member 45. Thus, the electronic device 50 shown in FIGS. 1 and 2 is manufactured.

[0038] Here, the reflow soldering in step S14 above, in the case where a slit is formed at a location where the liquid repellent portion 14 is formed without forming the liquid repellent portion 14 on the circuit board 12, will be described with reference to FIGS. 11 and 12. FIGS. 11 and 12 are plan views of the reflow soldering process of the method for manufacturing an electronic device of a reference example. Note that the electronic device of the reference example has the same configuration as the electronic device 50 except for the slit 140 provided in place of the liquid repellent portion 14, and the same reference numerals are given and their descriptions are omitted. Also, FIGS. 11 and 12 show a case corresponding to the states of FIGS. 8 and 10.

[0039] The semiconductor chips 20 and 21 are disposed on the circuit board 12 (plating film 12a) of the ceramic circuit board 10 where the slit 140 is formed, via a solder plate 31, and are carried into a reflow furnace (see FIG. 11). Note that the slit 140 is a concave groove formed in the circuit board 12 (plating film 12a). In this state, when the inside of the furnace is depressurized and heat treatment is performed at the reflow processing temperature, the solder plate 31 between the plating film 12a and the semiconductor chips 20 and 21 melts. The first and second solders 16a and 16b melted from the solder plate 31 spread outside the semiconductor chips 20 and 21. For this reason, for example, the semiconductor chip 20 (in the middle of FIG. 12) on the circuit board 12 rotates on the spot or is displaced by the spread first solder 16a. A part of the rotated semiconductor chip 20 is positioned on the slit 140 via the first solder 16a. When the first solder 16a fills the slit 140, there is a possibility that voids will be generated in the slit 140. If such voids are generated, the heat dissipation property with respect to the semiconductor chip 20 will deteriorate. Note that this may also occur on the semiconductor chip 21 side.

[0040] In addition, on the circuit board 12 (on the left and right sides of FIG. 12), the first and second solders 16a and 16b are joined with a gap. In such a case, the semiconductor chips 20 and 21 are electrically connected, which causes an electrical defect in the electronic device 50.

[0041] Therefore, the electronic device 50 includes semiconductor chips 20 and 21 as components, and a circuit board 12 whose front surface is coated with a plating film 12a, and the semiconductor chips 20 and 21 are disposed in a predetermined component region of the front surface via the first and second solders 16a and 16b. The electronic device 50 includes a liquid repellent portion 14 formed along the side portion of the component region of the circuit board 12 on the front surface, the liquid repellent portion 14 including an oxide film formed by oxidizing the plating film 12a on the front surface and having a part of the plating film 12a remaining under the oxide film. As a result, the first and second solders 16a and 16b are repelled by the liquid repellent portion 14, and their spread is suppressed by the liquid repellent portion 14. Further, since the liquid repellent portion 14 is formed by laser irradiation, the liquid repellent portion 14 can be formed even in a narrow range. Therefore, while shortening the interval between the semiconductor chips 20 and 21, the liquid repellent portion 14 can be formed therebetween to suppress the spread of the first and second solders 16a and 16b. In addition, in order to suppress the spread of the first and second solders 16a and 16b in this way, it is not necessary to form a slit in the circuit board 12. Therefore, a decrease in the flexural strength of the circuit board 12 can be prevented. Accordingly, the semiconductor chips 20 and 21 can be mounted at high density without causing an electrical defect, and a decrease in the strength of the electronic device 50 can be suppressed, and a decrease in the reliability of the electronic device 50 can be suppressed.

[0042] Next, various formation examples of the liquid-repellent portion 14 formed on the circuit board (plating film) on which the semiconductor chips are arranged will be described with reference to FIGS. 13 and 14. FIGS. 13 and 14 are plan views of formation examples of the liquid-repellent portion formed on the ceramic circuit board of the electronic device according to the embodiment. In FIGS. 13 and 14, a plating film 12a is formed on the surface of the circuit board 12. The case where the semiconductor chips 23a, 23b, 23c, 23d are joined to the plating film 12a by solder (not shown) is illustrated. Further, in FIGS. 13 and 14, the semiconductor chips 23a, 23b, 23c, 23d are arranged in two rows and two columns with respect to the circuit board 12 (plating film 12a).

[0043] In FIG. 13(A), the liquid-repellent portion 14 is continuously (in a cross shape) formed between the semiconductor chips 23a, 23b, 23c, and 23d. Further, the liquid-repellent portion 14 is formed around the semiconductor chips 23a, 23b, 23c, and 23d. Note that the liquid-repellent portion 14 may be continuously (in a cross shape) formed only between the semiconductor chips 23a, 23b, 23c, and 23d. Also, in FIG. 13(B), the liquid-repellent portion 14 is intermittently formed in FIG. 13(A). Note that the intermittent liquid-repellent portion 14 in FIG. 13(B) is an example. The interval may be narrowed and more dotted lines may be formed. Also in FIG. 13(C), the liquid-repellent portion 14 is intermittently formed in FIG. 13(A). However, in FIG. 13(C), the remaining portion is intermittently formed while leaving the portion where the liquid-repellent portions 14 intersect.

[0044] In FIG. 14(A), the liquid-repellent portion 14 is further formed at each corner of the region surrounding the semiconductor chips 23a, 23b, 23c, and 23d as compared with the case of FIG. 13(C). In FIG. 14(B), the liquid-repellent portion 14 is continuously formed at the boundaries of the semiconductor chips 23a, 23b, 23c, and 23d as compared with the case of FIG. 13(C). In FIG. 14(C), the liquid-repellent portion 14 is further formed at each corner of the region surrounding the semiconductor chips 23a, 23b, 23c, and 23d as compared with the case of FIG. 14(B).

[0045] By forming the liquid-repellent portion 14 in this way, it is possible to prevent the spread of the solder under the semiconductor chips 23a, 23b, 23c, and 23d, and it becomes possible to bring the arrangement positions of the semiconductor chips 23a, 23b, 23c, and 23d as close as possible. Note that the width of the liquid-repellent portion 14 in FIGS. 13 and 14 can be appropriately set as needed. Further, the liquid-repellent portion 14 is not limited to the cases of FIGS. 13 and 14, and can be appropriately formed on the plating film 12a with respect to semiconductor chips and the like.

Explanation of Signs

[0046] 10 Ceramic circuit board 11 Insulating board 12 Circuit board 12a Plating film 13 Metal plate 14 Liquid-repellent portion 14a Resist portion 14b Heat-affected region 15 Bonding wire 16a First solder 16b Second solder 20, 21, 23a, 23b, 23c, 23d Semiconductor chips 20a, 21a Component regions 22 Electronic component 30 Contact component 31 Solder plate 40 External connection terminal 45 Sealing member 50 Electronic device

Claims

1. A plurality of first components, which are semiconductor chips rectangular in plan view, a circuit board whose front surface is coated with a plating film, and the plurality of first components are arranged in a line in one direction via a first solder in a first component region on the front surface, having, including an oxide film formed by oxidizing the plating film on the front surface along the side portion of the first component region of the circuit board, with a part of the plating film remaining under the oxide film, and including a resist portion formed along the side portion of the first component region in plan view and heat affected regions formed along the resist portion on both sides of the resist portion, and a liquid repellent portion formed more than 300 μm away from the first component is formed in the resist portion, in the plurality of first components, only the long sides of the plurality of first components are adjacent to the liquid repellent portion parallel to the forming direction, which is the one direction, of the liquid repellent portion, and the short sides of the plurality of first components are arranged along the one direction without facing the liquid repellent portion, an electronic device.

2. The width of the heat affected region is 50 μm or more, The electronic device according to Claim 1.

3. The thickness of the oxide film is 25 nm or more, The electronic device according to Claim 1.

4. The width of the oxide film is 100 μm or more and 500 μm or less, The electronic device according to Claim 1.

5. The width of the oxide film is 10 μm or more and 200 μm or less, The electronic device according to Claim 1.

6. The total thickness of the liquid repellent portion and the remaining portion of a part of the plating film is 6 μm or more, The electronic device according to Claim 1.

7. The thickness of the remaining portion of a part of the plating film under the liquid repellent portion is 5 μm or more, The electronic device according to Claim 1.

8. The circuit board is made of copper or a copper alloy, The plating film is nickel or an alloy containing nickel, The electronic device according to Claim 1.

9. The liquid repellent portion is linear or dotted in plan view, The electronic device according to Claim 1.

10. The oxide film included in the liquid repellent portion includes a first laser mark by laser light irradiated on the plating film, The electronic device according to Claim 9.

11. The oxide film includes the first laser mark and a second laser mark that contacts the first laser mark or partially overlaps the first laser mark along the first laser mark, The electronic device according to Claim 10.

12. The semiconductor chip includes a control electrode near a side other than the long side facing the liquid-repellent portion on the front surface of the semiconductor chip. The electronic device according to claim 1.

13. Further comprising a second component, The circuit board is provided with a second component region on the front surface adjacent to the first component region, where the second component is disposed via a second solder, and the liquid-repellent portion is formed in a gap between the first component region and the second component region. The electronic device according to any one of claims 1 to 12.

14. The first component region is provided near an end of the circuit board, The liquid-repellent portion is formed along a side portion on the end side of the first component region. The electronic device according to any one of claims 1 to 12.

15. Further comprising a conductive third component, The circuit board is provided with a third component region on the front surface adjacent to the first component region, where the third component is disposed, and the liquid-repellent portion is formed in a gap between the first component region and the third component region. The electronic device according to any one of claims 1 to 12.

16. A step of preparing a circuit board having a front surface coated with a plating film, on which a plurality of first components and a first component region are set, the semiconductor chip being rectangular in plan view; A step of forming a liquid-repellent portion, which includes irradiating a laser beam adjacent to the first component region of the plating film to form an oxide film on the front surface of the plating film, with a part of the plating film remaining under the oxide film, a resist portion formed along a side portion of the first component region in plan view, and heat-affected regions formed along the resist portion on both sides of the resist portion, the resist portion being separated from the first component region by 300 μm or more; A step of disposing a first solder on the first component region of the plating film; A step of disposing the plurality of first components on the first solder, with only the long sides of the plurality of first components parallel to the forming direction of the liquid-repellent portion, adjacent to the liquid-repellent portion, and the short sides of the plurality of first components not facing the liquid-repellent portion, along the one direction; A step of melting the first solder; A method for manufacturing an electronic device having the above steps.

17. The thickness of the oxide film formed in the step of forming the liquid-repellent portion is 40 nm or more. The method for manufacturing an electronic device according to claim 16.

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