Power supply control device

Abstract

To provide a power supply control device capable of improving efficiency of an insulation type DC / DC converter.SOLUTION: A power source control device (1Y) includes: a gain addition unit (6) configured to amplify a feedback voltage (Vfb) by a gain; a turn-off control unit (70) configured to generate a signal (Cp) for turning off a high-side switch (QH) based on a voltage (Vfb_g) after amplification by the gain addition unit and a detection signal (Vcs) of a current detection unit (Rcs); and a turn-on control unit (2) configured to turn on the high-side switch at a timing based on a half-bridge voltage (Vhb) generated at a node (Nd) to which the high-side switch and a low-side switch are connected when the low-side switch (QL) is turned off while the high-side switch is in an off state. The gain is variably controlled based on the feedback voltage.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to a power supply control device. [Background technology]

[0002] Conventionally, various isolated DC / DC converters have been proposed (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2017-225248

[0004] [overview] There is a demand for improved efficiency in isolated DC / DC converters.

[0005] In view of the above circumstances, an object of the present disclosure is to provide a power supply control device that can improve the efficiency of an isolated DC / DC converter.

[0006] A power supply control device according to one aspect of the present disclosure includes: a magnetically coupled primary inductor and secondary inductor; a resonant capacitor connected to the primary inductor; a resonant inductor connected to the primary inductor; a half bridge having a high-side switch and a low-side switch respectively connected to the resonant inductor; a current detection unit configured to detect a primary current flowing through the resonant inductor; a rectifying and smoothing circuit connected to the secondary-side inductor and configured to output an output voltage; a feedback voltage generating unit configured to generate a feedback voltage to be fed back to the primary side based on the output voltage; A power supply control device used in an isolated DC / DC converter comprising: a gain adding unit configured to amplify the feedback voltage by a gain; a turn-off control unit configured to generate a signal for turning off the high-side switch based on the voltage amplified by the gain adding unit and the detection signal of the current detecting unit; a turn-on control unit configured to turn on the high-side switch at a timing based on a half-bridge voltage generated at a node connecting the high-side switch and the low-side switch when the low-side switch is turned off while the high-side switch is in an off state; Equipped with The gain is variably controlled based on the feedback voltage. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of an isolated DC / DC converter. [Figure 2] FIG. 2 is a diagram showing the internal configuration of a power supply control device according to a comparative example. [Figure 3] FIG. 3 is a table showing an example of the correspondence relationship between the number of bottoms and the threshold voltage of the feedback voltage. [Figure 4] FIG. 4 is a timing chart showing an example of operation in a heavy load state according to a comparative example. [Figure 5] FIG. 5 is a timing chart showing an example of operation in a light load state according to a comparative example. [Figure 6] FIG. 6 is a diagram illustrating an internal configuration of a power supply control device according to an exemplary embodiment of the present disclosure. [Figure 7] FIG. 7 is a table showing an example of the correspondence relationship between the number of bottoms and the gain. [Figure 8] FIG. 8 is a diagram illustrating an example of the configuration of a gain adding unit in the power supply control device. [Figure 9] FIG. 9 is a timing chart showing an example of operation of a power supply control device according to an embodiment of the present disclosure in a light load state. [Figure 10]FIG. 10 is a graph showing an example of the relationship between the output power and Ipeak and Ineg in the comparative example. [Figure 11] FIG. 11 is a graph showing an example of the relationship between the output power and Ipeak and Ineg in an embodiment of the present disclosure. [Figure 12] FIG. 12 is a diagram illustrating an example of the configuration of an AC adapter.

[0008] [Detailed explanation] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings.

[0009] <Isolated DC / DC converter> Fig. 1 is a diagram showing an example of the configuration of an isolated DC / DC converter. The isolated DC / DC converter 100 shown in Fig. 1 includes a power supply control device 1, a primary side circuit 101, a secondary side circuit 102, and an auxiliary circuit 103, and is configured as an AHB (Asymmetric Half Bridge) type flyback converter. The isolated DC / DC converter 100 converts an input voltage Vin, which is a DC voltage, into an output voltage Vout, which is also a DC voltage. The output voltage Vout is supplied to a load Z.

[0010] The primary circuit 101 includes a high-side switch QH, a low-side switch QL, a primary-side inductor Lp, a resonant inductor Lr, a resonant capacitor Cr, and a current detection resistor Rcs. The high-side switch QH and the low-side switch QL may be built into the power supply control device 1.

[0011] The high-side switch QH and the low-side switch QL are both configured by N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs). Note that the high-side switch QH is not limited to this and may be configured by, for example, a P-channel MOSFET. The high-side switch QH and the low-side switch QL form a half bridge.

[0012] The drain of the high-side switch QH is connected to the terminal to which the input voltage Vin is applied. The source of the high-side switch QH and the drain of the low-side switch QL are connected at node Nd. The source of the low-side switch QL is connected to one terminal of the current detection resistor Rcs. The other terminal of the current detection resistor Rcs is connected to the ground terminal (the terminal to which the ground potential is applied).

[0013] The primary inductor Lp and the resonant inductor Lr are included in, for example, the primary winding of a transformer. In this case, the resonant inductor Lr corresponds to the leakage inductance in the primary winding. Note that the resonant inductor Lr may include an inductor provided separately from the transformer. One end of the resonant inductor Lr is connected to a node Nd. The other end of the resonant inductor Lr is connected to one end of the primary inductor Lp. The other end of the primary inductor Lp is connected to one end of the resonant capacitor Cr. The other end of the resonant capacitor Cr is connected to the source of the low-side switch QL.

[0014] The power supply control device 1 is an IC (integrated circuit) for controlling the isolated DC / DC converter 100, and has an HO (high-side output) terminal, an LO (low-side output) terminal, a CS (current detection) terminal, a VCC (power supply) terminal, a ZT (auxiliary) terminal, a GND (ground) terminal, and an FB (feedback) terminal as external terminals for establishing electrical connection with the outside. The internal configuration of the power supply control device 1 will be described later.

[0015] A gate signal G1 output from the HO terminal is applied to the gate of the high-side switch QH. The high-side switch QH is in an on or off state depending on the level of the gate signal G1. A gate signal G2 output from the LO terminal is applied to the gate of the low-side switch QL. The low-side switch QL is in an on or off state depending on the level of the gate signal G2. The high-side switch QH and the low-side switch QL are switched complementarily, as will be described later. However, there is also a simultaneous off period during which both the high-side switch QH and the low-side switch QL are in an off state.

[0016] One end of the current detection resistor Rcs is connected to the CS terminal. The current flowing through the current detection resistor Rcs is converted into a voltage by the current detection resistor Rcs and becomes a current detection signal Vcs. The current detection signal Vcs is generated at the CS terminal. As will be described later, the current detection signal Vcs is used to determine the turn-off timing (i.e., on-time) of the high-side switch QH. Note that turn-off refers to switching from an on state to an off state. Turn-on refers to switching from an off state to an on state.

[0017] The secondary circuit 102 includes a secondary inductor Ls, a rectifier diode Ds, a smoothing capacitor Cs, voltage dividing resistors Rd1 and Rd2, a resistor Rs1, a shunt regulator SR, and a light emitting diode PD.

[0018] The secondary-side inductor Ls is included in the transformer and is magnetically coupled to the primary-side inductor Lp. The rectifier diode Ds and smoothing capacitor Cs form a rectifying and smoothing circuit 104. The anode of the rectifier diode Ds is connected to one end of the secondary-side inductor Ls. The cathode of the rectifier diode Ds is connected to one end of the smoothing capacitor Cs. The other end of the secondary-side inductor Ls and the other end of the smoothing capacitor Cs are each connected to a ground terminal.

[0019] The voltage-dividing resistors Rd1 and Rd2, the resistor Rs1, the shunt regulator SR, the light-emitting diode PD, and the phototransistor PT form a feedback circuit 105. The phototransistor PT is included in the primary-side circuit 101. The light-emitting diode PD and the phototransistor PT form a photocoupler.

[0020] An output voltage Vout is generated at one end of the smoothing capacitor Cs. Voltage-dividing resistors Rd1 and Rd2 are connected in series between the application end of the output voltage Vout and the ground end. One end of resistor Rs1 is connected to the application end of the output voltage Vout. The other end of resistor Rs1 is connected to the anode of the light-emitting diode PD. A shunt regulator SR is connected between the cathode of the light-emitting diode PD and the ground end.

[0021] The output voltage Vout is divided by voltage-dividing resistors Rd1 and Rd2 to produce a divided voltage Vdv. The shunt regulator SR passes a current to the light-emitting diode PD that corresponds to the difference between the divided voltage Vdv and the target voltage. The light emitted by the light-emitting diode PD is received by the phototransistor PT. The phototransistor PT is connected to the FB terminal. As shown in FIG. 2 (described later), the FB terminal is connected to the application terminal of the reference voltage Vref via a pull-up resistor 5. The current flowing through the phototransistor PT causes a voltage drop in the pull-up resistor 5, and a feedback voltage Vfb is generated at the FB terminal. In other words, the feedback circuit 105 and the pull-up resistor 5 constitute a feedback voltage generation unit.

[0022] The auxiliary circuit 103 includes an auxiliary inductor Ld, voltage-dividing resistors R1 and R2, a diode D1, and a capacitor C1. The auxiliary inductor Ld is included in the transformer and is magnetically coupled to the primary-side inductor Lp. One end of the auxiliary inductor Ld is connected to the anode of the diode D1. The cathode of the diode D1 is connected to one end of the capacitor C1. The other end of the auxiliary inductor Ld and the other end of the capacitor C1 are each connected to the ground terminal. One end of the capacitor C1 is connected to the VCC terminal. The auxiliary voltage Vd generated at one end of the auxiliary inductor Ld is rectified and smoothed by the diode D1 and the capacitor C1 to become the power supply voltage Vcc. The power supply voltage Vcc is applied to the VCC terminal.

[0023] The voltage dividing resistors R1 and R2 divide the auxiliary voltage Vd to generate the voltage Vzt that is applied to the ZT terminal. The voltage Vzt is used for bottom skip control, which will be described later.

[0024] <Comparative Example> Here, before describing the embodiments according to the present disclosure, a comparative example will be described for comparison.

[0025] 2 is a diagram showing the internal configuration of a power supply control device 1X according to a comparative example. The power supply control device 1X includes a control logic unit 2, drivers 3 and 4, a pull-up resistor 5, a gain adding unit 6, a comparator 7, a bottom skip control unit 8, a monitor unit 9, and an on-time determining unit 10.

[0026] The control logic unit 2 controls the drive of the driver 3 by sending a drive signal Dr1 to the driver 3, and controls the drive of the driver 4 by sending a drive signal Dr2 to the driver 4. The driver 3 generates a gate signal G1 based on the drive signal Dr1 and outputs it from the HO terminal. The driver 4 generates a gate signal G2 based on the drive signal Dr2 and outputs it from the LO terminal.

[0027] As described above, the pull-up resistor 5 is used to generate the feedback voltage Vfb. The feedback voltage Vfb (FB terminal voltage) is amplified by the gain adding unit 6 based on a predetermined gain to generate an amplified voltage Vfb_g. The predetermined gain added by the gain adding unit 6 is a fixed value (e.g., 0.25). Vfb_g = G × Vfb, where G is the gain.

[0028] A voltage Vfb_g is applied to the inverting input terminal (-) of the comparator 7. A current detection signal Vcs is applied to the non-inverting input terminal (+) of the comparator 7. The comparator 7 compares the voltage Vfb_g with the current detection signal Vcs, and outputs a comparison signal CP as the comparison result to the control logic unit 2. The comparison signal CP is used to determine the timing of turning off the high-side switch QH. In other words, the comparator 7 is configured as a turn-off control unit 70.

[0029] The bottom skip control unit 8 performs bottom skip control. Bottom skip control is a control that skips the turn-on of the high-side switch QH by the number of bottoms of the half-bridge voltage Vhb generated at the node Nd (FIG. 1). The bottoms are the points where the half-bridge voltage Vhb is at its maximum.

[0030] The bottom skip control unit 8 has a bottom number determination unit 8 A and a counter 8 B. The bottom number determination unit 8 A determines the number of bottoms to skip based on the feedback voltage Vfb.

[0031] FIG. 3 is a table showing an example of the correspondence relationship between the number of bottoms and the threshold voltage of the feedback voltage Vfb. FIG. 3 shows the threshold voltage for switching the number of bottoms. For example, the threshold voltage for switching between 10 and 9 is Vfb109. If the feedback voltage Vfb is higher than the threshold voltage, it corresponds to the smaller number of bottoms. If the feedback voltage Vfb is equal to or lower than the threshold voltage, it corresponds to the larger number of bottoms. For example, if Vfb > Vfb109, the number of bottoms = 9, and if Vfb ≦ Vfb109, the number of bottoms = 10. The larger the number of bottoms, the smaller the threshold voltage. That is, Vfb21 > Vfb32 > ··· > Vfb98 > Vfb109.

[0032] The bottom number determination unit 8A determines the bottom number based on the correspondence relationship shown in FIG. 3, for example. In a light load state where the output power (= Vout × Iout) (FIG. 1) is small, the feedback voltage Vfb is small and the bottom number is large. This prevents the switching frequency from increasing in a light load state, thereby reducing losses. In a heavy load state where the output power is large, the feedback voltage Vfb is large and the bottom number is determined to be 1. In other words, in a heavy load state, bottom skip control with the bottom number being 1 is performed.

[0033] The counter 8B counts the number of bottoms by detecting when the voltage Vzt at the ZT terminal crosses a predetermined threshold Vzt_th in the negative direction. When the count value of the number of bottoms reaches the determined number of bottoms, a skip signal SK indicating this is output from the bottom skip control unit 8 to the control logic unit 2. The skip signal SK is used to determine the timing at which the high-side switch QH is turned on.

[0034] The monitor unit 9 monitors a monitor time Trmon, which is the time from when the low-side switch QL is turned off until the voltage Vzt first crosses the threshold Vzt_th in the negative direction under heavy load conditions. The monitor time Trmon corresponds to the rise time of the half-bridge voltage Vhb after the low-side switch QL is turned off. The on-time determiner 10 determines the on-time of the low-side switch QL in the next cycle based on the monitored monitor time Trmon. The control logic unit 2 switches the low-side switch QL based on the determined on-time. Such on-time control will be described in more detail below.

[0035] Next, operation of such a comparative example under heavy load conditions will be described with reference to Fig. 4. Fig. 4 is a timing chart showing an example of operation under heavy load conditions according to the comparative example. Note that Fig. 4 and various timing charts described below show, from top to bottom, example waveforms of gate signals G1 and G2, half-bridge voltage Vhb, primary current Ir (Fig. 1), and voltage Vzt at the ZT terminal.

[0036] First, with gate signal G1 at high level and G2 at low level, i.e., with the high-side switch QH in the on state and the low-side switch QL in the off state, the primary current Ir increases and, when it reaches the peak current Ipeak (timing t11), the control logic unit 2 switches gate signal G1 to low level and turns off the high-side switch QH, thereby turning both the high-side switch QH and the low-side switch QL into the off state.

[0037] The comparator 7 detects that the primary current Ir has reached the peak current Ipeak. Specifically, the comparator 7 detects that the current detection signal Vcs has reached the feedback voltage Vfb_g, and thus this is detected. That is, since Ipeak×Rcs=Vfb_g, Ipeak×Rcs=G×Vfb, and can be expressed as Ipeak=G×Vfb / Rcs. Under heavy load conditions, Vfb is large, and therefore Ipeak becomes large.

[0038] When the high-side switch QH is turned off, the half-bridge voltage Vhb falls and the parasitic diode (not shown) of the low-side switch QL is turned on. This causes the primary current Ir and the excitation current Imag (dashed line) to start decreasing. The positive direction of the current is the direction of the arrow of the primary current Ir in Figure 1. Resonance between Lr and Cr begins in the primary current Ir.

[0039] At timing t12, when a predetermined dead time Tdead has elapsed since timing t11, the control logic unit 2 switches the gate signal G2 to high level. That is, the low-side switch QL is turned on. After that, when the excitation current Imag and the primary current Ir match at timing t13, the primary current Ir continues to decrease at the same rate as the excitation current Imag.

[0040] The control logic unit 2 causes the gate signal G2 to fall to a low level at timing t14, when the on-time Ton_l determined by the on-time determination unit 10 has elapsed since timing t12. That is, the low-side switch QL is turned off. That is, both the high-side switch QH and the low-side switch QL are turned off. As a result, the half-bridge voltage Vhb begins to resonate and rises. At this time, the voltage Vzt falls. At this time, the bottom-number determination unit 8A has determined the bottom number to be 1, and the counter 8B counts the bottom number to 1 when Vzt crosses the threshold Vzt_th in the negative direction for the first time. The monitor unit 9 monitors a monitor time Trmon (timings t14 to t15) from when it detects, based on the drive signal Dr2, that the gate signal G2 has fallen to a low level (the low-side switch QL has been turned off) until it detects, based on the skip signal SK, that the bottom number has been counted to 1.

[0041] The on-time determination unit 10 adjusts the on-time Ton_l of the next cycle so that the monitor time Trmon coincides with the predetermined target time Trtar. That is, if the current Trmon is shorter than Trtar, the next cycle's Ton_l is made shorter than the current one. If the current Trmon is longer than Trtar, the next cycle's Ton_l is made longer than the current one. When the low-side switch QL turns off (timing t14), the primary current Ir reaches the negative current Ineg. Adjusting the on-time Ton_l adjusts the current Ineg and thus the monitor time Trmon, i.e., the rise time of the half-bridge voltage Vhb. This reduces unnecessary losses.

[0042] At time t16, a predetermined delay time Tdly after time t15, the control logic unit 2 switches the gate signal G1 to high level. That is, the high-side switch QH is turned on. At this time, the half-bridge voltage Vhb rises, and ZVS (zero volt switching) of the high-side switch QH is performed. This increases the primary-side current Ir, and the same operation is repeated thereafter.

[0043] Next, the operation in a light load state according to the comparative example will be described with reference to Fig. 5. Fig. 5 is a timing chart showing an example of the operation in a light load state according to the comparative example.

[0044] First, when the primary current Ir reaches the peak current Ipeak, the gate signal G1 is switched to low level, and the high-side switch QH is turned off (timing t21). After that, when the dead time Tdead has elapsed, the gate signal G2 is switched to high level, and the low-side switch QL is turned on (timing t22).

[0045] In a light load state, when a predetermined on-time Ton_min has elapsed since the low-side switch QL was turned on (timing t22), the control logic unit 2 switches the gate signal G2 to low level to turn off the low-side switch QL (timing t23). The on-time Ton_min can be set using a setting resistor (not shown) connected externally to the power supply control device 1X. The on-time Ton_min and the above-mentioned on-time Ton_l (under heavy load) ensure that the on-time of the low-side switch QL is at least half the resonance period of Lr and Cr (π × √(Lr × Cr)) in order to efficiently send power to the secondary side.

[0046] At timing t23, when both the high-side switch QH and the low-side switch QL are turned off, the half-bridge voltage Vhb begins to resonate. The counter 8B then counts the number of times the voltage Vzt crosses the threshold voltage Vzt_th in the negative direction, i.e., the number of bottoms. Since the feedback voltage Vfb is small under light load conditions, the number of bottoms determined by the bottom-number determination unit 8A is large. In the example of FIG. 5, the determined number of bottoms is 3. When the counted number of bottoms reaches the determined number, the bottom skip control unit 8 outputs a skip signal SK indicating this (timing t24).

[0047] At timing t25, which is a predetermined delay time Tdly after timing t24, the control logic unit 2 switches the gate signal G1 to high level and turns on the high-side switch QH, which increases the primary current Ir, and the same operation is repeated thereafter.

[0048] However, this comparative example has the following problem. Specifically, in a light load state, the feedback voltage Vfb is small, so the peak current Ipeak is small, and the absolute value of the negative current Ineg of the primary current Ir when the on-time Ton_min has elapsed (timing t23) is large. This increases the voltage reached when the half-bridge voltage Vhb rises, resulting in a decrease in efficiency. For ZVS of the high-side switch QH, the absolute value of the negative current Ineg in the comparative example is excessive and can be reduced.

[0049] <Embodiments of the present disclosure> In order to solve the problems in the comparative example as described above, the following embodiment of the present disclosure is implemented: Figure 6 is a diagram showing the internal configuration of a power supply control device 1Y according to an exemplary embodiment of the present disclosure.

[0050] The difference between the configuration of the power supply control device 1Y and the comparative example (FIG. 2) is that the gain for amplifying the feedback voltage Vfb in the gain adding unit 6 is variable depending on the number of bottoms determined by the bottom number determining unit 8A.

[0051] FIG. 7 is a table showing an example of the correspondence between the number of bottoms and gain. The larger the number of bottoms, the larger the gain. Under light load conditions, the feedback voltage Vfb decreases, but the determined number of bottoms increases, resulting in a larger gain. Since Ipeak = G × Vfb / Rcs, the peak current Ipeak value is prevented from becoming smaller than a predetermined value. Therefore, even under light load conditions, it is possible to prevent the primary-side current Ir from becoming a negative current with a large absolute value when the on-time of the low-side switch QL has elapsed. This improves efficiency.

[0052] 8 is a diagram showing an example of the configuration of the gain adding unit 6 in the power supply control device 1Y. The gain adding unit 6 has a resistor Rv1, a plurality of resistors Rv2_a to Rv2_x, and a plurality of switches Sa to Sx. One end of the resistor Rv1 is connected to an application terminal of a feedback voltage Vfb. The other end of the resistor Rv1 is connected to an inverting input terminal of a comparator 7. One end of each of the resistors Rv2_a to Rv2_x is connected to the other end of the resistor Rv1. The other end of each of the resistors Rv2_a to Rv2_x is connected to one end of each of the switches Sa to Sx. The other end of each of the switches Sa to Sx is connected to the ground terminal. The on / off of each of the switches Sa to Sx is controlled by a bottom number determination unit 8A. As a result, the bottom number determination unit 8A turns on and off the switches Sa to Sx, thereby enabling or disabling each of the resistors Rv2_a to Rv2_x, and the feedback voltage Vfb is divided by the voltage division ratio of the combined resistance of the resistors Rv2_a to Rv2_x and the resistor Rv1 to produce the feedback voltage Vfb_g. That is, the voltage division ratio serves as a gain, and the gain is variably controlled by the bottom number determination unit 8A.

[0053] FIG. 9 is a timing chart showing an example of operation of the power supply control device 1Y according to this embodiment in a light load state.

[0054] First, at time t1 when the primary current Ir reaches a peak current Ipeak, the gate signal G1 is switched to low level, turning off the high-side switch QH. Then, at time t2 when a predetermined dead time Tdead has elapsed, the gate signal G2 is switched to high level, turning on the low-side switch QL.

[0055] When a predetermined on-time Ton_ctr has elapsed from timing t2, the control logic unit 2 switches the gate signal G2 to low level, and the low-side switch QL is turned off (timing t3). Because the peak current Ipeak is controlled as described above, it is possible to prevent the peak current Ipeak from becoming low even under light load conditions, and the value of the primary-side current Ir at timing t3, i.e., the timing when half the resonance period of Lr and Cr has elapsed, is a positive voltage value Ipos in the example in Figure 9, preventing it from becoming a negative current with a large absolute value.

[0056] After timing t3, when the primary current Ir reaches 0 A, the half-bridge voltage Vhb begins to resonate (timing t4). Because the primary current Ir is 0 A, the voltage value reached by the rise of the half-bridge voltage Vhb is low, improving efficiency. After timing t4, bottom skip control is performed as in the comparative example, and at timing t6, a predetermined delay time Tdly after timing t5, when a predetermined number of bottoms have been counted, the gate signal G1 is switched to high level. In other words, the high-side switch QH is turned on.

[0057] Fig. 10 is a graph showing an example of the relationship between the output power and Ipeak and Ineg in a comparative example. As shown in Fig. 10, Ineg is a constant value under heavy load conditions, and Ineg decreases as the output power decreases under light load conditions. In the example of Fig. 10, the constant value of Ineg under heavy load conditions is set to -0.5 A, which is the minimum value required for ZVS of the high-side switch QH.

[0058] In contrast, FIG. 11 is a graph showing an example of the relationship between output power and Ipeak and Ineg according to an embodiment of the present disclosure. In this way, Ipeak is prevented from becoming smaller than a predetermined minimum value Ipeak_min in a light load state. Furthermore, when Ipeak is at its small value Ipeak_min, the value of the primary current Ir when the low-side switch QL is turned off is set to be 0 A or greater (i.e., 0 A or a positive value). Therefore, as shown in FIG. 11, in a light load state, the value of the primary current Ir (Ineg) when the half-bridge voltage Vhb starts to resonate can be 0 A. Note that it is not excluded from practice that when Ipeak is at its minimum value Ipeak_min, the value of the primary current Ir when the low-side switch QL is turned off can be a negative current with a small absolute value.

[0059] <Application example> FIG. 12 is a diagram showing an AC adapter 150 as an example of an application to which an isolated DC / DC converter 100 including a power supply control device 1Y according to an embodiment of the present disclosure is applied.

[0060] The AC adapter 150 shown in Fig. 12 includes an adapter main body 151, a DC plug 152, and a cable 153. The adapter main body 151 is provided with an attachment plug 151A. The attachment plug 151A is connectable to an outlet. The adapter main body 151 has an AC / DC converter 110 built in. The AC / DC converter 110 has an isolated DC / DC converter 100 and an input stage (not shown) provided before the isolated DC / DC converter 100. The input stage is a circuit that converts an AC voltage into an input voltage Vin, and includes an input filter, a diode bridge, a smoothing capacitor, etc.

[0061] The adapter main body 151 and the DC plug 152 are connected by a cable 153. An AC voltage input to the attachment plug 151A is converted into an output voltage Vout, which is a DC voltage, by the AC / DC converter 110 and output from the DC plug 152 via the cable 153. A device such as a smartphone or a tablet can be connected to the DC plug 152.

[0062] As described above, the efficiency of the isolated DC / DC converter 100 can be improved, and therefore an AC adapter 150 with excellent efficiency can be realized.

[0063] <Other> In addition to the above-described embodiments, various modifications can be made to the various technical features disclosed in this specification without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present invention should not be limited to the above-described embodiments, but should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0064] <Additional Notes> As described above, the power supply control device (1Y) according to one aspect of the present disclosure: A magnetically coupled primary inductor (Lp) and secondary inductor (Ls), a resonant capacitor (Cr) connected to the primary inductor; a resonant inductor (Lr) connected to the primary inductor; a half bridge having a high-side switch (QH) and a low-side switch (QL) respectively connected to the resonant inductor; a current detection unit (Rcs) configured to detect a primary current (Ir) flowing through the resonant inductor; a rectifying and smoothing circuit (104) connected to the secondary-side inductor and configured to output an output voltage (Vout); a feedback voltage generating unit (105,5) configured to generate a feedback voltage (Vfb) to be fed back to the primary side based on the output voltage; A power supply control device used in an isolated DC / DC converter (100) comprising: a gain adding unit (6) configured to amplify the feedback voltage by a gain; a turn-off control unit (70) configured to generate a signal (Cp) for turning off the high-side switch based on the voltage (Vfb_g) amplified by the gain adding unit and the detection signal (Vcs) of the current detecting unit; a turn-on control unit (2) configured to turn on the high-side switch at a timing based on a half-bridge voltage (Vhb) generated at a node (Nd) connecting the high-side switch and the low-side switch when the low-side switch is turned off while the high-side switch is in an off state; Equipped with The gain is configured to be variably controlled based on the feedback voltage (first configuration).

[0065] With this configuration, the feedback voltage decreases under light load conditions, but the gain can be increased, preventing the peak current of the primary current from decreasing when the high-side switch is turned off. This prevents the primary current from becoming a negative current with a large absolute value when the low-side switch is turned off while the high-side switch is off, reducing the voltage reached by the rise of the half-bridge voltage and improving efficiency. This enables ZVS when the high-side switch is turned on.

[0066] In addition, in the first configuration, the inverter further includes a bottom skip control unit (8) configured to detect when the low-side switch is turned off while the high-side switch is in an off state that the number of bottoms at which the half-bridge voltage reaches a predetermined number of bottoms determined based on the feedback voltage, The turn-on control unit (2) may be configured to turn on the high-side switch at a timing based on the detection by the bottom skip control unit (second configuration).

[0067] In the second configuration, the gain may be variably set in accordance with the predetermined number of bottoms (third configuration).

[0068] Furthermore, in any of the first to third configurations, when the peak current (Ipeak) of the primary current reaches a predetermined minimum current value (Ipeak_min) in a light load state, the value of the primary current when the low-side switch is turned off may be 0 A or more (fourth configuration).

[0069] In any one of the first to fourth configurations, the gain adding unit (6) a first resistor (Rv1) having a first terminal connected to the feedback voltage application terminal; a plurality of second resistors (Rv2_a to Rv2_x) and a plurality of switches (Sa to Sx) respectively connected between a second terminal of the first resistor and a ground terminal; and The bottom skip control unit may be configured to control the on / off of the switch in accordance with the predetermined number of bottoms (fifth configuration).

[0070] In addition, in any of the first to fifth configurations, the turn-off control unit may be configured to have a comparator (7) configured to receive the amplified voltage and the current detection signal (sixth configuration).

[0071] An isolated DC / DC converter (100) according to an aspect of the present disclosure includes a power supply control device (1Y) having any one of the first to sixth configurations (seventh configuration).

[0072] Moreover, an AC adapter (150) according to an embodiment of the present disclosure includes an AD / DC converter (110) having the isolated DC / DC converter (100) of the seventh configuration (eighth configuration). [Industrial Applicability]

[0073] The present disclosure can be used in isolated DC / DC converters for various applications. [Explanation of symbols]

[0074] 1, 1X, 1Y Power Control Unit 2 Control logic section 3,4 Driver 5 pull-up resistors 6 Gain adding section 7 Comparators 8 Bottom skip control section 8A Bottom number determination section 8B Counter 9 Monitor section 10 ON time determination section 70 Turn-off control section 100 Isolated DC / DC Converter 101 Primary side circuit 102 Secondary circuit 103 Auxiliary circuit 104 Rectifier smoothing circuit 105 Feedback Circuit 110 AC / DC converter 150 AC adapter 151 Adapter body 151A plug 152 DC plug 153 Cable C1 capacitor Cr Resonant Capacitor Cs smoothing capacitor D1 Diode Ds rectifier diode Ld Auxiliary inductor Lp primary inductor Lr Resonant inductor Ls Secondary inductor Nd node PD Light Emitting Diode PT phototransistor QH High-side switch QL Low-Side Switch R1, R2 voltage dividing resistors Rcs Current detection resistor Rd1, Rd2 voltage dividing resistors Rs1 Resistor Rv1 resistance Rv2_x resistance SR Shunt Regulator Sx Switch

Claims

1. a magnetically coupled primary inductor and secondary inductor; a resonant capacitor connected to the primary inductor; a resonant inductor connected to the primary inductor; a half bridge having a high-side switch and a low-side switch respectively connected to the resonant inductor; a current detection unit configured to detect a primary current flowing through the resonant inductor; a rectifying and smoothing circuit connected to the secondary inductor and configured to output an output voltage; a feedback voltage generating unit configured to generate a feedback voltage to be fed back to a primary side based on the output voltage; A power supply control device used in an isolated DC / DC converter comprising: a gain adding unit configured to amplify the feedback voltage by a gain; a turn-off control unit configured to generate a signal for turning off the high-side switch based on the voltage amplified by the gain adding unit and the detection signal of the current detecting unit; a turn-on control unit configured to turn on the high-side switch at a timing based on a half-bridge voltage generated at a node connecting the high-side switch and the low-side switch when the low-side switch is turned off while the high-side switch is in an off state; Equipped with The power supply control device, wherein the gain is variably controlled based on the feedback voltage.

2. a bottom skip control unit configured to detect when the low-side switch is turned off while the high-side switch is in an off state that the number of bottoms at which the half-bridge voltage reaches a predetermined number of bottoms determined based on the feedback voltage; The power supply control device according to claim 1 , wherein the turn-on control unit turns on the high-side switch at a timing based on detection by the bottom skip control unit.

3. The power supply control device according to claim 2 , wherein the gain is set to be variable depending on the predetermined number of bottoms.

4. 2. The power supply control device according to claim 1, wherein when a peak current of the primary side current is a predetermined minimum current value in a light load state, the value of the primary side current when the low-side switch is turned off is 0 A or more.

5. The gain adding unit a first resistor having a first terminal connected to the feedback voltage application terminal; a plurality of second resistors and a plurality of switches respectively connected between the second end of the first resistor and a ground end; and The power supply control device according to claim 1 , wherein the bottom skip control unit controls the on / off of the switch in accordance with the predetermined number of bottoms.

6. 2. The power supply control device according to claim 1, wherein the turn-off control section has a comparator configured to receive the amplified voltage and the current detection signal.

7. An isolated DC / DC converter comprising the power supply control device according to any one of claims 1 to 6.

8. An AC adapter comprising an AD / DC converter having the isolated DC / DC converter according to claim 7.

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