Phase shifter and antenna device

The phase shifter with vanadium dioxide varactors and temperature-controlled capacitance provides stable phase shift, addressing the precision control issues of existing technologies and enabling compact antenna designs for high-frequency communications.

JP2025122861APending Publication Date: 2025-08-22NEC CORP
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Patent Information

Application Number
JP2024018567
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-02-09
Publication Date
2025-08-22

AI Technical Summary

Technical Problem

Existing phase shifters, such as those using varactor diodes, require precise control of reverse voltage for stable phase shift, making them difficult to implement in compact antenna devices with multiple patch antennas.

Method used

A phase shifter incorporating a 90-degree hybrid circuit with varactors made of vanadium dioxide and stubs, where the capacitance is controlled through temperature adjustment using heating elements, allowing for stable phase shift without precise voltage control.

Benefits of technology

Enables continuous phase change with a stable phase shift amount, suitable for compact antenna devices used in high-frequency mobile communications.

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Abstract

To provide a phase shifter capable of achieving continuous phase shift variation with a stable phase shift amount.SOLUTION: The phase shifter includes a 90-degree hybrid circuit having two reflection ends, a varactor including a variable capacitance layer formed by vanadium dioxide and positioned at the reflection end of the 90-degree hybrid circuit, and a stub connected to the reflection end of the 90-degree hybrid circuit via the varactor.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to a phase shifter and an antenna device. [Background technology]

[0002] Antenna devices compatible with high-frequency radio waves are being developed for mobile communications beyond the fifth generation. One example of such an antenna device is a phased array antenna composed of multiple antenna elements. A phased array antenna can form a beam with the desired directionality by changing the excitation phase of the antenna elements using a phase shifter mounted in front of the antenna elements. For example, a switched-line phase shifter can cover a phase shift range of up to 360 degrees, thereby achieving a large scanning angle. However, it is difficult to incorporate such a phase shifter into a compact antenna device with multiple patch antennas.

[0003] Patent Document 1 discloses a variable phase shifter. The variable phase shifter in Patent Document 1 includes a hybrid circuit, a pair of switches, a pair of first variable reactance elements, a pair of stubs, and a second variable reactance element. The hybrid circuit has a first port, a second port, a third port, and a fourth port. The hybrid circuit receives a signal input from the first port and outputs it to the second and third ports with a 90-degree phase difference. The hybrid circuit does not output the signal input from the first port to the fourth port. One switch is provided at each of the second and third ports. One first variable reactance element is connected to each of the pair of switches. One end of the stub is connected to each of the pair of switches. One second variable reactance element is connected to each of the other ends of the first stubs. The switch switches between connection with the first variable reactance element and connection with one end of the first stub. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2019-029722 Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 discloses the use of varactor diodes as the first and second variable reactance elements. The variable phase shifter of Patent Document 1 achieves continuous phase shift by applying a reverse voltage to the variable reactance elements to continuously change their capacitance. However, the variable phase shifter of Patent Document 1 requires precise control of the reverse voltage applied to the variable reactance elements, making it difficult to obtain a stable phase shift.

[0006] An object of the present disclosure is to provide a phase shifter and an antenna device that can achieve continuous phase change with a stable phase shift amount. [Means for solving the problem]

[0007] A phase shifter according to one embodiment of the present disclosure includes a 90-degree hybrid circuit having two reflection ends, a varactor having a variable capacitance layer made of vanadium dioxide and disposed at the reflection end of the 90-degree hybrid circuit, and a stub connected to the reflection end of the 90-degree hybrid circuit via the varactor. [Effects of the Invention]

[0008] According to the present disclosure, it is possible to provide a phase shifter and an antenna device that can achieve continuous phase change with a stable phase shift amount. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a conceptual diagram illustrating an example of the configuration of a phase shifter according to the present disclosure. [Figure 2] 1 is a conceptual diagram for explaining an example of a 90-degree hybrid circuit according to the present disclosure. FIG. [Figure 3] FIG. 1 is a conceptual diagram illustrating an example of the configuration of a varactor according to the present disclosure. [Figure 4] FIG. 1 is a conceptual diagram showing an example of a circuit configuration of a heat generation drive circuit according to the present disclosure. [Figure 5] FIG. 1 is a block diagram illustrating an example of the configuration of a transfer device including a phase shifter according to the present disclosure. [Figure 6] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 7] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 8] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 9] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 10] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 11] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 12] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 13] 10A and 10B are conceptual diagrams for explaining an example of capacitance control of a variable capacitance layer according to the present disclosure. [Figure 14] 3 is a conceptual diagram showing a first example of a conductor pattern formed on a varactor of a phase shifter according to the present disclosure. FIG. [Figure 15] 10 is a conceptual diagram showing a second example of a conductor pattern formed on a varactor of a phase shifter according to the present disclosure. FIG. [Figure 16] FIG. 10 is a conceptual diagram showing a third example of a conductor pattern formed on a varactor of a phase shifter according to the present disclosure. [Figure 17] 10 is an example of a table used to select a conductor pattern to be formed in a varactor according to the present disclosure. [Figure 18] 10A to 10C are conceptual diagrams for explaining an example of a method for manufacturing a phase shifter according to the present disclosure. [Figure 19] 10A to 10C are conceptual diagrams for explaining an example of a method for manufacturing a phase shifter according to the present disclosure. [Figure 20] 10A to 10C are conceptual diagrams for explaining an example of a method for manufacturing a phase shifter according to the present disclosure. [Figure 21] 10A to 10C are conceptual diagrams for explaining an example of a method for manufacturing a phase shifter according to the present disclosure. [Figure 22] 1 is a conceptual diagram illustrating an example of the configuration of an antenna device according to the present disclosure. [Figure 23] 1 is a conceptual diagram illustrating an example of the configuration of an antenna device according to the present disclosure. [Figure 24] 1 is a conceptual diagram illustrating an example of a matrix circuit formed on the upper surface of a substrate according to the present disclosure. [Figure 25] 1 is a conceptual diagram illustrating an example of the configuration of an antenna device according to the present disclosure. [Figure 26] 1 is a block diagram illustrating an example of a functional configuration of an antenna device according to the present disclosure. [Figure 27] FIG. 1 is a conceptual diagram illustrating an example of the configuration of a phase shifter according to the present disclosure. [Figure 28] FIG. 2 is a block diagram illustrating an example of a hardware configuration for executing control according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments for carrying out the present disclosure will be described with reference to the drawings. In this disclosure, the drawings used in describing each embodiment relate to one or more embodiments. Furthermore, elements included in each drawing may apply to one or more embodiments. The embodiments described below are limited to technically preferable aspects for carrying out the present disclosure, but do not limit the scope of the disclosure to the following. In all drawings used in describing the following embodiments, similar parts are designated by the same reference numerals unless otherwise specified. In the following embodiments, repeated explanations of similar configurations and operations may be omitted.

[0011] (First embodiment) First, a phase shifter according to a first embodiment will be described with reference to the drawings. For example, the phase shifter according to this embodiment is mounted in an antenna device including a patch antenna, which is a type of planar antenna. The phase shifter according to this embodiment can be applied to transmitting radio waves to be transmitted and receiving radio waves to be received that arrive from the outside. For example, the phase shifter according to this embodiment can be applied to an antenna device used for transmitting and receiving signals to be transmitted and received in the high frequency bands used in mobile communications from fifth generation mobile communications onward. Hereinafter, the electrical length of the signals to be transmitted and received on the board will be represented as λ (λ is a real number).

[0012] (composition) 1 is a conceptual diagram showing an example of the configuration of a phase shifter according to the present disclosure. Phase shifter 10 includes 90-degree hybrid circuit 11, varactor 12A, varactor 12B, stub 13A, and stub 13B. Varactor 12A and varactor 12B have the same configuration. Hereinafter, when there is no need to distinguish between varactor 12A and varactor 12B, they will be referred to as varactor 12. Stub 13A and stub 13B have the same configuration. Hereinafter, when there is no need to distinguish between stub 13A and stub 13B, they will be referred to as stub 13.

[0013] The 90-degree hybrid circuit 11 is a 90-degree hybrid circuit including four transmission lines. Each of the four transmission lines forms one side of a rectangle. A port is formed at each vertex of the rectangle formed by the four transmission lines included in the 90-degree hybrid circuit 11. The 90-degree hybrid circuit 11 has a first port P1, a second port P2, a third port P3, and a fourth port P4. The first port P1 is an input end. A signal to be phase-shifted is input to the first port P1. The second port P2 is a reflection end (also referred to as a first reflection end). A varactor 12A is connected to the second port P2. The third port P3 is a reflection end (also referred to as a second reflection end). A varactor 12B is connected to the third port P3. The fourth port P4 is an output end. A phase-shifted signal is output from the fourth port P4.

[0014] 2 is a conceptual diagram for explaining a 90-degree hybrid circuit according to the present disclosure. The 90-degree hybrid circuit 11 includes four transmission lines (R1, R2, R3, R4). The electrical length of each of the four transmission lines (R1, R2, R3, R4) is λ / 4 (90 degrees). FIG. 2 is a conceptual diagram of the 90-degree hybrid circuit according to the present disclosure, and does not accurately represent the structure of the 90-degree hybrid circuit.

[0015] The transmission line R1 has an electrical length of λ / 4. The characteristic impedance of the transmission line R1 is Z0 / √2. A first end of the transmission line R1 is connected to a first port P1 (input end). The first end of the transmission line R1 is also connected to a first end of the transmission line R2. The second end of the transmission line R1 is connected to a first end of the transmission line R4. The second end of the transmission line R1 is also connected to a second port P2. A varactor 12A is connected to the second port P2.

[0016] The transmission line R2 has an electrical length of λ / 4. The characteristic impedance of the transmission line R2 is Z0. A first end of the transmission line R2 is connected to a first port P1 (input end). The first end of the transmission line R2 is also connected to a first end of the transmission line R1. A second end of the transmission line R2 is connected to a fourth port P4 (output end). The second end of the transmission line R2 is also connected to a first end of the transmission line R3.

[0017] The transmission line R3 has an electrical length of λ / 4. The characteristic impedance of the transmission line R2 is Z0 / √2. The first end of the transmission line R3 is connected to a fourth port P4 (output end). The first end of the transmission line R3 is connected to a second end of the transmission line R2. The second end of the transmission line R3 is connected to a second end of the transmission line R4. The second end of the transmission line R3 is connected to a third port P3. A varactor 12B is connected to the third port P3.

[0018] The transmission line R4 has an electrical length of λ / 4. The characteristic impedance of the transmission line R4 is Z0. A first end of the transmission line R4 is connected to a second end of the transmission line R1. The first end of the transmission line R4 is also connected to a second port P2. One end of the varactor 12A is connected to the second port P2. The second end of the transmission line R4 is connected to a second end of the transmission line R3. The second end of the transmission line R4 is also connected to a third port P3. The third port P3 is connected to a varactor 12B.

[0019] The varactors 12A and 12B are diodes with variable capacitance layers made of vanadium dioxide (VO2). The varactors 12A and 12B are variable capacitance varactors that utilize the insulating-to-metallic phase transition of vanadium dioxide (VO2). The vanadium dioxide (VO2) contained in the variable capacitance layer is an insulating layer below the phase transition temperature T. The vanadium dioxide (VO2) contained in the insulating phase variable capacitance layer undergoes a phase transition from insulating to metallic above the phase transition temperature T. The varactor 12A is disposed between the second port P2 of the 90-degree hybrid circuit 11 and the stub 13A. The first end of the varactor 12A is connected to the second port P2. The first end of the varactor 12A is connected to the second end of the transmission line R1 and the first end of the transmission line R4 via the second port P2. The second end of the varactor 12A is connected to the first end of the stub 13A. The varactor 12B is disposed between the third port P3 of the 90-degree hybrid circuit 11 and the stub 13B. A first end of the varactor 12B is connected to the third port P3. That is, the first end of the varactor 12B is connected to the second end of the transmission line R3 and the second end of the transmission line R4 via the third port P3. A second end of the varactor 12B is connected to the first end of the stub 13B.

[0020] Stub 13A and stub 13B are short stubs with one end connected to ground GND. Stub 13A and stub 13B function as inductors. Stub 13A and stub 13B may also be open stubs with one end open. The ground GND to which stub 13A and stub 13B are connected is at the same potential. Stub 13A is disposed between varactor 12A and ground GND. A first end of stub 13A is connected to a second end of varactor 12A. A second end of stub 13A is connected to ground GND. Stub 13B is disposed between varactor 12B and ground GND. A first end of stub 13B is connected to a second end of varactor 12B. A second end of stub 13B is connected to ground GND.

[0021] [Varactor] FIG. 3 is a conceptual diagram showing an example of the configuration of a varactor according to the present disclosure. FIG. 3 shows a cross-sectional view of the varactor cut longitudinally along a cutting line from the hybrid circuit to the stub. The varactor 12 includes a heat-generating drive circuit 121, a heat-generating element 122, a variable capacitance layer 123, an insulating layer 124, a capacitance-forming layer 125, a connection electrode 126, an upper electrode 127, and a ground plate 128. The varactor 12 includes a plurality of heat-generating drive circuits 121 and a plurality of heat-generating elements 122. The 90-degree hybrid circuit 11, the varactor 12, and the stub 13 are formed on a substrate 120. For example, the substrate 120 is an insulating plate-like member made of glass, epoxy resin, or the like. A matrix circuit of thin-film transistors (TFTs) is formed on the substrate 120.

[0022] The plurality of heat generating drive circuits 121 are formed on the upper surface of the substrate 120. The plurality of heat generating drive circuits 121 are formed in a two-dimensional array when viewed from above on the upper surface of the substrate 120. The plurality of heat generating drive circuits 121 are isolated by an insulating layer 124. Each of the plurality of heat generating drive circuits 121 is associated with one heat generating element 122. Each of the plurality of heat generating drive circuits 121 is used to control the temperature of the associated heat generating element 122.

[0023] Each of the plurality of heating elements 122 is associated with one heat generating drive circuit 121. Each of the plurality of heating elements 122 is disposed on the upper surface of the associated heat generating drive circuit 121. A variable capacitance layer 123 is formed on the upper surface of the plurality of heating elements 122. The plurality of heating elements 122 are isolated by an insulating layer 124. The plurality of heating elements 122 may be isolated by gaps formed in the insulating layer 124. The heating elements 122 are used to heat the variable capacitance layer 123 above. For example, the heating elements 122 are realized using an alloy mainly composed of nickel (Ni) or chromium (Cr). The heating elements 122 may also be realized using an alloy mainly composed of chromium (Cr), iron (Fe), and aluminum (Al). There is no particular limitation on the material of the heating elements 122. When a current is supplied to the heating elements 122, the temperature of the heating elements 122 increases. For example, the supply of current to the heating elements 122 can be controlled using a thin film transistor (TFT). The heat from the heating element 122 is transferred to the variable capacitance layer 123 .

[0024] The variable capacitance layer 123 is disposed above the multiple heating elements 122. The lower surface of the variable capacitance layer 123 and the upper surfaces of the multiple heating elements 122 are thermally connected. It is preferable that the lower surface of the variable capacitance layer 123 and the upper surfaces of the multiple heating elements 122 are in contact with each other. As long as the heat from the heating elements 122 is transferred to the variable capacitance layer 123 and the phase transition of the capacitance-forming layer 125 can be controlled, another layer may be interposed between the lower surface of the variable capacitance layer 123 and the upper surfaces of the multiple heating elements 122. The variable capacitance layer 123 is partially heated by the heat generated by the heating elements 122 located below.

[0025] The variable capacitance layer 123 contains vanadium dioxide VO2. The capacitance of the variable capacitance layer 123 changes due to a phase transition between the insulating phase and the metallic phase of vanadium dioxide VO2. The vanadium dioxide VO2 contained in the variable capacitance layer 123 has a composition that undergoes a phase transition from the insulating phase to the metallic phase at a phase transition temperature T. At temperatures lower than the phase transition temperature T, vanadium dioxide VO2 is in the insulating phase. At temperatures lower than the phase transition temperature T, electricity does not flow through vanadium dioxide VO2. At temperatures higher than the phase transition temperature T, vanadium dioxide VO2 is in the metallic phase. At temperatures higher than the phase transition temperature T, electricity flows through vanadium dioxide VO2. The phase transition of vanadium dioxide VO2 exhibits hysteresis when the temperature is increased and decreased. Therefore, the phase transition between the insulating phase and the metallic phase of vanadium dioxide VO2 can be adjusted within a temperature range that includes the phase transition temperature T.

[0026] For example, the variable capacitance layer 123 may have a variable capacitance layer containing vanadium dioxide VO2 to which no additional element has been added. For example, an additional element may be added to the vanadium dioxide VO2 contained in the variable capacitance layer 123. For example, an additional element may be added to the vanadium dioxide VO2 contained in the variable capacitance layer 123 to lower the phase transition temperature. When an additional element such as tungsten (W), magnesium (Mg), iron (Fe), molybdenum (Mo), fluorine (F), or niobium (Nb) is added, the phase transition temperature of vanadium dioxide VO2 is lowered.

[0027] The insulating layer 124 covers the top of the 90-degree hybrid circuit 11 and the stub 13. The insulating layer 124 also covers the sides of the heat generating drive circuit 121 and the heat generating element 122. The variable capacitance layer 123 is disposed above the insulating layer 124. For example, the insulating layer 124 is made of a general interlayer insulating material. For example, the insulating layer 124 is made of an inorganic material such as silicon dioxide. The insulating layer 124 may also be made of an organic material.

[0028] The capacitance-forming layer 125 is formed above the variable capacitance layer 123 and the insulating layer 124. A capacitance is formed in the capacitance-forming layer 125 according to the potential difference between the portion of the variable capacitance layer 123 that has undergone a phase transition to a metallic phase and the upper electrode 127. The potential difference between the portion of the variable capacitance layer 123 and the upper electrode 127 is controlled by a controller (not shown). For example, the capacitance-forming layer 125 is made of a common interlayer insulating material. For example, the capacitance-forming layer 125 is made of a material such as silicon dioxide.

[0029] The connection electrode 126 electrically connects the 90-degree hybrid circuit 11 and the variable capacitance layer 123. A portion of the connection electrode 126 is electrically connected to the 90-degree hybrid circuit 11 through an opening formed in the insulating layer 124 and the capacitance-forming layer 125. Another portion of the connection electrode 126 is electrically connected to a part of the variable capacitance layer 123 through an opening formed in the capacitance-forming layer 125. For example, the connection electrode 126 is made of a metal such as aluminum or copper.

[0030] The upper electrode 127 is disposed above the capacitance-forming layer 125. A portion of the upper electrode 127 is electrically connected to the stub 13 through an opening formed in the insulating layer 124 and the capacitance-forming layer 125. For example, the upper electrode 127 is realized by a metal such as aluminum or copper.

[0031] The ground plate 128 is disposed on the lower surface of the substrate 120. The ground plate 128 is disposed to control the characteristic impedance in the layers that constitute the varactor 12. The ground plate 128 is disposed so as to cover at least the region below the variable capacitance layer 123. The ground plate 128 may be disposed over the entire lower surface of the substrate 120.

[0032] [Heat generation drive circuit] FIG. 4 is a conceptual diagram showing an example of the circuit configuration of a heat generation drive circuit according to the present disclosure. Heat generation drive circuit 121 includes a transistor S, a transistor D, and a capacitor C. FIG. 4 shows an example in which a heat generation element 122 is realized by a resistive element. The connection relationship between transistor S, transistor D, capacitor C, and heat generation element 122 will be explained below. In the following explanation, parentheses indicate the directions on the paper surface of FIG. 4. Note that FIG. 4 shows an example of the circuit configuration of a heat generation drive circuit according to the present disclosure, and is not intended to limit the circuit configuration of the heat generation drive circuit.

[0033] The transistor S is used to select the heating element 122. The first end (left side) of the diffusion layer of the transistor S is connected to a voltage V data The second end (right side) of the diffusion layer of transistor S is connected to the first electrode (bottom side) of capacitor C and the gate (left side) of transistor D. The gate (top side) of transistor S is connected to the voltage V scan is connected to a source of

[0034] Capacitor C is used to control the voltage applied to the gate of transistor D. The first electrode (bottom) of capacitor C is connected to the second end (right side) of the diffusion layer of transistor S and the gate (left side) of transistor D. The second electrode (top) of capacitor C is connected to the voltage V cap The second electrode (top side) of the capacitor C is connected to a voltage V cap is applied.

[0035] The transistor D is used to control the voltage supplied to the heating element 122. The first end (upper side) of the diffusion layer of the transistor D is connected to the voltage V a The first end (top side) of the diffusion layer of transistor D is connected to the source of voltage V a is applied. A second end (lower side) of the diffusion layer of transistor D is connected to a first electrode (lower side) of heating element 122. A gate (left side) of transistor D is connected to a second end (right side) of the diffusion layer of transistor S and a first end (lower side) of capacitor C.

[0036] The first end (upper side) of the heating element 122 is connected to the second end (lower side) of the diffusion layer of the transistor D. The second end (lower side) of the heating element 122 is connected to the voltage V k The second end (bottom side) of the heating element 122 is connected to a supply of voltage V k A voltage V is applied. scan When the transistor S transitions to the ON state by applying the voltage V data and voltage V cap The difference voltage between V and V is applied to capacitor C. When capacitor C is fully charged, transistor S transitions to the OFF state. After transistor S transitions to the OFF state, capacitor C maintains the voltage, and transistor D continues to remain ON according to that potential. When transistor D is ON, voltage V a and voltage V k A voltage corresponding to the potential difference between the two electrodes and a current corresponding to the resistance value of the heating element 122 flows, causing the heating element 122 to generate heat. The heat generated in the heating element 122 is transferred to the variable capacitance layer 123, which is in thermal contact with the heating element 122.

[0037] 5 is a block diagram showing an example of the configuration of an antenna device including a phase shifter according to the present disclosure. The antenna device 1 includes a phase shifter 10 and a control circuit 17. The control circuit 17 is a circuit that controls the phase shifter 10. For example, the control circuit 17 is implemented by a microcomputer including a processor and a memory. The control circuit 17 controls the heat generating drive circuit 121 included in the varactor 12 of the phase shifter 10 to control the conductor pattern of the variable capacitance layer 123. The capacitance of the varactor 12 is adjusted according to the control of the control circuit 17. The control circuit 17 may be configured as a component of the phase shifter 10.

[0038] [Capacity control] Next, capacitance control of the variable capacitance layer 123 will be described with reference to the drawings. FIGS. 6 to 13 are conceptual diagrams illustrating an example of capacitance control of the variable capacitance layer according to the present disclosure. FIGS. 6, 8, 10, and 12 are cross-sectional views of a portion of the varactor cut longitudinally along a cutting line extending from the hybrid circuit to the stub. FIGS. 7, 9, 11, and 13 are plan views of the top surface of the varactor viewed from above. Each square in the grid shown in FIGS. 7, 9, 11, and 13 represents a portion where vanadium dioxide VO2 contained in the variable capacitance layer undergoes a phase transition due to a single heating element. In the following description, it is assumed that the 90-degree hybrid circuit 11 is located to the left of the varactor 12, and the stub 13 is located to the right of the varactor 12.

[0039] 6 to 13 show a plurality of heat generating drive circuits 121-1 to 4 and a plurality of heat generating elements 122-1 to 4. The plurality of heat generating drive circuits 121-1 to 4 are controlled in the same manner in the short-side direction of the varactor 12. Heat generating element 122-1 is associated with heat generating drive circuit 121-1. When heat generating drive circuit 121-1 transitions to ON, heat generating element 122-1 generates heat. Heat generating drive circuit 121-2 is associated with heat generating element 122-2. When heat generating drive circuit 121-2 transitions to ON, heat generating element 122-2 generates heat. Heat generating drive circuit 121-3 is associated with heat generating element 122-3. When heat generating drive circuit 121-3 transitions to ON, heat generating element 122-3 generates heat. Heat generating drive circuit 121-4 is associated with heat generating element 122-4. When the heat generating drive circuit 121-4 transitions to ON, the heat generating element 122-4 generates heat.

[0040] 6 and 7 are conceptual diagrams showing an example of a state in which the heat generating elements included in the varactor of the phase shifter according to the present disclosure are not heated. In this example, none of the multiple heat generating drive circuits 121-1 to 121-4 is selected. Therefore, none of the multiple heat generating elements 122-1 to 122-4 generates heat. FIG. 7 shows a state in which one entire surface of the varactor 12 has not transitioned to a conductor. Thus, in the example of FIGS. 6 to 7, the variable capacitance layer 123 does not transition to a conductor.

[0041] 8 and 9 are conceptual diagrams showing an example of a state in which some of the heating elements included in the varactors of the phase shifter according to the present disclosure are heated. In this example, the heating drive circuit 121-1 is selected. Therefore, the heating element 122-1 generates heat in response to the selection of the heating drive circuit 121-1. In FIG. 9, hatching indicates a state in which some of the varactors 12 heated in response to the heat generated by the heating element 122-1 transition to a conductor. In this way, in the example of FIGS. 8 and 9, the variable capacitance layer 123 above the heated heating element 122-1 transitions to a conductor.

[0042] 10 and 11 are conceptual diagrams showing another example of a state in which some of the heating elements included in the varactor of the phase shifter according to the present disclosure are heated. In this example, the heating drive circuits 121-1 and 121-2 are selected. Therefore, the heating elements 122-1 and 122-2 generate heat in response to the selection of the heating drive circuits 121-1 and 121-2. In FIG. 11, hatching indicates a state in which some of the varactors 12 heated in response to the heat generated by the heating elements 122-1 and 122-2 transition to a conductor. In this way, in the example of FIGS. 10 and 11, the variable capacitance layer 123 above the heated heating elements 122-1 and 122-2 transitions to a conductor.

[0043] 12 and 13 are conceptual diagrams showing an example of a state in which all the heat-generating elements included in the varactors of the phase shifter according to the present disclosure are heated. In this example, all of the heat-generating drive circuits 121-1 to 121-4 are selected. Therefore, the heat-generating elements 122-1 to 122-4 generate heat in response to the selection of the heat-generating drive circuits 121-1 to 121-4. In FIG. 13, hatching indicates a state in which all of the varactors 12 heated in response to the heat generated by the heat-generating elements 122-1 to 122-4 have transitioned to a conductor. In this way, in the example of FIGS. 12 and 13, the variable capacitance layer 123 above the heated heat-generating elements 122-1 to 122-4 transitions to a conductor.

[0044] 6 to 13, the capacitance of the variable capacitance layer 123 can be controlled by selecting the heat generating drive circuit 121 associated with the heat generating element 122 whose conductor is to be transitioned. The amount of phase shift of the phase shifter 10 can be adjusted according to the capacitance of the variable capacitance layer 123.

[0045] [Conductor pattern] Next, an example of forming a conductor pattern on the variable capacitance layer 123 by controlling multiple heating elements 122 will be described. FIGS. 14 to 16 are conceptual diagrams showing examples of conductor patterns formed on a varactor of a phase shifter according to the present disclosure. FIGS. 14 to 16 are plan views of the top surface of the varactor viewed from above. Each square in the grid shown in FIGS. 14 to 16 indicates a portion where vanadium dioxide VO2 contained in the variable capacitance layer undergoes a phase transition due to one heating element. In FIGS. 14 to 16, the conductor patterns formed on the varactor are indicated by hatching. In the following description, it is assumed that a 90-degree hybrid circuit 11 is disposed on the left side of the varactor 12, and a stub 13 is disposed on the right side of the varactor 12.

[0046] 14 is a conceptual diagram showing a first example of a conductor pattern formed on a varactor of a phase shifter according to the present disclosure. In this first example, of the columns formed by the lattice that has transitioned to a conductor, all five columns on the left have transitioned to a conductor, but the upper portions of the two columns on the right have not. In this first example, a non-rectangular, asymmetric conductor pattern is formed on varactor 12.

[0047] 15 is a conceptual diagram showing a second example of a conductor pattern formed on a varactor of a phase shifter according to the present disclosure. In the second example, of the columns formed by the lattice that has transitioned to a conductor, all three columns on the left have transitioned to a conductor, but some of the eight columns on the right have not. In the second example, an E-shaped conductor pattern is formed.

[0048] 16 is a conceptual diagram showing a third example of a conductor pattern formed on a varactor of a phase shifter according to the present disclosure. In the third example, a portion of the rectangle formed by the lattice that has transitioned to a conductor does not transition to a conductor. In the third example, a conductor pattern is formed in which a portion of the lattice is missing.

[0049] 14 to 16, the conductor pattern formed on the varactor 12 can be set to any shape. For example, the conductor pattern formed on the varactor 12 can be set in detail according to the desired amount of phase shift.

[0050] 17 is an example of a table (phase shift table 130) used to select a conductor pattern formed in a varactor according to the present disclosure. The phase shift table 130 includes a conductor pattern P corresponding to a desired phase shift amount. c is stored. Conductor pattern P c The conductor pattern P c The amount of phase shift 0 corresponds to an address indicating the position of the heating element 122 that generates heat to form the conductive pattern P c1 The phase shift amount 1 / 4λ corresponds to the conductor pattern P c2 The phase shift amount 1 / 2λ corresponds to the conductor pattern P c3 For example, a desired phase shift amount is set via an input device (not shown). The control circuit 17 selects the conductor pattern P corresponding to the set desired phase shift amount. c As a result, the capacitance of the varactor 12 is set according to the desired amount of phase shift.

[0051] [Manufacturing method] Next, a method for manufacturing the phase shifter 10 according to this embodiment will be described with reference to the drawings. Figs. 18 to 21 are conceptual diagrams for explaining an example of a method for manufacturing a phase shifter according to the present disclosure. Figs. 18 to 21 show cross-sectional views of a portion of the phase shifter 10. Figs. 18 to 21 show an extracted portion of the manufacturing process for the phase shifter 10, which is a manufacturing process for a varactor 12 including a variable capacitance layer 123 made of vanadium dioxide VO2.

[0052] FIG. 18 shows a state in which an insulating layer 124 is formed above a heat generating drive circuit 121 and heat generating elements 122 formed on the upper surface of a substrate 120. For example, the substrate 120 is a glass substrate. The heat generating drive circuit 121 is formed on the upper surface of the substrate 120 as a switch control circuit matrix using TFTs. The heat generating elements 122 are formed on the upper surface of the heat generating drive circuit 121. The heat generating elements 122 are switched by a switch control circuit matrix composed of multiple heat generating drive circuits 121. The insulating layer 124 is formed to prevent the heat generating drive circuit 121 and the heat generating elements 122 from unnecessary contact with the upper side. The material of the insulating layer 124 may be an inorganic material or an organic material. For example, the insulating layer 124 is formed by chemical vapor deposition or physical vapor deposition.

[0053] 19 shows a state in which the insulating layer 124 formed above the heat generating drive circuit 121 and the heat generating elements 122 has been planarized. Planarization is a process for improving the flatness of the variable capacitance layer 123 that is laminated above. For example, the insulating layer 124 is planarized by CMP (Chemical Mechanical Polishing). The insulating layer 124 may also be planarized by reflowing an organic film and then etching it back.

[0054] 20 shows a state in which a variable capacitance layer 123 containing vanadium dioxide VO2 is laminated on the top surface of a planarized insulating layer 124. For example, the variable capacitance layer 123 is formed by heat treating or irradiating a vanadium film formed by chemical vapor deposition or physical vapor deposition. The variable capacitance layer 123 may also be formed by baking or irradiating with ultraviolet light a film containing a vanadium organic compound formed by a method such as spin coating.

[0055] FIG. 21 shows a state in which a connection electrode 126 is formed in a contact hole formed in a part of a capacitance-forming layer 125 formed on the upper surface of the variable capacitance layer 123. The capacitance-forming layer 125 is an insulating layer. The material of the capacitance-forming layer 125 may be an inorganic material or an organic material. For example, the capacitance-forming layer 125 is formed by chemical vapor deposition or physical vapor deposition. For example, the contact hole is formed using a technique such as photolithography. The connection electrode 126 is formed in a region including the contact hole. For example, the connection electrode 126 can be formed by depositing metal from above a photoresist on which an electrode pattern is formed and then removing the photoresist. There are no particular limitations on the method for forming the connection electrode 126.

[0056] 18 to 21 are merely examples and do not limit part of the manufacturing process of the phase shifter 10. The manufacturing process of the phase shifter 10 may include steps other than those shown in FIGS. 18 to 21. The phase shifter 10 is built into an antenna device that functions as a phased array antenna. Therefore, the manufacturing steps shown in FIGS. 18 to 21 are included in the manufacturing process of an antenna device that incorporates the phase shifter 10.

[0057] As described above, the phase shifter according to this embodiment includes a 90-degree hybrid circuit, a varactor, and a stub. The 90-degree hybrid circuit has two reflection ends. For example, the 90-degree hybrid circuit is a 90-degree hybrid circuit having two reflection ends. The varactor has a variable capacitance layer made of vanadium dioxide. The varactor is disposed at the reflection end of the 90-degree hybrid circuit. One varactor is disposed at each of the two reflection ends of the 90-degree hybrid circuit. The stub is connected to the reflection end of the 90-degree hybrid circuit via the varactor. One stub is disposed at each of the two varactors. The stubs are short stubs.

[0058] The phase shifter of this embodiment has a variable capacitance layer made of vanadium dioxide. By controlling the temperature, a conductor pattern is formed in the variable capacitance layer according to the phase transition between the insulating phase and the metallic phase of vanadium dioxide. By controlling the size and shape of the formed conductor pattern, a continuous phase shift amount can be stably set in the variable capacitance layer. Therefore, the phase shifter of this embodiment can achieve continuous phase shift change with a stable phase shift amount.

[0059] In one aspect of this embodiment, the varactor includes a plurality of heating elements and a plurality of heating drive circuits. The plurality of heating elements are arranged in an array along one surface of the variable capacitance layer. Each of the plurality of heating drive circuits is arranged corresponding to one of the plurality of heating elements. Each of the plurality of heating elements is thermally connected to the variable capacitance layer. Depending on the selection of the heating element, each of the plurality of heating drive circuits causes the heating element to generate heat up to a temperature exceeding the phase transition temperature of the vanadium dioxide contained in the variable capacitance layer. According to this aspect, a desired phase shift amount can be set by selecting the heating element depending on the phase shift amount.

[0060] In one aspect of this embodiment, a conductor pattern is formed on the variable capacitance layer by heat generation according to a selection of multiple heat generating elements. A capacitance corresponding to the conductor pattern formed on the variable capacitance layer is formed in the varactor. According to this aspect, a desired phase shift amount can be set by forming a conductor pattern on the variable capacitance layer according to the phase shift amount.

[0061] In one aspect of this embodiment, the variable capacitance layer is provided with a conductor pattern that extends in a rectangular shape from the reflection end toward the stub in accordance with the capacitance of the varactor that corresponds to the desired amount of phase shift. According to this aspect, by forming the conductor pattern that extends in a rectangular shape on the variable capacitance layer, the desired amount of phase shift can be set.

[0062] In one aspect of this embodiment, a conductor pattern of an arbitrary shape is formed on the variable capacitance layer from the reflection end toward the stub according to the capacitance of the varactor corresponding to the desired phase shift. According to this aspect, by forming a conductor pattern of an arbitrary shape on the variable capacitance layer, the desired phase shift can be set more precisely.

[0063] In one aspect of this embodiment, a phase-shift table in which conductor patterns corresponding to the amount of phase shift are registered is used to select a heat generating drive circuit that causes a heat generating element used to form a conductor pattern corresponding to the desired amount of phase shift to generate heat. A conductor pattern corresponding to the conductor pattern set using the phase-shift table is formed on the variable capacitance layer. According to this aspect, the desired amount of phase shift can be easily set using the phase-shift table.

[0064] (Second embodiment) Next, an antenna device according to a second embodiment will be described with reference to the drawings. The planar antenna of this embodiment includes a patch antenna, which is a type of planar antenna. In the following, descriptions of a transmitting device that transmits radio waves from the planar antenna and a receiving device that receives radio waves received by the planar antenna will be omitted. For example, the planar antenna of this embodiment is used for transmitting and receiving electromagnetic waves in a high frequency band that is expected to be applied to mobile communications of B5G (Beyond 5th Generation), which follows 5G (5th Generation). For example, the planar antenna of this embodiment is used for transmitting and receiving millimeter wave and terahertz wave signals. Note that the planar antenna of this embodiment may also be used for transmitting and receiving signals other than millimeter wave and terahertz wave signals.

[0065] The antenna device of this embodiment includes the phase shifter according to the first embodiment. For example, the phase shifter is formed using a manufacturing process technology for a micro LED (Light-Emitting Diode) display. The planar antenna of this embodiment includes a switching element formed using a manufacturing process technology for a thin film transistor (TFT). The planar antenna of this embodiment is manufactured by combining a manufacturing process technology for a micro LED display (micro LED process technology) and a manufacturing process technology for a thin film transistor (TFT process technology). Note that the planar antenna of this embodiment may also be manufactured using a technology other than the micro LED process technology and the TFT process technology.

[0066] (composition) Fig. 22 is a conceptual diagram showing an example of the configuration of an antenna device according to the present disclosure. Fig. 22 shows an example of the external appearance of an antenna device. The antenna device 2 includes a planar antenna 200. An antenna array 20 is arranged on the upper surface of the planar antenna 200. The antenna array 20 is composed of a plurality of patch antennas P. The plurality of patch antennas P are arranged in a two-dimensional array. In the example of Fig. 22, the plurality of patch antennas P are arranged along the X direction and the Y direction. The plurality of patch antennas P are arranged in a phased array. That is, the antenna device 2 functions as a phased array antenna.

[0067] The antenna device 2 is mounted with a first drive circuit 271 and a second drive circuit 272. The first drive circuit 271 and the second drive circuit 272 are circuits used to select the patch antenna P to be driven. By driving the first drive circuit 271 and the second drive circuit 272, it is possible to select an address associated with each patch antenna P. The first drive circuit 271 and the second drive circuit 272 may be formed on the surface of the planar antenna 200 or may be formed inside the planar antenna 200.

[0068] Fig. 23 is a conceptual diagram showing an example of the configuration of an antenna device according to the present disclosure. Fig. 23 is a cross-sectional view of the antenna device 2 cut along a cutting line passing through the patch antenna P. The antenna device 2 has the patch antenna P, an insulating layer, a ground layer, a signal line layer, a substrate 220, and a phase shifter forming layer. The insulating layer includes a first insulating layer 241, a second insulating layer 242, a third insulating layer 243, and a fourth insulating layer 244. The ground layer includes a first ground layer 251, a second ground layer 252, and a third ground layer 253. The signal line layer includes a signal line L s1 and signal line L s2 The phase shifter forming layer has a phase shifter 21 formed thereon that corresponds to the patch antenna P. FIG. 23 shows an example in which the signal line layer and the patch antenna P are formed on different layers. The antenna device according to this embodiment may also be configured as a coplanar antenna in which the signal line layer and the patch antenna P are formed on the same layer. Note that the third ground layer 253 may not be provided, and the substrate 220 may be disposed at the position of the fourth insulating layer 244.

[0069] The antenna array 20 is disposed on the upper surface of the first insulating layer 241. The antenna array 20 is composed of a plurality of patch antennas P. Although FIG. 23 illustrates a single patch antenna P, the antenna device 2 includes a plurality of patch antennas P. The plurality of patch antennas P are arranged in a lattice pattern along two directions that are orthogonal to each other. The plurality of patch antennas P are arranged in a phased array. The patch antenna P is a plate-shaped radiating element. For example, the patch antenna P is rectangular. The shape of the patch antenna P is not limited to rectangular, and may be circular or another shape.

[0070] The patch antenna P is fed by an electromagnetic coupling feeding method. The patch antenna P is connected to the signal line L formed below the second insulating layer 242 via the slot S0. s2 The patch antenna P and the signal line L are electromagnetically coupled through the slot S0. s2 The patch antenna P is excited by electromagnetic coupling between the signal line L and the slot S0. s2The impedance can be matched by arranging the open end of the slot S0 and adjusting the dimensions of the slot S0. For example, the shape of the slot S0 is rectangular. For example, the shape of the slot S0 may be a shape other than a rectangle, such as a dogbone shape.

[0071] The patch antenna P has a structure equivalent to a microstrip line with open ends. The resonant frequency of the patch antenna P is an integer multiple of half the wavelength, which corresponds to the length of one side of the patch antenna P. The size of the patch antenna P is set according to the wavelength of the radio waves to be transmitted. Because the patch antenna P is an open-type resonator that resonates at the resonant frequency, its Q value decreases due to radio wave radiation. To avoid this decrease in Q value due to radio wave radiation and enable the patch antenna P to function as a resonator, it is preferable that the dielectric constant of the material of the insulating layer and the substrate 220 be as high as possible. The higher the dielectric constant of the material of the insulating layer and the substrate 220, the more effectively radio wave transmission can be suppressed. If the material of the insulating layer and the substrate 220 is high-dielectric, the thickness of the insulating layer and the substrate 220 and the width of the patch antenna P are set to be sufficiently small compared to the wavelength of the radio waves used in communication. For example, if the material of the insulating layer and the substrate 220 is low-dielectric, a microstrip antenna can be constructed by increasing the thickness of the insulating layer and the width of the patch antenna P relative to the wavelength of the radio waves to be transmitted, thereby increasing the radiation amount.

[0072] It is preferable that the patch antenna P radiates signals (radio waves) easily into space. In contrast, it is preferable that internal wiring such as signal lines and wires radiate signals less easily. In other words, the smaller the dielectric constant required around the patch antenna P, the better, and the larger the dielectric constant required around the internal wiring, the better. Therefore, it is preferable to apply different manufacturing processes to the structure around the patch antenna P and the structure around the internal wiring. For example, the structure of the antenna device 2 of this embodiment can be realized by applying a technique in which the structure around the patch antenna P is formed using a liquid crystal process and the structure around the internal wiring is formed using a thin-film process.

[0073] The first insulating layer 241 forms the surface of the antenna device 2. The first insulating layer 241 is laminated on the upper surface of the first ground layer 251. For example, the material of the first insulating layer 241 is glass, glass epoxy, tetrafluoroethylene, epoxy, etc. As long as it is possible to transmit and receive radio waves for communication, the first insulating layer 241 may be made of a material other than glass, glass epoxy, tetrafluoroethylene, epoxy, etc.

[0074] The first ground layer 251 is laminated on the upper surface of the second insulating layer 242. The first insulating layer 241 is laminated on the upper surface of the first ground layer 251. For example, the material of the first ground layer 251 is a metal (including alloys) such as copper, aluminum, or chromium. The potential of the first ground layer 251 is the ground potential. An opening is formed in the first ground layer 251. The opening formed in the first ground layer 251 is called a slot S0. The slot S0 is formed below the patch antenna P. Directly below the slot S0, a signal line L s2 The signal line L s2 The signal propagating through the signal line L s2 and the patch antenna P, the electromagnetic coupling EC between the patch antenna P and the ground wave propagates to the patch antenna P.

[0075] The second insulating layer 242 is formed above the signal line layer. A first ground layer 251 is formed on the upper surface of the second insulating layer 242. An opening (air gap) may be formed in the portion of the second insulating layer 242 below the patch antenna P. When the air gap is formed, the signal line L s2 The dielectric constant between the signal line L and the patch antenna P decreases. s2 An air gap may be formed to reduce the dielectric constant between the patch antenna P and the second insulating layer 242. For example, the material of the second insulating layer 242 may be glass, glass epoxy, tetrafluoroethylene, epoxy, or the like. As long as the second insulating layer 242 is capable of transmitting and receiving radio waves for communication, it may be made of a material other than glass, glass epoxy, tetrafluoroethylene, or epoxy.

[0076] The signal line layer is formed on the upper surface of the third insulating layer 243. The second insulating layer 242 is laminated on the upper surface of the signal line layer. s1 and signal line L s2 Signal line L s1 (first signal line) is connected to a signal source (not shown). s1 The signal transmitted from the signal source propagates through the signal line L. s1 The signal before phase shift propagates through the signal line L. s2 The signal line L (second signal line) is extended to pass under the slot S0 of the first ground layer 251. s2 A capacitance is formed between the signal line L and the patch antenna P according to the dielectric constants of the first insulating layer 241 and the second insulating layer 242. s2 The signal whose phase has been shifted by the phase shifter 21 is propagated to the patch antenna P by electromagnetic coupling EC via the slot S0.

[0077] The third insulating layer 243 is formed above the second ground layer 252. A signal line layer is formed on the upper surface of the third insulating layer 243. For example, the material of the third insulating layer 243 is glass, glass epoxy, tetrafluoroethylene, epoxy, or the like. As long as the third insulating layer 243 is capable of transmitting and receiving radio waves for communication, it may be made of a material other than glass, glass epoxy, tetrafluoroethylene, or epoxy.

[0078] The second ground layer 252 is laminated on the upper surface of the fourth insulating layer 244. The second insulating layer 242 is laminated on the upper surface of the second ground layer 252. For example, the material of the second ground layer 252 is a metal (including alloys) such as copper, aluminum, or chromium. The potential of the second ground layer 252 is the ground potential. Two types of openings are formed in the second ground layer 252. The two types of openings formed in the second ground layer 252 are called slots S1 and slots S2. The slots S1 are for connecting the signal line L s1 and the phase shifter 21. The slot S2 is s2 and the phase shifter 21. s1A capacitance is formed between the signal line L and the phase shifter 21 according to the dielectric constants of the third insulating layer 243 and the fourth insulating layer 244. Similarly, s2 Between the signal line L and the phase shifter 21, a capacitance is formed according to the dielectric constants of the third insulating layer 243 and the fourth insulating layer 244. s1 The signal propagating through the signal line L is propagated to the phase shifter 21 by electromagnetic coupling EC via the slot S1. The signal propagating through the phase shifter 21 is phase-shifted by the phase shift amount set in the phase shifter 21, and is then coupled to the signal line L by electromagnetic coupling EC via the slot S2. s2 propagates to.

[0079] The fourth insulating layer 244 is formed above the phase shifter-forming layer. A second ground layer 252 is formed on the upper surface of the fourth insulating layer 244. For example, the material of the fourth insulating layer 244 is glass, glass epoxy, tetrafluoroethylene, epoxy, or the like. As long as the fourth insulating layer 244 is capable of transmitting and receiving radio waves for communication, the fourth insulating layer 244 may be made of a material other than glass, glass epoxy, tetrafluoroethylene, or epoxy.

[0080] A phase shifter 21 is formed on the phase shifter forming layer for each patch antenna P. The phase shifter forming layer is formed on the upper surface of the substrate 220. A fourth insulating layer 244 is formed on the upper surface of the phase shifter forming layer. Two types of openings (slots S1 and S2) are formed in the second ground layer 252 above the phase shifter 21. A signal line L is formed above the phase shifter 21 via the slot S1. s1 Above the phase shifter 21 via the slot S2, a signal line L s2 The signal line L s1 The signal propagating through the signal line L is propagated to the phase shifter 21 by electromagnetic coupling EC via the slot S1. The signal propagating through the phase shifter 21 is phase-shifted by the phase shift amount set in the phase shifter 21, and is then coupled to the signal line L by electromagnetic coupling EC via the slot S2. s2 propagates to.

[0081] The substrate 220 is disposed below the phase shifter formation layer. A matrix circuit, TFT wiring, and phase shifters 21 are formed on the upper surface of the substrate 220. The matrix circuit has a structure in which a plurality of thin film transistors (TFTs) are arranged in a two-dimensional array. For example, the TFTs included in the matrix circuit are formed using TFT process technology. The TFT wiring includes a plurality of selection lines used to select the phase shifters 21 and a plurality of data lines used to write phase shift data to the phase shifters 21. For example, the material of the substrate 220 is glass, glass epoxy, tetrafluoroethylene, epoxy, or the like. As long as the substrate 220 is capable of transmitting and receiving radio waves for communication, it may be made of a material other than glass, glass epoxy, tetrafluoroethylene, epoxy, or other resin.

[0082] 24 is a conceptual diagram showing an example of a matrix circuit formed on the upper surface of a substrate according to the present disclosure. FIG. 24 is a plan view of the surface on which the matrix circuit is formed, viewed from above. TFT wiring is formed in the phase shifter formation layer. The TFT wiring is a selection line group G including a plurality of selection lines. Ls and a data line group G consisting of a plurality of data lines. Ld Each of the multiple selection lines included in the selection line group GLs is used to select the phase shifter 21. Ld Each of the plurality of data lines included in the group G is used to propagate a signal emitted through the phase shifter 21. The TFT wiring includes a group of selection lines G Ls and data line group G Ld Other wiring may also be included.

[0083] A third ground layer 253 is disposed on the lower surface of the substrate 220. The third ground layer 253 is made of a conductor. For example, the material of the third ground layer 253 is a metal (including alloys) such as copper, aluminum, or chromium. The potential of the third ground layer 253 is a ground potential. Therefore, a capacitance according to the dielectric constant of the substrate 220 is formed between the phase shifter 21 and the third ground layer 253.

[0084] From the signal source (not shown) to the signal line L s1The signal supplied to the phase shifter 21 is propagated to the phase shifter 21 by electromagnetic coupling via the slot S1. The signal propagated to the phase shifter 21 is phase-shifted according to the phase shift amount set in the phase shifter 21. The phase-shifted signal is then transmitted from the phase shifter 21 to the signal line L by electromagnetic coupling via the slot S2. s2 The signal whose phase has been shifted by the phase shifter 21 propagates to the signal line L s2 The signal that has reached the area below the patch antenna P propagates along the signal line L due to electromagnetic coupling via the slot S0. s2 The signal propagates from the patch antenna P to the patch antenna P. The signal propagated to the patch antenna P is transmitted as a radio signal from a phased array antenna made up of multiple patch antennas P.

[0085] Fig. 25 is a conceptual diagram showing an example of the configuration of an antenna device according to the present disclosure. The antenna device shown in Fig. 25 differs from the antenna device shown in Fig. 23 in that a fourth ground layer is formed in the same layer as the phase shifter-forming layer. The fourth ground layer 254 is electrically connected to the third ground layer 253 by a plurality of vias 255 that penetrate the fourth insulating layer 244. The plurality of vias 255 are formed inside through holes that penetrate the fourth insulating layer 244. The fourth ground layer 254 is grounded to the same potential as the third ground layer 253 by the plurality of vias 255. Compared to the configuration of Fig. 23, the configuration of Fig. 25 allows for more reliable grounding within the antenna device.

[0086] 26 is a block diagram showing an example of the functional configuration of an antenna device according to the present disclosure. The antenna device 2 includes an antenna array 20, a phase shifter 21, a matrix circuit 22, a control circuit 28, and a signal source 29.

[0087] The matrix circuit 22 has a configuration in which a plurality of thin film transistors (TFTs) are arranged in a two-dimensional array. The matrix circuit 22 is formed using TFT process technology. Each of the plurality of TFTs included in the matrix circuit 22 corresponds to one of the plurality of patch antennas P included in the antenna array 20. For example, the TFT includes a semiconductor layer such as amorphous silicon or polysilicon. Each of the plurality of pixels formed in the matrix circuit 22 corresponds to a patch antenna P.

[0088] A phase shifter 21 is disposed for each antenna unit. The phase shifter 21 is the phase shifter 10 according to the first embodiment. The phase shifter 21 is associated with the patch antenna P. A heat generating drive circuit (not shown) included in the phase shifter 21 is associated with each of the plurality of pixels formed in the matrix circuit 22. A heat generating element (not shown) included in the phase shifter 21 generates heat in accordance with the selection of the heat generating drive circuit. A conductor pattern according to the desired phase shift amount is set for a varactor (not shown) included in the phase shifter 21. The capacitance of the varactor is adjusted according to the set conductor pattern. As a result, a phase shift amount according to the capacitance of the varactor is set for the phase shifter 21.

[0089] The drive circuit 27 includes a first drive circuit 271 and a second drive circuit 272. The first drive circuit 271 is a circuit for performing addressing in the X direction. The second drive circuit 272 is a circuit for performing addressing in the Y direction. The drive circuit 27 drives the TFTs included in the matrix circuit 22 in accordance with the control of the control circuit 28. The drive circuit 27 individually drives the multiple TFTs included in the matrix circuit 22.

[0090] The control circuit 28 drives the drive circuit 27 in response to an external control signal. The control circuit 28 drives the drive circuit 27 by an active matrix drive method. The control circuit 28 drives the first drive circuit 271 and the second drive circuit 272 in conjunction with each other to designate an address associated with each patch antenna P. The control circuit 28 also outputs the external control signal to the signal source 29.

[0091] For example, the control circuit 28 is realized by a microcomputer (also called a microcomputer) or a microcontroller. For example, the control circuit 28 includes a CPU (Central Processing Unit), RAM (Random Access Memory), ROM (Read Only Memory), flash memory, etc. The control circuit 28 executes control and processing according to a pre-stored program. The control circuit 28 executes control and processing according to the program in accordance with a pre-set schedule, timing, external control instructions, etc. For example, the control circuit 28 controls the antenna array 20 composed of multiple patch antennas P included in the planar antenna 200 to transmit directional radio waves from the antenna array 20. In this way, the antenna array 20 is used as a phased array antenna.

[0092] The signal source 29 is connected to the phase shifter 21 via a signal line. The signal source 29 is also connected to the control circuit 28. The signal source 29 sends a signal to the phase shifter 21 in accordance with the control of the control circuit 28. The signal source 29 may be configured to receive a signal from outside without passing through the control circuit 28.

[0093] A signal that reaches the signal input section of the phase shifter 21 through a signal line (not shown) connected to an ON-state TFT is phase-shifted by the phase shift amount set in the phase shifter 21. The phase-shifted signal propagates from the signal line to the patch antenna P by electromagnetic coupling. Radio waves derived from the signal propagated to the patch antenna P are transmitted from the patch antenna P. The radio waves transmitted from the patch antenna P are based on a signal output from a transmission circuit (not shown). There are no particular limitations on the information contained in the signal.

[0094] Furthermore, the radio waves received by the patch antenna P are received according to a capacitance based on the dielectric constant of a dielectric such as an insulating layer or a TFT substrate interposed between the patch antenna P and the signal line. The phase of the received radio waves is shifted by the phase shift amount set in the phase shifter 21. The phase-shifted signal is received by a receiving circuit (not shown) through the signal line. Information contained in the signal received by the receiving circuit is decoded by a decoder (not shown).

[0095] As described above, the antenna device of this embodiment includes the phase shifter of the first embodiment and an antenna array in which a plurality of patch antennas are arranged in a two-dimensional array. The phase shifters are arranged in correspondence with each of the plurality of patch antennas.

[0096] The antenna device of this embodiment includes a phase shifter having a variable capacitance layer made of vanadium dioxide. By controlling the temperature, a conductor pattern is formed in the variable capacitance layer according to the phase transition between the insulating phase and the metallic phase of vanadium dioxide. By controlling the size and shape of the formed conductor pattern, a continuous phase shift amount can be stably set in the variable capacitance layer. The multiple phase shifters included in the antenna device of this embodiment achieve continuous phase shift changes with stable phase shift amounts. An arbitrary phase shift amount can be set in each of the multiple patch antennas. Therefore, the antenna device of this embodiment can realize a phased array antenna capable of transmitting directional radio waves in any direction.

[0097] (Third embodiment) Next, a phase shifter according to a third embodiment will be described with reference to the drawings. The phase shifter of this embodiment has a simplified configuration of the phase shifter of the first embodiment.

[0098] 27 is a conceptual diagram showing an example of the configuration of a phase shifter according to the present disclosure. A phase shifter 30 includes a 90-degree hybrid circuit 31, a varactor 32, and a stub 33.

[0099] The 90-degree hybrid circuit 31 has two reflection ends. Although FIG. 27 shows a 90-degree hybrid circuit as the 90-degree hybrid circuit 31, the 90-degree hybrid circuit 31 is not limited to a 90-degree hybrid circuit. The varactor 32 has a variable capacitance layer made of vanadium dioxide. The varactor 32 is connected to the reflection end P of the 90-degree hybrid circuit. r The stub 33 is connected to the reflection end P of the 90-degree hybrid circuit 31 via the varactor 32. r is connected to.

[0100] The phase shifter of this embodiment has a variable capacitance layer made of vanadium dioxide. By controlling the temperature, a conductor pattern is formed in the variable capacitance layer according to the phase transition between the insulating phase and the metallic phase of vanadium dioxide. By controlling the size and shape of the formed conductor pattern, a continuous phase shift amount can be stably set in the variable capacitance layer. Therefore, the phase shifter of this embodiment can achieve continuous phase shift change with a stable phase shift amount.

[0101] (Hardware) Next, a hardware configuration for executing the control and processing in the present disclosure will be described with reference to the drawings. Here, an information processing device 90 (computer) in FIG. 28 is given as an example of such a hardware configuration. The information processing device 90 in FIG. 28 is an example of a configuration for executing the control and processing in the present disclosure and does not limit the scope of the present disclosure.

[0102] 28, an information processing device 90 includes a processor 91, a memory 92, an auxiliary storage device 93, an input / output interface 95, and a communication interface 96. In FIG. 28, interface is abbreviated as I / F (Interface). The processor 91, memory 92, auxiliary storage device 93, input / output interface 95, and communication interface 96 are connected to each other via a bus 98 so as to be able to communicate data with each other. The processor 91, memory 92, auxiliary storage device 93, and input / output interface 95 are also connected to a network such as the Internet or an intranet via the communication interface 96.

[0103] The processor 91 loads a program (instructions) stored in an auxiliary storage device 93 or the like into the memory 92. For example, the program is a software program for executing the control and processing in the present disclosure. The processor 91 executes the program loaded into the memory 92. The processor 91 executes the program to execute the control and processing in the present disclosure.

[0104] The memory 92 is a storage device having an area in which a program is loaded. The processor 91 loads a program stored in an auxiliary storage device 93 or the like into the memory 92. The memory 92 is realized by a volatile memory such as a DRAM (Dynamic Random Access Memory). Alternatively, a non-volatile memory such as an MRAM (Magnetoresistive Random Access Memory) may be used as the memory 92.

[0105] The auxiliary storage device 93 stores various data such as programs. For example, the auxiliary storage device 93 is realized by a local disk such as a hard disk or flash memory. Note that it is also possible to configure the system so that various data is stored in the memory 92, and omit the auxiliary storage device 93.

[0106] The input / output interface 95 is an interface for connecting the information processing device 90 to peripheral devices based on standards and specifications. The communication interface 96 is an interface for connecting to external systems and devices via a network such as the Internet or an intranet based on standards and specifications. The input / output interface 95 and the communication interface 96 may be a common interface for connecting to external devices.

[0107] Input devices such as a keyboard, mouse, and touch panel may be connected to the information processing device 90 as needed. These input devices are used to input information and settings. When a touch panel is used as the input device, a screen having the function of the touch panel serves as the interface. The processor 91 and the input devices are connected via an input / output interface 95.

[0108] The information processing device 90 may be equipped with a display device for displaying information. When a display device is equipped, the information processing device 90 is equipped with a display control device (not shown) for controlling the display of the display device. The information processing device 90 and the display device are connected via an input / output interface 95.

[0109] The information processing device 90 may be equipped with a drive device. The drive device acts as an intermediary between the processor 91 and a recording medium (program recording medium) to read data and programs stored on the recording medium and to write processing results of the information processing device 90 to the recording medium. The information processing device 90 and the drive device are connected via an input / output interface 95.

[0110] The above is an example of a hardware configuration for enabling the control and processing in the present disclosure. The hardware configuration in Figure 28 is an example of a hardware configuration for executing the control and processing in the present disclosure, and does not limit the scope of the present disclosure. A program that causes a computer to execute the control and processing in the present disclosure is also included in the scope of the present disclosure.

[0111] A program recording medium on which a program for executing the processing in this embodiment is recorded is also included in the scope of the present invention. For example, the program recording medium is a computer-readable non-transitory recording medium. The recording medium can be realized as an optical recording medium such as a CD (Compact Disc) or a DVD (Digital Versatile Disc). The recording medium may also be realized as a semiconductor recording medium such as a USB (Universal Serial Bus) memory or an SD (Secure Digital) card. The recording medium may also be realized as a magnetic recording medium such as a flexible disk or other recording medium.

[0112] The components in the present disclosure may be combined in any manner. The components in the present disclosure may be realized by software. The components in the present disclosure may be realized by circuits.

[0113] Although the present disclosure has been described above with reference to the embodiments, the present disclosure is not limited to the above-described embodiments. Various modifications that can be understood by those skilled in the art can be made to the configuration and details of the present disclosure within the scope of the present disclosure. Furthermore, each embodiment can be combined with other embodiments as appropriate.

[0114] Some or all of the above-described embodiments can be described as, but are not limited to, the following supplementary notes. (Appendix 1) a 90-degree hybrid circuit having two reflection ends; a varactor having a variable capacitance layer made of vanadium dioxide and disposed at the reflection end of the 90-degree hybrid circuit; a stub connected to the reflection end of the 90-degree hybrid circuit via the varactor. (Appendix 2) The varactor is a plurality of heating elements arranged in an array along one surface of the variable capacitance layer; a heat generating drive circuit arranged in association with each of the plurality of heat generating elements; Each of the plurality of heating elements includes: a capacitor thermally connected to the variable capacitance layer; Each of the plurality of heat generation drive circuits includes: 2. The phase shifter according to claim 1, wherein the heating element is caused to generate heat up to a temperature exceeding a phase transition temperature of vanadium dioxide contained in the variable capacitance layer in accordance with selection of the heating element. (Appendix 3) a conductor pattern is formed on the variable capacitance layer by heat generated by the plurality of heat generating elements in accordance with a selection of the plurality of heat generating elements; 3. The phase shifter according to claim 2, wherein the varactor has a capacitance corresponding to a conductor pattern formed on the variable capacitance layer. (Appendix 4) 4. The phase shifter according to claim 3, wherein the conductor pattern is formed in the variable capacitance layer so as to extend in a rectangular shape from the reflection end toward the stub in accordance with a capacitance of the varactor corresponding to a desired phase shift. (Appendix 5) 4. The phase shifter according to claim 3, wherein the conductor pattern of any shape is formed on the variable capacitance layer from the reflection end toward the stub according to the capacitance of the varactor corresponding to a desired phase shift. (Appendix 6) a heat generation drive circuit for generating heat from the heat generating element used to form the conductor pattern corresponding to a desired phase shift amount is selected using a phase shift table in which the conductor pattern corresponding to a phase shift amount is registered; 4. The phase shifter according to claim 3, wherein the variable capacitance layer has a conductor pattern formed thereon according to the conductor pattern set using the phase shift table. (Appendix 7) The 90-degree hybrid circuit has two reflection ends, each of which has one varactor, and 7. The phase shifter according to claim 6, wherein one stub is arranged for each of the two varactors. (Appendix 8) 8. The phase shifter according to claim 7, wherein the stub is a short stub. (Appendix 9) The varactor is a connection electrode that electrically connects the reflection end of the 90-degree hybrid circuit and the variable capacitance layer; a capacitance-forming layer, which is an insulating layer formed on the upper surface of the variable capacitance layer; 4. The phase shifter according to claim 3, further comprising: an upper electrode formed on an upper surface of the capacitance formation layer, the upper electrode electrically connecting the variable capacitance layer and the stub through a contact hole. (Appendix 10) A phase shifter according to any one of Supplementary Notes 1 to 9; an antenna array in which a plurality of patch antennas are arranged in a two-dimensional array, The phase shifter an antenna device arranged in association with each of the plurality of patch antennas; [Explanation of symbols]

[0115] 1, 2 Antenna device 10, 21 Phase shifter 11, 31 90-degree hybrid circuit 12, 12A, 12B, 32 Varactor 13, 13A, 13B, 33 stub 20 Antenna Array 22 Matrix Circuit 27 Drive circuit 17, 28 Control circuit 29 Signal source 120, 220 board 121 Heat generation drive circuit 122 Heating element 123 Variable Capacitance Layer 124 Insulating Layer 125 Capacitance forming layer 126 connecting electrode 127 Upper electrode 128 Ground Plate 200 Planar Antenna 241 First insulating layer 242 Second insulating layer 243 Third insulating layer 244 Fourth insulating layer 251 1st ground layer 252 2nd ground layer 253 3rd ground layer 254 4th ground layer 255 via 271 First drive circuit 272 Second drive circuit

Claims

1. a 90-degree hybrid circuit having two reflection ends; a varactor having a variable capacitance layer made of vanadium dioxide and disposed at the reflection end of the 90-degree hybrid circuit; a stub connected to the reflection end of the 90-degree hybrid circuit via the varactor.

2. The varactor is a plurality of heating elements arranged in an array along one surface of the variable capacitance layer; a heat generating drive circuit arranged in association with each of the plurality of heat generating elements; Each of the plurality of heating elements includes: a capacitor thermally connected to the variable capacitance layer; Each of the plurality of heat generation drive circuits includes:

2. The phase shifter according to claim 1, wherein the heating element is caused to generate heat to a temperature exceeding a phase transition temperature of vanadium dioxide contained in the variable capacitance layer in accordance with the selection of the heating element.

3. a conductor pattern is formed on the variable capacitance layer by heat generated by the plurality of heat generating elements in accordance with a selection of the plurality of heat generating elements; 3. The phase shifter according to claim 2, wherein the varactor has a capacitance corresponding to the conductor pattern formed on the variable capacitance layer.

4. 4. The phase shifter according to claim 3, wherein the conductor pattern is formed on the variable capacitance layer so as to extend in a rectangular shape from the reflection end toward the stub in accordance with the capacitance of the varactor corresponding to a desired phase shift.

5. 4. The phase shifter according to claim 3, wherein the conductor pattern is formed in the variable capacitance layer from the reflection end toward the stub in an arbitrary shape according to the capacitance of the varactor corresponding to a desired phase shift.

6. a heat generation drive circuit for generating heat from the heat generating element used to form the conductor pattern corresponding to a desired phase shift amount is selected using a phase shift table in which the conductor pattern corresponding to a phase shift amount is registered; 4. The phase shifter according to claim 3, wherein the conductor pattern is formed in the variable capacitance layer in accordance with the conductor pattern set using the phase shift table.

7. one varactor is disposed at each of the two reflection ends of the 90-degree hybrid circuit, 7. The phase shifter according to claim 6, wherein one stub is disposed for each of the two varactors.

8. 8. The phase shifter according to claim 7, wherein the stub is a short stub.

9. The varactor is a connection electrode that electrically connects the reflection end of the 90-degree hybrid circuit and the variable capacitance layer; a capacitance-forming layer, which is an insulating layer formed on the upper surface of the variable capacitance layer; 4. The phase shifter according to claim 3, further comprising an upper electrode formed on an upper surface of the capacitance forming layer, the upper electrode electrically connecting the variable capacitance layer and the stub through a contact hole.

10. A phase shifter according to any one of claims 1 to 9; an antenna array in which a plurality of patch antennas are arranged in a two-dimensional array, The phase shifter an antenna device arranged in association with each of the plurality of patch antennas;

Citation Information

Patent Citations

  • Variable phase shifter

    JP2019029722A