Multilayer electronic component

Abstract

To provide a multilayer electronic component that can suppress cracking while suppressing a decrease in capacitance.SOLUTION: A multilayer electronic component 1 comprises a plurality of dielectric layers 3 and a plurality of electrode layers 4 laminated along a lamination direction D1 alternately with the plurality of dielectric layers 3. The skewness of a distribution of area equivalent circle diameters of a plurality of electrode disconnection parts formed in the electrode layers 4 in a plane crossing the lamination direction D1 is 1 to 2.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a laminated electronic component. [Background technology]

[0002] A multilayer ceramic capacitor, which is a type of multilayer electronic component, is described in Patent Document 1. The multilayer ceramic capacitor described in Patent Document 1 is configured by alternately laminating dielectric layers and internal electrode layers. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-160133 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a laminated electronic component that can suppress the occurrence of cracks while suppressing a decrease in capacitance. [Means for solving the problem]

[0005] The laminated electronic component of the present invention is [1] "a laminated electronic component comprising a plurality of dielectric layers and a plurality of electrode layers stacked alternately with the plurality of dielectric layers along a stacking direction, wherein the skewness of the distribution of the area-equivalent circle diameters of a plurality of electrode discontinuities formed in the electrode layers on a plane intersecting the stacking direction is 1 or more and 2 or less."

[0006] In this laminated electronic component, the skewness of the distribution of the area-equivalent circle diameters of the multiple electrode discontinuities (voids) (hereinafter simply referred to as discontinuities) formed in the electrode layers is between 1 and 2. That is, the electrode layers are formed with many small discontinuities and few large discontinuities. When discontinuities are formed in the electrode layers, stress generated during firing due to differences in the linear expansion coefficients between the dielectric layer and the electrode layer is alleviated, thereby suppressing the occurrence of cracks. When the discontinuities are small, the effect of stray capacitance is relatively large, so capacitance is unlikely to decrease significantly, but the stress relaxation effect is relatively small. On the other hand, when the discontinuities are large, the effect of stray capacitance is relatively small, so capacitance may decrease, but the stress relaxation effect is relatively large. In this laminated electronic component, the electrode layers are formed with many small discontinuities and few large discontinuities, so capacitance decrease is suppressed while crack occurrence is suppressed.

[0007] The laminated electronic component of the present invention may be [2] "the laminated electronic component according to [1], wherein the median equivalent circle diameter of the area of ​​the plurality of discontinuities is 1.5 μm or less." In this case, many small discontinuities can be arranged in the electrode layer, and a decrease in capacitance can be effectively suppressed.

[0008] The laminated electronic component of the present invention may be [3] "the laminated electronic component according to [1], wherein the median equivalent circle diameter of the area of ​​the plurality of discontinuities is 0.5 μm or less." In this case, many small discontinuities can be arranged in the electrode layer, and a decrease in capacitance can be effectively suppressed.

[0009] The laminated electronic component of the present invention may be [4] "the laminated electronic component according to any one of [1] to [3], wherein the standard deviation of the area-equivalent circle diameters of the plurality of discontinuous portions is 0.3 μm or more and 1.5 μm or less." In this case, when the standard deviation is 0.3 μm or more, the occurrence of cracks can be reliably suppressed. Furthermore, when the standard deviation is 1.5 μm or less, the decrease in capacitance can be reliably suppressed.

[0010] The laminated electronic component of the present invention may be [5] "the laminated electronic component according to any one of [1] to [4], wherein the ratio of the area of ​​the plurality of discontinuities to the area of ​​the electrode layer on the plane is 5% or more and 15% or less." In this case, when the ratio is 5% or more, the occurrence of cracks can be reliably suppressed. Furthermore, when the ratio is 15% or less, the decrease in capacitance can be reliably suppressed. [Effects of the Invention]

[0011] According to the present invention, it is possible to provide a laminated electronic component that can suppress the occurrence of cracks while suppressing a decrease in capacitance. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a cross-sectional view of a laminated electronic component according to an embodiment. [Figure 2] (a) is a cross-sectional view showing a case where the electrode interruptions are small, (b) is a cross-sectional view showing a case where the electrode interruptions are large, and (c) is a cross-sectional view showing a case where many small electrode interruptions and few large electrode interruptions are formed. [Figure 3] FIG. 10 is a diagram for explaining stray capacitance. [Figure 4] FIG. 10 is a diagram showing an observation surface of a first sample. [Figure 5] FIG. 10 is a diagram showing the observation surface of the second sample. [Figure 6] FIG. 10 is a diagram showing an electrode discontinuity on the observation surface of the first sample. [Figure 7] FIG. 10 is a diagram showing an electrode discontinuity on the observation surface of the second sample. [Figure 8] FIG. 10 is a diagram showing the distribution of the area-equivalent circle diameter of electrode discontinuities in the first sample. [Figure 9] FIG. 10 is a diagram showing the distribution of the area-equivalent circle diameter of electrode discontinuities in the second sample. [Figure 10] 10 is a graph illustrating skewness. [Figure 11]10(a) is a table showing the results of the first experiment, and FIG. 10(b) is a table showing the results of the second experiment. [Figure 12] 10(a) is a table showing the results of the third experiment, and FIG. 10(b) is a table showing the results of the fourth experiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or equivalent elements are designated by the same reference numerals, and redundant description will be omitted. [Laminated electronic components]

[0014] FIG. 1 shows a multilayer electronic component 1, which is a multilayer ceramic capacitor. The multilayer electronic component 1 includes an element body 2. The element body 2 is formed, for example, in a substantially rectangular parallelepiped shape. The element body 2 has a pair of main surfaces 2a and a first side surface 2b and a second side surface 2c. The pair of main surfaces 2a face each other in a first direction D1. The first side surface 2b and the second side surface 2c face each other in a second direction D2 perpendicular to the first direction D1. One of the main surfaces 2a constitutes a mounting surface. The multilayer electronic component 1 is mounted, for example, by soldering the one main surface 2a to a mounting target (for example, an electronic component or a board). The multilayer electronic component 1 is, for example, an in-vehicle laminate electronic component that is mounted on a vehicle.

[0015] The element body 2 has multiple dielectric layers 3 and multiple electrode layers 4. The multiple electrode layers 4 include a first electrode layer 10 and multiple second electrode layers 20. Each dielectric layer 3 is made of a sintered ceramic green sheet (dielectric sheet) containing, for example, a dielectric material (dielectric ceramic such as BaTiO3-based, Ba(Ti,Zr)O3-based, (Ba,Ca)TiO3-based, CaZrO3-based, or (Ca,Sr)(Zr,Ti)O3-based). In an actual element body 2, adjacent dielectric layers 3 are integrated to the extent that the boundaries between them are not visible. The average thickness of the multiple dielectric layers 3 is, for example, 10 μm or less, and in this example, 0.4 μm or less. The element body 2 includes, for example, at least 10 or 20 or more dielectric layers 3.

[0016] The plurality of dielectric layers 3 and the plurality of electrode layers 4 are alternately stacked along a first direction D1 (stacking direction). In this example, the plurality of first electrode layers 10 and the plurality of second electrode layers 20 are alternately arranged so as to face each other in the first direction D1 with the dielectric layers 3 interposed therebetween. The first electrode layers 10 extend to reach the first side surface 2b of the element body 2, and the second electrode layers 20 extend to reach the second side surface 2c of the element body 2.

[0017] The electrode layers 4 are formed of a conductive material such as Ni, Cu, Ag, Pd, or an alloy thereof. The electrode layers 4 are formed, for example, of a sintered body of a conductive paste (conductive layer) containing the conductive material. The electrode layers 4 function as internal electrodes disposed within the element body 2. The first electrode layer 10 and the second electrode layer 20 have mutually opposite polarities. In the laminated electronic component 1, the first electrode layer 10 and the second electrode layer 20 face each other, thereby forming a capacitance.

[0018] The laminated electronic component 1 further includes a pair of external electrodes 5 electrically connected to an object to be mounted. The pair of external electrodes 5 are formed on the first side surface 2b and the second side surface 2c of the element body 2. One external electrode 5 is electrically connected to the first electrode layer 10 on the first side surface 2b, and the other external electrode 5 is electrically connected to the second electrode layer 20 on the second side surface 2c. [Manufacturing method for multilayer electronic components]

[0019] When manufacturing the laminated electronic component 1, first, a plurality of dielectric sheets are prepared (preparation step). The dielectric sheets are ceramic members that will become the dielectric layers 3 after firing. Next, the plurality of dielectric sheets and a plurality of conductive layers are alternately laminated (lamination step). The conductive layers are layers that will become the electrode layers 4 after firing, and are, for example, conductive pastes.

[0020] Next, the laminate obtained in the laminating step is pressed in a first direction D1 (pressing step). This pressing step integrates adjacent layers, resulting in a chip of a predetermined size. Note that a laminate having multiple portions that will each become a chip after cutting may be pressed in the pressing step, and then the laminate may be cut to obtain multiple chips of a predetermined size. The chips are then fired to obtain an element body 2. After that, a step of providing external electrodes 5 on the outer surface of the element body 2 and other steps are performed to obtain a laminated electronic component 1. [Electrode discontinuity]

[0021] As shown in FIG. 2(c), in the laminated electronic component 1 of this embodiment, a plurality (a large number) of electrode discontinuities 6 (hereinafter simply referred to as discontinuities 6) are formed in each electrode layer 4. The discontinuities 6 are gaps where the electrode layer 4 is interrupted, and are formed, for example, by voids (air). As shown in FIGS. 4 and 5, which will be described later, the plurality of discontinuities 6 are formed at intervals and spaced apart from one another, and have non-uniform (random) shapes. In the laminated electronic component 1, the skewness of the distribution of the equivalent circle diameters of the plurality of discontinuities 6 formed in the electrode layer 4 is between 1 and 2. This point will be explained below.

[0022] As described above, when manufacturing the laminated electronic component 1, the ceramic member that will become the dielectric layer 3 after firing and the conductive layer that will become the electrode layer 4 after firing are fired simultaneously after being formed into chips. Because the dielectric layer 3 (ceramic member) and the electrode layer 4 (conductive layer) have different linear expansion coefficients, stress is generated when they are fired simultaneously and then cooled. This stress can cause cracks. Therefore, in the laminated electronic component 1 of this embodiment, the discontinuities 6 are formed in the electrode layer 4, which has a higher linear expansion coefficient than the dielectric layer 3, to alleviate this stress.

[0023] Fig. 2(a) is a cross-sectional view showing a case where the discontinuities 6 are small, and Fig. 2(b) is a cross-sectional view showing a case where the discontinuities 6 are large. Fig. 2(c) is a cross-sectional view showing a case where many small discontinuities 6 and few large discontinuities 6 are formed. In the laminated electronic component 1 of the embodiment, the discontinuities 6 are formed as shown in Fig. 2(c). Fig. 3 is a diagram for explaining stray capacitance.

[0024] As shown in FIG. 2(a), when the discontinuity 6 is small, the effect of stray capacitance is relatively large, and therefore the capacitance is unlikely to decrease significantly. However, because the discontinuity 6 is small, the stress relaxation effect is relatively small. The stray capacitance is the capacitance generated by the hatched portion P in FIG. 3. As shown in FIG. 3, when a pair of electrode layers 4 are arranged facing each other in the first direction D1 and one of the electrode layers 4 is interrupted (the sizes of the pair of electrode layers 4 are different from each other), not only is there capacitance generated by the pair of electrode layers 4 facing each other in the first direction D1, but there is also capacitance generated by the pair of electrode layers 4 facing each other in a direction inclined relative to the first direction D1. Here, the latter is referred to as stray capacitance.

[0025] When the discontinuities 6 are large, as shown in FIG. 2(b), the effect of stray capacitance is relatively small, which can result in a decrease in capacitance. On the other hand, the electrode layer 4 can be largely interrupted, resulting in a relatively large stress relaxation effect. Thus, both small and large discontinuities 6 have both advantages and disadvantages. In contrast, the laminated electronic component 1 of this embodiment achieves both reduced capacitance and cracking by forming many small discontinuities 6 and fewer large discontinuities 6 in the electrode layer 4, as shown in FIG. 2(c).

[0026] Fig. 4 is a diagram showing an observation surface of a first sample of the laminated electronic component 1, and Fig. 5 is a diagram showing an observation surface of a second sample of the laminated electronic component 1. The first sample and the second sample differ from each other in the material of the dielectric layer 3. The material of the electrode layer 4 was a material mainly containing Ni.

[0027] In this example, the boundary between the dielectric layer 3 and the electrode layer 4 was used as the observation surface. The boundary (fracture surface) was formed using the following method. First, Galinstan (liquid metal) was applied to the side of the element 2 (base material) before the external electrodes 5 were provided. Using a voltage withstand tester (THK-2011ADMPT manufactured by Tama Densoku Co., Ltd.), a voltage of 100 V / sec and 10 mA was applied to the element 2 in the form of a DC breakdown voltage test. As a result, dielectric breakdown occurred at 0.64 kV in the first sample and at 0.30 kV in the second sample. In both samples, delamination occurred at the boundary between the dielectric layer 3 and the electrode layer 4. Note that if external electrodes 5 were already provided on the outer surface of the element 2, the external electrodes 5 could be removed using waterproof abrasive paper or similar, and then the dielectric layer 3 and the electrode layer 4 could be separated at the boundary by processing using the same method.

[0028] Subsequently, Pt was sputtered onto the exposed surface (observation surface) of the electrode layer 4 at 20 mA for 20 seconds using an autofine coater (JFC-1600 manufactured by JEOL Ltd.) Figures 4 and 5 show the results of observing secondary electron images of the observation surface using a scanning electron microscope (S-4800 manufactured by Hitachi High-Technologies Corporation).

[0029] Next, in the obtained image of the observation surface, the portions where the electrode layer 4 was interrupted were identified as interruptions 6. In Figures 6 and 7, the identified interruptions 6 are shown surrounded by lines. In this example, the identification was performed visually, but it may also be performed using recognition software. Next, the equivalent diameter of the area circle of the interruptions 6 was measured using measurement software (MAC-View version 4 manufactured by Mountech Co., Ltd.). The equivalent diameter of the area circle of the interruptions 6 is the diameter of a perfect circle equivalent to the area of ​​the interruptions 6.

[0030] 8 and 9 are diagrams showing the distribution of the area-equivalent circle diameter of the discontinuous portion 6 in the first sample and the second sample, respectively. As shown in Fig. 8 and Fig. 9, both distributions are skewed to the right (biased to the left) in the figures. In the distribution of the first sample, the number of data points n was 51, the mean was 1.313 μm, the standard deviation (SD) was 0.8947 μm, the variance (VAR) was 0.8005, the skewness was 1.681, the kurtosis was 2.572, the median was 1.107, the maximum value (Max) was 4.14 μm, and the minimum value (Min) was 0.3383 μm. In the distribution of the second sample, the number of data n was 39, the mean was 0.6799 μm, the standard deviation (SD) was 0.4172 μm, the variance (VAR) was 0.1741, the skewness was 1.492, the kurtosis was 2.27, the median was 0.6234, the maximum value (Max) was 2.028 μm, and the minimum value (Min) was 0.1863 μm. In this way, the number of data may be, for example, 30 or more.

[0031] Figure 10 is a graph to explain skewness. The skewness A of the probability distribution that random variable X follows is defined by equation (1). In equation (1), E(X) is the expected value of random variable X, μ is the mean value of random variable X, and σ is the standard deviation of random variable X. Skewness is an index of asymmetry, and is zero if the probability distribution is a normal distribution.

number

[0032] Figure 10 shows four probability distributions with skewness of 1.5, 2.5, 0.0, and -1.0, respectively. As shown in Figure 10, the greater the skewness, the more the distribution is biased to the left (the side with smaller random variables) and the longer the tail on the right side of the distribution (the side with larger random variables). As a result, events with large random variables, which correspond to the right side of the distribution, are more likely to occur. On the other hand, the smaller the skewness, the more the distribution is biased to the right and the longer the tail on the left side of the distribution. As a result, events with small random variables, which correspond to the left side of the distribution, are more likely to occur.

[0033] In the laminated electronic component 1, the skewness of the distribution of the equivalent area circle diameters of the multiple interruptions 6 formed in the electrode layer 4 on the observation surface (a plane intersecting (or orthogonal to) the first direction D1) is between 1 and 2. For example, the skewness of the distribution of the first sample is 1.681, and the skewness of the distribution of the second sample is 1.492. In other words, the distribution of the equivalent area circle diameters of the interruptions 6 is biased to the left, and many small interruptions 6 and few large interruptions 6 are formed in the electrode layer 4. This allows the interruptions 6 to be arranged as shown in FIG. 2(c), making it possible to suppress the occurrence of cracks while suppressing a decrease in capacitance.

[0034] In the above example, the observation surface was the boundary surface between the dielectric layer 3 and the electrode layer 4, but it is considered that discontinuous portions 6 are also formed inside the electrode layer 4. That is, even when the skewness of the distribution of the equivalent circle diameters of the plurality of discontinuous portions 6 formed in the electrode layer 4 is measured on a plane that is located inside the electrode layer 4 and intersects (e.g., is perpendicular to) the first direction D1, it is considered that the skewness is 1 or more and 2 or less.

[0035] The skewness of the distribution of the diameters of the equivalent circles of the discontinuities 6 can be adjusted, for example, by the manufacturing method. For example, organic powders of various sizes that are insoluble in solvents (such as polyvinyl alcohol) are mixed into the conductive paste used in the lamination process described above, which will become the electrode layer 4 after firing. This causes the organic powder to burn away during firing, and voids (discontinuities 6) corresponding to the size of the powder can be formed.

[0036] 11(a), 11(b), 12(a), and 12(b) are tables showing the results of the first, second, third, and fourth experiments, respectively. The first experiment focused on Examples 1 to 3 and Comparative Examples 1 to 3. The "proportion of discontinuous portions" represents the ratio of the total area of ​​the discontinuous portions 6 to the area of ​​the electrode layer 4 on the observation surface. The "capacitance" is a value measured with an LCR meter after forming an external electrode 5 on the outer surface of the element body 2 corresponding to each sample. The "capacitance" is expressed as a relative value, with a value of 1.00 being the reference when the proportion of discontinuous portions is 0 (coverage is 100%). The capacitance is preferably 0.9 or more, more preferably 0.95 or more, and even more preferably 0.98 or more. "Cracks" refers to the percentage of cracks found when a pressure cooker test (temperature 121°C, relative humidity 95%RH, exposure time 24 hours) was performed on the element body 2 (without external electrodes 5) corresponding to each sample, and the appearance was checked with a stereomicroscope. These points are the same for the second to fourth experiments.

[0037] As shown in the table in FIG. 11(a), cracks occurred in Comparative Example 1, in which no discontinuities 6 were formed, and Comparative Example 2, in which the skewness was 0.80. In Comparative Example 3, in which the skewness was 2.33, the capacitance was less than 0.9. In contrast, in Examples 1, 2, and 3, in which the skewness was 1.17, 1.57, and 1.88, respectively, the capacitance was 0.9 or more and no cracks occurred. This shows that by setting the skewness to between 1 and 2, it is possible to suppress the occurrence of cracks while suppressing a decrease in capacitance.

[0038] The second experiment was conducted on Examples 4 to 8. It can be seen from the table in Fig. 11(b) that the capacitance increases as the median of the equivalent circle diameter of the discontinuous portion 6 decreases. The median of the equivalent circle diameter of the discontinuous portion 6 is preferably 1.5 µm or less, and more preferably 0.5 µm or less.

[0039] The third experiment was conducted on Examples 9 to 12. "Crack 1" is the same as "Crack" in the first experiment. "Crack 2" is the percentage of cracks that were found when a pressure cooker test (temperature 121°C, relative humidity 95%RH, exposure time 100 hours) was conducted on the element body 2 (without external electrode 5) corresponding to each sample, and the appearance was checked with a stereomicroscope. This was also true for the fourth experiment.

[0040] As shown in the table of FIG. 12(a), in Example 9, where the standard deviation of the equivalent areal circle diameter of the discontinuous portion 6 was 0.25 μm, cracks occurred in the crack 2 test. In contrast, in Examples 10, 11, and 12, where the standard deviations were 0.38, 1.41, and 1.7 μm, respectively, no cracks occurred in the crack 2 test. From this perspective, it is preferable that the standard deviation of the equivalent areal circle diameter of the discontinuous portion 6 be 0.3 μm or more. Furthermore, in Example 12, where the standard deviation was 1.7 μm, the capacitance was 0.93, which was lower than those of Examples 9 to 11. From this perspective, it is preferable that the standard deviation of the equivalent areal circle diameter of the discontinuous portion 6 be 1.5 μm or less. In other words, the standard deviation is preferably 0.3 μm or more and 1.5 μm or less.

[0041] The fourth experiment was conducted on Examples 13 to 16. As can be seen from the table in FIG. 12(b), in Example 13, where the ratio of discontinuous portions 6 was 0.04, cracks occurred in the crack 2 test. In contrast, in Examples 14, 15, and 16, where the ratios of discontinuous portions 6 were 0.06, 0, 14, and 0.18, respectively, no cracks occurred in the crack 2 test. From this perspective, it is preferable that the ratio of discontinuous portions 6 is 0.05 (5%) or more. Furthermore, in Example 16, where the ratio of discontinuous portions 6 was 0.18, the capacitance was 0.92, which was lower than those of Examples 13 to 16. From this perspective, it is preferable that the ratio of discontinuous portions 6 is 0.15 (15%) or less. In other words, it is preferable that the ratio of discontinuous portions 6 is 5% or more and 15% or less. [Action and effect]

[0042] In the laminated electronic component 1, the skewness of the distribution of the area-equivalent circle diameters of the multiple interruptions 6 (electrode interruptions) (voids) formed in the electrode layer 4 is between 1 and 2. That is, the electrode layer 4 has many small interruptions 6 and few large interruptions 6. When the electrode layer 4 has the interruptions 6, stress generated during firing due to the difference in linear expansion coefficient between the dielectric layer 3 and the electrode layer 4 is alleviated, thereby suppressing the occurrence of cracks. When the interruptions 6 are small, the effect of stray capacitance is relatively large, so the capacitance is unlikely to decrease significantly, but the stress alleviation effect is relatively small. On the other hand, when the interruptions 6 are large, the effect of stray capacitance is relatively small, so the capacitance may decrease, but the stress alleviation effect is relatively large. In the laminated electronic component 1, the electrode layer 4 has many small interruptions 6 and few large interruptions 6, so the decrease in capacitance is suppressed while the occurrence of cracks is suppressed.

[0043] The median diameter of the equivalent circle of the area of ​​the discontinuous portions 6 may be 1.5 μm or less, or may be 0.5 μm or less. In this case, many small discontinuous portions 6 can be arranged in the electrode layer 4, and a decrease in capacitance can be effectively suppressed.

[0044] The standard deviation of the area-equivalent circle diameter of the discontinuous portion 6 may be 0.3 μm or more and 1.5 μm or less. In this case, a standard deviation of 0.3 μm or more can reliably suppress the occurrence of cracks. Furthermore, a standard deviation of 1.5 μm or less can reliably suppress a decrease in capacitance.

[0045] The ratio of the discontinuous portions 6 to the area of ​​the electrode layer 4 on the observation surface may be 5% or more and 15% or less. In this case, when the ratio is 5% or more, the occurrence of cracks can be reliably suppressed. Furthermore, when the ratio is 15% or less, the decrease in capacitance can be reliably suppressed.

[0046] The present invention is not limited to the above-described embodiment and modifications. For example, the materials and shapes of the components are not limited to those described above, and various other materials and shapes can be used. The laminated electronic component 1 may be a laminated piezoelectric actuator, a laminated varistor, a laminated thermistor, a laminated composite component, or the like. [Explanation of symbols]

[0047] 1... laminated electronic component, 3... dielectric layer, 4... electrode layer, 6... electrode discontinuity portion.

Claims

1. a plurality of dielectric layers; a plurality of electrode layers alternately stacked with the plurality of dielectric layers along a stacking direction; a skewness of the distribution of the equivalent circle diameters of the plurality of electrode discontinuities formed in the electrode layers on a plane intersecting the stacking direction is 1 or more and 2 or less.

2. 2. The laminated electronic component according to claim 1, wherein the median equivalent area diameter of the plurality of discontinuous portions is 1.5 [mu]m or less.

3. 2. The laminated electronic component according to claim 1, wherein the median equivalent area diameter of the plurality of discontinuous portions is 0.5 [mu]m or less.

4. 4. The laminated electronic component according to claim 1, wherein the standard deviation of the area-equivalent circle diameter of the plurality of discontinuous portions is 0.3 μm or more and 1.5 μm or less.

5. 4. The laminated electronic component according to claim 1, wherein a ratio of an area of ​​the plurality of discontinuous portions to an area of ​​the electrode layer on the plane is 5% or more and 15% or less.

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