Electronic apparatus

Abstract

To provide a display device whose peripheral circuit part has high operation stability.SOLUTION: A display device includes a first substrate and a second substrate. A first insulating layer is provided on a first surface of the first substrate. A second insulating layer is provided on a first surface of the second substrate. The first surface of the first substrate and the first surface of the second substrate face each other. Between the first insulating layer and the second insulating layer, an adhesive layer is provided. Near a periphery of the first substrate and the second substrate, a protection film in contact with the first substrate, the first insulating layer, the adhesive layer, the second insulating layer, and the second substrate is formed.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device and a method for manufacturing a display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. Therefore, one aspect of the present invention disclosed in this specification more specifically relates to The technical fields of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, and input devices. , input / output devices, their driving methods, or their manufacturing methods, as examples. can be done.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices are all semiconductor devices. The semiconductor device may include a conductive device. [Background technology]

[0004] Displays using thin-film transistors have become widespread and indispensable in people's lives. Furthermore, these displays are extremely important for mobile applications. It has also become an indispensable part of mobile devices.

[0005] In addition, display devices that have a display area (pixel section) and peripheral circuits (drive section) on the same substrate have become widespread. For example, Patent Document 1 discloses a method for manufacturing a display device using a transistor that uses an oxide semiconductor. The technology used in the peripheral circuits is disclosed. By forming the display area and the peripheral circuits simultaneously, The manufacturing cost can be reduced. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 Summary of the Invention [Problem to be solved by the invention]

[0007] When manufacturing a display device, ensure that the display area is as large as possible on the viewing side (display surface side). This is what is required.

[0008] Furthermore, there is a strong demand for narrower frame areas on the display surface side.

[0009] On the other hand, if the display area is widened and the frame is narrowed, the driver circuits around the display area The transistor characteristics of the peripheral circuits become less reliable, and the There is a risk of the road operation becoming unstable.

[0010] An object of one embodiment of the present invention is to provide a display device having a peripheral circuit portion with high operational stability. Let's say.

[0011] Another object of one embodiment of the present invention is to provide a display device with a narrow frame.

[0012] Another object of one embodiment of the present invention is to provide a lightweight display device.

[0013] Another object of one embodiment of the present invention is to provide a high-resolution display device.

[0014] Another object of one embodiment of the present invention is to provide a highly reliable display device.

[0015] Another object of one embodiment of the present invention is to provide a large-area display device.

[0016] Another object of one embodiment of the present invention is to provide a display device that can reduce power consumption. This is one of the topics.

[0017] Another object is to provide a novel display device or the like.

[0018] Another object is to provide a manufacturing method of the display device.

[0019] The description of these problems does not preclude the existence of other problems. It is not necessary for the present invention to solve all of these problems. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other issues from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0020] One aspect of the present invention is a method for manufacturing a semiconductor device comprising: a first substrate and a second substrate; a first insulating layer is provided on the first surface of the second substrate, a second insulating layer is provided on the first surface of the second substrate, and The first surface of the first substrate faces the first surface of the second substrate, and the first insulating layer and the second insulating layer An adhesive layer is provided between the first substrate and the second substrate, and the first substrate is bonded to the second substrate in the vicinity of the peripheral edge of the first substrate. A substrate, a first insulating layer, an adhesive layer, a second insulating layer, and a protective film in contact with the second substrate are formed. It is a display device.

[0021] In addition, a transistor, a capacitance element, and a A display element, a light-shielding layer, a colored layer, and spacers can be provided.

[0022] The protective film may be made of an oxide, nitride or metal.

[0023] In addition, as a protective film, aluminum oxide, hafnium oxide, zirconium oxide, titanium oxide Zinc oxide, indium oxide, tin oxide, indium tin oxide, tantalum oxide, silicon oxide silicon, manganese oxide, nickel oxide, erbium oxide, cobalt oxide, tellurium oxide, titanium Barium tannate, titanium nitride, tantalum nitride, aluminum nitride, tungsten nitride, nitrogen Cobalt nitride, manganese nitride, hafnium nitride, ruthenium, platinum, nickel, cobalt, Manganese or copper can be used.

[0024] The display device may also include a liquid crystal element.

[0025] The display device may also have an organic EL element.

[0026] Furthermore, a configuration using a display device, a microphone, and a speaker is also possible.

[0027] One aspect of the present invention is a method for manufacturing a semiconductor device including a first surface of a first substrate, a transistor, a capacitor, a pixel electrode, and a and a first insulating layer, and a light-shielding layer, a colored layer, an insulating layer, a spacer, and a light-shielding layer are formed on the first surface of the second substrate. and a second insulating layer is formed, and the first insulating layer is formed so as to seal the transistor, the capacitor element, and the liquid crystal. The first substrate and the second substrate are bonded together via an adhesive layer, and the peripheries of the first substrate and the second substrate are bonded together. In the vicinity of the portion, the first substrate, the first insulating layer, the adhesive layer, the second insulating layer and the second substrate are This is a method for manufacturing a display device provided with a contacting protective film.

[0028] One aspect of the present invention is a method for manufacturing a semiconductor device including a first surface of a first substrate, a transistor, a capacitor, a pixel electrode, and a and a first insulating layer, and a light-shielding layer, a colored layer, an insulating layer, a spacer, and a light-shielding layer are formed on the first surface of the second substrate. and forming a second insulating layer to seal the transistor, the capacitor element, and the display element. The first substrate and the second substrate are bonded together via an adhesive layer, and the first cutout is attached to the second substrate. A groove is formed by performing a grinding process, and the groove and the peripheral portions of the first substrate and the second substrate are The first insulating layer, the adhesive layer, the second insulating layer, and the second substrate are in contact with each other. A protective film is formed on the first substrate, and a second cutting process is performed on the first substrate to manufacture a plurality of display devices. This is a method for manufacturing a display device that can achieve this.

[0029] The protective film can also be formed by the ALD method.

[0030] In addition, aluminum oxide, hafnium oxide, zirconium oxide, and other materials can be used as protective films using the ALD method. Titanium, titanium oxide, zinc oxide, indium oxide, tin oxide, indium tin oxide, oxide Tantalum, silicon oxide, manganese oxide, nickel oxide, erbium oxide, cobalt oxide , tellurium oxide, barium titanate, titanium nitride, tantalum nitride, aluminum nitride, nitride Tungsten, cobalt nitride, manganese nitride, hafnium nitride, ruthenium, platinum, nickel It is possible to deposit titanium, cobalt, manganese, or copper.

[0031] Other aspects of the present invention will be described in the following embodiments and is shown in the drawings. [Effects of the Invention]

[0032] One embodiment of the present invention can provide a display device in which the peripheral circuit portion has high operational stability.

[0033] Alternatively, one embodiment of the present invention can provide a display device with a narrow frame.

[0034] Alternatively, one embodiment of the present invention can provide a lightweight display device.

[0035] Alternatively, one embodiment of the present invention can provide a high-resolution display device.

[0036] Alternatively, according to one embodiment of the present invention, a highly reliable display device can be provided.

[0037] Alternatively, one embodiment of the present invention can provide a large-area display device.

[0038] Another embodiment of the present invention can provide a display device that can reduce power consumption. Cut.

[0039] Alternatively, one embodiment of the present invention can provide a novel display device or the like.

[0040] Alternatively, a method for manufacturing the display device can be provided.

[0041] The description of these effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of these effects. , the specification, drawings, claims, etc., and It is possible to extract other effects from the claims and other descriptions. [Brief explanation of the drawings]

[0042] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a display device of one embodiment of the present invention. [Figure 2] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 3] 1A to 1C are cross-sectional views illustrating a manufacturing method of a display device according to one embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a manufacturing method of a display device according to one embodiment of the present invention. [Figure 5] FIG. 1 is a schematic cross-sectional view for explaining the film formation principle. [Figure 6] 1A and 1B are a cross-sectional view and a top view of a manufacturing apparatus including a chamber for forming the film; [Figure 7] FIG. [Figure 8] 1A and 1B are a top view and a cross-sectional view illustrating a display device of one embodiment of the present invention. [Figure 9] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 10] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 11] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 12] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 13] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 14] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 15] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 16] FIG. 1 is a top view illustrating an input device of one embodiment of the present invention. [Figure 17] FIG. 1 is a top view illustrating an input device of one embodiment of the present invention. [Figure 18] FIG. 1 is a top view illustrating an input device of one embodiment of the present invention. [Figure 19] FIG. 1 is a top view illustrating an input device of one embodiment of the present invention. [Figure 20]FIG. 1 is a circuit diagram illustrating an input device of one embodiment of the present invention. [Figure 21] FIG. 1 is a circuit diagram illustrating an input device of one embodiment of the present invention. [Figure 22] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 23] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 24] 1A and 1B are cross-sectional views illustrating a display device according to one embodiment of the present invention. [Figure 25] FIG. 1 is a top view illustrating a display device according to one embodiment of the present invention. [Figure 26] 1A and 1B are cross-sectional views illustrating transistors according to embodiments of the present invention. [Figure 27] 1A and 1B are cross-sectional views illustrating transistors according to embodiments of the present invention. [Figure 28] 1A and 1B are a top view and a cross-sectional view illustrating a transistor of one embodiment of the present invention. [Figure 29] 1A and 1B are a top view and a circuit diagram illustrating a display device of one embodiment of the present invention. [Figure 30] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 31] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 32] 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 33] Electron diffraction pattern of CAAC-OS. [Figure 34] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 35] Schematic diagram illustrating the film formation model of CAAC-OS and nc-OS. [Figure 36] A diagram explaining InGaZnO4 crystals and pellets. [Figure 37] Schematic diagram illustrating a film formation model of CAAC-OS. [Figure 38] 1A to 1C illustrate electronic devices according to one embodiment of the present invention. [Figure 39] 1A to 1C illustrate electronic devices according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0043] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in the form and details thereof without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be achieved by the following embodiments. It should not be construed as being limited to the contents of the description. The same reference numerals are used in different drawings to denote the same parts or parts having similar functions. A repeated explanation will be omitted.

[0044] <Notes regarding the description of the drawings> In this specification, the terms "above" and "below" that indicate the positional relationship between components are used. , are used for convenience in explanation with reference to the drawings. The meaning of the wording in the specification changes depending on the direction in which the configuration is depicted. It is not limited to this and can be rephrased appropriately depending on the situation.

[0045] In addition, the terms "above" and "below" refer to the positional relationship of the components directly above or below, and directly adjacent to each other. For example, if the expression is "electrode B on insulating layer A," Electrode B does not need to be formed directly on insulating layer A, but between insulating layer A and electrode B This does not exclude the inclusion of other components.

[0046] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case of -5° or more and 5° or less. "Line" refers to the state in which two straight lines are arranged at an angle between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0047] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is expressed as a hexagonal crystal system. .

[0048] In addition, in the drawings, the size, thickness of a layer, or area is shown arbitrarily for the convenience of explanation. Therefore, the drawings are not necessarily limited to the scale. The drawings are merely schematic illustrations for the purpose of illustration, and are not limited to the shapes or values ​​shown in the drawings.

[0049] In addition, in the drawings, top views (also called plan views or layout views) and perspective views, In order to clarify the drawings, some components may be omitted.

[0050] <Notes regarding possible paraphrases> In this specification and the like, when describing the connection relationship of a transistor, one of the source and the drain is referred to as "one of the source and drain" (or the first electrode, or the first terminal), and The other side of the drain is referred to as the "other side of the source or drain" (or second electrode, or second terminal). This means that the source and drain of a transistor are This is because it changes depending on the conditions. Regarding the names of the source and drain of a transistor, can be appropriately rephrased as source (drain) terminal, source (drain) electrode, etc. depending on the situation. It can be done.

[0051] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring." Furthermore, the terms "electrode" and "wiring" are used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the "line" is formed as a single unit.

[0052] In this specification, a transistor includes a gate, a drain, and a source. It is an element with at least three terminals. And, the drain (drain terminal, drain A channel is formed between the source (source terminal, source region or drain electrode) and the source (source terminal, source region or source electrode). The transistor has a channel region and allows current to flow through the drain, channel region, and source. It is possible.

[0053] Here, the source and drain vary depending on the structure or operating conditions of the transistor. Therefore, it is difficult to determine which is the source and which is the drain. The part that functions as a source and the part that functions as a drain are not called source or drain. One of the source and the drain is referred to as a first electrode, and the other of the source and the drain is referred to as a second electrode. It may be written.

[0054] In this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion of the elements. It should be noted that the numbers are added to avoid confusion and are not intended to be limiting.

[0055] In this specification, the substrate of the display panel is provided with, for example, an FPC (Flexible Printed Circuit). Switched Circuits) or TCP (Tape Carrier Packet ge) or COG (Chip On Glass) on the board Devices that have ICs (integrated circuits) directly mounted using this method are sometimes called display devices.

[0056] Also, the words "film" and "layer" may be used interchangeably depending on the situation. For example, the term "conductive layer" can be replaced with "conductive film." ". Alternatively, for example, the term "insulating film" may be used. It may be possible to change the term to "insulating layer."

[0057] <Notes on definitions of terms> The following provides definitions of terms not mentioned in the above embodiments.

[0058] <<About connection>> In this specification, "A and B are connected" does not mean that A and B are directly connected. In addition to the above, it also includes those that are electrically connected. Connected means that there is an object between A and B that has some electrical effect. , which enables the transmission and reception of electrical signals between A and B.

[0059] These representation methods are merely examples, and the present invention is not limited to these representation methods. , Y, Z1, Z2 are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0060] Note that the content (or even a part of the content) described in one embodiment may be used in conjunction with that embodiment. Other content (or even part of content) described in the context, and / or one or more other embodiments The contents (or a part of the contents) described in the embodiments may be applied, combined, or replaced. You can do things like drawing.

[0061] The contents described in the embodiments are explained in detail in each embodiment using various drawings. This refers to the content that is stated or the content that is stated using the text in the specification.

[0062] In addition, a drawing (or a part thereof) described in one embodiment may be different from another part of the drawing, Another figure (or a part thereof) described in the embodiment, and / or one or more By combining the figures (or a part thereof) described in other embodiments of the present invention, This allows for even more diagrams to be constructed.

[0063] (Embodiment 1) In this embodiment, a configuration example of a display panel will be described.

[0064] <Protection of the surface and sides of the board with a protective film> 1A shows a top view of a display device. In FIG. 1A, a display device 10 has a display area 21, a display panel 20 having a peripheral circuit 22, and an FPC 42 are used. In one embodiment of the present invention, the protective film 23 is formed uniformly on the display panel 20. As a method for forming the protective film 23, for example, atomic layer deposition (ALD) can be used. It is preferable to form the film by the atomic layer deposition method. The protective film 23 and other protective films are used to protect display elements and transistors, for example. The protective film such as the protective film 23 has other functions. Therefore, a protective film such as the protective film 23 may be simply called a film. For example, a protective film such as the protective film 23 may be called a first film, a second film, or the like.

[0065] FIG. 1B shows a cross-sectional view of an edge portion of the display panel 20. The display panel 20 includes a transistor , capacitance elements, display elements, etc. are formed on the substrate 100 at the edge of the display panel 20. Substrate 300, insulating layer 130, insulating layer 131, insulating layer 170, insulating layer 180, light-shielding layer 18, It has an insulating layer 330 and a spacer 240 and is covered with a protective film 23 .

[0066] <<Method for forming a protective film on a display panel using the ALD method>> 3(A), 3(B), and 3(C) show the formation of a protective film on the display panel 20 using the ALD method. The membrane method is shown.

[0067] On the substrate 100, a transistor, a capacitor element, a part of a display element, etc. are formed, and a region 11 is set. In addition to the light-shielding layer 18 and the insulating layer 330, a coloring layer and a display element layer are also formed on the substrate 300. A part or the like is formed, and an area 12 is provided (see FIG. 3(A)).

[0068] Next, the region 11 of the substrate 100 and the region 12 of the substrate 300 are placed face to face, and the adhesive layer 370 is The display panel 20 can be formed by bonding the substrate 100 and the substrate 300 together using the adhesive. (See Figure 3(B)).

[0069] Next, a protective film 23 can be formed on the display panel 20 using the ALD method (see FIG. 3(C)). The connection part with FPC42 is masked to form a protective film. 23 can be prevented from forming.

[0070] The ALD method can deposit a film extremely uniformly on the deposition surface. For example, aluminum oxide, hafnium oxide, zirconium oxide, titanium oxide, Zinc oxide, indium oxide, tin oxide, indium tin oxide (ITO), tantalum oxide, acid Silicon oxide, manganese oxide, nickel oxide, erbium oxide, cobalt oxide, tellurium oxide , barium titanate, titanium nitride, tantalum nitride, aluminum nitride, tungsten nitride , cobalt nitride, manganese nitride, hafnium nitride, etc. can be deposited as a protective film. The protective film is not limited to an insulating film, but may be a conductive film. For example, Ruthenium, platinum, nickel, cobalt, manganese, copper, etc. can be deposited.

[0071] In addition, the parts that are electrically connected to FPC42, etc. are masked to prevent film formation. As a masking method, organic films, inorganic films, metals, etc. can be used. For example, silicon oxide, silicon oxynitride, gallium oxide, nitriding oxide, etc. Gallium oxide, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride oxide insulating films such as silicon nitride and aluminum nitride, and photoresist insulating films Resin, polyimide resin, acrylic resin, polyimide amide resin, benzocyclobutene resin Organic materials such as resin, polyamide resin, and epoxy resin can be used. When used as a mask, the protective film is preferably removed after film formation.

[0072] In addition, the area where the film is to be formed by the ALD method can be masked with a metal mask. The metal mask may be made of iron, chromium, nickel, cobalt, tungsten, molybdenum, or aluminum. a metal element selected from aluminum, copper, tantalum, and titanium, or a metal element comprising the above-mentioned metal elements; The metal layer can be formed by using an alloy containing the metal elements or an alloy combining the above-mentioned metal elements. The metal mask may be placed close to or in contact with the display panel.

[0073] The film formed by the ALD method is extremely uniform and dense. By forming a protective film 23 on the side surface of the panel by the ALD method, external components such as moisture are prevented. As a result, fluctuations in transistor characteristics can be suppressed. This stabilizes the operation of the peripheral circuits. It also enables a narrower frame, which allows for an expanded pixel area. This allows for larger screens and higher resolution display devices.

[0074] Furthermore, by using the protective film 23, the distance between the end of the peripheral circuit 22 and the end of the display panel 20 is Even if the distance between A and A3 is narrowed, the transistor characteristics are stable due to the high barrier properties. Because the circuit operation is stable, the frame of the display panel can be narrowed. The distance from the path 22 to the edge of the display panel 20 (the cut portion of the panel) is preferably 300 μm or less. Preferably, the thickness can be set to 200 μm or less. Also, the structure at the end portion can be set as shown in FIG. It may also be a shape without any irregularities.

[0075] <Another example of protective film formation> 2(A) and 2(B) show another example of the configuration of FIG. 1(B). In this case, the protective film 23 is formed as shown in FIG. It is also possible to slightly wrap around to the back side (region 13), or It is also possible to suppress the formation of the protective film 23 on the side (region 14).

[0076] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination.

[0077] (Embodiment 2) In this embodiment mode, a method for manufacturing a plurality of display panels described in Embodiment Mode 1 will be described. Reveal.

[0078] 4(A), 4(B), 4(C), and 4(D) show a method for manufacturing the display panel 20. FIG. In FIG. 4, the liquid crystal element 80 and the adhesive layer 370 are shown as the display element. The substrate 100 includes an element substrate having pixels, transistors, capacitors, etc., and a substrate 300. The opposing substrate, which has a light-shielding layer, a colored layer, etc. on top, can be bonded to the liquid crystal in a sealed manner. Note that the same parts as those in the manufacturing method shown in FIG. 3 will be omitted.

[0079] In a configuration having a plurality of display panels 20 (FIG. 4(A)), the substrate 300 (upper surface side) is cut. By doing so, the grooves 30 can be formed (FIG. 4(B)). After the grooves 30 are formed, AL A protective film 23 is formed from the upper side by the D method (FIG. 4(C)), and finally the substrate 100 side is cut off. By doing so, it is possible to manufacture a plurality of display panels (FIG. 4(D)). It is possible to prevent the formation of the protective film 23 on the rear surface of the substrate 100 (the side not having the liquid crystal element 80). Cut.

[0080] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination.

[0081] (Embodiment 3) <<Explanation about the film formation method>> The following describes a method for forming a semiconductor layer, an insulating layer, a conductive layer, or the like that can be applied to one embodiment of the present invention. A film forming apparatus will be described.

[0082] <CVD and ALD film deposition> Conventional CVD deposition equipment requires a precursor gas for the reaction during deposition. The deposition equipment using the ALD method is a preparatory chamber for the reaction. The gases are introduced into the chamber in sequence, and the film is formed by repeating this gas introduction sequence. For example, by switching between two or more types of switching valves (also called high-speed valves), The precursors are supplied to the chamber in order, and the first precursor is supplied to the chamber in order to prevent the mixture of multiple precursors. After the precursor, an inert gas (argon, nitrogen, etc.) is introduced, and the second precursor is Also, instead of introducing an inert gas, the first pre-cooled gas is removed by evacuation. After the first precursor is evacuated, a second precursor may be introduced. (D) shows the film formation process by the ALD method. The first precursor 601 is adsorbed on the surface of the substrate ( 5(A)), a first monolayer is deposited (see FIG. 5(B)), and a second monolayer is subsequently introduced. By reacting with precursor 602 (see FIG. 5C), a second monolayer is deposited on the first monolayer. A thin film is formed by controlling the gas introduction order (see FIG. 5(D)). By repeating this process several times until the thickness reaches a certain level, a thin film with excellent step coverage can be formed. The thickness of the film can be adjusted by the number of times it is repeated, allowing for precise film thickness adjustment. be.

[0083] There are two types of ALD methods: ALD using heat (thermal ALD) and ALD using plasma (plasma ALD). In thermal ALD, the precursor reacts using thermal energy. In the plasma ALD method, the precursor reacts in a radical state.

[0084] The ALD method can deposit extremely thin films with high precision. Surface coating is possible even on uneven surfaces. High rate and high film density.

[0085] Furthermore, the thermal ALD method is free from plasma damage.

[0086] Plasma ALD In addition, by forming a film using the plasma ALD method, it is possible to achieve a high degree of uniformity compared to the ALD method using heat (thermal ALD method). The plasma ALD method allows deposition at temperatures even lower than 100 degrees. The film can be formed without decreasing the film formation rate. Since the plasma can generate radicals, it is possible to form films of not only oxides but also nitrides. can be done.

[0087] In addition, when a light-emitting element (such as an organic EL element) is used as a display element, if the process temperature is high, However, by using the plasma ALD method, Since the process temperature can be lowered, deterioration of the light emitting element can be suppressed.

[0088] In addition, when performing plasma ALD, inductively coupled plasma (ICP) is used to generate radical species. This uses a selectively coupled plasma. It can be generated away from the substrate, which reduces plasma damage.

[0089] As a result of the above, by using the plasma ALD method, the process temperature can be lowered compared to other film formation methods. The surface coverage can be increased, and the side surface of the substrate can be This film can be formed, which can prevent water from entering from the outside. Therefore, the reliability of the driver operation of the peripheral circuits at the edge of the panel is improved (transistor This improves the reliability of the display characteristics, enabling stable operation even with a narrow frame. do.

[0090] <<Explanation about ALD equipment>> An example of a film formation apparatus using the ALD method is shown in FIG. , a film-forming chamber (chamber 1701), raw material supply units 1711a and 1711b, and a flow rate controller high-speed valves 1712a and 1712b, raw material inlets 1713a and 1713b, and raw material The chamber 1701 has a fuel outlet 1714 and an exhaust device 1715. The raw material inlets 1713a and 1713b are connected to the raw material supply unit 1711a and the raw material supply port 1711b via supply pipes and valves. The raw material discharge port 1714 is connected to a discharge pipe, a valve, and It is connected to an exhaust device 1715 via a pressure regulator.

[0091] Inside the chamber, there is a substrate holder 1716 equipped with a heater, and the substrate to be formed is placed on the substrate holder. A substrate 1700 is placed on which the film is to be deposited.

[0092] In the raw material supply units 1711a and 1711b, solid raw materials and liquid raw materials are supplied by vaporizers and heating means. Alternatively, the raw material supply units 1711a and 1711b may be used to form precursors from the raw materials. A precursor of the compound may be supplied.

[0093] Although an example in which two raw material supply units 1711a and 1711b are provided is shown, this is not particularly limited. In addition, the high-speed valves 1712a and 1712b can be precisely controlled by the time. It is possible to control the amount of gas supplied, and it is configured to supply either a precursor or an inert gas. The high-speed valves 1712a and 1712b are precursor flow controllers and inert It can also be called a gas flow controller.

[0094] In the film forming apparatus shown in FIG. 6(A), a substrate 1700 is carried onto a substrate holder 1716. After the bar 1701 is sealed, the substrate 1700 is heated by the heater of the substrate holder 1716. is set to a desired temperature (for example, 100°C or higher or 150°C or higher), and a precursor is supplied; Exhaust by the exhaust device 1715, supply of inert gas, and exhaust by the exhaust device 1715 By repeating this process, a thin film is formed on the substrate surface.

[0095] In the film forming apparatus shown in FIG. 6(A), raw materials (volatile materials) are prepared in raw material supply units 1711a and 1711b. By appropriately selecting the appropriate activating agent (e.g., volatile organometallic compounds), hafnium, aluminum, tungsten Oxides (including composite oxides) containing one or more elements selected from the group consisting of aluminum, zirconium, etc. Specifically, an insulating layer containing hafnium oxide can be formed. an insulating layer comprising aluminum oxide; an insulating layer comprising hafnium silicate; an insulating layer containing palladium or an insulating layer containing aluminum silicate; In addition, the raw materials (volatilized materials) prepared in the raw material supply units 1711a and 1711b can be By appropriately selecting the appropriate metal layer (e.g., ionic organic metal compound), a metal layer such as a tungsten layer or a titanium layer can be formed. It is also possible to deposit thin films such as metal layers and nitride layers such as titanium nitride layers.

[0096] For example, when a hafnium oxide layer is formed using a film forming apparatus that uses the ALD method, a solvent and liquids containing hafnium precursor compounds (hafnium alkoxides, tetrakisdimethyl A vaporized precursor of hafnium amide (such as TDMAH) and Two types of gases are used: oxidant and ozone (O3). The first precursor supplied from the raw material supply unit 1711b is TDMAH. The second precursor is ozone. The chemical formula of tetrakisdimethylamidohafnium is The material is Hf[N(CH3)2]4. Other materials include tetrakis(ethylmethyl) Nitrogen has the function of eliminating charge trapping levels. Therefore, by including nitrogen in the precursor, hafnium oxide with a low charge trapping level density can be obtained. A film can be formed.

[0097] When forming an aluminum oxide layer using a film forming device that uses the ALD method, the solvent and aluminum The precursor is a vaporized liquid containing a tungsten precursor compound (e.g., TMA), and the oxidant is a In this case, two kinds of gases, 1) H2O and 2) HCl, are used. The precursor is TMA, and the second precursor supplied from the raw material supply unit 1711b is H2 O. The chemical formula of trimethylaluminum is Al(CH3)3. The material liquid is tris(dimethylamido)aluminum, triisobutylaluminum Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate) ) etc.

[0098] <<Multi-chamber film deposition equipment>> Also, a multi-chamber manufacturing apparatus having at least one film forming apparatus shown in FIG. An example is shown in FIG. 6(B).

[0099] The manufacturing equipment shown in FIG. 6(B) can continuously form laminated films without exposing them to the atmosphere. We aim to prevent impurities from being mixed in and improve throughput.

[0100] The manufacturing apparatus shown in FIG. 6(B) includes a load chamber 1702, a transfer chamber 1720, a pre-treatment chamber 1703, The system has at least a chamber 1701, which is a film-forming chamber, and an unloading chamber 1706. The chambers of the manufacturing equipment (including the load chamber, processing chamber, transfer chamber, deposition chamber, unload chamber, etc.) In order to prevent moisture from adhering, the container is filled with an inert gas (such as nitrogen gas) with a controlled dew point. It is preferable to keep the pressure reduced, and it is desirable to maintain the pressure reduced.

[0101] In addition, chambers 1704 and 1705 are the same ALD method as chamber 1701. Alternatively, a film forming apparatus using a plasma CVD method may be used. Alternatively, a deposition apparatus using a sputtering method or a metal organic chemical vapor deposition method (MOC) may be used. VD:Metal Organic Chemical Vapor Depositi The film forming apparatus may be one that uses the on method.

[0102] For example, the chamber 1704 is a film forming device that uses a plasma CVD method. The following is an example of a film deposition system using the MOCVD method as the 1705. show.

[0103] In FIG. 6B, the top view of the transfer chamber 1720 is shown as an example of a hexagonal shape, but it may be changed depending on the number of layers of the laminated film. If necessary, a manufacturing device having a polygonal shape or more and connected to more chambers may be used. In addition, although the top surface shape of the substrate is shown as a rectangle in FIG. 6(B), it is not particularly limited. Although FIG. 6(B) shows an example of a single wafer type, a batch type film formation in which multiple substrates are formed at once is also possible. It may also be a device.

[0104] 《Large area ALD film deposition equipment》 Furthermore, by using the plasma ALD method, it is possible to form films on large-area substrates. Figure 7(A) and Figure 7(B) show schematic diagrams of other configurations of ALD film formation equipment. A precursor is introduced into a chamber 820 from an inlet 810, and the substrate 800 is heated from above and below. The ALD method can be used to form a film on the substrate. As shown in Figure 7(B), the film can be deposited by fixing it in the chamber, or by in-line deposition as shown in Figure 7(C). By using the plasma ALD method, it is possible to deposit a film while the substrate is moving. It has a high throughput and can form films over a large area.

[0105] (Fourth embodiment) In this embodiment, the details of the display devices described in the first and second embodiments will be explained with reference to the drawings. explain.

[0106] 8A and 8B are an example of a top view and a cross-sectional view of a display device. A) shows a representative example having a display panel 20, a display area 21, a peripheral circuit 22, and an FPC 42. The diagram illustrates the typical configuration.

[0107] Figure 8(B) shows the distances between dashed lines A-A', B-B', C-C', and D-D' in Figure 8(A). A cross-sectional view of the space between the two is shown.

[0108] LCD panel As a display panel mounted on the display device, a liquid crystal panel is used as shown in FIG. 8(B). The display device shown in FIG. 8B uses a liquid crystal element 80 as a display element. The display device also includes a polarizing plate 103, a polarizing plate 303, and a backlight 104. They are bonded by adhesive layers 373, 374, and 375, respectively. A protective substrate 302 is provided on the viewing side and is bonded with an adhesive layer 376 .

[0109] <<Substrate 100>> There is no particular restriction on the material of the substrate 100, but it should be strong enough to withstand the subsequent heat treatment. It must be heat resistant and preferably highly translucent.

[0110] The substrate 100 may be made of an organic material, an inorganic material, or a composite material such as an organic material and an inorganic material. For example, inorganic materials such as glass, ceramics, and metals can be used for the substrate 100. can be done.

[0111] Specifically, alkali-free glass, soda-lime glass, potash glass, or crystal glass For example, an inorganic oxide film, an inorganic nitride film, or the like can be used for the substrate 100. An inorganic oxynitride film or the like can be used for the substrate 100. For example, silicon oxide, nitride Silicon, silicon oxynitride, alumina, etc. can be used for the substrate 100. The substrate 100 may be made of stainless steel or aluminum, for example.

[0112] Additionally, a single layer material or a multi-layer laminated material can be used for the substrate 100. For example, a material that is laminated with a base material and an insulating film that prevents the diffusion of impurities contained in the base material is called a substrate. Specifically, it can be used to prevent the diffusion of glass and impurities contained in the glass. One or more layers selected from a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, etc. A material in which several films are laminated can be applied to the substrate 100. Alternatively, a material made of a resin and an impermeable material that can penetrate the resin can be applied. A silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like is laminated to prevent the diffusion of impurities. The resulting material can be applied to the substrate 100 .

[0113] The substrates applicable to the substrate 100 described above can also be applied to the substrate 300.

[0114] Transistors 50 and 52 The transistor 50 includes a conductive layer 120, insulating layers 130 and 131, a semiconductor layer 140, and a conductive layer 1 50, 160, and insulating layers 170, 180. can be configured in the same way.

[0115] Insulating layer 110 The insulating layer 110 having a function as a base film may be made of silicon oxide, silicon oxynitride, Silicon nitride, silicon oxide nitride, gallium oxide, hafnium oxide, yttrium oxide, The insulating layer 110 is formed using aluminum oxide, aluminum oxynitride, or the like. Silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide By using ammonium or the like, impurities, typically alkali metals, water, hydrogen, etc., can be removed from the substrate 100. The insulating layer 110 is formed on the substrate 100. Furthermore, the insulating layer 110 does not necessarily have to be formed.

[0116] Conductive layer 120 The conductive layer 120 having the function of a gate electrode is made of aluminum, chromium, copper, or tantalum. , a metal element selected from titanium, molybdenum, nickel, iron, cobalt, and tungsten; Alternatively, an alloy containing the above-mentioned metal elements or an alloy combining the above-mentioned metal elements may be used. It is formed using one or more selected from manganese and zirconium. The conductive layer 120 may be formed using a single layer structure or a multi-layer structure. For example, a single layer structure of an aluminum film containing silicon, a manganese film, a single-layer structure of a copper film containing the titanium nitride film; a two-layer structure of a titanium film laminated on an aluminum film; Two-layer structure with a titanium film laminated on top, and two-layer structure with a tungsten film laminated on a titanium nitride film , a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, Two-layer structure: copper film on copper film containing fluorine, titanium film on titanium film, and aluminum film on titanium film. A three-layer structure is formed by laminating a copper film and then forming a titanium film on top of that, and then forming a manganese-containing copper film on top of that. There is also a three-layer structure in which a copper film is laminated and a manganese-containing copper film is formed on top of that. Aluminum, titanium, tantalum, tungsten, molybdenum, chromium, neodymium, steel Using an alloy film or a nitride film made up of one or more selected from candium Good too.

[0117] Insulating layer 130 The insulating layer 130 also functions as a gate insulating film. , aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, silicon nitride oxide Silicon, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, silicon dioxide One or more of: lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide Alternatively, the insulating layer 130 may be a laminate of the above materials. The insulating layer 130 may contain impurities such as lanthanum (La), nitrogen, and zirconium (Zr). It may also be included as an object.

[0118] Insulating layer 131 The gate insulating film can be formed by laminating an insulating layer 130 and an insulating layer 131 . The insulating layer 131 may be made of, for example, aluminum oxide, magnesium oxide, silicon oxide, or Silicon nitride, silicon oxynitride, silicon nitride, gallium oxide, germanium oxide, oxide yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide and The insulating layer 131 may be an insulating film containing one or more of the above-mentioned tantalum oxide and tantalum oxide. The insulating layer 131 may be a laminate of materials. The insulating layer 131 may contain impurities such as Zn (Zr). This can prevent hydrogen, water, etc. from penetrating into the semiconductor layer 140 from the portion.

[0119] Semiconductor layer 140 The semiconductor layer 140 is formed of a metal oxide containing at least In or Zn. The area of ​​the top surface of layer 140 is preferably the same as or smaller than the area of ​​the top surface of conductive layer 120. It's nice.

[0120] Oxide semiconductors The oxide semiconductor used as the semiconductor layer 140 is, for example, an In—Ga—Zn-based oxide. In-Al-Zn oxides, In-Sn-Zn oxides, In-Hf-Zn oxides , In-La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, I n-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In -Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In- Yb-Zn oxide, In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, I n-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al- Zn-based oxides, In-Sn-Hf-Zn-based oxides, In-Hf-Al-Zn-based oxides, I An n-Ga-based oxide can be used.

[0121] Here, the In-Ga-Zn oxide is a material containing In, Ga, and Zn as main components. It means oxide, and the ratio of In, Ga, and Zn does not matter. Other metal elements may also be included.

[0122] When the semiconductor layer 140 is formed of an In-M-Zn oxide, the sum of In and M is 1 When the atomic percentage of In is 0.00, the atomic percentage of M is preferably 25. atomic %, and M is less than 75 atomic %, and more preferably In is 34a atomic% and M is less than 66 atomic%.

[0123] The semiconductor layer 140 has an energy gap of 2 eV or more, preferably 2.5 eV or more, Preferably, the energy gap is 3 eV or more. By doing so, the off-state current of the transistor 50 can be reduced.

[0124] The thickness of the semiconductor layer 140 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less. It is more preferable to set the thickness to 3 nm or more and 50 nm or less.

[0125] The semiconductor layer 140 is an In-M-Zn oxide (wherein M is Al, Ga, Y, Zr, La, Ce, or When the In-Zn-oxide is formed using Nd, the sputtering agent used to form the In-Zn-oxide The atomic ratio of the metal elements in the plating target preferably satisfies In≧M, Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Zn. =1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, In: The preferable ratio of M to Zn is 4:2:4.1. The atomic ratios of the metal elements contained in the sputtering target are included as errors. The ratio of the number of electrons may vary by ±40%. By using a target, preferably a polycrystalline target containing In-Ga-Zn oxide, CAAC-OS (C Axis Aligned Crystalline Oxide) forming a microcrystalline oxide semiconductor film and a microcrystalline oxide semiconductor film; is possible.

[0126] The hydrogen contained in the semiconductor layer 140 reacts with the oxygen that bonds with the metal atoms to form water, and Oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters the electron carrier, it can generate electrons. By bonding with oxygen, which bonds with metal atoms, electrons, which act as carriers, may be generated. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It's easy to become.

[0127] For this reason, it is preferable that the semiconductor layer 140 has as little oxygen vacancy as possible and as little hydrogen as possible. Specifically, the semiconductor layer 140 is preferably subjected to secondary ion mass spectroscopy (SIMS). Hydrogen concentration obtained by Condary Ion Mass Spectrometry degrees, 5 x 10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Less than or equal to 5 × 10 18 atoms / cm 3 Less than or equal to 1× 10 18 atoms / cm 3 Less than or equal to 5 × 10 17 atoms / cm 3 below , and more preferably 1 × 10 16 atoms / cm 3 As a result, the transistor The transistor 50 has an electrical characteristic in which the threshold voltage is positive (also called a normally-off characteristic). do.

[0128] In addition, when the semiconductor layer 140 contains silicon or carbon, which is one of the group 14 elements, As a result, oxygen vacancies increase in the semiconductor layer 140, causing the semiconductor layer 140 to become n-type. The concentrations of silicon and carbon at 40 (obtained by secondary ion mass spectrometry) were x10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 and As a result, the transistor 50 has electrical characteristics in which the threshold voltage is positive (normal It has a turn-off characteristic.

[0129] In addition, in the semiconductor layer 140, alkali metal or is the concentration of alkaline earth metals, 1×10 18 atoms / cm 3 Below, preferably 2 x 1 0 16 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When they bond with a conductor, carriers may be generated, increasing the off-state current of the transistor. Therefore, the concentration of the alkali metal or alkaline earth metal in the semiconductor layer 140 As a result, transistor 50 has a positive threshold voltage. The device has electrical characteristics (also called normally-off characteristics).

[0130] Furthermore, when the semiconductor layer 140 contains nitrogen, electrons that act as carriers are generated, and the carrier density increases. As a result, the transistor tends to have normally-on characteristics. Therefore, it is preferable that the nitrogen content in the semiconductor layer 140 is reduced as much as possible. For example, the nitrogen concentration obtained by secondary ion mass spectrometry is 5 × 10 18 atoms / cm 3 It is preferable to do the following:

[0131] By reducing the impurities in the semiconductor layer 140, the carrier density of the semiconductor layer 140 can be reduced. Therefore, the semiconductor layer 140 has a carrier density of 1×10 15 pieces / cm 3 below , preferably 1 x 10 13 pieces / cm 3 Less than 8 × 10, more preferably 11 pieces / cm 3 Not yet less than 1×10 11 pieces / cm 3 less than 1 x 10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 That's all.

[0132] The semiconductor layer 140 is formed using an oxide semiconductor having a low impurity concentration and a low density of defect states. By using the above method, a transistor having even better electrical characteristics can be manufactured. High purity intrinsic or actual silicon has a low impurity concentration and a low defect level density (low oxygen vacancy). A highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor is Since there are fewer carrier generation sources, it may be possible to lower the carrier density. A transistor in which a channel region is formed in the semiconductor layer 140 formed using the oxide semiconductor. Transistors have electrical characteristics in which the threshold voltage is positive (also known as normally-off characteristics). In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor is prone to defect formation. The trap level density may also be low due to the low level density. A transistor in which the semiconductor layer 140 is formed using a qualitatively highly pure intrinsic oxide semiconductor. The off-state current is extremely small, and the voltage between the source and drain electrodes (drain voltage) is 1 In the range of V to 10V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. , i.e. 1 × 10 -13 A characteristic of A or less can be obtained, and characteristic fluctuations can be further suppressed. It is possible.

[0133] Note that the transistor 50 using an oxide semiconductor for the semiconductor layer 140 has a structure in which, for example, the source and drain When the voltage between the transistor and the drain is set to about 0.1V, 5V, or 10V, The off-state current normalized by the channel width is reduced to several yA / μm to several zA / μm. This becomes possible.

[0134] In the off state, the transistor 50 connected to the display element (for example, the liquid crystal element 80) By using a transistor with extremely low leakage current, it is possible to retain image signals. For example, if the image signal is written at 11.6 μHz (1 day), the time can be extended. A frequency of 0.28mHz (1 time) or more and less than 0.1Hz (0.1 times per second), preferably 0.28mHz (1 time) or more and less than 0.1Hz (0.1 times per second), Images can be retained even at frequencies greater than 1Hz (once per hour) and less than 1Hz (once per second). This reduces the frequency of writing image signals. Of course, the power consumption of the panel 20 can be reduced by writing image signals at 1 Hz or less. Preferably, the frequency is 30Hz (30 times per second) or higher, more preferably 60Hz (6 times per second). The frequency can be greater than or equal to 960Hz (960 times per second) and less than 960Hz (960 times per second).

[0135] For the above reasons, by using a transistor including an oxide semiconductor, high reliability and power consumption can be achieved. A display panel with reduced power consumption can be manufactured.

[0136] In the case of a transistor using an oxide semiconductor, the semiconductor layer 140 is formed by sputtering or MOCVD (metal organic chemical vapor deposition). etal Organic Chemical Vapor Deposition) method The film can be formed by PLD (Pulsed Laser Deposition) method, etc. When the film is formed by sputtering, it can also be used for large-area display devices. Cut.

[0137] The semiconductor layer 140 may be a semiconductor layer made of silicon or silicon germanium. The semiconductor layer formed of silicon or silicon germanium may be amorphous. The structure may be a crystalline structure, a polycrystalline structure, or a single crystalline structure.

[0138] Insulating layer 170 The insulating layer 170 has a function of protecting the channel region of the transistor. , silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, gas oxide gallium, gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide oxide insulating films such as hafnium oxide nitride; nitride insulating films such as silicon nitride and aluminum nitride; The insulating layer 170 may be a single layer or a laminated layer. .

[0139] The insulating layer 170 is an oxide insulating layer containing more oxygen than the oxygen required for the stoichiometric composition. It is preferable to form the film by using a material containing more oxygen than the oxygen required for the stoichiometric composition. When heated, the oxide insulating film containing oxygen is partially desorbed. Oxide insulating films containing more oxygen than TDS (Thermal Desorption Spectroscopy analysis shows that the film surface temperature is between 100°C and 700°C. , or the amount of oxygen atoms released in the range of 100°C to 500°C is 1.0 × 10 18 atoms / cm 3 or more, preferably 3.0 × 10 20 atoms / cm 3 Acid that is more than The oxygen contained in the insulating layer 170 is transferred to the semiconductor layer 140 by heat treatment. This makes it possible to reduce oxygen vacancies in the semiconductor layer 140.

[0140] Insulating layer 180 The insulating layer 180 is provided with an insulating film having a blocking effect against oxygen, hydrogen, water, etc. The diffusion of oxygen from the semiconductor layer 140 to the outside and the diffusion of hydrogen and water from the outside to the semiconductor layer 140 For example, aluminum oxide, magnesium oxide, silicon oxide, etc. can be prevented from penetrating. Silicon oxide nitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide tungsten oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide An insulating film containing one or more of tungsten oxide and tantalum oxide can be used. The insulating layer 180 may be a laminate of the above materials. , zirconium (Zr), etc. may be contained as impurities.

[0141] <Capacitor elements 61 and 63> The capacitor element 61 includes a conductive layer 400, an insulating layer 180, and a conductive layer 190. The conductive layer 400 functions as one electrode of the capacitor 61. The conductive layer 400 functions as the other electrode of the conductive layer 61. The capacitive element 63 is also configured in the same manner as the capacitive element 61. can be done.

[0142] Conductive layer 400 The transistor 50 may be a transistor in which an oxide semiconductor is used for the semiconductor layer 140. By doing so, the conductive layer 400 can be formed on the insulating layer 130 using the same material as the semiconductor layer 140. In this case, the conductive layer 400 can be formed by processing a film formed simultaneously with the semiconductor layer 140. Therefore, the conductive layer 400 contains the same elements as the semiconductor layer 140. It may have a crystal structure similar to or different from that of the semiconductor layer 140. The film formed at the same time as the silicon dioxide is made conductive by having impurities or oxygen deficiencies. This allows the conductive layer 400 to be formed. Typical examples of impurities contained in the conductive layer 400 include: These include the noble gases, hydrogen, boron, nitrogen, fluorine, aluminum, and phosphorus. Representative examples include helium, neon, argon, krypton, and xenon. Although the conductive layer 400 has conductivity, one embodiment of the present invention is not limited to this. In some cases or circumstances, the conductive layer 400 may not necessarily be conductive. In other words, the conductive layer 400 does not have to have the same properties as the semiconductor layer 140. It may be possible.

[0143] As described above, the semiconductor layer 140 and the conductive layer 400 are both formed on the insulating layer 130. The impurity concentration is different. Specifically, the impurity concentration of the conductive layer 400 is different from that of the semiconductor layer 140. For example, in the semiconductor layer 140, the hydrogen concentration obtained by secondary ion mass spectrometry is Degrees are 5 x 10 19 atoms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than or equal to 5 x 10 17 at oms / cm 3 Less than 1 × 10 16 atoms / cm 3 On the other hand, In the electrode layer 400, the hydrogen concentration obtained by secondary ion mass spectrometry is 8×1019 a toms / cm 3 or more, preferably 1 × 10 20 atoms / cm 3 More than 5, preferably x10 20 atoms / cm 3 In addition, compared to the semiconductor layer 140, the conductive layer 4 The hydrogen concentration in 00 is twice as high, or even 10 times higher.

[0144] By setting the hydrogen concentration in the semiconductor layer 140 within the above range, the carriers in the semiconductor layer 140 It is possible to suppress the production of certain electrons.

[0145] The oxide semiconductor film formed simultaneously with the semiconductor layer 140 is exposed to plasma. The semiconductor film can be damaged and oxygen vacancies can be formed. For example, an oxide semiconductor film When a film is formed on the substrate by plasma CVD or sputtering, the oxide semiconductor film is The insulating layer 170 is exposed to the plasma to generate oxygen vacancies. In the etching treatment, the oxide semiconductor film is exposed to plasma, and oxygen vacancies are generated. Alternatively, the oxide semiconductor film may be formed by using a mixed gas of oxygen and hydrogen, hydrogen, a rare gas, or ammonia. When exposed to plasma such as nitrogen, oxygen vacancies are generated in the oxide semiconductor film. By adding a pure substance, oxygen vacancies are formed and impurities are added to the oxide semiconductor film. The methods of adding impurities include ion doping, ion implantation, and plasma treatment. In the case of plasma treatment, plasma is generated in a gas atmosphere containing the impurities to be added. The accelerated impurity ions are then introduced into the oxide semiconductor by plasma treatment. By colliding with the film, oxygen vacancies can be formed in the oxide semiconductor film.

[0146] An impurity, for example, hydrogen, is added to an oxide semiconductor film in which oxygen vacancies are formed by adding an impurity element. When oxygen is contained, hydrogen enters the oxygen vacancy site and a donor level is formed near the conduction band. As a result, the oxide semiconductor film becomes highly conductive and becomes a conductor. The semiconductor layer 140 can be called an oxide conductor film. The conductive layer 400 is formed of an oxide conductor film. It can be said that the conductive layer 400 is formed using an oxide semiconductor film with high conductivity. It can also be said that it is formed from a high metal oxide film.

[0147] The insulating layer 180 preferably contains hydrogen. Therefore, when the insulating layer 180 contains hydrogen, the hydrogen in the insulating layer 180 is absorbed by the semiconductor layer 14 As a result, the semiconductor layer 1 can be diffused into the oxide semiconductor film formed at the same time as the semiconductor layer 1. Impurities can be added to the oxide semiconductor film formed at the same time as the oxide semiconductor film 40 .

[0148] Furthermore, the insulating layer 170 is an oxide insulating layer containing more oxygen than the stoichiometric composition. Preferably, the insulating layer 180 is formed of an insulating film containing hydrogen. The oxygen contained in 170 moves to the semiconductor layer 140 of the transistor 50, and the semiconductor layer The amount of oxygen vacancies in the semiconductor substrate 140 can be reduced, and the fluctuation in the electrical characteristics of the transistor 50 can be reduced. In addition, hydrogen contained in the insulating layer 180 moves to the conductive layer 400, increasing the conductivity of the conductive layer 400. It is possible.

[0149] By the above method, the conductive layer 400 is formed simultaneously with the semiconductor layer 140, and is made conductive after the formation. By adopting this configuration, it is possible to reduce manufacturing costs.

[0150] In general, an oxide semiconductor film is transparent to visible light due to its large energy gap. On the other hand, the oxide conductor film is an oxide semiconductor having a donor level near the conduction band. Therefore, the influence of absorption due to the donor level is small, and the oxide It has the same level of light transmittance as a semiconductor film.

[0151] Conductive layer 190 The conductive layer 190 is formed using a conductive film that transmits visible light. Examples of the conductive film having transparency include indium (In), zinc (Zn), and tin (Sn ) It is preferable to use a material containing one selected from the group consisting of: The conductive film is typically made of indium tin oxide or indium containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide oxides, indium tin oxides containing titanium oxide, indium zinc oxides, silicon oxides Conductive oxides such as indium tin oxide can be used.

[0152] As described above, the conductive layer 190 and the conductive layer 400 have a light-transmitting property. The capacitor element can be made to be light-transmitting as a whole.

[0153] Conductive layer 380 The conductive layer 380 is formed using a conductive film that transmits visible light. Examples of the conductive film having transparency include indium (In), zinc (Zn), and tin (Sn ) It is preferable to use a material containing one selected from the group consisting of: The conductive film is typically made of indium tin oxide or indium containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide oxides, indium tin oxides containing titanium oxide, indium zinc oxides, silicon oxides Conductive oxides such as indium tin oxide can be used.

[0154] Liquid crystal element 80 The liquid crystal element 80 is, for example, a FFS (Fringe Field Switching) mode. The liquid crystal layer 390 can be driven by an electric field from the conductive layer 190. The alignment of the liquid crystal molecules in the liquid crystal layer 390 can be controlled, and the function of the liquid crystal element 80 can be improved. Possess the ability.

[0155] Although not shown in FIG. 8, the conductive layer 190 and the conductive layer 380 are in contact with the liquid crystal layer 390. An alignment film may be provided on each side.

[0156] The liquid crystal layer 390 is sandwiched between the conductive layer 190 and the conductive layer 380. The orientation of the liquid crystal molecules can be controlled by the electric field generated. As the method, for example, TN mode, STN mode, VA mode, ASM (Axiall y Symmetric Aligned Micro-cell) mode, OCB(O (Ptically Compensated Birefringence) mode, F LC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, MV A mode, PVA (Patterned Vertical Alignment) mode mode, IPS (In-plane Switching) mode, or TBA (Transfer You can also use a mode such as a reverse bend alignment. In addition to the above-mentioned driving method, the device can also be driven by an ECB (Electrically Controlled Bias Circuit) ontrolled Birefringence) mode, PDLC (Polymer Dispersed Liquid Crystal mode, PNLC (Polym Network Liquid Crystal mode, guest host mode, etc. However, there are other examples, including liquid crystal elements and their driving methods. You can be there.

[0157] The liquid crystal element 80 is made of a liquid crystal composition containing a liquid crystal exhibiting a nematic phase and a chiral agent. In this case, a cholesteric phase or a blue phase may be formed. The liquid crystal that shows the blue phase has a short response time of 1 msec or less, and Because it is isotropic, alignment treatment is not required and viewing angle dependency is small.

[0158] 《Light blocking layer 18》 A material having a light-shielding property can be used for the light-shielding layer 18. For example, a resin in which a pigment is dispersed, In addition to resin containing dye, inorganic films such as black chrome films can be used for the light-shielding layer 18. The light-shielding layer 18 is made of a composite oxide containing a solid solution of inorganic oxides, inorganic oxides, or the like. It can be used for.

[0159] 《Colored layer 360》 The colored layer 360 is a colored layer that transmits light of a specific wavelength band, for example, red, green, or blue. A color filter that transmits light in the yellow or yellow wavelength band can be used. The color layer is made of various materials using printing, inkjet, and photolithography methods. The white pixels are formed at the desired positions by etching or other methods. A transparent or white resin may be placed on top of the substrate.

[0160] Spacer 240 An insulating material can be used for the spacer 240. For example, an inorganic material, an organic material, or For example, a laminate of inorganic and organic materials can be used. Films containing silicon or silicon nitride, acrylic or polyimide, or photosensitive resin etc. can be applied.

[0161] 《Adhesive layer 370》 The adhesive layer 370 may be made of an inorganic material, an organic material, or a composite material of an inorganic material and an organic material. can be done.

[0162] For example, light-curing adhesives, reaction-curing adhesives, heat-curing adhesives, and / or anaerobic adhesives. Organic materials such as adhesives can be used for the adhesive layer 370. They can be used singly or in combination.

[0163] The photocurable adhesive is an adhesive that is cured by, for example, ultraviolet light, electron beam, visible light, infrared light, etc. say.

[0164] Specifically, epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyrate) Adhesives containing EVA (ethylene vinyl acetate) resin, silica, etc. are used as adhesive layers. Can be used for 370.

[0165] In particular, when using a light-curing adhesive, the material hardens quickly, shortening the work time. In addition, since curing begins when irradiated with light, the effects of the film formation process are minimized. Furthermore, it can be cured at low temperatures, making it easy to control the working environment. As described above, by using a light-curing adhesive, the process can be shortened and processing can be performed at low cost. .

[0166] Insulating layer 330 The insulating layer 330 has a planarizing function. The insulating layer 330 is made of an inorganic material or an organic material. For example, silicon oxide, silicon oxynitride, aluminum oxide, etc. aluminum oxide nitride, gallium oxide, gallium oxide nitride, yttrium oxide, Oxide insulating films such as yttrium oxynitride, hafnium oxide, and hafnium oxynitride, silicon nitride Silicon, aluminum nitride and other nitride insulating films, polyimide resin, acrylic resin, polyimide Resins with heat resistance such as amide resin, benzocyclobutene resin, polyamide resin, and epoxy resin It is formed using organic materials.

[0167] FPC42 The FPC 42 is electrically connected to the conductive layer 160 via the anisotropic conductive film 510. The conductive layer 160 can be formed in the process of forming the electrode layers of the transistor 50 and the like. Image signals and the like are transmitted from the FPC 42 to a driving circuit having a transistor 50 and a capacitance element 61. can be supplied to

[0168] <<Another Configuration of the Shape of the Substrate Edge of the Display Device>> 9 shows a cross-sectional view of another configuration of the display device of FIG. 8. As shown in FIG. 1(C), the edge of the substrate is made uneven. A protective film can be formed by ALD to achieve a shape without defects.

[0169] <<Another Configuration of the Protective Film 23 Formed on the Display Device 10>> When forming a protective film on the display device 10, it can be selectively formed on the front and side surfaces. 10, 11 and 12 show cross-sectional views of the display device.

[0170] 10 and 11, the substrate 100 and the substrate 110 are masked as shown in FIG. 2(A). In addition, a configuration can be adopted in which no protective film is formed on the outside of the substrate 300. For example, as shown in FIG. In this case, it is possible to suppress the formation of a protective film on the back surface of the substrate 100 and on the upper surface near the FPC 42. 11, the formation of a protective film on both the rear surface of the substrate 100 and the front surface of the substrate 300 is suppressed. In these cases, the area 13 at the edge of the substrate 100 or 300 may be The protective film may be formed in a wraparound manner as shown in FIG. 12. By using this, it is possible to provide an area 14 on the back surface side of the substrate 100 where no protective film is formed.

[0171] <Combination with a touch sensor on a display device> The display device can be combined with a touch sensor to form a touch panel. 14 and 15 show cross-sectional views of the touch panel. , a conductive layer 410, a conductive layer 430, an insulating layer 420, and an insulating layer 440. In addition, the wiring for the touch sensor can be formed by using the conductive layer 190 and the conductive layer 3 used in the display panel. 80 can be used in combination to form a touch sensor. The electrodes of the sensor may be formed on the visible side (surface side) of the substrate 300 or on the inside (display element side). It may be formed as follows.

[0172] <Configuration example of sensor electrodes, etc.> Below, a more specific configuration example of the input device 90 having a function as a touch sensor will be described. This will be explained with reference to the drawings.

[0173] 16A shows a schematic top view of the input device 90. The input device 90 has multiple elements on a substrate 930. The electrode 931 has a number of electrodes, a number of electrodes 932, a number of wirings 941, and a number of wirings 942. The substrate 930 has a plurality of wirings 941 and a plurality of wirings 942, and F In FIG. 16(A), an IC 951 is provided on the FPC 950. This shows an example of how this is being done.

[0174] 16(B) shows an enlarged view of the area surrounded by the dashed line in FIG. 16(A). The electrode 931 , a plurality of diamond-shaped electrode patterns are arranged in a row in the horizontal direction of the paper. The diamond-shaped electrode patterns are electrically connected to each other. Similarly, the electrode 932 is also A plurality of diamond-shaped electrode patterns are arranged in the vertical direction of the paper, and the diamond-shaped electrodes arranged in a row The electrode patterns are electrically connected to each other. Part of these overlaps and crosses each other. An insulator is sandwiched between the wires to prevent an electrical short circuit.

[0175] As shown in FIG. 16(C), the electrode 932 is connected to a plurality of diamond-shaped electrodes 933. , and bridge electrodes 934. The island-shaped electrodes 933 are arranged in the vertical direction of the drawing. The two adjacent electrodes 933 are electrically connected by a bridge electrode 934. With this structure, the electrode 933 and the electrode 931 are formed using the same conductive film. By processing, they can be formed simultaneously. Therefore, the variation in the film thickness of these layers can be suppressed. This makes it possible to suppress variations in the resistance value and light transmittance of each electrode depending on the location. In this example, the electrode 932 has a bridge electrode 934. 1 may have such a configuration.

[0176] As shown in FIG. 16(D), the diamond-shaped electrodes 931 and 932 shown in FIG. 16(B) The inside of the electrode pattern may be hollowed out, leaving only the outline. In this case, if the width of the electrodes 931 and 932 is thin enough not to be visible to the user, As will be described later, the electrodes 931 and 932 may be made of a light-shielding material such as a metal or alloy. 16(D) 。 Also, the electrode 931 or the electrode 932 shown in FIG. 16(D) connects the bridge electrode 934. It may also be configured to have:

[0177] One electrode 931 is electrically connected to one wiring 941. The electrodes 931 and 932 are electrically connected to one wiring 942. One of them corresponds to the row wiring, and the other corresponds to the column wiring.

[0178] As an example, in FIGS. 17(A), 17(B), 17(C), and 17(D), an electrode 931 9A and 9B show enlarged schematic views of a portion of the electrode 932. The electrodes may have various shapes. can be done.

[0179] In FIG. 18(A), FIG. 18(B), and FIG. 18(C), instead of the electrode 931 and the electrode 932, This shows an example in which electrodes 936 and 937 having thin wire-like upper surfaces are used. 18(A), linear electrodes 936 and 937 are arranged in a grid pattern. In Fig. 18(B) and (C), the electrodes 936 and 937 are arranged in a zigzag pattern. It has been done.

[0180] Enlarged views of the area enclosed by the dashed line in FIG. 18(B) are shown in FIGS. 19(A), 19(B), and 19(C). (C) shows an enlarged view of the area enclosed by the dashed line in Fig. 18(C), and Fig. 19(D) and Fig. 19(E) show the enlarged view of the area enclosed by the dashed line in Fig. 18(C). 19(F) are shown in Fig. 19(C). Also, in each figure, an electrode 936, an electrode 937, and 19(B) and 19(E), the intersection 938 is shown. 9(A) and 19(D), the straight line portions of the electrodes 936 and 937 have corners. As shown in Fig. 19(C) and Fig. 19(F), the shape may be a meandering shape. The shape may be a serpentine shape such that the

[0181] <<Configuration example of an in-cell touch panel>> Below is an example of the configuration of a touch panel in which a touch sensor is incorporated into a display unit having multiple pixels. Here, an example in which a liquid crystal element is used as a display element provided in a pixel will be described. Shows.

[0182] FIG. 20A shows a part of a pixel circuit provided in the display unit of the touch panel exemplified in this configuration example. FIG.

[0183] One pixel has at least a transistor 3503 and a liquid crystal element 3504. A wiring 3501 is connected to the gate of the transistor 3503, and a wiring 350 is connected to either the source or the drain. 2 are electrically connected to each other.

[0184] The pixel circuit includes a plurality of wirings (for example, wiring 3510_1, wiring 3510_2, wiring 3510_3, wiring 3510_4, wiring 3510_5, wiring 3510_6, wiring 3510_7, wiring 3510_8, wiring 3510_9, wiring 3510_10, wiring 3510_11, wiring 3510_12, wiring 3 2) and a plurality of wirings (for example, wiring 3511) extending in the Y direction, which are mutually The electrodes are arranged to intersect with each other, forming a capacitance therebetween.

[0185] In addition, among the pixels provided in the pixel circuit, some adjacent pixels are provided with The electrodes of the liquid crystal elements are electrically connected to each other to form one block. The blocks are divided into island-like blocks (e.g., block 3515_1, block 3515_2) and Linear blocks extending in the Y direction (for example, block 3516) are classified into two types. Although FIG. 20 shows only a part of the pixel circuit, these two types of The blocks are arranged repeatedly in the X and Y directions.

[0186] The wiring 3510_1 (or wiring 3510_2) extending in the X direction is arranged in the island-shaped block 35 15_1 (or block 3515_2). The wiring 3510_1 extending in the X direction is discontinuous along the X direction via linear blocks. The plurality of island-shaped blocks 3515_1 arranged in series are electrically connected. The extending wiring 3511 is electrically connected to the linear blocks 3516 .

[0187] FIG. 20B shows a plurality of wirings 3510 extending in the X direction and a plurality of wirings 3510 extending in the Y direction. 3511. Each of the wirings 3510 extending in the X direction is An input voltage or a common potential can be input to the wiring 35 extending in the Y direction. A ground potential is input to each of the terminals 11, or the wiring 3511 is electrically connected to the detection circuit. It is possible.

[0188] The operation of the above-mentioned touch panel will be described below with reference to FIGS.

[0189] Here, one frame period is divided into a writing period and a detection period. This is the period in which the image data is written, and the wiring 3510 (also called the gate line) is sequentially selected. On the other hand, the detection period is the period during which sensing is performed by the touch sensor, and the X direction The wiring 3510 extending to the above is selected in sequence, and an input voltage is input.

[0190] 21A is an equivalent circuit diagram during the writing period. A common potential is input to both the wiring 3510 extending in the Y direction and the wiring 3511 extending in the Y direction. do.

[0191] 21(B) is an equivalent circuit diagram at a certain point in the detection period. Each of the wirings 3511 extending in the X direction is electrically connected to the detection circuit. Of the wirings 3510, the input voltage is input to the selected one, and the other ones are common. A conducting potential is input.

[0192] The driving method exemplified here is applicable not only to the in-cell method but also to the touch panel exemplified above. This can be applied to the above-mentioned driving method examples and can be used in combination with the above-mentioned driving method examples. do.

[0193] In this way, the image writing period and the period for sensing by the touch sensor are separated. This prevents noise caused by touch sensitivity when writing to pixels. This can suppress the decrease in sensitivity of the sensor.

[0194] <Conductive Layer 410, Conductive Layer 430> The conductive layer 410 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or nickel. , iron, cobalt, and tungsten, or a material containing the above-mentioned metal elements as a component. It is formed by using an alloy of the above metal elements or an alloy combining the above metal elements. The present invention may be formed using one or more metal elements selected from the group consisting of tungsten, tungsten, zirconium, and the like. The conductive layer 410 may have a single layer structure or a stacked structure of two or more layers. , a single layer structure of aluminum film containing silicon, a single layer structure of copper film containing manganese, aluminum Two-layer structure with titanium film laminated on titanium nitride film, two-layer structure with titanium film laminated on titanium nitride film , a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a tantalum nitride film or a tantalum nitride film Two-layer structure with tungsten film stacked on top of tungsten film, and copper film stacked on top of copper film containing manganese A two-layer structure, a titanium film and an aluminum film laminated on top of the titanium film, A three-layer structure is formed by forming a titanium film, a copper film is laminated on a copper film containing manganese, and a manganese film is further laminated on top of that. There are also three-layer structures in which a copper film containing zinc is formed. One or more selected from aluminum, tungsten, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film made up of a plurality of layers or a nitride film may be used. What conductive films, that is, materials that can be used for the wiring and electrodes that make up touch panels? For example, a transparent conductive film containing indium oxide, tin oxide, zinc oxide, etc. (e.g., ITO, etc.) In addition, materials that can be used for the wiring and electrodes that make up touch panels include For example, a low resistance value is preferable. Nanotubes, graphene, metal halides (such as silver halide), etc. may also be used. Furthermore, it is constructed using multiple conductors that are very thin (for example, a few nanometers in diameter). Alternatively, a metal mesh made of a conductor in a mesh pattern may be used. Examples of nanowires include Ag nanowires, Cu nanowires, Al nanowires, and Ag nanowires. For example, a mesh, a Cu mesh, an Al mesh, etc. may be used. When Ag nanowires are used for the wiring and electrodes, the transmittance in visible light is 89% or more. The sheet resistance can be set to 40 Ω / □ or more and 100 Ω / □ or less. Metal nanowires are an example of materials that can be used for the wiring and electrodes that make up the touch panel. Fiber, metal mesh, carbon nanotubes, graphene, etc. have high transmittance in visible light. Therefore, it is not suitable for use as an electrode (for example, a pixel electrode or a common electrode) in a display element. In addition, a similar film can be used for the conductive layer 430.

[0195] <Insulating layer 420, insulating layer 440> The insulating layer 420 can be made of an inorganic material or an organic material. Silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, gallium oxide gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, Oxide insulating film such as hafnium nitride, nitride insulating film such as silicon nitride, aluminum nitride , polyimide resin, acrylic resin, polyimide amide resin, benzocyclobutene resin, poly It is made of heat-resistant organic materials such as amide resin and epoxy resin. The edge layer 440 may be made of a film similar to that of the insulating layer 420 .

[0196] 《Organic EL panel》 Furthermore, the display device 10 can be manufactured using the light-emitting element 70 as a display element.

[0197] 22, 23, and 24 show cross-sectional views of display devices using light-emitting elements. The portions that are used in common with the liquid crystal panel can be formed in the same manner.

[0198] "Light Emitting Element 70" The light emitting element 70 may be a self-luminous element, and may be irradiated by a current or a voltage. The category includes devices whose brightness is controlled, such as light-emitting diodes (LEDs), For example, an organic EL element, an inorganic EL element, etc. can be used. A layer containing a light-emitting organic compound (hereinafter also referred to as an EL layer 250) is disposed between the lower electrode and the upper electrode. ) can be used as the light-emitting element 70.

[0199] The light emitting elements are top emission type, bottom emission type, and dual emission type. The electrode on the light extraction side is made of a conductive material that is transparent to visible light. A conductive film that reflects visible light is used for the electrode on the side where light is not extracted.

[0200] The light-emitting element is disposed between the lower electrode made of the conductive layer 220 and the upper electrode made of the conductive layer 260. When a voltage higher than the threshold voltage is applied, holes are injected into the EL layer 250 from the anode side, and The injected electrons and holes recombine in the EL layer 250, and The luminescent material contained in 250 emits light.

[0201] The EL layer 250 has at least a light-emitting layer. The EL layer 250 has a positive electrode as a layer other than the light-emitting layer. Highly hole-injecting materials, highly hole-transporting materials, hole-blocking materials, highly electron-transporting materials , a substance with high electron injection properties, or a bipolar substance (a substance with high electron transport properties and hole transport properties) The film may further include a layer containing a material such as a polymer.

[0202] The EL layer 250 can be made of either a low molecular weight compound or a high molecular weight compound. The layers constituting the EL layer 250 may each be formed by evaporation (vacuum evaporation) The method may include a transfer method, a printing method, an inkjet method, a coating method, etc. .

[0203] The light-emitting element may contain two or more luminescent materials, which may result in, for example, white light emission. For example, two or more luminescent materials emit light in complementary colors. White light can be obtained by selecting the luminescent material so that ), G (green), B (blue), Y (yellow), or O (orange) luminescent materials, A luminescent material that emits light containing spectral components of two or more of the colors of B can be used. For example, a light-emitting substance that emits blue light and a light-emitting substance that emits yellow light may be used. The emission spectrum of a luminescent material that emits yellow light may contain green and red spectral components. The light emitting element 70 has an emission spectrum in the visible region (for example, 350 nm). Two or more peaks within the range of It is preferable to have a

[0204] The EL layer 250 may have multiple light-emitting layers. The layers may be stacked in contact with each other or with a separating layer interposed therebetween. For example, a separation layer may be provided between the fluorescent-emitting layer and the phosphorescent-emitting layer.

[0205] The separation layer is used to convert, for example, the excited state of a phosphorescent material generated in the phosphorescent-emitting layer into the fluorescent material in the fluorescent-emitting layer. Prevents energy transfer (especially triplet energy transfer) to optical materials via the Dexter mechanism The separation layer only needs to be a few nanometers thick. 1 nm to 20 nm, or 1 nm to 10 nm, or 1 nm to 5 nm The separating layer may be a single material (preferably a bipolar material) or a plurality of materials. (preferably a hole transporting material and an electron transporting material).

[0206] The separation layer may be formed using a material contained in the light-emitting layer that is in contact with the separation layer. This facilitates the fabrication of the light-emitting device and reduces the driving voltage. When the separation layer is made of a host material, an assist material, and a phosphorescent material (guest material), In other words, the separation layer may be formed of a phosphorescent material and an assist material. The phosphorescent layer has a region that does not contain a phosphorescent material, and the phosphorescent layer has a region that contains a phosphorescent material. It is possible to deposit the separation layer and the phosphorescent light-emitting layer with or without the phosphorescent material. By forming the separation layer and the phosphorescent layer in the same chamber, it becomes possible to form the separation layer and the phosphorescent layer in the same chamber. This makes it possible to reduce manufacturing costs.

[0207] Microcavity The light-emitting device 70 in Figure 22 is an example in which a microcavity structure is combined with a light-emitting device. A microcavity structure is formed using the lower electrode and the upper electrode of the light-emitting element 70, and A specific light may be extracted efficiently.

[0208] Specifically, a reflective film that reflects visible light is used as the lower electrode, allowing some of the visible light to pass through and some to be reflected. A semi-transmitting and semi-reflective film that reflects light of a specific wavelength is used as the upper electrode. The upper electrode is disposed relative to the lower electrode so that the light can be extracted.

[0209] For example, the lower electrode functions as a lower electrode or an anode of a light-emitting element. The outer electrode is configured to resonate the desired light from the light-emitting layer and enhance its wavelength. The layer 230 for adjusting the optical distance is not limited to the lower electrode. The optical path length can be adjusted by at least one layer constituting the light emitting element. The layer 230 for adjusting the separation may be made of, for example, indium oxide or indium tin oxide (ITO). : Indium Tin Oxide), Indium Zinc Oxide, Zinc Oxide (ZnO), It can be formed using zinc oxide doped with gallium, or the like.

[0210] When combining a microcavity structure, a semi-transmissive and semi-reflective electrode is used for the upper electrode of the light-emitting element. The semi-transmitting / semi-reflective electrode can be made of a conductive material having reflectivity and a transparent material having The conductive material has a visible light reflectance of 20% or more and 80% or less. % or less, preferably 40% to 70%, and the resistivity is 1×10 -2 Ω·c Examples of semi-transparent and semi-reflective electrodes include conductive metals, It can be formed by using one or more alloys, conductive compounds, etc. It is preferable to use a material with a small electron density (3.8 eV or less). For example, Elements belonging to Group 1 or Group 2 (alkali metals such as lithium and cesium, calcium, strontium, etc.) Alkaline earth metals such as nickel, magnesium, etc.), alloys containing these elements (e.g., A rare earth metals such as Zn-Mg, Al-Li), europium, ytterbium, An alloy containing a metal, aluminum, silver, etc. can be used.

[0211] The electrodes may be formed by evaporation or sputtering. , a discharge method such as an inkjet method, a printing method such as a screen printing method, or a plating method. It can be formed by

[0212] It should be noted that the organic EL structure may be other than the microcavity structure. For example, there are different color-coded methods for differentiating the light-emitting elements, and methods for emitting white light using a material that emits white light. A white EL method can be used.

[0213] <Conductive layer 200> The conductive layer 200 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or nickel. , iron, cobalt, and tungsten, or a material containing the above-mentioned metal elements as a component. It is formed by using an alloy of the above metal elements or an alloy combining the above metal elements. The present invention may be formed using one or more metal elements selected from the group consisting of tungsten, tungsten, zirconium, and the like. The conductive layer 200 may have a single layer structure or a laminated structure of two or more layers. , a single layer structure of aluminum film containing silicon, a single layer structure of copper film containing manganese, aluminum Two-layer structure with titanium film laminated on titanium nitride film, two-layer structure with titanium film laminated on titanium nitride film , a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a tantalum nitride film or a tungsten nitride film Two-layer structure with tungsten film stacked on top of tungsten film, and copper film stacked on top of copper film containing manganese A two-layer structure, a titanium film and an aluminum film laminated on top of the titanium film, A three-layer structure is formed by forming a titanium film, a copper film is laminated on a copper film containing manganese, and a manganese film is further laminated on top of that. There are also three-layer structures in which a copper film containing zinc is formed. One or more selected from aluminum, tungsten, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film made by combining a plurality of layers or a nitride film may be used.

[0214] <Conductive layer 220> The conductive layer 220 that reflects visible light may be made of, for example, aluminum, gold, platinum, silver, or nickel. gold, such as zinc, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium Metallic materials or alloys containing these metallic materials can be used. Lanthanum, neodymium, germanium, or the like may be added to gold. Aluminum and titanium alloys, aluminum and nickel alloys, aluminum and neodymium alloys , aluminum, nickel, and lanthanum alloys (Al-Ni-La) Alloys containing palladium (aluminum alloys), silver and copper alloys, silver, palladium and copper alloys (Ag- Pd-Cu, also known as APC), formed using alloys containing silver, such as silver-magnesium alloys An alloy containing silver and copper is preferable because it has high heat resistance. By laminating a metal film or a metal oxide film in contact with the aluminum alloy film, the oxidation of the aluminum alloy film can be prevented. The metal film and metal oxide film may be made of titanium, titanium oxide, or the like. In addition, a conductive film that transmits visible light and a film made of a metal material are laminated. For example, a laminated film of silver and ITO, a laminated film of silver-magnesium alloy and ITO, etc. etc. can be used.

[0215] Conductive layer 260 The conductive layer 260 that transmits visible light may be made of, for example, indium oxide or indium tin oxide. (ITO: Indium Tin Oxide), indium zinc oxide, zinc oxide (Z nO), zinc oxide doped with gallium, etc. Also, gold, silver, , platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, Metallic materials such as copper, palladium, or titanium, alloys containing these metallic materials, or Nitrides of metal materials (for example, titanium nitride) can also be formed thin enough to have light transmission properties. Also, a laminated film of the above materials can be used as the conductive layer. For example, the conductivity can be increased by using a laminated film of an alloy of silver and magnesium and ITO. Graphene or the like may also be used.

[0216] <<Color-coded OLED panel>> In addition, organic EL elements can also be fabricated using a color-coded method, as shown in Figure 23. 22 in that the EL layer 250 is formed on the conductive layer 220 by a color-coded method. become.

[0217] Flexible display device The display device is fabricated on flexible substrates 101 and 301 as shown in FIG. The flexible substrate and the display device are attached using an adhesive layer 370. This allows the touch panel to be flexible and bendable, and to have a curved surface. It is possible to realize a touch panel. Furthermore, the thickness of the substrate can be made thinner. This allows the touch panel to be made lighter.

[0218] <<Example of a method for manufacturing a flexible display device>> Here, a method for manufacturing a flexible display device will be described.

[0219] Here, for convenience, a configuration including pixels and circuits, a configuration including optical members such as color filters, or The structure including the touch sensor is called an element layer. The element layer includes, for example, a display element. In addition to the display elements, wiring electrically connecting to the display elements, transistors used in pixels and circuits, etc. The device may include an element.

[0220] Also, in this case, a support (for example, a substrate 101 or The substrate 301) will be referred to as the base material.

[0221] As a method for forming an element layer on a substrate having a flexible insulating surface, A method of directly forming an element layer and a method of forming an element layer on a support substrate having a different rigidity from the substrate. and a method in which, after forming the element layer, the element layer is peeled off from the supporting substrate and transferred onto the substrate.

[0222] When the material constituting the base material is heat resistant to the heat applied in the process of forming the element layer, It is preferable to form the element layer directly on the substrate, as this simplifies the process. If the element layer is formed while fixed to a supporting substrate, it can be easily transported within and between devices. This is preferable because

[0223] In addition, when a method is used in which an element layer is formed on a supporting substrate and then transferred to a substrate, the supporting substrate is first A release layer and an insulating layer are laminated on a substrate, and an element layer is formed on the insulating layer. The element layer is peeled off and transferred to the base material. The material may be selected so that release occurs at the interface of the layers or within the release layer.

[0224] For example, a layer containing a high melting point metal material such as tungsten as a peeling layer and an oxidized layer of the metal material A layer including a material is stacked, and a layer in which silicon nitride or silicon oxynitride is stacked on a peeling layer. It is preferable to use a high melting point metal material. The degree of freedom in the process of forming the element layer is increased. Therefore, it is preferable.

[0225] Peeling can be achieved by applying mechanical force, etching the peeling layer, or by splitting one of the peeling interfaces. The peeling may be performed by dropping a liquid onto the peeled portion and allowing it to penetrate into the entire peeling interface. Alternatively, the peeling may be performed by applying heat to the peeling interface, taking advantage of the difference in thermal expansion.

[0226] In addition, if peeling is possible at the interface between the support substrate and the insulating layer, it is not necessary to provide a peel layer. For example, glass is used as the support substrate, and an organic resin such as polyimide is used as the insulating layer. A part of the organic resin is locally heated using a laser beam or the like to form a peeling starting point, The separation may be performed at the interface between the glass and the insulating layer. A metal layer is provided between the layers, and the metal layer is heated by passing an electric current through the metal layer. In this case, the insulating layer made of organic resin may be peeled off at the interface between the metal layer and the insulating layer. The border layer can be used as a substrate.

[0227] Examples of flexible substrates include polyethylene terephthalate (PET), polyethylene terephthalate (PE ... Polyester resins such as ethylene naphthalate (PEN), polyacrylonitrile resins, poly Imide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethylene Tersulfone (PES) resin, polyamide resin, cycloolefin resin, polystyrene resin Examples include resins such as grease, polyamide-imide resins, and polyvinyl chloride resins. It is preferable to use a material with a low thermal expansion coefficient, for example, -6 / K or less Suitable materials for use include triamide-imide resin, polyimide resin, and PET. A substrate made of resin-impregnated fiber (also called prepreg) or a substrate made of inorganic filler mixed with organic resin Substrates with reduced thermal expansion coefficients can also be used.

[0228] When the above materials contain fibrous bodies, the fibrous bodies are made of high strength organic or inorganic compounds. High-strength fibers are specifically fibers with high tensile modulus or Young's modulus. Representative examples include polyvinyl alcohol fibers, polyester fibers, polyamide fibers, etc. Fibers based on cellulose, polyethylene fibers, aramid fibers, polyparaphenylene benzobisoxa Examples of the fiber include sol fiber, glass fiber, and carbon fiber. Glass fiber includes E-glass. Examples of glass fibers include those made of S-glass, D-glass, Q-glass, etc. The fiber is impregnated with resin and the resin is hardened to form a flexible structure. As a flexible substrate, a substrate having a structure made of a fiber body and a resin may be used. The use of a structure is preferable because it improves reliability against damage caused by bending or local pressure. .

[0229] Alternatively, a thin glass, metal, or the like that is flexible may be used as the substrate. Alternatively, a composite material in which glass and a resin material are bonded together may be used.

[0230] For example, in the case of the configuration shown in FIG. 24, a first release layer and an insulating layer 112 are sequentially formed on a first support base material. After forming the first supporting structure, the upper layer structure is formed. After forming the second release layer and the insulating layer 312 on the material in this order, the structure above them is formed. Next, the first support base material and the second support base material are bonded together with an adhesive layer 370. Then, the second release layer is peeled off at the interface between the second release layer and the insulating layer 312, thereby forming the second support substrate and the second release layer. The delamination is removed, and the insulating layer 312 and the substrate 301 are bonded together with an adhesive layer 372. The first release layer and the insulating layer 112 are peeled off at the interface between them, so that the first support substrate and the first release layer are separated. The insulating layer 112 and the substrate 101 are then bonded together with an adhesive layer 371. The lamination may be carried out on either side first.

[0231] The above is a description of the method for manufacturing a flexible display device.

[0232] <<Positional relationship between transistor and touch sensor wiring>> Figure 25 shows a top view of the pixel, transistor, and touch sensor wiring. The conductive layer 410, which is an electrode for the touch sensor, is connected to, for example, the source line 91 and the gate line 92. They can be arranged so that they overlap, or they can be arranged side by side without overlapping. In addition, the conductive layer 410, which is the wiring of the touch sensor, overlaps the transistor 50 and the capacitor element 61. Although an example in which the conductive layer 410 is not formed is shown, it may be formed in an overlapping manner. Although it is placed without overlapping with 4, it can be placed overlapping. The conductive layers 430 and 380 that can act as electrodes are also arranged in a similar manner. This can be done.

[0233] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination.

[0234] (Embodiment 5) The fifth embodiment shows a modification of the transistor structure described in the fourth embodiment.

[0235] 《Stacked oxide semiconductor》 The semiconductor layer 140 is formed by stacking a plurality of oxide semiconductor films having different atomic ratios of metal elements. For example, in the transistor 51, as shown in FIG. 26(B), oxide semiconductor layers 141 and 142 may be stacked in this order on the oxide semiconductor layer 30. As shown in FIG. 1, an oxide semiconductor layer 142, an oxide semiconductor layer 141, and an oxide The oxide semiconductor layer 142, the oxide semiconductor layer 143, and the oxide semiconductor layer 144 may be stacked in this order. The oxide semiconductor layer 141 has a different atomic ratio of metal elements from the oxide semiconductor layer 141.

[0236] <Channel protection type and top gate structure> The transistor 50 shown in FIG. 8B is a bottom-gate transistor. As a modification of the transistor 50, a transistor shown in FIG. 27(B) shows a transistor 53, and FIG. 27(B) shows a transistor 54. In FIG. 8(B), a transistor 50 shows a channel etch type, but as shown in the cross-sectional view of FIG. 27(A), the insulating layer 1 27B. As shown, the transistor 54 may have a top gate structure.

[0237] <Dual gate structure> A transistor 55, which is a modification of the transistor 50, will be described with reference to FIG. The transistor shown in is characterized by a dual gate structure.

[0238] 28A to 28C show top views and cross-sectional views of the transistor 55. 28(A) is a top view of the transistor 55, and FIG. 28(B) is a diagram showing the structure of the transistor 55 along the dashed line A in FIG. 28(A). 28(C) is a cross-sectional view taken along the dashed line B-B' in FIG. 28(A). In FIG. 28(A), for clarity, the substrate 100, the insulating layer 110, and the insulating layer 1 30, insulating layer 170, insulating layer 180, etc. are omitted.

[0239] The transistor 55 shown in FIGS. 28A to 28C has a gate electrode on an insulating layer 110. a conductive layer 120 having a function as a gate insulating film; The insulating layer 130 has a function of insulating the conductive layer 120. The insulating layer 130 is a semiconductor layer 14 that overlaps the conductive layer 120. 0, a pair of conductive layers 150 and 160 in contact with the semiconductor layer 140, the semiconductor layer 140, a pair of An insulating layer 170 on the conductive layers 150 and 160, an insulating layer 180 on the insulating layer 170, and an insulating layer 1 80 and a conductive layer 520 that functions as a back gate electrode. Layer 120 is in contact with conductive layer 520 at openings 530 in insulating layers 130, 170, 180. It is also possible to have a configuration in which the two are connected.

[0240] Conductive layer 520 The conductive layer 520 is a conductive film that is transparent to visible light or a conductive film that is reflective to visible light. The conductive film is formed using a conductive film that transmits visible light. Uses a material containing one of the following elements: indium (In), zinc (Zn), and tin (Sn). In addition, a conductive film that transmits visible light is typically an indium tin film. Oxide, Indium Oxide with Tungsten Oxide, Indium Oxide with Tungsten Oxide Zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide Conductive oxides such as indium zinc oxide, indium tin oxide containing silicon oxide, etc. As a conductive film that is reflective to visible light, for example, an aluminum film can be used. Materials containing aluminum or silver can be used.

[0241] As shown in FIG. 28C, the side surface of the semiconductor layer 140 and the conductive layer 141 are in contact with each other in the channel width direction. The insulating layer 170 and the insulating layer 520 face each other in the semiconductor layer 140. Since carriers flow not only at the interface of the semiconductor layer 140 but also inside the semiconductor layer 140, Therefore, the amount of carrier movement in the transistor 55 increases. The on-current of the conductive layer 520 increases and the field effect mobility also increases. affects the side surface of the semiconductor layer 140 or the edge portion including the side surface and its vicinity. This can suppress the occurrence of parasitic channels at the sides or ends of 140.

[0242] In addition, the transistor shown in FIG. 28 can be used in a large display device or a high-definition display device by being provided in a pixel portion. Even if the number of wires increases in a display device, it is possible to reduce the signal delay in each wire. This makes it possible to suppress display defects such as display unevenness.

[0243] The transistors 52 in the peripheral circuits (such as gate drivers) all have the same structure. The pixel section may have two or more transistors. The rotors 50 may all have the same structure, or may have two or more different structures.

[0244] Alternatively, the transistor described in this embodiment may be a transistor including an oxide semiconductor. However, one embodiment of the present invention is not limited to this. Alternatively, depending on the situation, one embodiment of the present invention may be a semiconductor device using a semiconductor material other than an oxide semiconductor. A transistor may also be used.

[0245] For example, the semiconductor layer 140 may be made of a group 14 element, a compound semiconductor, or an oxide semiconductor. Specifically, semiconductors containing silicon and semiconductors containing gallium arsenide can be used. A transistor using a conductor or an organic semiconductor can be applied.

[0246] For example, single crystal silicon, polysilicon, or amorphous silicon may be used for the transistor. This can be applied to semiconductor layers.

[0247] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination.

[0248] (Sixth embodiment) In this embodiment, a structural example of a display panel according to one embodiment of the present invention will be described with reference to FIGS. do.

[0249] [Configuration example] FIG. 29A is a top view of a display device of one embodiment of the present invention, and FIG. 29B is a top view of a display device of one embodiment of the present invention. A pixel circuit that can be used when a liquid crystal element is applied to a pixel of a display device of one embodiment will be described. 29C is a circuit diagram showing a pixel of a display device according to one embodiment of the present invention. 1 is a circuit diagram illustrating a pixel circuit that can be used when an organic EL element is applied. .

[0250] The transistors arranged in the pixel portion can be formed according to the above embodiment modes. Since the transistor can be easily made into an n-channel type, the n-channel transistor in the driver circuit can be easily made into an n-channel type. A part of the driver circuit can be configured with a transistor of the same type as the transistor of the pixel part. In this way, the transistor shown in the above embodiment is formed in the pixel portion or the driver circuit. By using the above, a highly reliable display device can be provided.

[0251] An example of a top view of an active matrix display device is shown in Figure 29(A). On the surface of 700, there are a pixel portion 701, a scanning line driving circuit 702, a scanning line driving circuit 703, a signal line driving circuit 704, a signal line driving circuit 705, a signal line driving circuit 706, a signal line driving circuit 707, a signal line driving circuit 708, a signal line driving circuit 709, a signal line driving circuit 710, a signal line driving circuit 711, a signal line driving circuit 712, a signal line driving circuit 713, a signal line driving circuit 714, a signal line driving circuit 715, a signal line driving circuit 716, a signal line driving circuit 717, a signal line driving circuit 718, a signal line driving circuit 719, a signal line driving circuit 720, a signal line driving circuit 721, a signal line driving circuit 722, a signal line driving circuit 723, a signal line driving circuit 724, a signal line driving circuit The pixel portion 701 has a signal line driver circuit 704. A plurality of signal lines are extended from the signal line driver circuit 704. A plurality of scanning lines are connected to a scanning line driving circuit 702 and a scanning line driving circuit 703. The scanning lines and the signal lines are arranged in such a manner that they extend from each other. The display device has a substrate 700 that is connected to a flexible printed circuit board (FPC) or the like. It is connected to a timing control circuit (also called a controller or control IC) via a connection. do.

[0252] In FIG. 29A, a scanning line driver circuit 702, a scanning line driver circuit 703, a signal line driver circuit The path 704 is formed on the same substrate 700 as the pixel section 701. Since the number of components such as the operating circuit is reduced, costs can be reduced. If a drive circuit is provided in the part, it becomes necessary to extend the wiring, and the number of connections between the wiring increases. When the driver circuit is provided on the same substrate 700, the number of connections between the wirings can be reduced, and reliability can be improved. This can improve the productivity or yield.

[0253] [Liquid crystal display device] An example of the circuit configuration of a pixel is shown in FIG. 29(B). Here, as an example, a VA type liquid crystal display is used. 1 shows a pixel circuit that can be applied to a pixel of a display device.

[0254] This pixel circuit can be applied to a configuration in which one pixel has multiple pixel electrode layers. The pixel electrode layer is connected to different transistors, and each transistor is driven by a different gate signal. This allows individual pixels in a multi-domain design to The signals applied to the electrode layers can be controlled independently.

[0255] The gate wiring 712 of the transistor 716 and the gate wiring 713 of the transistor 717 are , are separated so that different gate signals can be applied. is used in common for transistor 716 and transistor 717. The transistors 16 and 717 may be any of the transistors described in the above embodiment modes. This makes it possible to provide a highly reliable liquid crystal display device.

[0256] A first pixel electrode layer electrically connected to the transistor 716 and a second pixel electrode layer electrically connected to the transistor 717 The shape of the second pixel electrode layer that is electrically connected to the first pixel electrode and the second pixel electrode will be described. The first pixel electrode and the second pixel electrode are separated from each other. For example, the first pixel electrode may be V-shaped.

[0257] The gate electrode of the transistor 716 is connected to the gate wiring 712, and the gate electrode of the transistor 717 is connected to the gate wiring 712. The gate electrode is connected to the gate wiring 713. By giving different gate signals to the transistors 716 and 717, the operation timing of the transistors 716 and 717 is By varying the polarity, the orientation of the liquid crystal can be controlled.

[0258] Also, the capacitor wiring 710, the gate insulating film functioning as a dielectric, and the first pixel electrode layer or A storage capacitor may be formed by a capacitor electrode electrically connected to the second pixel electrode layer.

[0259] The multi-domain structure has a first liquid crystal element 718 and a second liquid crystal element 719 in one pixel. The first liquid crystal element 718 is composed of a first pixel electrode layer, a counter electrode layer, and a liquid crystal layer therebetween. The second liquid crystal element 719 is composed of a second pixel electrode layer, a counter electrode layer, and a liquid crystal layer therebetween. do.

[0260] Note that the pixel circuit shown in FIG. 29(B) is not limited to this. The pixel circuit is newly equipped with switches, resistors, capacitors, transistors, sensors, or logic elements. Circuits etc. may be added.

[0261] [Organic EL display device] Another example of the circuit configuration of a pixel is shown in Figure 29(C). 1 shows the pixel structure of the device.

[0262] In an organic EL element, when a voltage is applied to the light-emitting element, electrons are released from one of the pair of electrodes. Holes are injected from the other side into the layer containing the light-emitting organic compound, causing a current to flow. The recombination of electrons and holes causes the light-emitting organic compound to form an excited state, which This mechanism is what causes this type of luminescence. The element is called a current-excited light-emitting element.

[0263] FIG. 29(C) is a diagram showing an example of an applicable pixel circuit. An example in which two transistors are used in one pixel is shown. The film can be used for the channel formation region of an n-channel transistor. The pixel circuit can be applied with digital time gray scale driving.

[0264] Regarding the configuration of applicable pixel circuits and pixel operation when digital time gray scale driving is applied, and explain.

[0265] The pixel 720 includes a switching transistor 721, a driving transistor 722, and a light-emitting element The switching transistor 721 has a gate electrode 724 and a capacitor element 723. The source electrode layer is connected to the scanning line 726, and the first electrode (the source electrode layer and the drain electrode layer) The second electrode (the other of the source electrode layer and the drain electrode layer) is connected to the signal line 725. ) is connected to the gate electrode layer of the driving transistor 722. 22, the gate electrode layer is connected to a power supply line 727 via a capacitor element 723, and the first electrode is connected to a power supply line 727. The second electrode is connected to the first electrode (pixel electrode) of the light emitting element 724. The second electrode of the light emitting element 724 corresponds to the common electrode 728. It is electrically connected to a common potential line formed on the substrate.

[0266] The switching transistor 721 and the driving transistor 722 may be of other embodiments. This allows for the development of highly reliable organic EL devices. A display device can be provided.

[0267] The potential of the second electrode (common electrode 728) of the light-emitting element 724 is set to a low power supply potential. The power supply potential is a potential lower than the high power supply potential supplied to the power supply line 727, for example, GND , 0V, etc. can be set as the low power supply potential. The high power supply potential and the low power supply potential are set so that the potential difference is equal to or greater than the threshold voltage. By applying a voltage to the light emitting element 724, a current flows through the light emitting element 724, causing it to emit light. The forward voltage in 4 refers to the voltage required to achieve the desired brightness, and is at least the forward threshold. Includes low voltages.

[0268] The capacitor 723 can be saved by substituting the gate capacitance of the driving transistor 722. The gate capacitance of the driving transistor 722 can be omitted. A capacitance may be formed between the electrode layer and the insulating layer.

[0269] Next, a signal input to the driving transistor 722 will be described. In this case, the driving transistor 722 is either fully on or fully off. A video signal such as this is input to the driving transistor 722. In order to operate the drive transistor 722 in the linear region, a voltage higher than the voltage of the power supply line 727 is applied to the drive transistor 722. A signal line 725 is connected to the gate electrode layer of the transistor 722. A voltage equal to or greater than the threshold voltage Vth of the input transistor 722 is applied.

[0270] When analog gradation driving is performed, the gate electrode layer of the driving transistor 722 is connected to the light emitting element 72 A voltage equal to or greater than the sum of the forward voltage of the transistor 724 and the threshold voltage Vth of the driving transistor 722 is applied. In addition, a video signal is input so that the driving transistor 722 operates in the saturation region. A current flows through the light emitting element 724. In addition, the driving transistor 722 is operated in a saturation region. In order to achieve this, the potential of the power supply line 727 is set higher than the gate potential of the driving transistor 722. By converting the video signal into an analog signal, a current corresponding to the video signal is passed through the light emitting element 724. , analog gray scale driving can be performed.

[0271] The configuration of the pixel circuit is not limited to the pixel configuration shown in FIG. (C) The pixel circuit shown in FIG. 1 includes a switch, a resistor, a capacitor, a sensor, a transistor, or a logic element. A logic circuit or the like may be added.

[0272] When the transistor illustrated in the above embodiment is applied to the circuit illustrated in FIG. The source electrode (first electrode) is on the low potential side, and the drain electrode (second electrode) is on the high potential side. Furthermore, the potential of the first gate electrode is controlled by a control circuit or the like. The second gate electrode is supplied with a potential lower than that applied to the source electrode by a wiring (not shown). Any of the above-mentioned potentials may be input.

[0273] For example, in this specification and the like, the term "display element," "display device having a display element," "light emitting element," "light emitting device," "light emitting element ... A light-emitting device, which is a device having a light-emitting element and a light-emitting element, can be used in various forms or in various The display element, the display device, the light-emitting element or the light-emitting device may include, for example, For example, EL (electroluminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) etc.), transistors (transistors that emit light according to the current), electron-emitting elements, liquid crystal elements , electronic ink, electrophoretic element, grating light valve (GLV), plasma display Using MEMS (Micro-Electro-Mechanical Systems) Display element, Digital Micromirror Device (DMD), DMS (Digital Micromirror Shutter), MIRASOL (registered trademark), IMOD (Interference Module ration element, shutter-type MEMS display element, optical interference-type MEMS display element , electrowetting element, piezoelectric ceramic display, carbon nanotube In addition to these, the device has at least one of an electric or magnetic display element. The display medium has contrast, brightness, reflectance, transmittance, etc. that change due to electrochemical effects. An example of a display device using an EL element is an EL display. An example of a display device using electron-emitting elements is a field emission display ( FED) or SED type flat panel display (SED: Surface-conductive tion Electron-emitter Display). An example of a display device using the liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display) is LCD display, reflective LCD display, direct view LCD display, projection LCD display Electronic ink, electronic liquid powder, or electrophoretic elements are used. An example of a display device that uses this technology is electronic paper. When realizing a reflective LCD, some or all of the pixel electrodes are For example, a part or the whole of the pixel electrode may be formed as a reflective electrode. The reflective electrode may be made of aluminum, silver, or the like. It is also possible to provide a memory circuit such as an SRAM below the When using LEDs, the LED electrodes and nitride semiconductors Graphene or graphite may be placed under the In this way, graphene or graphite may be provided. By this, a nitride semiconductor, for example, an n-type GaN semiconductor layer having a crystal, etc. can be formed thereon. It is easy to form a film. Furthermore, a p-type GaN semiconductor layer with crystals can be formed on it. By providing a crystal, an LED can be constructed. An AlN layer may be provided between the n-type GaN semiconductor layer and the LED. The aN semiconductor layer may be formed by MOCVD. The GaN semiconductor layer of the LED can also be formed by sputtering.

[0274] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination.

[0275] (Embodiment 7) In this embodiment, a structure of an oxide semiconductor film will be described.

[0276] <Structure of oxide semiconductors> The structure of an oxide semiconductor will be described below.

[0277] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide semiconductor Examples of the oxide semiconductor include conductors, microcrystalline oxide semiconductors, and amorphous oxide semiconductors.

[0278] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxide semiconductors. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC-O S, polycrystalline oxide semiconductors, and microcrystalline oxide semiconductors.

[0279] <caac-os> First, let me explain about CAAC-OS. The oxide semiconductor with aligned nanocrystals is called It is also possible.

[0280] CAAC-OS is an oxide semiconductor having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of conductor.

[0281] Transmission Electron Microscope (TEM) The CAAC-OS bright-field image and diffraction pattern were analyzed by a combined analysis image (high resolution) When observing the high-resolution TEM image, multiple pellets can be confirmed. In the high-resolution TEM image, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly identify the CAAC-OS. It can be said that the decrease in electron mobility caused by this is unlikely to occur.

[0282] The CAAC-OS observed by TEM will be described below. This shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction (SAC) is required. The spherical aberration correction function was used to obtain a high-resolution TEM image. In particular, it is called a Cs-corrected high-resolution TEM image. This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by Nippon Denshi Co., Ltd. This can be done.

[0283] An enlarged Cs-corrected high-resolution TEM image of region (1) in FIG. 30(A) is shown in FIG. 30(B). From Figure 30(B), it can be seen that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also referred to as the surface on which the film is to be formed). The surface reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0284] As shown in Figure 30(B), CAAC-OS has a characteristic atomic arrangement. The characteristic atomic arrangement is shown by auxiliary lines in Figure 30(B) and Figure 30(C). Therefore, the size of each pellet is about 1 nm to 3 nm, and the pellets are It can be seen that the size of the gap caused by the tilt is about 0.8 nm. The rheotomes can also be called nanocrystals (nc).

[0285] Here, based on the Cs-corrected high-resolution TEM image, the pellet of CAAC-OS on the substrate 5120 was The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See Figure 30(D)). The inclination between the pellets observed in Figure 30(C) The location where the crack occurs corresponds to the area 5161 shown in FIG.

[0286] In addition, Fig. 31(A) shows the Cs of the plane of the CAAC-OS observed from a direction approximately perpendicular to the sample surface. Corrected high-resolution TEM images are shown for regions (1), (2), and (3) in Figure 31(A). Enlarged Cs-corrected high-resolution TEM images are shown in Figure 31(B), Figure 31(C), and Figure 31(D), respectively. 31(D). From Fig. 31(B), Fig. 31(C) and Fig. 31(D), the pellet It can be seen that the metal atoms are arranged in a triangular, square, or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms between different pellets.

[0287] Next, the CA analyzed by X-ray diffraction (XRD) We will explain AC-OS. For example, CAAC-OS with InGaZnO4 crystals When structural analysis is performed using the out-of-plane method, the results are as shown in Figure 32(A). A peak may appear at a diffraction angle (2θ) of around 31°. Since the crystal orientation of CAAC-OS is attributed to the (009) plane of nO4, the crystal orientation of CAAC-OS is considered to be c-axis oriented. It can be seen that the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface.

[0288] In addition, in the structural analysis of CAAC-OS using the out-of-plane method, 2θ is 31° In addition to the peaks around 2θ around 36°, a peak may also appear. The peaks around the center of the crystal grains indicate that some of the CAAC-OS grains do not have a c-axis orientation. The more preferable CAAC-OS is the structure solution by the out-of-plane method. In the analysis, a peak is observed at 2θ of approximately 31°, but no peak is observed at 2θ of approximately 36°.

[0289] On the other hand, in-plan X-ray irradiation is performed on the CAAC-OS in a direction approximately perpendicular to the c-axis. When structural analysis is performed using the e method, a peak appears at 2θ around 56°. This peak is due to In It is attributed to the (110) plane of the GaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 56 The sample was fixed at approximately 100°, and the analysis was performed while rotating the sample around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in Figure 32(B). However, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ is When scanning is performed, the peaks attributable to the crystal plane equivalent to the (110) plane are as shown in Figure 32(C). Therefore, from the structural analysis using XRD, it is clear that CAAC-OS has the following structure: It can be seen that the orientation of the a-axis and b-axis is irregular.

[0290] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with nO4 crystals, a probe diameter of 300 nm was placed parallel to the sample surface. When an electron beam is incident, a diffraction pattern (selected area transmission electron diffraction) like that shown in Figure 33(A) is generated. This diffraction pattern may show the InGaZnO4 This includes spots due to the (009) plane of the crystal. Therefore, electron diffraction also reveals The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is approximately on the surface to be formed or on the upper surface. On the other hand, for the same sample, the probe is oriented perpendicular to the sample surface. The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in Figure 33(B). (B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also reveals It is clear that the a-axis and b-axis of the pellets contained in the CAAC-OS do not have any orientation. The first ring in FIG. 33(B) is the (010) plane of the InGaZnO4 crystal. The second ring in Figure 33(B) is thought to be due to the (100) plane. This is thought to be due to the (110) plane.

[0291] CAAC-OS is an oxide semiconductor with a low density of defect states. Examples of defects include impurity-induced defects and oxygen vacancies. C-OS can also be considered an oxide semiconductor with a low impurity concentration. It can also be said that the oxide semiconductor has few oxygen vacancies.

[0292] Impurities contained in an oxide semiconductor can act as carrier traps or carrier generation sources. In addition, oxygen vacancies in oxide semiconductors can become carrier traps or trap water. By capturing atoms, they can become a carrier generation source.

[0293] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, oxygen is more likely to be present than metal elements such as silicon that make up oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, thereby changing the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, and niobium Carbon dioxide and other compounds have a large atomic radius (or molecular radius), so they can easily arrange the atoms of oxide semiconductors. This causes disorder and reduces crystallinity.

[0294] In addition, oxide semiconductors with low defect state density (few oxygen vacancies) can reduce carrier density. Such an oxide semiconductor can be obtained by using a high-purity intrinsic or substantially high-purity intrinsic oxide. CAAC-OS has a low impurity concentration and a low density of defect states. It is easy to obtain a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. The C-OS transistor has electrical characteristics that make the threshold voltage negative (normal Also, it is rare for the acid to become pure or substantially pure. The oxide semiconductor has fewer carrier traps. The charge takes a long time to be released and behaves like a fixed charge. Therefore, transistors using oxide semiconductors with high impurity concentrations and high defect state densities are On the other hand, transistors using CAAC-OS may have unstable electrical characteristics. The resulting transistor has little fluctuation in electrical characteristics and is highly reliable.

[0295] In addition, because the density of defect states in CAAC-OS is low, the capacitance generated by light irradiation can be reduced. Therefore, the CAAC-OS transistor is less likely to be captured by the defect level. The electrical characteristics of the transistors are less affected by irradiation with visible light or ultraviolet light.

[0296] <Microcrystalline oxide semiconductor> Next, a microcrystalline oxide semiconductor will be described.

[0297] Microcrystalline oxide semiconductors are regions where crystals can be confirmed in high-resolution TEM images. The microcrystalline oxide semiconductor has a region in which no clear crystal part can be identified. The crystal part contained in the crystal is 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. In particular, microcrystals of 1 nm to 10 nm or 1 nm to 3 nm are often present. The oxide semiconductor having nanocrystals is called nc-OS (nanocrystalline nc-OS is called a high-resolution In TEM images, the grain boundaries may not be clearly visible. Therefore, in the following, we will refer to the pellets in nc-OS as the origin of the pellets. The crystalline part of S is sometimes called a pellet.

[0298] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 3 nm). The atomic arrangement is periodic in the region of less than 100 nm. There is no regularity in the crystal orientation between the dots. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, there is an XRD device that uses X-rays with a diameter larger than that of the pellet for nc-OS. When structural analysis is performed using the out-of-plane method, No peak is detected. Also, for nc-OS, the probe diameter (e.g., When electron diffraction (also called selected area electron diffraction) is performed using an electron beam of, for example, 50 nm or more, On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron diffraction using an electron beam with a probe diameter close to the pellet size or smaller than the pellet size When nanobeam electron diffraction is performed on nc-OS, spots are observed. In some cases, a bright area that appears circular (ring-shaped) may be observed. Multiple spots may be observed within a patchy area.

[0299] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, and therefore, nc- OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) ) can also be referred to as an oxide semiconductor.

[0300] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower defect state density than the amorphous oxide semiconductor. There is no regularity in the crystal orientation between different pellets. The defect level density is higher than that of AC-OS.

[0301] <Amorphous oxide semiconductor> Next, the amorphous oxide semiconductor will be described.

[0302] Amorphous oxide semiconductors are oxides in which the atomic arrangement in the film is irregular and there are no crystalline parts. An example is an oxide semiconductor that has an amorphous state, such as quartz.

[0303] In amorphous oxide semiconductors, no crystalline parts can be observed in high-resolution TEM images.

[0304] When structural analysis is performed on amorphous oxide semiconductors using an XRD device, out-of-plane In the analysis by the ane method, no peaks indicating crystal planes are detected. When electron diffraction is performed on the amorphous oxide semiconductor, a halo pattern is observed. However, when nanobeam electron diffraction is performed, no spots are observed, and only a halo pattern is observed. It is measured.

[0305] There are various views on amorphous structures. For example, A structure that does not have a crystal structure is called a completely amorphous structure. In addition, although it does not have long-range order, the order of the atoms from the nearest neighbors to the atoms is called a "structure." A structure that may have order in the range of atoms or the second nearest neighbor atoms is called an amorphous structure. Therefore, according to the strictest definition, a material with even a slight degree of order in its atomic arrangement is called a An oxide semiconductor having such a structure cannot be called an amorphous oxide semiconductor. An oxide semiconductor having distance order cannot be called an amorphous oxide semiconductor. Because of the presence of crystalline parts, for example, CAAC-OS and nc-OS are classified as amorphous oxide semiconductors. It cannot be called a conductor or a completely amorphous oxide semiconductor.

[0306] <Amorphous-like oxide semiconductor> Note that an oxide semiconductor may have a structure between an nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (a-li ke OS:amorphous-like Oxide Semiconductor ) is called

[0307] In a-like OS, voids are observed in high-resolution TEM images. In addition, there are cases where crystals can be clearly seen in high-resolution TEM images. and regions where no crystalline portions can be identified.

[0308] Because of the porosity, the a-like OS has an unstable structure. To demonstrate that the OS has an unstable structure compared with CAAC-OS and nc-OS. , showing the structural changes caused by electron irradiation.

[0309] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS ( Prepare CAAC-OS (referred to as sample B) and CAAC-OS (referred to as sample C). The sample is also an In-Ga-Zn oxide.

[0310] First, high-resolution cross-sectional TEM images of each sample are acquired. It can be seen that all of the samples have crystalline parts.

[0311] The determination of which part is to be regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, including six layers, stacked in layers in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The area where the spacing is 0.28 nm or more and 0.30 nm or less is considered to be the crystal part of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0312] Figure 34 shows an example of investigating the average size of the crystal parts (22 to 45 locations) of each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystalline part of eOS grows in size according to the cumulative amount of electron irradiation. As shown in Figure 34 (1), the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus) was sized at 4.2 × 10 8 e - / nm 2 On the other hand, in the nc-OS, the size of the crystals grows to about 2.6 nm. For CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in 34, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. You will realize something.

[0313] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not as good as nc-OS and CAAC-O. It can be seen that the structure is unstable compared to S.

[0314] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal with the same composition. The density of nc-OS and CAAC is 78.6% or more and less than 92.3% of that of the original. The density of the -OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form an oxide semiconductor film having a density of less than 78% of that of the oxide semiconductor film.

[0315] For example, in an oxide semiconductor with an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, , the density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It is less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and that of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0316] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions at any ratio are used. By combining single crystals, the density equivalent to a single crystal of the desired composition is estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate by combining different types of single crystals.

[0317] As described above, oxide semiconductors have a variety of structures, each of which has a variety of properties. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or a microcrystalline oxide. The film may be a stacked film containing two or more of a semiconductor and a CAAC-OS.

[0318] <Film formation model> An example of a film formation model for CAAC-OS and nc-OS will be described below.

[0319] FIG. 35(A) shows how a CAAC-OS film is formed by sputtering. FIG.

[0320] The target 5130 is attached to a backing plate. A plurality of magnets are disposed at positions facing the target 5130. The magnetic field is generated by the magnet. The magnetic field of the magnet is used to increase the deposition rate. The sputtering method is called magnetron sputtering.

[0321] The substrate 5120 is disposed facing the target 5130, and the distance between them is d (target The target-substrate distance (TS distance) is preferably 0.01 m or more and 1 m or less. The thickness of the film deposition chamber is set to 0.02m or more and 0.5m or less. Most of the film deposition gas (e.g., oxygen) It is filled with a gas mixture containing hydrogen, argon, or oxygen at a ratio of 5% by volume or more, and The pressure is controlled to be in the range of 0.1 Pa to 100 Pa, preferably in the range of 0.1 Pa to 10 Pa. By applying a voltage above a certain level to the target 5130, discharge begins and plasma is generated. It is noted that a high density plasma region is formed near the target 5130 by the magnetic field. In the high density plasma region, the deposition gas is ionized, and ions 5101 The ions 5101 are, for example, positive ions of oxygen (O + ) and argon cations (A r + ) etc.

[0322] Here, the target 5130 has a polycrystalline structure having a plurality of crystal grains, and any of the crystal grains The crystal grains include cleavage planes. The crystal structure of InGaZnO4 is shown in Fig. 36(A). This is the structure of an InGaZnO4 crystal. In the Ga-Zn-O layer, the oxygen atoms in each layer are arranged in close proximity. And because the oxygen atom has a negative charge, the two adjacent G Repulsion occurs between the a-Zn-O layers. As a result, the InGaZnO4 crystals The cleavage plane is located between the two Ga-Zn-O layers.

[0323] Ions 5101 generated in the high-density plasma region are applied to the target 5130 side by the electric field. The cleavage plane is accelerated and eventually collides with the target 5130. At this time, flat or pellet-like particles are formed from the cleavage plane. Pellets 5100a and 5100b, which are pellet-shaped sputtered particles, are peeled off and struck. The pellets 5100a and 5100b are the particles of the ions 5101. The impact of a collision can cause distortion in the structure.

[0324] The pellet 5100a is a flat or pellet-shaped pellet having a triangular, for example, equilateral triangular, plane. The pellet 5100b has a hexagonal, for example, regular hexagonal, plane. The sputtered particles are in the form of a plate or pellet. Pellet 5100b and other flat or pellet-shaped sputter particles are collectively referred to as pellet 5. The planar shape of the pellet 5100 is not limited to a triangle or a hexagon. For example, a triangle (e.g., an equilateral triangle) may have a shape that is made up of multiple triangles. In some cases, two squares (e.g., a diamond) are joined together to form a rectangle.

[0325] The thickness of the pellet 5100 is determined depending on the type of deposition gas, etc. The reason for this will be described later. It is preferable that the thickness of the pellet 5100 is uniform. Thin pellets are preferable to thick cubes. The thickness of the 5100 is 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5100 has a width of 1 nm or more and 3 nm or less, preferably The pellet 5100 is (1) in FIG. For example, the target 51 having In-Ga-Zn oxide corresponds to the initial nucleus described in . When ions 5101 are bombarded onto the surface 30, a Ga-Zn-O layer and a A pellet 5100 having three layers, an In-O layer and a Ga-Zn-O layer, is exfoliated. (C) shows the structure of the exfoliated pellet 5100 observed from a direction parallel to the c-axis. The 5100 is a nano-structure having two Ga-Zn-O layers (pan) and an In-O layer (core). It can also be called a no-size sandwich structure.

[0326] As the pellet 5100 passes through the plasma, the sides may become negatively or positively charged. The pellet 5100 may, for example, be negatively charged due to the oxygen atoms located on its sides. The sides have charges of the same polarity, which causes repulsion between the charges, forming a flat or pellet-like shape. It is possible to maintain the shape of the CAAC-OS. In the case of oxides, the oxygen atoms bonded to the indium atoms may be negatively charged. Or, an oxygen atom bonded to an indium atom, a gallium atom, or a zinc atom is negatively charged. In addition, when the pellet 5100 passes through the plasma, it may When it grows by bonding with sodium atoms, gallium atoms, zinc atoms, and oxygen atoms, etc. The difference in size between (2) and (1) in Figure 34 above corresponds to the growth in the plasma. Here, when the substrate 5120 is at room temperature, the pellets on the substrate 5120 Since the growth of 5100 is difficult to occur, it becomes nc-OS (see Figure 35(B)). Therefore, nc-OS can be deposited even on a large substrate (5120). In order to grow the pellet 5100 in plasma, the sputtering method is required. Increasing the film formation power is effective. The structure of 00 can be stabilized.

[0327] As shown in Figures 35(A) and 35(B), for example, pellet 5100 is a plasma It flies through the air like a kite and flutters up onto the substrate 5120. Pellet 51 Because 00 is electrically charged, it approaches an area where other pellets 5100 have already accumulated. Here, on the upper surface of the substrate 5120, a repulsive force is generated. In addition, the substrate 5120 and the target 51 Since a potential difference is applied between the substrate 5120 and the target 5130, the Therefore, the pellet 5100 is placed on the upper surface of the substrate 5120 in a magnetic The force (Lorentz force) is exerted by the action of the electric field and the electric current. This can be understood using the left-hand rule.

[0328] The pellet 5100 has a larger mass than a single atom. In order to move the object, it is important to apply some kind of force from the outside. It is possible that the force is generated by the action of the electric field and the electric current. To provide sufficient force to move the top surface of substrate 5120, The magnetic field parallel to the upper surface of the plate 5120 is 10 G or more, preferably 20 G or more, and more preferably It is advisable to provide an area where the resistance is 30 G or more, and more preferably 50 G or more. On the upper surface of the substrate 5120, a magnetic field parallel to the upper surface of the substrate 5120 is applied to the upper surface of the substrate 5120. At least 1.5 times, preferably at least 2 times, more preferably at least 3 times the magnetic field perpendicular to the surface It is preferable to provide an area where the difference is 5 times or more.

[0329] At this time, the magnet and the substrate 5120 move or rotate relative to each other. Therefore, the direction of the horizontal magnetic field on the upper surface of the substrate 5120 continues to change. On the upper surface of 5120, the pellet 5100 is subjected to forces from various directions and is moved in various directions. It can be moved.

[0330] Also, when the substrate 5120 is heated as shown in FIG. 35(A), the pellet 5100 The resistance due to friction between the substrate 5120 and the pellets is small. The pellet 5100 glides over the top surface of the substrate 5120. The movement occurs with the flat surface facing the substrate 5120. When the particles reach the side of the pellet 5100, the sides are joined together. The oxygen atom on the side of 0 is released. The released oxygen atom Since the electron vacancies may be filled, the CAAC-OS has a low defect level density. The temperature of the upper surface of 5120 is, for example, 100°C or more and less than 500°C, 150°C or more and less than 450°C. or 170° C. or higher and lower than 400° C. Even in this case, it is possible to form a CAAC-OS film.

[0331] Furthermore, when the pellet 5100 is heated on the substrate 5120, the atoms are rearranged, The structural distortion caused by the collision of the ions 5101 is relaxed. 00 is almost a single crystal. Pellet 5100 is almost a single crystal, Even if the pellets 5100 are heated after being bonded together, the pellets 5100 themselves do not expand or contract. Therefore, the gaps between the pellets 5100 widen, causing the grains to shrink. It does not form defects such as boundaries or crevasse formation.

[0332] In addition, the CAAC-OS is not made of a single-crystal oxide semiconductor. The aggregates of pellet 5100 (nanocrystals) are arranged like piles of bricks or blocks. In addition, there are no grain boundaries between the pellets 5100. The CAAC-OS was deformed, such as shrinking, due to heating during film formation, heating after film formation, or bending. Even in such cases, it is possible to relieve local stress or release strain. This structure is suitable for use in flexible semiconductor devices. The resulting arrangement resembles randomly stacked nanocrystals.

[0333] When target 5130 is sputtered by ions 5101, not only pellet 5100 but also However, zinc oxide may peel off. Zinc oxide is lighter than pellet 5100, so Therefore, it first reaches the upper surface of the substrate 5120. A zinc oxide layer 5102 having a thickness of 0.5 nm to 2 nm is formed. A schematic cross-sectional view is shown in Figure 37.

[0334] As shown in FIG. 37(A), a pellet 5105a and a pellet Here, the pellets 5105a and 5105b are piled up. The pellets 5105c are arranged so that their sides are in contact with each other. After being deposited on pellet 5105b, the particles slide on pellet 5105b. In another aspect of 5a, a plurality of particles 5103 detached from the target along with zinc oxide. However, due to the heat from the substrate 5120, it is crystallized to form a region 5105a1. The particles 5103 may include oxygen, zinc, indium, and gallium, among others.

[0335] As shown in FIG. 37(B), the region 5105a1 is integrated with the pellet 5105a. The pellet 5105c has a side surface that is the same as that of the pellet 5105a. It is arranged so as to be in contact with another side surface of 105b.

[0336] Next, as shown in FIG. 37(C), a pellet 5105d is further formed on the pellet 5105a2. and pellet 5105b, and then on pellet 5105a2 and pellet 51 It slides on the other side of the pellet 5105c. The pellet 5105e slides over the zinc oxide layer 5102.

[0337] As shown in FIG. 37(D), the pellet 5105d has a side surface similar to that of the pellet 510. The pellet 5105e is placed so that its side faces the pellet. Also, the other side of the pellet 5105d is arranged so as to be in contact with the other side of the pellet 5105c. In the process, a plurality of particles 5103 peeled off from the target 5130 together with zinc oxide are deposited on the substrate. Heat from 5120 causes crystallization, forming region 5105d1.

[0338] As described above, the piled pellets are arranged so that they come into contact with each other, and the particles are formed on the side surfaces of the pellets. As a result of this growth, a CAAC-OS is formed on the substrate 5120. The individual pellets of C-OS are larger than those of nc-OS. The difference in size between (1) and (2) corresponds to the growth after deposition.

[0339] In addition, the gaps between the pellets become extremely small, so that one large pellet is formed. One large pellet may have a single crystal structure. The thickness is 10 nm or more and 200 nm or less, or 15 nm or more and 100 nm or less, as viewed from the top surface, or In some cases, the thickness may be between 20 nm and 50 nm. In some nitride semiconductors, the channel formation region may fit into one large pellet. That is, the region having a single crystal structure can be used as a channel forming region. As the size of the dot increases, the region having a single crystal structure becomes the channel formation region of the transistor, It may be used as a source region and a drain region.

[0340] In this way, the channel formation region of the transistor and the like are formed in a region having a single crystal structure. This may improve the frequency characteristics of the transistor.

[0341] Based on the above model, it is considered that the pellet 5100 accumulates on the substrate 5120. CAAC-OS can be formed even when the surface to be formed does not have a crystalline structure. This indicates that the growth mechanism is different from epitaxial growth. C-OS does not require laser crystallization and can be deposited uniformly even on large glass substrates. For example, if the structure of the upper surface (surface to be formed) of the substrate 5120 is an amorphous structure (for example, non-crystalline), It is possible to form a CAAC-OS film even on a silicon dioxide (crystalline silicon dioxide).

[0342] In addition, even if the upper surface of the substrate 5120 on which the formation is to be performed is uneven, the CAAC-OS For example, the pellets 5100 are arranged along the shape of the upper surface of the substrate 5120. If the surface is atomically flat, the pellet 5100 will be placed on a flat surface parallel to the ab plane. If the pellet 5100 has a uniform thickness, the thickness is uniform and flat, and A layer with high crystallinity is formed. Then, this layer is stacked n levels (n is a natural number). This allows the CAAC-OS to be obtained.

[0343] On the other hand, even if the upper surface of the substrate 5120 has unevenness, the CAAC-OS can be easily formed by the pellet 510 The structure is made up of n layers (n is a natural number) of layers in which 0s are arranged along the unevenness. Since the surface 20 has unevenness, gaps tend to occur between the pellets 5100. However, even in this case, intermolecular forces act between the pellets 5100, and unevenness Therefore, even if there are unevenness, the gaps between the pellets are arranged as small as possible. A CAAC-OS having high crystallinity can be obtained.

[0344] Since the CAAC-OS film is formed using this model, the sputtered particles have a small thickness. It is preferable that the sputtered particles are in the form of pellets. However, the surface facing the substrate 5120 may not be uniform, and the thickness and crystal orientation may not be uniform. be.

[0345] The film formation model shown above allows for the formation of highly crystalline films even on a surface with an amorphous structure. A CAAC-OS having the formula:

[0346] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination.

[0347] (Embodiment 8) [Electronic device description] In this embodiment, one of electronic devices to which the display device according to one embodiment of the present invention can be applied will be described. An example will be described with reference to FIGS. 38 and 39.

[0348] As an electronic device to which a display device is applied, for example, a television device (television or television (also called television receivers), computer monitors, digital cameras, digital video Cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), mobile phones These include portable game machines, mobile information terminals, sound reproduction devices, and large game machines such as pachinko machines. Specific examples of these electronic devices are shown in Figures 38 and 39.

[0349] FIG. 38A shows a portable game machine, which includes a housing 7101, a housing 7102, a display portion 7103, Display unit 7104, microphone 7105, speaker 7106, operation keys 7107, stylus The display device according to one embodiment of the present invention includes the display portion 7103 or the display portion 7108. 104. The display portion 7103 or the display portion 7104 can be used in accordance with one embodiment of the present invention. By using such a display device, it is possible to provide a mobile phone that is excellent in usability for the user and is less susceptible to deterioration in quality. It is possible to provide a portable game machine. The display unit 7103 and the display unit 7104 are included in the portable game machine. The number is not limited to this.

[0350] FIG. 38B shows a smartwatch, which includes a housing 7302, a display unit 7304, and operation buttons. 7311, 7312, a connection terminal 7313, a band 7321, a clasp 7322, etc. The display device or the touch panel according to one embodiment of the present invention can be used for the display portion 7304. can.

[0351] FIG. 38C shows a portable information terminal, which includes a display portion 7502 incorporated in a housing 7501. , operation button 7503, external connection port 7504, speaker 7505, microphone 7506 The display device according to one embodiment of the present invention can be used for the display portion 7502. Cut.

[0352] FIG. 38D shows a video camera, which includes a first housing 7701, a second housing 7702, and a display unit 77 03, operation keys 7704, a lens 7705, a connection part 7706, etc. The lens 7705 and the display unit 7703 are provided in the first housing 7701. The first housing 7701 and the second housing 7702 are connected to each other. The first housing 7701 and the second housing 7702 are connected by a portion 7706, and the angle between the first housing 7701 and the second housing 7702 is The image on the display unit 7703 can be changed by the connection unit 7706. 6, and a configuration in which the switching is performed according to the angle between the first housing 7701 and the second housing 7702. The imaging device of one embodiment of the present invention may be provided at the focal point of the lens 7705. The display device according to one embodiment of the present invention can be used for the display portion 7703.

[0353] FIG. 38(E) shows a curved display, which is a display portion 7802 incorporated in a housing 7801. In addition, the device is provided with an operation button 7803, a speaker 7804, and the like. Such a display device can be used for the display portion 7802.

[0354] FIG. 38(F) shows a digital signage system, which is a display unit 7922 installed on a utility pole 7921. The display device according to one embodiment of the present invention can be used for the display portion 7922. .

[0355] FIG. 39(A) shows a notebook personal computer, which includes a housing 8121 and a display unit 8122. , a keyboard 8123, a pointing device 8124, etc. Such a display device can be applied to the display portion 8122.

[0356] Fig. 39(B) shows the exterior of the car 9700. Fig. 39(C) shows the driver's seat of the car 9700. The automobile 9700 includes a body 9701, wheels 9702, a dashboard 9703, a light fixture, and a The display device or the input / output device of one embodiment of the present invention includes a car 970 For example, the display units 9710 to 9711 shown in FIG. The display device, the input / output device, or the touch panel of one embodiment of the present invention is provided in the display portion 9715. It is possible.

[0357] The display portion 9710 and the display portion 9711 are display devices provided on a windshield of an automobile, The display device or the input / output device of one embodiment of the present invention is a display device or By forming the electrodes of the input / output device using a light-transmitting conductive material, A so-called see-through display device or input / output device that allows the opposite side to be seen through. If it is a see-through display device or an input / output device, the operation of the car 9700 can be Therefore, the display device or input / output device according to one embodiment of the present invention can be used without obstructing the view even when the display device is turned on. The power device can be installed on the windshield of the automobile 9700. or an input / output device, a display device, or a transistor for driving the input / output device, etc. In this case, organic transistors using organic semiconductor materials and transistors using oxide semiconductors are used. A light-transmitting transistor such as a light-transmitting transistor may be used.

[0358] The display unit 9712 is a display device provided in a pillar part. By displaying an image from the imaging means on the display unit 9712, the view blocked by the pillars can be compensated for. The display unit 9713 is a display device provided in the dashboard. For example, an image captured by an imaging means provided on the vehicle body is displayed on the display unit 9713. This allows the driver to compensate for the obstructed view of the dashboard. By projecting images from the installed imaging means, blind spots can be compensated for and safety can be improved. In addition, by projecting images that complement the invisible parts, it is possible to make the sense of incongruity appear more natural. Safety checks can be performed without any hassle.

[0359] Also, Figure 39(D) shows the interior of a car with bench seats for the driver and passenger seats. The display unit 9721 is a display device or an input / output device provided in the door. For example, an image captured by an imaging means provided on the vehicle body is displayed on the display unit 9721, The display unit 9722 can complement the view blocked by the handle. The display unit 9723 is a display device provided in the center of the seat surface of the bench seat. The display device is installed on the seat or backrest, and the display device is The heat generated by the display device can also be used as a seat heater.

[0360] The display unit 9714, the display unit 9715, or the display unit 9722 displays navigation information, odometer, tachometer, mileage, fuel level, gear status, air conditioning settings, etc. It is possible to provide various information. In addition, it is possible to change the display items and layout displayed on the display unit. The above information can be displayed on the display unit 9. 710 to 9713, 9721, and 9723. In addition, the display units 9710 to 9715 and the display units 9721 to 9723 are illuminated. The display units 9710 to 9715 and the display unit The display portions 9721 to 9723 can also be used as a heating device.

[0361] The display unit to which the display device of one embodiment of the present invention is applied may be flat. The display device of this embodiment may not have a curved surface or flexibility.

[0362] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. can be used in appropriate combination. [Explanation of symbols]

[0363] 10 Display device 11 areas 12 areas 13 areas 14 areas 18 Light blocking layer 20 Display panel 21 Display area 22 Peripheral circuits 23 Protective film 24 pixels 30 Groove 42 FPC 50 transistors 51 Transistor 52 transistors 53 Transistor 54 transistors 55 transistors 61 Capacitor element 63 Capacitor element 70 Light-emitting element 80 Liquid crystal element 90 Input Devices 91 source line 92 gate lines 100 boards 101 Substrate 103 Polarizing Plate 104 Backlight 110 Insulating layer 112 Insulating layer 120 Conductive layer 130 Insulating layer 131 Insulating layer 140 Semiconductor layer 141 Oxide semiconductor layer 142 Oxide semiconductor layer 143 Oxide semiconductor layer 150 conductive layer 160 Conductive layer 165 Insulating Layer 170 Insulating Layer 180 insulating layer 190 Conductive Layer 200 conductive layer 220 Conductive layer 230 layers 240 Spacer 250 EL layer 260 Conductive Layer 300 boards 301 Substrate 302 Protection Board 303 Polarizing Plate 312 Insulating layer 330 Insulating layer 360 colored layer 370 Adhesive layer 371 Adhesive layer 372 Adhesive layer 373 Adhesive layer 374 Adhesive layer 375 Adhesive layer 376 Adhesive layer 380 Conductive Layer 390 Liquid Crystal Layer 400 conductive layer 410 Conductive layer 420 Insulation Layer 430 Conductive layer 440 Insulation Layer 510 Anisotropic conductive film 520 Conductive layer 530 Opening 601 Precursor 602 Precursor 700 boards 701 Pixel section 702 Scanning line driving circuit 703 Scanning line driving circuit 704 Signal Line Driver Circuit 710 Capacitance wiring 712 Gate wiring 713 Gate wiring 714 data line 716 Transistor 717 Transistor 718 Liquid Crystal Devices 719 Liquid Crystal Devices 720 pixels 721 Switching Transistor 722 Drive transistor 723 Capacitor 724 Light-emitting element 725 signal line 726 scan lines 727 Power line 728 Common electrode 800 boards 810 entrance 820 Chamber 930 board 931 Electrode 932 Electrode 933 Electrode 934 Bridge Electrode 936 Electrode 937 Electrode 938 Intersection 941 Wiring 942 Wiring 950 FPC 951 IC 1700 boards 1701 Chamber 1702 Road Room 1703 Pre-treatment room 1704 Chamber 1705 Chamber 1706 Unloading Room 1711a Raw material supply section 1711b Raw material supply section 1712a High Speed ​​Valve 1712b High Speed ​​Valve 1713a Raw material inlet 1713b Raw material inlet 1714 Raw material discharge port 1715 Exhaust system 1716 PCB holder 1720 Transport Room 3501 Wiring 3502 Wiring 3503 Transistor 3504 Liquid crystal elements 3510 Wiring 3510_1 Wiring 3510_2 Wiring 3511 Wiring 3515_1 Block 3515_2 Block 3516 blocks 5100 pellets 5100a pellets 5100b pellets 5101 AEON 5102 Zinc oxide layer 5103 particles 5105a Pellets 5105a1 area 5105a2 pellets 5105b Pellets 5105c Pellets 5105d Pellets 5105d1 area 5105e Pellets 5120 board 5130 Target 5161 area 7101 Housing 7102 Housing 7103 Display section 7104 Display section 7105 Microphone 7106 Speaker 7107 Operation key 7108 Stylus 7302 Housing 7304 Display section 7311 Operation button 7312 Operation button 7313 Connection terminal 7321 Band 7322 Clasp 7501 Case 7502 Display section 7503 Operation button 7504 External connection port 7505 Speaker 7506 Microphone 7701 Housing 7702 Case 7703 Display section 7704 Operation key 7705 Lens 7706 Connection 7801 Case 7802 Display section 7803 Operation button 7804 Speaker 7921 Electric pole 7922 Display section 8121 Housing 8122 Display section 8123 keyboard 8124 pointing device 9700 Automobiles 9701 Body 9702 wheels 9703 Dashboard 9704 Light 9710 Display section 9711 Display section 9712 Display section 9713 Display section 9714 Display section 9715 Display section 9721 Display section 9722 Display section 9723 Display section

Claims

1. a first substrate, a second substrate, and a device layer disposed between the first substrate and the second substrate; the element layer has pixels each having a transistor and a liquid crystal element, The liquid crystal element is an electronic device driven in an FFS mode, a first conductive layer, an oxide semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a second conductive layer; the first conductive layer has a region that functions as a gate electrode of the transistor, the oxide semiconductor layer has a region that functions as a channel formation region of the transistor, the first insulating layer and the second insulating layer have a region that functions as a gate insulating layer of the transistor, the first insulating layer and the second insulating layer have a region sandwiched between the first conductive layer and the oxide semiconductor layer, the first insulating layer is disposed in contact with the first conductive layer; the first insulating layer comprises silicon nitride; the second insulating layer is disposed so as to be in contact with the oxide semiconductor layer; the second insulating layer comprises silicon oxide; the second conductive layer has a region that functions as an electrode of the liquid crystal element, the third insulating layer has a region disposed above the oxide semiconductor layer, the third insulating layer has a region disposed below the second conductive layer; In a plan view of the first substrate, the first insulating layer has a first region that does not overlap with the second insulating layer between an end portion of the first substrate and the pixel, a thickness of the first region is thinner than a thickness of a second region of the first insulating layer that functions as the gate insulating layer; the third insulating layer is disposed so as to be in contact with the first region; The electronic device, wherein the third insulating layer comprises silicon nitride.

2. a first substrate, a second substrate, and a device layer disposed between the first substrate and the second substrate; the element layer has pixels each having a transistor and a liquid crystal element, The liquid crystal element is an electronic device driven in an FFS mode, a first conductive layer, an oxide semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, a second conductive layer, and a fourth insulating layer; the first conductive layer has a region that functions as a gate electrode of the transistor, the oxide semiconductor layer has a region that functions as a channel formation region of the transistor, the first insulating layer and the second insulating layer have a region that functions as a gate insulating layer of the transistor, the first insulating layer and the second insulating layer have a region sandwiched between the first conductive layer and the oxide semiconductor layer, the first insulating layer is disposed in contact with the first conductive layer; the first insulating layer comprises silicon nitride; the second insulating layer is disposed so as to be in contact with the oxide semiconductor layer; the second insulating layer comprises silicon oxide; the second conductive layer has a region that functions as an electrode of the liquid crystal element, the third insulating layer has a region disposed above the oxide semiconductor layer, the third insulating layer has a region disposed below the second conductive layer; In a plan view of the first substrate, the first insulating layer has a first region that does not overlap with the second insulating layer between an end portion of the first substrate and the pixel, a thickness of the first region is thinner than a thickness of a second region of the first insulating layer that functions as the gate insulating layer; the third insulating layer is disposed so as to be in contact with the first region; the third insulating layer comprises silicon nitride; an electronic device, wherein the fourth insulating layer has a region in contact with an end of the first insulating layer, a region in contact with an end of the third insulating layer, and a region in contact with an upper surface of the third insulating layer.

3. a first substrate, a second substrate, and a device layer disposed between the first substrate and the second substrate; the element layer has pixels each having a transistor and a liquid crystal element, The liquid crystal element is an electronic device driven in an FFS mode, a first conductive layer, an oxide semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, a second conductive layer, and a third conductive layer; the first conductive layer has a region that functions as a gate electrode of the transistor, the oxide semiconductor layer has a region that functions as a channel formation region of the transistor, the first insulating layer and the second insulating layer have a region that functions as a gate insulating layer of the transistor, the first insulating layer and the second insulating layer have a region sandwiched between the first conductive layer and the oxide semiconductor layer, the first insulating layer is disposed in contact with the first conductive layer; the first insulating layer comprises silicon nitride; the second insulating layer is disposed so as to be in contact with the oxide semiconductor layer; the second insulating layer comprises silicon oxide; the second conductive layer has a region that functions as an electrode of the liquid crystal element, the third insulating layer has a region disposed above the oxide semiconductor layer, the third insulating layer has a region disposed below the second conductive layer; In a plan view of the first substrate, the first insulating layer has a first region that does not overlap with the second insulating layer between an end portion of the first substrate and the pixel, a thickness of the first region is thinner than a thickness of a second region of the first insulating layer that functions as the gate insulating layer; the third insulating layer is disposed so as to be in contact with the first region; the third insulating layer comprises silicon nitride; the third conductive layer has a region in contact with an end of the first insulating layer, a region in contact with an end of the third insulating layer, and a region in contact with an upper surface of the third insulating layer.

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