Power conversion device adjustment system and power conversion device adjustment method

The adjustment device synchronizes power semiconductor operations by measuring and applying voltage rise adjustment values, addressing performance variability and reducing costs in power conversion devices.

JP2025127948APending Publication Date: 2025-09-02HITACHI IND PROD LTD +1
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Patent Information

Application Number
JP2024024970
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-02-21
Publication Date
2025-09-02

AI Technical Summary

Technical Problem

Existing power conversion devices face challenges in maintaining stable performance due to variations in power semiconductor characteristics, leading to reduced yields and increased development costs, especially when driving large-capacity motors.

Method used

An adjustment device for power conversion devices that measures reference rise delay times, calculates voltage rise adjustment values, and applies these values to synchronize the operation of power semiconductors, thereby stabilizing their performance.

Benefits of technology

The solution enables uniform operation of power semiconductors, reducing degradation and costs by synchronizing their performance, thus enhancing the stability and efficiency of power conversion devices.

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Abstract

To adjust variation in operation of a power conversion device using a power semiconductor.SOLUTION: An adjustment device for a power conversion device for performing power conversion using a power semiconductor comprises: a delay time measurement section for measuring a reference rise delay time, which is a delay time of an output voltage rise output at the time of inputting a switching signal for commanding an output voltage rise to a reference power conversion device to be a reference of adjustment; an adjustment value generation section for obtaining a voltage rise adjustment value from a difference between a delay time of an output voltage rise output at the time of inputting the switching signal to the power conversion device and the reference rise delay time; and an adjustment value writing section for writing the voltage rise adjustment value obtained by the adjustment value generation section to an adjustment section of the power conversion device.SELECTED DRAWING: Figure 7
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Description

[Technical Field]

[0001] The present invention relates to a power converter adjustment system and a power converter adjustment method. [Background technology]

[0002] The spread of environmental protection has increased the demand for electric motors, and so has the demand for power conversion devices to drive them. The development of power semiconductor elements is important for power conversion devices, but developing power semiconductor elements that match the specifications of each electric motor every time results in low yields and increased development costs. For this reason, once a power conversion device is developed, it is important to use it to drive electric motors of the same capacity range as much as possible, and to be able to support large-capacity electric motors by connecting power semiconductor elements in parallel.

[0003] Patent Document 1 discloses a power semiconductor element drive circuit that can improve not only current imbalance during switching operation but also current imbalance during steady operation. The power semiconductor element drive circuit is provided corresponding to each of a plurality of power semiconductor elements connected in parallel, and drives the power semiconductor elements. The power semiconductor element drive circuit includes a memory unit that stores characteristic information of the power semiconductor elements, and a gate drive control unit that controls gate drive conditions of the power semiconductor elements based on the characteristic information stored in the memory unit. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-46438 Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 discloses that the drive circuit for power semiconductor elements adjusts the imbalance in the output current of each of a plurality of power semiconductors connected in parallel.

[0006] However, the drive circuit of Patent Document 1 adjusts a power conversion device using power semiconductors by referring to characteristic information of the power semiconductors, but does not consider what adjustment values ​​should be set using the characteristic information to adjust the operation of each power semiconductor to a target operation. The object of the present invention is to create a power conversion device with stable performance using power semiconductors with variations in characteristics. [Means for solving the problem]

[0007] The object of the present invention is achieved by an adjustment device for a power conversion device that performs power conversion using power semiconductors, the adjustment device for a power conversion device comprising: a delay time measurement unit that measures a reference rise delay time, which is the delay time of the output voltage rise that is output when a switching signal instructing an output voltage increase is input to a reference power conversion device that serves as the basis for adjustment; an adjustment value generation unit that determines a voltage rise adjustment value from the difference between the delay time of the output voltage rise that is output when a switching signal is input to the power conversion device and the reference rise delay time; and an adjustment value writing unit that writes the voltage rise adjustment value determined by the adjustment value generation unit to the adjustment unit of the power conversion device. [Effects of the Invention]

[0008] According to the present invention, it is possible to adjust the variations in the operation of a power conversion device using a power semiconductor. Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments. [Brief explanation of the drawings]

[0009] [Figure 1(a)] Increased capacity due to added inductance [Figure 1(b)] Increased capacity through new developments [Figure 2] Diagram explaining the output voltage before adjustment [Figure 3] Diagram explaining the adjusted output voltage [Figure 4] Diagram explaining the output voltage before adjustment [Figure 5] Diagram explaining the adjusted output voltage [Figure 6(a)] A two-stage system configuration diagram according to an embodiment of the present invention. [Figure 6(b)] System configuration diagram of a one-stage system according to an embodiment of the present invention [Figure 7] An example of a configuration diagram of an adjustment device according to an embodiment of the present invention. [Figure 8] An example of a circuit diagram of a power conversion device according to an embodiment of the present invention. [Figure 9] FIG. 1 is a diagram illustrating an outline of adjustment processing in an embodiment of the present invention. [Figure 10] 1 is a flowchart illustrating processing by an adjustment device (single unit) according to an embodiment of the present invention. [Figure 11] An example of a flowchart showing the processing of the adjustment device (parallel) in an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing for explaining the embodiments, the same components are given the same names and reference numerals as much as possible, and repeated explanations thereof will be omitted.

[0011] The present invention is not limited to the following examples, and includes various modifications and equivalent configurations within the spirit and scope of the appended claims. For example, the above examples have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations.

[0012] Furthermore, the processing units described in the embodiments may be realized in hardware, for example by designing some or all of them as integrated circuits, or may be realized in software by having a processor interpret and execute a program that realizes each function.

[0013] The tables, areas, etc. described in the embodiments may be a database (DB) or data stored in the main memory. [Example]

[0014] Power conversion devices are often made using power semiconductors. However, the characteristics of each power semiconductor vary. Therefore, if only power semiconductors with similar characteristics are used to drive external devices such as motors, the yield of the power semiconductors will decrease, leading to increased costs.

[0015] In addition, in recent years, there has been a demand for large-capacity power conversion devices to control motors in electric vehicles, etc., but each time this is required, it is necessary to develop the power semiconductors with the required capacity and the drive units to operate them, as shown in Figure 1(b), which also leads to increased costs.

[0016] To solve this problem, it has been considered to combine multiple existing power semiconductors to create a large-capacity power conversion device, as shown in Figure 1(a).However, there is a problem in that the variations in power semiconductors can cause rapid degradation of specific power semiconductors.

[0017] One way to solve this problem is to add a coil 5 to each power semiconductor 4 to adjust its characteristics and absorb the differences in the characteristics of the power semiconductors, as shown in Figure 1(a). In this case, it is possible to reduce costs by standardizing the drive unit, as shown in the lower diagram of Figure 1(a), but the costs involved in measuring the characteristics of the power semiconductors 4 and selecting and adjusting the coil 5 are unavoidable.

[0018] Next, the variations in the characteristics of power semiconductors will be explained.

[0019] 2 is a diagram illustrating the output voltage of the power semiconductors before adjustment. The gate voltage of the power semiconductors rises in response to the rising edge of the output switching signal 31 output from the control unit. The output voltage signal 32 of the first power semiconductor rises significantly later than the output voltage signal 33 of the second power semiconductor.

[0020] Furthermore, the gate voltage of the power semiconductor drops in response to the falling edge of the output switching signal 31. In this case as well, the output voltage signal 32 of the first power semiconductor falls significantly later than the output voltage signal 33 of the second power semiconductor.

[0021] When there is such a variation in the power semiconductors, the load on the second power semiconductor is large, causing the second power semiconductor to deteriorate rapidly. To solve this problem, it is necessary to delay the rise and fall of the gate voltage of the second power semiconductor and adjust it to synchronize with the first power semiconductor.

[0022] 3 shows the output voltage of the power semiconductor after regulation. When the output switching signal 31 is input, the output switching signal 34 that the regulation unit 1 supplies to the power conversion device 1 is an output switching signal 34 that is almost not regulated from the output switching signal 31. It may be exactly the same as the output switching signal 31, but there may be some delay due to the nature of the electronic circuit.

[0023] On the other hand, the output switching signal 35 supplied to the power conversion device 2 by the adjustment unit 2 is the output switching signal 31 adjusted and delayed to become the output switching signal 35. By this adjustment, the rise of the output voltage signal 33 of the power conversion device 2 is delayed, and it rises at approximately the same time as the output voltage signal 32 of the power conversion device 1, in the vicinity of the optimum value 36.

[0024] Similarly, when the output voltage signal falls, each adjusting unit adjusts the rise time of the output voltage signal supplied to the power conversion device so that the output voltage signal falls at approximately the same time as the output voltage signal 32 of the power conversion device 1 near the optimum value 37 . 4 is a diagram illustrating the output voltage before adjustment. Following the rising edge of switching signal 50, the signal of power conversion device A rises before the signal of power conversion device B. The graphs of currents IceA and IceB shown below do not match, with current IceA of power conversion device A rising first and peaking higher than the peak of current IceB of power conversion device B, creating an imbalance.

[0025] Regarding the falling edge of the switching signal 50, the signal of power conversion device A falls before the signal of power conversion device B. The graphs of the currents IceA and IceB shown below also do not match, with the current IceB of power conversion device B being lower than the current IceB of power conversion device A. The voltages also do not match.

[0026] To adjust for this variation, the rise and fall of power conversion device A is delayed as shown in Figure 5, thereby matching the output current and output voltage of power conversion device A and power conversion device B and eliminating the imbalance.

[0027] 6(a) is an example of a two-stage system configuration diagram in an embodiment of the present invention. A standalone power conversion device 23 is assembled and adjusted using a standalone adjustment device 20. A reference power conversion device 21, which serves as a reference for the power conversion device, is connected to the standalone adjustment device 20. Using data from the reference power conversion device 21, a standalone adjustment unit 22 adjusts the standalone power conversion device 23 to produce an adjusted standalone power conversion device 25.

[0028] A large-capacity parallel power conversion system 26 is configured by connecting multiple individually regulated power conversion systems 25 in parallel. The parallel power conversion systems 26 are regulated by a parallel regulating system 24. The parallel regulating system 24 is equipped with a parallel regulating unit 27, which measures the change in output voltage of each of the power conversion systems that make up the parallel power conversion system 26, identifies the power conversion system that needs regulation, and then determines the regulation value by comparing it with the value of the reference power conversion system 21, and sets the determined regulation value in the power conversion system that needs regulation.

[0029] 6(b) is an example of a system configuration diagram of a one-stage system according to an embodiment of the present invention. In this case, adjustment is not performed for each power conversion device, but rather, the parallel power conversion device 26, which is configured in parallel from the beginning, is set in the parallel adjustment device 30 and adjustment is performed.

[0030] The parallel adjustment device 30 is equipped with a reference power conversion device 21, and the parallel adjustment unit 27 directly measures data from the reference power conversion device 21 and uses it for adjustment. The adjustment method is the same as that of the two-stage parallel adjustment device 24, but because adjustment of individual power conversion devices is not performed, it may not be possible to adjust each of the power conversion devices that make up the parallel power conversion device 26. Furthermore, since the number of power conversion devices that must actually be adjusted increases, it may take more time as the degree of parallelization increases.

[0031] Figure 7 is an example of a configuration diagram of an adjustment device in an embodiment of the present invention. Data such as an adjustment start instruction and error tolerance range is received from a connected host computer via a host IF (Interface). The memory of the CPU (Central Processing Unit) contains a processing reception unit 79 that receives the adjustment start instruction, and a control unit 80 controls the entire adjustment process. A pulse generation unit 75 generates pulses and sends them to a reference power conversion device 87 and a power conversion device 86 via an input / output unit 83, and an output detection unit 76 detects the voltage output of the reference power conversion device 87 and the power conversion device 86.

[0032] A measuring unit 81 measures the delay of the voltage output, and an adjustment value generating unit 82 calculates an adjustment value based on the measured delay of the voltage output. A writing unit 77 writes the calculated adjustment value to the adjustment unit of the power conversion device, thereby performing adjustment.

[0033] The external memory 73 includes a log data storage unit 84 for storing log data such as the serial number of the power conversion device on which adjustment was performed and the adjustment results, as well as a setting value table for storing measurement values ​​such as output voltage delay information obtained from the reference power conversion device 87, the allowable error range, etc.

[0034] By storing this information in the set value table 85, when adjustments are made using the same reference power converter, it is not necessary to measure the reference power converter each time an adjustment is made.

[0035] 8 is an example of a circuit diagram of a power conversion device according to an embodiment of the present invention. In this example, two power conversion devices are connected in parallel to drive a three-phase load 6. A positive DC power supply 91 and a negative DC power supply 92 are provided and connected to an FG (Frame Ground) 90. When a switching signal is sent from the control unit 2 to each adjustment unit 93, the adjustment unit 93 adjusts the delay time, and the drive unit 3 drives the power semiconductor element 4.

[0036] The voltage output that drives each of the power semiconductor elements 4 is detected by a voltage detection unit 95 and fed back to the control unit 2 . 9 is a diagram illustrating an outline of the adjustment process in an embodiment of the present invention. A control unit outputs a switching signal 201, an adjustment unit 202 delays the switching signal, a drive unit 203 drives a power semiconductor element 204 based on the adjusted switching signal, voltage detection 205 is performed, and the control unit performs judgment 206.

[0037] Up to this point, the voltage conversion device is operated independently, but when adjusting within the factory, an adjustment value is calculated based on the result of the control unit determination 206 207 , and the calculated adjustment value is written to the adjustment unit 208 .

[0038] Figure 10 is an example of a flowchart showing the processing of an adjustment device (single unit) in an embodiment of the present invention. The reference power conversion device and adjustment device are connected, and data such as the voltage output delay time when the reference power conversion device is ON and OFF is measured (S101). A pulse is output as an output switching signal to the power conversion device to be adjusted (S102). It is determined whether the delay time when ON is the same as that of the reference device (S103), and if not, an adjustment value is written to the adjustment unit (S104). A pulse is output again (S105), and it is determined whether the delay time when ON is the same as that of the reference device (S106).

[0039] This process is repeated until the ON delay time becomes the same as that of the reference device. If a power electronics device is included whose delay time is not thought to be the same as that of the reference device, the number of repetitions may be limited and the power electronics device may be excluded from adjustment.

[0040] Next, it is determined whether the delay time when turned off is the same as that of the reference device (S107). If not, the adjustment value is written to the adjustment unit (S108), and it is again determined whether the delay time when turned off is the same as the reference value. This process is repeated until the delay time when turned off is the same as that of the reference device. If this adjustment includes a power electronics device whose delay time is thought not to be the same as that of the reference device, the number of repetitions may be limited and the power electronics device may be excluded from adjustment.

[0041] When the ON and OFF delay times become the same as those of the reference device, pulses are output again (S111), and it is determined whether the ON time is the same as that of the reference device (S112). If they are the same, the adjustment is complete and the process ends. If they are not the same, the process returns to S102 and a retry is made.

[0042] It is determined whether the number of retries has been exceeded (S113), and if so, the fact that adjustment is not possible is output from the output unit and recorded in the log (S114).

[0043] 11 is a flowchart showing an example of the processing of the adjustment device (parallel) in the embodiment of the present invention. The adjustment of a power conversion device in which a plurality of power conversion devices are connected in parallel is performed in the same way as the adjustment of a single power conversion device.

[0044] In the case of parallel connections, a reference device may be connected in the same way as a single power conversion device, and adjustments may be made using the delay time of the reference device, etc. However, when parallel connections are made, it is more important that there is no variation within the connected power conversion devices, so it is also possible to use a power conversion device that has a slower response to switching signals as the reference device.

[0045] For this reason, when making adjustments in S123 and S127, the adjustment value is written to the power conversion device with the faster timing, thereby delaying the timing and matching it with the power conversion device with the slower response.

[0046] Even in the case of parallel connection, if a power conversion device is included whose delay time is not thought to be the same as that of the reference device, the number of repetitions may be limited and the power conversion device may be excluded from adjustment.

[0047] As with adjusting a single unit, you can first connect a reference power conversion device to an adjustment device, measure data such as the voltage output delay time when the reference power conversion device is on and off, and use this as the reference device. By doing this, you can create a large-capacity power converter with more uniform specifications. [Explanation of symbols]

[0048] 1 power conversion device, 2 control unit, 3 drive unit, 4 power semiconductor, 5 coil, 6 three-phase load, 20 individual adjustment device, 21 reference power conversion device, 22 individual adjustment unit, 23 individual power conversion device, 24 parallel adjustment device, 25 individual adjusted power conversion device, 26 parallel power conversion device, 27 parallel adjustment unit, 29 individual unadjusted power conversion device, 30 parallel adjustment device, 70 adjustment device, 72 CPU, 73 external memory, 74 host IF, 75 pulse generation unit, 76 output detection unit, 77 writing unit, 79 processing reception unit, 80 control unit, 81 measurement unit, 82 adjustment value generation unit, 83 input / output unit, 84 log data storage unit, 85 setting value table, 86 power conversion device, 87 reference power conversion device

Claims

1. An adjustment device for a power conversion device that performs power conversion using power semiconductors, a delay time measurement unit that measures a reference rise delay time, which is a delay time of an output voltage rise output when a switching signal that instructs an output voltage rise is input to a reference power conversion device that serves as a reference for adjustment; an adjustment value generating unit that calculates a voltage increase adjustment value from a difference between a delay time of an output voltage increase output when a switching signal is input to the power conversion device and a reference increase delay time; an adjustment value writing unit that writes the voltage increase adjustment value determined by the adjustment value generating unit into the adjustment unit of the power conversion device.

2. The delay time measurement unit measures a reference drop delay time, which is a delay time of an output voltage drop output when a switching signal instructing an output voltage drop is input to a reference power conversion device that serves as a reference for adjustment; the adjustment value generation unit calculates a voltage drop adjustment value from a difference between a delay time of an output voltage drop output when a switching signal is input to the power conversion device and a reference drop delay time; The adjusting device for a power converter according to claim 1 , wherein the adjustment value writing unit writes the voltage drop adjustment value generated by the adjustment value generating unit to an adjusting unit of the power converter.

3. the adjustment value generation unit calculates a voltage increase adjustment value for each of the power conversion devices from a difference between a delay time of an output voltage increase output when a switching signal is input to the plurality of power conversion devices and a reference increase delay time; The power converter adjusting device according to claim 1 , wherein the adjustment value writing unit writes the voltage increase adjustment value generated by the adjustment value generating unit to the adjusting unit of each of the power converters.

4. The delay time measurement unit measures a reference drop delay time, which is a delay time of an output voltage drop output when a switching signal instructing an output voltage drop is input to a reference power conversion device that serves as a reference for adjustment; the adjustment value generation unit calculates a voltage drop adjustment value for each of the power conversion devices from a difference between a delay time of an output voltage drop output when a switching signal is input to the plurality of power conversion devices and a reference drop delay time; The power converter adjusting device according to claim 3 , wherein the adjustment value writing unit writes the voltage drop adjustment value generated by the adjustment value generating unit to the adjusting unit of each of the power converters.

5. the adjustment value generation unit determines the power conversion device for which the voltage increase adjustment value needs to be changed and the voltage increase adjustment value from the difference between a delay time of the output voltage increase of the power conversion device output when a switching signal instructing an output voltage increase is input to the parallel power conversion device in which the plurality of power conversion devices in which the voltage increase adjustment value has been written to the adjustment unit is connected in parallel, and a reference increase delay time; 2. The power conversion device adjustment device according to claim 1, wherein the adjustment value writing unit writes the voltage increase adjustment value calculated by the adjustment value generating unit to a power conversion device that needs to change the voltage increase adjustment value calculated by the adjustment value generating unit.

6. the adjustment value generation unit determines a power conversion device for which a voltage drop adjustment value needs to be changed and a voltage drop adjustment value from a difference between a delay time of an output voltage drop of the power conversion device output when a switching signal instructing an output voltage drop is input to a parallel power conversion device in which a plurality of the power conversion devices in which a voltage increase adjustment value has been written to an adjustment unit is connected in parallel, and a reference rise delay time; 6. The power conversion device adjusting device according to claim 5, wherein the adjustment value writing unit writes the voltage drop adjustment value calculated by the adjustment value generating unit to a power conversion device that needs to change the voltage drop adjustment value calculated by the adjustment value generating unit.

7. A method for adjusting a power conversion device that performs power conversion using power semiconductors, The delay time measurement unit measures a reference rise delay time, which is a delay time of an output voltage rise output when a switching signal instructing an output voltage rise is input to a reference power conversion device that serves as a reference for adjustment; an adjustment value generating unit calculates a voltage increase adjustment value from a difference between a delay time of an output voltage increase outputted when a switching signal is input to the power conversion device and a reference increase delay time; A method for adjusting a power conversion device, in which an adjustment value writing unit writes a voltage increase adjustment value calculated by an adjustment value generating unit to an adjustment unit of the power conversion device.

Citation Information

Patent Citations

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