Display device

Abstract

To provide a semiconductor device that realizes a structure in which a channel is formed at a positive threshold voltage at which gate voltage of a thin-film transistor (TFT) using an oxide semiconductor film is as close as possible to 0 V, reduces variation in a threshold, prevents deterioration of electrical characteristics, reduces a shift of the TFT toward a normally-on side, and desirably eliminates the shift, and a method for manufacturing the same.SOLUTION: In a process of manufacturing a thin-film transistor, continuous deposition of three layers of a gate insulation film 102, an oxide semiconductor layer (IGZO semiconductor layer 105) and a channel protective film 106 is performed by sputtering without being exposed to atmospheric air. Deposition of the oxide semiconductor layer is performed in an atmosphere where oxygen is contained at a flow ratio of not less than 50% and not more than 100%. An upper layer and a lower layer of a channel formation region of the oxide semiconductor layer are silicon oxynitride films with a nitrogen content of not less than 3 atom% and not more than 30 atom%.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a thin film transistor (hereinafter referred to as TFT) using an oxide semiconductor film in a channel formation region. The present invention relates to a semiconductor device having a circuit configured with a semiconductor device having a semiconductor device and a manufacturing method thereof. The electro-optical device, which is typified by a display panel, and the light-emitting display device having an organic light-emitting element are mounted as components. This relates to electronic devices equipped with

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] There are many types of metal oxides and they are used for various purposes. Indium oxide is well known as It is a material that has been developed and is used as an electrode material with the translucency required for liquid crystal displays, etc. It is being done.

[0004] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include: For example, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Thin film transistors that use metal oxides that exhibit semiconducting properties as their channel formation regions are already known. (Patent Documents 1 to 4, Non-Patent Document 1).

[0005] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, InGaO3(ZnO) with homologous phase m (m: natural number) is In, Ga, and Zn It is known as a multi-component oxide semiconductor having the above structure (Non-Patent Documents 2 to 4).

[0006] Then, the oxide semiconductor composed of the above-mentioned In-Ga-Zn-based oxide is used as a thin film transistor. It has been confirmed that it can be used as a channel layer for transistors (Patent Document 5, Non-Patent Document References 5 and 6). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 1988-1986 [Patent Document 2] Japanese Patent Application Publication No. 8-264794 [Patent Document 3] Special Publication No. 11-505377 [Patent Document 4] Japanese Patent Application Laid-Open No. 2000-150900 [Patent Document 5] Japanese Patent Application Laid-Open No. 2004-103957 [Non-patent literature]

[0008] [Non-Patent Document 1] MW Prins, KO Grosse-Holz, G. Muller, JFM Cillessen, JB Giesbers, RP Weening, and RM Wolf, "A ferroelectric transparent thin-film transistor", Appl. Phys. Lett., 17 June 1996, Vol.68 p.3650-3652 [Non-patent document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315 [Non-patent document 3] N. Kimizuka, M. Isobe, and M. Nakamura, “Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m(m=3,4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m(m=7,8,9, and 16) in the In2O3-ZnGa2O4-ZnO System”, J. Solid State Chem., 1995, Vol.116, p.170-178 [Non-patent document 4] Nakamura, M., Kimizuka, N., Mori, T., and Isobe, M., "Synthesis and Crystal Structure of Homologous Phase, InFeO3(ZnO)m (m: natural number) and Its Isomorphic Compounds," Solid State Physics, 1993, Vol. 28, No. 5, pp. 317-327 [Non-patent document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, "Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor", SCIENCE, 2003, Vol.300, p.1269-1272 [Non-patent document 6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors", NATURE, 2004, Vol.432 p.488-492 Summary of the Invention [Problem to be solved by the invention]

[0009] Thin film transistors with a channel formation region in an oxide semiconductor are made of amorphous silicon. A higher field effect mobility was obtained than in the thin film transistor used.

[0010] Using such oxide semiconductors, thin film transistors can be formed on glass substrates, plastic substrates, etc. Forming liquid crystal displays, electroluminescent displays, electronic paper, etc. It is expected that this technology will be applied to display devices.

[0011] In an active matrix display device, the electrical properties of the thin film transistors that make up the circuit The electrical characteristics are important, and these characteristics determine the performance of the display device. Among the electrical properties of the semiconductor, the threshold voltage (Vth) is important. The higher the field-effect mobility, the better. However, even if the field effect mobility is high, the threshold voltage value may be high or the threshold voltage may be low. If the threshold voltage is negative, it is difficult to control the circuit. In the case of a thin film transistor with a high absolute value of the threshold voltage, the driving voltage is low. In this case, the TFT will not be able to perform its switching function and may become a load. In addition, if the threshold voltage is negative, the source electrode and drain electrode Current flows between the poles, which is called a normally-on state.

[0012] In the case of an n-channel thin film transistor, the channel is first generated when a positive voltage is applied to the gate. A transistor in which a channel is formed and a drain current flows out is desirable. There are transistors in which a channel does not form unless a negative voltage is applied, and transistors in which a channel forms even under negative voltage conditions. A transistor that allows drain current to flow is not suitable for use as a thin-film transistor in a circuit. be.

[0013] The gate voltage of a thin film transistor using an oxide semiconductor film is set to a positive threshold as close as possible to 0V. One of the objects of the present invention is to provide a structure in which a channel is formed at a low voltage.

[0014] In addition, it is also possible to reduce variations in the electrical characteristics of thin film transistors using oxide semiconductor films. In particular, in liquid crystal display devices, there is a large variation between individual elements. In this case, there is a risk of display unevenness occurring due to variations in the TFT characteristics.

[0015] In addition, in a display device having a light-emitting element, the pixel electrode is arranged so that a constant current flows through it. The TFT (which supplies current to the driver circuit or the light-emitting element arranged in the pixel) current (I on If the variation in the brightness of the display screen is large, the brightness may vary. There is a problem.

[0016] An object of the present invention is to provide a highly reliable semiconductor device using an oxide semiconductor.

[0017] One embodiment of the invention disclosed in this specification solves at least one of the above problems. [Means for solving the problem]

[0018] In order to improve the characteristics of the oxide semiconductor layer and reduce the variation in characteristics, It is important to reduce the hydrogen concentration in the layer.

[0019] Therefore, by using oxide semiconductors with thoroughly reduced hydrogen content, This improves the electrical properties of the transistor and also reduces the variation in properties, resulting in a highly reliable thin film transistor. To realize a transistor.

[0020] The characteristics of a thin film transistor in which a channel formation region is formed in an oxide semiconductor are Interfaces, i.e., the interface between the oxide semiconductor layer and the gate insulating film, and the interface between the oxide semiconductor layer and the protective insulating film The characteristics of the oxide semiconductor layer itself are affected by the interface between the oxide semiconductor layer and the electrode. is also greatly affected.

[0021] These interfaces are formed in a clean state, so the gate insulating film and the oxide film are formed without contact with the atmosphere. The semiconductor layer and the channel protection film are formed successively. Preferably, these three layers are formed successively under reduced pressure. By performing the diagenesis, an oxide semiconductor layer with a good interface can be realized, and leakage current when the TFT is off can be reduced. It is possible to realize a thin film transistor having a low current and a high current driving capability. The oxide semiconductor layer is formed by using oxygen at a flow rate of 50% or more and 100% or less, preferably 70% or more. By performing sputtering in an atmosphere containing 100% or less of hydrogen, it is possible to prevent hydrogen from being introduced into the oxide semiconductor layer. Contamination can be prevented.

[0022] The oxide semiconductor film may be formed by using a group 1 element (e.g., lithium (Li), sodium (N a), potassium (K), rubidium (Rb), cesium (Cs), group 13 elements (e.g. , boron (B), gallium (Ga), indium (In), thallium (Tl), group 14 Elements (e.g., carbon (C), silicon (Si), germanium (Ge), tin (Sn), lead (Pb), group 15 elements (e.g., nitrogen (N), phosphorus (P), arsenic (As), antimony (Ant), Sb, Bi) or group 17 elements (e.g., fluorine (F), chlorine (Cl) One or more of the impurity elements such as iodine (I), bromine (Br), and iodine (I) are added. The amorphous state, polycrystalline state, or amorphous and polycrystalline state of zinc oxide (ZnO) Oxide semiconductors in a microcrystalline (also called microcrystalline) state, which includes a mixture of crystalline and non-crystalline states. Alternatively, an amorphous state of zinc oxide to which no impurity elements are added can be used. The oxide semiconductor is in a polycrystalline state or a microcrystalline state in which an amorphous state and a polycrystalline state are mixed. It is possible.

[0023] A specific example is magnesium zinc oxide (Mg x Zn (1-x) O) or oxidized CdZn x Zn (1-x) Oxide semiconductors such as cadmium oxide (CdO) In-Ga-Zn-O oxides, such as InGaO3(ZnO)5 Semiconductors (a-IGZO), In-Sn-Zn-O oxide semiconductors, Ga-Sn-Zn- O-based oxide semiconductors, In-Zn-O-based oxide semiconductors, Sn-Zn-O-based oxide semiconductors In-Sn-O based oxide semiconductors or Ga-Zn-O based oxide semiconductors It should be noted that the In-Ga-Zn-O oxide semiconductor is an energy Since the material has a wide energy gap (Eg), two gate electrodes are placed above and below the oxide semiconductor film. Even if an electrode is provided, an increase in the off-state current can be suppressed, which is preferable.

[0024] In addition, the oxide semiconductor film was formed by sputtering using an oxide semiconductor target containing SiOx. An oxide semiconductor film containing silicon oxide obtained by the method described above may be used, and typically, SiO2 An oxide semiconductor containing 0.1% by weight or more and 20% by weight or less, preferably 1% by weight or more and 6% by weight or less The film is formed using a conductive target, and SiOx(X> 0), the gate voltage of the thin film transistor is set to a positive threshold as close as possible to 0V. It is possible to realize a thin film transistor in which a channel is formed at a low voltage.

[0025] The oxide semiconductor layer is formed by gas phase methods such as pulsed laser deposition (PLD) and electron beam deposition. However, from the viewpoint of reducing hydrogen, it is preferable to use a spatula formed in an atmosphere of only oxygen. Generally, sputtering is performed in an atmosphere containing rare gases such as Ar and Kr. However, these rare gas elements have a larger mass than oxygen, so they are difficult to sputter. Sometimes, moisture or hydrogen-containing hydrocarbons adhering to the inner walls of the deposition chamber or jigs This may promote gas desorption.

[0026] By using only oxygen in the sputtering atmosphere, the deposition chamber inner wall and jigs are free from adhesion. However, in order to increase the deposition rate, the deposition chamber Oxygen and rare gases may be mixed and used as long as it does not affect the desorption of gas from the inner wall, etc. Specifically, the oxygen flow rate is set to 50% or more and 100% or less, preferably 70% or more and 100% or less. The heating may be carried out in a heated atmosphere.

[0027] One embodiment of the invention disclosed in this specification is a method for forming a gate electrode over a substrate having an insulating surface, A first insulating film is formed on the gate electrode, and oxygen is supplied to the first insulating film at a flow rate ratio of 50% to 100%. Preferably, the oxide semiconductor is formed by sputtering in an atmosphere containing 70% or more and 100% or less. A conductive layer and a second insulating film are laminated on the oxide semiconductor layer without being exposed to the air. The insulating film is selectively etched to form a protective film at the position where it overlaps with the gate electrode, and the oxide semiconductor a conductive film is formed over the oxide semiconductor layer and the protective film, and the conductive film and the oxide semiconductor layer are selectively etched. A method for fabricating a semiconductor device.

[0028] Another embodiment of the invention disclosed in this specification is a method for forming a gate electrode over a substrate having an insulating surface. Then, a first insulating film is formed on the gate electrode, a conductive film is formed on the first insulating film, and the conductive film is The source electrode or the drain electrode is formed by selective etching, and the first insulating film and the source electrode are formed by selective etching. Oxygen is supplied to the source or drain electrode at a flow rate of 50% or more and 100% or less, preferably 70%. An oxide semiconductor layer formed by sputtering in an atmosphere containing 0% or more and 100% or less of an acid A second insulating film is laminated on the oxide semiconductor layer without exposing it to the air, and the second insulating film and the oxide The semiconductor layer is selectively etched to form a protective film and an island-shaped semiconductor layer, and the protective film and the island-shaped semiconductor layer are This is a method for manufacturing a semiconductor device in which a third insulating film is formed to cover the conductor layer.

[0029] The present invention solves at least one of the above problems.

[0030] In the above manufacturing process, it is also preferable to use silicon oxynitride films for the first insulating film and the second insulating film. By sandwiching the oxide semiconductor layer between silicon oxynitride films, The silicon oxynitride film can be formed by: For example, silicon or silicon oxide is sputtered onto a sputtering target in an atmosphere containing oxygen and nitrogen. It may be performed by a sputtering method using a high density plasma CVD method or the like. When forming a film by the CVD method, the reaction gas is, for example, silane, Nitrous oxide and nitrogen may be used in appropriate mixture.

[0031] There are two types of sputtering methods: RF sputtering, which uses a high frequency power supply for the sputtering power source, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal films. It is used for.

[0032] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0033] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There are also sputtering devices that use this method.

[0034] The first insulating film or the second insulating film may be an insulating film such as a silicon oxide film or a silicon nitride film. However, by using a silicon oxynitride film with a nitrogen content of 3 atomic % or more and 30 atomic % or less, The insulating film can be formed by the following steps: It is preferable to carry out the process under conditions that do not cause hysteresis or charge-up in the thin film transistor. It's nice.

[0035] In addition, in the formation of an oxide semiconductor film by sputtering, a film containing at least In, Ga, and Zn is used. An oxide semiconductor target containing hydrogen must be used, but the hydrogen concentration in the target must be kept as low as possible. In general oxide semiconductor targets, 10 2 0 Over 10 21 atoms / cm 3 The following hydrogens are included, but 19 atoms / cm 3 It is desirable to do the following:

[0036] The target is generally made by bonding the target material to a metal plate called a backing plate. The oxide semiconductor target material is, for example, In (indium), Oxides containing Ga (gallium) and Zn (zinc) in the same ratio (In2O3:Ga2O3: ZnO = 1:1:1 [molar ratio]) and sintered at high temperatures above 800°C By sintering in an inert gas atmosphere (nitrogen or rare gas atmosphere), the target This prevents hydrogen, moisture, hydrocarbons, etc. from being mixed into the sintered material. The process may be carried out in a vacuum or a high-pressure atmosphere, or may be carried out while applying mechanical pressure. good.

[0037] The target material may be amorphous or crystalline. SiO2 is contained in an amount of 0.1% by weight or more and 20% by weight or less, preferably 1% by weight or more and 6% by weight or less. In this specification, unless otherwise specified, the target material This is sometimes referred to as the target.

[0038] The backing plate generally serves to cool the target material and act as a sputtering electrode. Therefore, copper is often used because of its excellent thermal and electrical conductivity. A cooling path is formed on the back surface, and water, oil, etc. is circulated through the cooling path as a coolant to reduce the target temperature. However, since the evaporation temperature of water is 100°C, If you want to keep the get above 100°C, it is better to use oil or fat instead of water.

[0039] The target material and backing plate can be bonded together by electron beam welding, for example. Electron beam welding is a method of welding a workpiece by accelerating and converging electrons generated in a vacuum atmosphere. By irradiating the laser beam directly onto the target area, only the area to be welded is melted, and the material properties of the area other than the weld are not damaged. It is possible to control the weld shape and penetration depth, and it can be used in a vacuum. Because welding is performed in the atmosphere, hydrogen, moisture, hydrocarbons, etc. may adhere to the target material. This can be prevented.

[0040] When transporting the prepared target, the target is placed in a vacuum or inert gas atmosphere. This is done while the sample is held in a nitrogen or rare gas atmosphere. This can prevent hydrogen, moisture, hydrocarbons, etc. from adhering to the get.

[0041] When installing the target in the sputtering device, do not expose it to the atmosphere, but place it in an inert gas atmosphere (nitrogen or By performing the process under a rare gas atmosphere, hydrogen, moisture, hydrocarbons, etc. are attached to the target. It can prevent wear.

[0042] After the target is installed in the sputtering device, the remaining material on the surface or inside of the target material It is recommended to perform dehydrogenation treatment to remove hydrogen. Heating to 200°C or higher and 600°C or lower under reduced pressure, or heating in a nitrogen or inert gas atmosphere In this case, the target coolant is not water but oil, etc. Repeated introduction and evacuation of nitrogen without heating can also produce a certain effect, but It is better to heat the film while it is being formed. Both oxygen and inert gas are introduced, and the inert gas and oxygen are mixed using high frequency or microwaves. You can get some effect without heating, but it is better to do it with heating. It's even better if you do.

[0043] The vacuum pump used in the vacuum device such as the sputtering device is, for example, a cryopump. A cryopump is a device that uses a cryogenic surface installed in a vacuum chamber to pump gas molecules into the vacuum chamber. This pump captures and exhausts hydrogen and moisture through condensation or adsorption, and has a high pumping capacity for hydrogen and moisture.

[0044] In particular, the first insulating film, the oxide semiconductor, and the second insulating film are formed by the above-mentioned heating and other techniques. This is carried out after the hydrogen, moisture and hydrocarbons in the atmosphere have been sufficiently reduced by using an appropriate amount of HCl.

[0045] The gases used in the production of thin film transistors contain extremely high concentrations of hydrogen, water, hydrocarbons, etc. It is desirable to use high-purity gas with reduced pressure. By providing this, it is possible to further improve the gas purity. It is recommended to use a gas filtration rate of 9.9999% or higher. Also, to prevent gas from entering through the inner wall of the gas piping, Therefore, gas piping with its inner surface mirror-polished and passivated with Cr2O3 or Al2O3 is used. For pipe joints and valves, use all-metal valves that do not use resin in the sealing parts. It is good to use.

[0046] In this specification, continuous film formation refers to a series of processes from the first film formation step to the second film formation step. The atmosphere in which the substrate is placed is always in vacuum, without coming into contact with contaminated atmospheres such as the air. Or it means that it is controlled in an inert gas atmosphere (nitrogen atmosphere or rare gas atmosphere). By performing continuous film formation, hydrogen, moisture, and hydrocarbons are released from the cleaned substrate. Therefore, the film can be formed while avoiding redeposition of ions and the like.

[0047] The conductive film also functions as a source electrode or a drain electrode. or heat-resistant materials such as copper, silicon, titanium, neodymium, scandium, molybdenum, etc. Formed by a single layer or multilayer of aluminum alloy with added elements or hillock prevention elements Alternatively, the underside or underside of a single layer or laminate of aluminum or aluminum alloy The upper one or both sides are covered with a high melting point metal layer such as titanium, molybdenum, or tungsten. Among them, a material having excellent interface characteristics with an oxide semiconductor layer is a thiazolinone. In particular, titanium film, aluminum film, and titanium film are used as conductive films. The resistance is low when the aluminum film is sandwiched between titanium films. Hillocks are unlikely to occur, making it suitable for use as a source electrode or drain electrode.

[0048] In addition, a structure further having a silicon nitride film or a silicon oxide film between the gate electrode and the first insulating film is also available. That is, the gate insulating film may be a laminate of two or more layers, and the oxide semiconductor The first insulating film, which is the top layer in contact with the conductor layer, is preferably a silicon oxynitride film. The insulating film provided below the silicon nitride film or the silicon oxide film may be a silicon nitride film or a silicon oxide film. By providing a silicon film, the substrate surface is etched during the TFT manufacturing process. The silicon nitride film or silicon oxide film also acts as an etching stopper to prevent sodium Mobile ions such as sodium penetrate into the semiconductor region from a glass substrate containing alkali metals such as As a result, it is possible to suppress changes in the electrical characteristics of the TFT. [Effects of the Invention]

[0049] The gate voltage of a thin film transistor using an oxide semiconductor film is set to a positive threshold as close as possible to 0V. It is possible to realize a structure in which a channel is formed at a low voltage. It reduces the risk of electric shock, prevents deterioration of electrical characteristics, and reduces the shift of TFT to the normally-on side. This can reduce, and preferably eliminate, shifting. [Brief explanation of the drawings]

[0050] [Figure 1] 1A to 1C are cross-sectional views illustrating a manufacturing process of a thin film transistor according to one embodiment of the present invention. [Figure 2] 1A to 1C are cross-sectional views illustrating a manufacturing process of a thin film transistor according to one embodiment of the present invention. [Figure 3] 1A to 1C are cross-sectional views illustrating a manufacturing process of a thin film transistor according to one embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a manufacturing process of a thin film transistor according to one embodiment of the present invention. [Figure 5] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 6] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 7] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 8] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 9] FIG. 2 is a diagram illustrating the configuration of a shift register. [Figure 10] FIG. 2 is a diagram illustrating a connection configuration of a flip-flop. [Figure 11] 1A to 1C illustrate a semiconductor device according to one embodiment of the present invention. [Figure 12] 1A to 1C illustrate a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A to 1C illustrate a semiconductor device according to one embodiment of the present invention. [Figure 14] FIG. 1 illustrates a pixel equivalent circuit of a semiconductor device according to one embodiment of the present invention. [Figure 15] 1A to 1C illustrate a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A to 1C illustrate a semiconductor device according to one embodiment of the present invention. [Figure 17] 1A and 1B are diagrams illustrating examples of usage of electronic paper. [Figure 18] FIG. 1 is an external view showing one form of an electronic book. [Figure 19] FIG. 1 is an external view showing an embodiment of a television device and a digital photo frame. [Figure 20] 1 is an external view showing one embodiment of a gaming machine. [Figure 21] FIG. 1 is an external view showing one embodiment of a mobile phone. [Figure 22] 1A and 1B are diagrams illustrating one form of an e-book. [Figure 23] 1A and 1B are diagrams illustrating one form of an e-book. [Figure 24] 1A to 1C are cross-sectional views illustrating a manufacturing process of a thin film transistor according to one embodiment of the present invention. [Figure 25] 10A and 10B show the results of measuring the Hall effect of an oxide semiconductor. [Figure 26] Graph showing XRD measurement results of oxide semiconductor layer DETAILED DESCRIPTION OF THE INVENTION

[0051] An embodiment of the present invention will be described below.

[0052] (Embodiment 1) In this embodiment, a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. .

[0053] First, a gate electrode 101 is formed on a substrate 100 (see FIG. 1(A)).

[0054] The substrate 100 is made of barium borosilicate glass, aluminoborosilicate glass, or aluminum Alkali-free glass substrates such as nosilicate glass, manufactured by the fusion method or float method In addition to ceramic substrates, plastic substrates that are heat resistant and can withstand the processing temperatures of this manufacturing process are also available. In addition, a metal substrate such as a stainless steel alloy having an insulating film on its surface can be used. The size of the substrate 100 may be 320 mm x 400 mm, 370 mm x 100 mm, or 470mm, 550mm×650mm, 600mm×720mm, 680mm×880m m, 730mm x 920mm, 1000mm x 1200mm, 1100mm x 1250m m, 1150mm x 1300mm, 1500mm x 1800mm, 1900mm x 220 0mm, 2160mm x 2460mm, 2400mm x 2800mm, or 2850m m x 3050 mm, etc. can be used.

[0055] Furthermore, a base insulating film may be formed on the substrate 100 before the gate electrode 101 is formed. The base insulating film is made of silicon oxide film, silicon nitride film, or the like, using the CVD method or sputtering method. The insulating base may be formed of a single layer or a stack of silicon oxynitride films or silicon nitride oxide films. A small amount of halogen elements, such as fluorine or chlorine, is added to the membrane, and mobile ions such as sodium are The concentration of the halogen element contained in the insulating film can be determined by SIMS (secondary in situ mass spectrometry). The concentration peak obtained by analysis using a ion mass spectrometer is 1×10 15 cm -3 1 x10 20 cm -3 It is preferable to set it within the following range.

[0056] The gate electrode 101 is made of titanium, molybdenum, chromium, tantalum, tungsten, aluminum, or the like. The gate electrode 101 is formed by sputtering. A conductive film is formed on the substrate 100 by a deposition method or a vacuum deposition method, and then photolithography is performed on the conductive film. A mask is formed by inkjet printing or inkjet printing, and a conductive film is then etched using the mask. It can be formed by etching. Also, conductive nanopaste such as silver, gold, copper, etc. The gate electrode 101 can also be formed by discharging the material by an ink jet method using the material and baking it. In addition, a barrier metal layer is formed to improve the adhesion of the gate electrode 101 and prevent diffusion into the substrate or the underlying film. As an alternative, a nitride film of the above metal material may be provided between the substrate 100 and the gate electrode 101. The gate electrode 101 may have a single layer structure or a multilayer structure. From the 0 side, a stack of molybdenum film and aluminum film, a molybdenum film, aluminum and neodymium film Lamination of titanium and aluminum alloy film, lamination of titanium and aluminum film, titanium film, aluminum film Alternatively, a laminate with a titanium film or the like can be used.

[0057] Here, a laminated film of an aluminum film and a molybdenum film is formed by sputtering, and a photo Selective etching is performed using lithography technology. Here, the first photomask is used. In addition, since a semiconductor film and wiring are formed on the gate electrode 101, It is desirable to process the end portion so that it has a tapered shape.

[0058] Next, a first insulating film 102 which will become a gate insulating film, a semiconductor film 103, and a second insulating film 104 are formed. The film is formed continuously without contact with the atmosphere (see Figure 1(B)). Continuous film formation without any heat treatment results in high productivity and stable reliability of the thin film interface. Each volume is free from contamination by moisture, hydrocarbons, and other contaminant impurities contained in A layer interface can be formed, and hydrogen can be prevented from being incorporated into the semiconductor film. .

[0059] The first insulating film 102 and the second insulating film 104 are formed by using a CVD method, a sputtering method, or the like. The insulating film can be formed of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. Here, the first insulating film 102 and the second insulating film 104 are formed by RF sputtering. A silicon oxynitride film having a nitrogen content of 3 atomic % or more and 30 atomic % or less is formed by a nitrogen deposition method. By using a silicon oxynitride film with a content of 3 atomic % or more and 30 atomic % or less, the semiconductor film 103 The insulating film can prevent the penetration or diffusion of hydrogen, moisture, etc. into the thin film transistor. It is preferable to carry out the process under conditions that do not cause hysteresis or charge-up in the stamper.

[0060] The first insulating film 102 may also be a laminate of two or more layers. The uppermost film in contact with the substrate layer is preferably a silicon oxynitride film, but the insulating film provided below it is The lower layer may be a silicon nitride film or a silicon oxide film. When a material that may cause hillocks is used, this also has the effect of preventing the occurrence of hillocks.

[0061] As the semiconductor film 103, an oxide semiconductor layer (IGZO semiconductor layer) is formed by DC magnetron sputtering. In this specification, oxide semiconductors containing In, Ga, and Zn are used. The semiconductor layer formed using the film is also referred to as the "IGZO semiconductor layer." In this case, the composition ratio of the metal elements has a high degree of freedom, and the layer functions as a semiconductor over a wide range of mixture ratios. For example, indium oxide containing 10% by weight of zinc oxide, or indium oxide and gallium oxide The ratio of metal elements in the film is In:Ga:Z. As an example, an oxide that exists in a ratio of n=2.2:2.2:1.0 [atom ratio] can be given. In order to reduce the variations in the electrical characteristics of thin-film transistors, The body layer is preferably in an amorphous state.

[0062] The semiconductor film 103 is formed in an atmosphere containing only oxygen. It is often performed in an atmosphere containing rare gases such as r, but these rare gas elements are more soluble than oxygen. Because of its large mass, moisture and heat that adhered to the inner walls of the deposition chamber and jigs during sputtering However, it accelerates the deposition rate and promotes the desorption of gases containing hydrogen, such as hydrocarbons. In order to achieve this, oxygen and rare gases are mixed within a range that does not affect the desorption of gases from the inner walls of the deposition chamber. Specifically, oxygen should be mixed at a flow rate of 50% or more and 100% or less, preferably 7% or less. The semiconductor film 103 may be formed in an atmosphere having a humidity of 0% or more and 100% or less. The substrate temperature is preferably set to be equal to or higher than room temperature (25°C) and lower than 200°C.

[0063] Next, in order to pattern the semiconductor film 103, the second insulating film 104 is selectively etched. Then, the semiconductor film 103 is selectively etched to form an insulator 106. The semiconductor layer 105 is formed by dry etching using chlorine gas. The insulator 106 functions as a channel protection film. At this stage, the semiconductor film 103 is removed. The surface of the gate insulating film is exposed in the region where the second photomask is used. The mask formed on the second insulating film 104 during patterning is ashy under an oxygen atmosphere. The cross-sectional structure of the substrate at this stage is shown in Figure 1(C). (See Figure 1(C)). Eliminate moisture as much as possible from the manufacturing process of thin film transistors. Therefore, subsequent washing with water is not necessary.

[0064] Next, heat treatment is carried out at a temperature of 200°C to 600°C, typically 300°C to 500°C. Here, it is preferable to heat the material in a furnace at 350°C for 1 hour in a nitrogen atmosphere containing oxygen. This heat treatment causes rearrangement at the atomic level in the IGZO semiconductor layer 105. This heat treatment (including optical annealing) releases the strain that inhibits carrier movement. The timing of the heat treatment is not particularly limited as long as it is performed after the semiconductor film 103 is formed. In this embodiment, the IGZO semiconductor layer 105 is covered with an insulator 106. Therefore, it is possible to reduce the deterioration of the IGZO semiconductor layer 105 after the heat treatment, which is preferable. .

[0065] Next, a part of the insulator 106 is further removed, and the source electrode 108 or drain electrode 108 to be formed later is removed. Contact holes (openings) for connecting the rain electrode 109 and the IGZO semiconductor layer 105 107 is formed. A part of the IGZO semiconductor layer 105 is exposed by selective etching. Photolithography is used to form a contact hole (opening) 107. Here, a third photomask is used. Etching is dry etching using chlorine gas. The etching for forming the contact hole (opening) 107 is performed by I The etching rate is set to be sufficiently different from that of the GZO semiconductor layer 105. Only the insulator 106 is selectively removed by irradiation, forming a contact hole (opening) 107. You may do so.

[0066] The contact hole (opening) 107 is formed by hydrogen given to the IGZO semiconductor layer 105 during its formation. It is advisable to make it as small as possible to eliminate the influence of air, moisture, hydrocarbons, etc. If the size is too small, the characteristics of the completed thin film transistor cannot be fully utilized. Therefore, it is best to make it as small as possible without causing any adverse effect.

[0067] Next, a metal multilayer film that will become the source electrode or drain electrode is formed. Using magnetron sputtering, an aluminum film is laminated on the titanium film, and then an aluminum film is A titanium film is laminated on an aluminum film. A titanium target and an aluminum target are placed in the sputtering chamber. Both the aluminum target and the aluminum target are set up, and the film is continuously formed by stacking them in order using a shutter. By using this method, it is possible to perform continuous deposition in the same chamber. This may be done in an atmosphere of only the rare gas. The insulating film 102 and the second insulating film 104 sandwich the IGZO semiconductor layer 105. The channel formation region in the chamber absorbs hydrogen, water, and hydrochloric acid due to gas desorption from the inner wall of the chamber. This is because it is not affected by factors such as bonnets.

[0068] In addition, before the formation of the metal multilayer film, a reverse layer is formed on the IGZO semiconductor layer in the contact hole (opening) 107. By performing sputtering, etching of about 10 nm may be performed. - No voltage is applied to the target side, and voltage is applied to the substrate side in an inert gas or oxygen atmosphere. This is a method of etching the surface by forming plasma on the substrate side. A good interface state can be achieved between the ZO semiconductor layer and the metal multilayer film, reducing contact resistance.

[0069] In addition, an oxide semiconductor film is formed as a buffer layer between the IGZO semiconductor layer and the metal multilayer film. For example, titanium oxide, molybdenum oxide, zinc oxide, indium oxide, tungsten oxide, Stainless steel, magnesium oxide, calcium oxide, tin oxide, etc. can be used. Al-Zn-O based non-single crystal film or Al-Zn-O based non-single crystal film containing nitrogen, i.e., A An Al-Zn-O based non-single crystal film may also be used. The aluminum content of the l-Zn-ON oxide semiconductor is 1% by weight or more and 10% by weight or less. Preferably, it is below.

[0070] The Al-Zn-ON oxide semiconductor film referred to here is an oxide semiconductor film having a stoichiometric ratio of Al:Zn: This does not mean that O:N=1:1:1:1, but is simply written for ease of notation. The composition ratio of these elements can be adjusted appropriately by adjusting the film formation conditions.

[0071] The buffer layer may contain impurities that impart n-type or p-type conductivity. The element may be indium, gallium, aluminum, zinc, tin, or the like.

[0072] The carrier concentration of the buffer layer is higher than that of the IGZO semiconductor layer, and it has excellent conductivity. Reduced contact resistance compared to direct contact between the electrode or drain electrode and the IGZO semiconductor layer It is possible to do this.

[0073] The buffer layer may also be referred to as a drain region or a source region.

[0074] Next, the metal multilayer film is selectively etched to form the source electrode 108 or the drain electrode 109 is formed. Here, a fourth photomask is used. The titanium film and the aluminum film are The three-layer conductive film, which is made by stacking a titanium film in order, is formed by dry etching using chlorine gas. A buffer layer is formed between the IGZO semiconductor layer and the metal multilayer film. Even if the buffer layer is formed, the buffer layer can be etched simultaneously with the etching of the metal multilayer film. The cross-sectional structure of the substrate at this stage corresponds to the cross-sectional view of the substrate shown in FIG. 1(E) (FIG. 1( See E). ).

[0075] In this embodiment, the channel forming region is formed in the IGZO semiconductor layer 105 by applying a gate voltage In the area where the electrode 101 and the IGZO semiconductor layer 105 overlap, the source electrode 108 is made of IGZO. The drain electrode 104 is connected to the semiconductor layer 105 through an end of a contact hole (opening) 107. A contact hole (opening) 107 for connecting the electrode 109 to the IGZO semiconductor layer 105 The length L1 in FIG. 1(D) corresponds to the channel length.

[0076] The channel forming region of the IGZO semiconductor layer 105 is formed by a nitrogen content of 3 atomic % or more and 30 atomic % or more. By sandwiching the silicon oxynitride film underneath, hydrogen or moisture can be prevented from penetrating into the channel forming region. The formation of a silicon oxynitride film can prevent hysteresis and It is preferable to carry out the treatment under conditions that do not cause charge-up.

[0077] (Embodiment 2) In this embodiment mode, a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. Note that the same parts as those in the first embodiment or parts having similar functions and steps are explained below. The clarification is omitted.

[0078] First, a gate electrode 201 is formed on a substrate 200. Here, a first photomask is used. (See Figure 2(A)).

[0079] Next, a first insulating film 202 which will become a gate insulating film, a first semiconductor film 203, and a second insulating film 204 are formed. The insulating film 204 is continuously formed without being exposed to the air (see FIG. 2(B)). The first insulating film 202 and the second insulating film 204 are formed by RF sputtering. A silicon oxynitride film having a content of 3 atomic % or more and 30 atomic % or less is formed, and the first semiconductor film 203 The oxide semiconductor layer is made of an oxide semiconductor (ZnO) containing Zn (zinc) with SiO2 at 0. DC magnetron spa using an oxide semiconductor target containing 1% to 20% by weight As described in Embodiment 1, the oxide semiconductor layer is formed by a deposition method using oxygen alone. The oxygen flow rate is 50% or more and 100% or less, preferably 70% or more and 10 The concentration may be set to 0% or less and the treatment may be performed in an atmosphere mixed with a rare gas. During film formation, the substrate temperature is preferably set to be equal to or higher than room temperature (25°C) and lower than 200°C.

[0080] Next, the second insulating film 204 is formed at a position overlapping the gate electrode and at a position overlapping the channel of the first semiconductor film 203. Etching is performed leaving only the portion overlapping with the position where the hole is to be formed, and an insulator 206 is formed. The insulator 206 functions as a channel protection film. Photolithography is used to form the object 206. The etching for forming the insulator 206 here is a dry etching method. The etching rate is sufficiently different from that of the first semiconductor film 203 (FIG. 2( The mask formed on the second insulating film 204 during patterning is removed in an oxygen atmosphere. The moisture is removed by ashing below. Therefore, subsequent washing with water is not necessary.

[0081] Furthermore, when forming the insulator 206, a self-alignment method is performed using backside exposure without using a photomask. A mask can be selectively formed at a position overlapping the gate electrode. The body film 203 is an oxide semiconductor film, which has high light transmittance and is suitable for backside exposure. However, when performing backside exposure, the first insulating film 202 and the second insulating film 204 must be sufficiently The material must be light-transmitting.

[0082] Next, heat treatment is carried out at a temperature of 200°C to 600°C, typically 300°C to 500°C. Here, it is preferable to heat the material in a furnace at 350°C for 1 hour in a nitrogen atmosphere containing oxygen. This heat treatment causes rearrangement of the first semiconductor film 203 at the atomic level. This heat treatment (including optical annealing) relieves the strain that inhibits carrier movement. The timing of the heat treatment is not particularly limited as long as it is performed after the first semiconductor film 203 is formed. In this embodiment, the first semiconductor film 203 is covered with an insulator 206. Therefore, it is possible to reduce the deterioration of the first semiconductor film 203 after the heat treatment, which is preferable. .

[0083] Next, a second semiconductor film 212 that will be a buffer layer and a source electrode or a drain electrode are formed. Here, a DC magnetron sputtering method is used to form a metal multilayer film 211. A titanium oxide film is formed as the second semiconductor film 212, and a second semiconductor film is formed as the metal multilayer film 211. A titanium film is laminated on the body film 212, an aluminum film is laminated on the titanium film, and an aluminum film is further laminated on the titanium film. A titanium film is laminated on the aluminum film (see FIG. 2(D)).

[0084] The carrier concentration of the second semiconductor film 212, which serves as a buffer layer, is higher than that of the oxide semiconductor layer. This has superior properties compared to when the source or drain electrode is directly bonded to the semiconductor layer. The provision of a buffer layer can reduce the contact resistance.

[0085] After the formation of the second semiconductor film 212 that will be the buffer layer, the temperature is set to 200° C. or more and 600° C. or less, typically In general, it is preferable to perform heat treatment at a temperature between 300°C and 500°C. The second semiconductor is then subjected to a heat treatment at 350°C for 1 hour in a nitrogen atmosphere containing silicon. This heat treatment (including photo-annealing) causes rearrangement at the atomic level of the semiconductor film 212. The distortion that hinders the carrier's movement is released.

[0086] Next, the metal laminate film is selectively etched to form the source electrode 208 or the drain electrode 209 is formed. Here, a third photomask is used. Etching is performed by dry etching. At this time, the metal multilayer film 211, the second semiconductor film 212, and the first semiconductor film 203 By performing etching under conditions that allow etching of any of the above, the source electrode 208, The drain electrode 209, the source-side buffer layer 213, the drain-side buffer layer 214, and The formation of the semiconductor layer 205 can be performed in the same etching process. The insulating layer 204 functions as a protective film for the panel, preventing the semiconductor layer 205 in the channel forming region from being etched. Prevent this (see Figure 2(E)).

[0087] In this embodiment, the channel forming region is formed in the semiconductor layer 205 by the gate electrode 201. The semiconductor layer 205 and the insulator 206 overlap each other, and the width L2 of the insulator 206 is This corresponds to the channel length.

[0088] The upper and lower layers of the channel forming region of the semiconductor layer 205 are provided with a nitrogen content of 3 atomic % or more. A silicon oxynitride film having a thickness of 0.1% or less is formed, and a channel forming region is sandwiched between the silicon oxynitride films. This can prevent hydrogen, moisture, etc. from penetrating or diffusing into the channel forming region. .

[0089] In order to prevent the intrusion or diffusion of hydrogen, moisture, etc. from the side of the semiconductor layer, The third insulating film 210 may be formed so as to cover the electrode. The third insulating film 210 may be formed of silicon oxide. The insulating film can be formed of a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. For example, a silicon oxynitride film having a nitrogen content of 3 atomic % or more and 30 atomic % or less is formed by sputtering. By using a silicon oxynitride film with a nitrogen content of 3 to 30 atomic %, a thin film transistor can be formed. It is possible to prevent the penetration or diffusion of hydrogen, water, hydrocarbons, etc. into the gas barrier. The silicon nitride film is formed under conditions that do not cause hysteresis or charge-up in the thin film transistor. It is preferable to do this in the following cases.

[0090] (Embodiment 3) In this embodiment mode, a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. Note that the same parts as those in the first embodiment or parts having similar functions and steps are explained below. The clarification is omitted.

[0091] First, a gate electrode 301 is formed on a substrate 300. Here, a first photomask is used. do.

[0092] Next, a first insulating film 302 which will be a gate insulating film and a second insulating film 303 which will be a source electrode or a drain electrode are formed. Then, a metal multilayer film 311 is formed.

[0093] The first insulating film 302 is a silicon oxide film or a silicon nitride film formed by using a CVD method, a sputtering method, or the like. The first insulating film can be formed of a silicon oxynitride film, a silicon nitride oxide film, or a silicon nitride oxide film. The insulating film 302 is formed by RF sputtering with a nitrogen content of 3 atomic % to 30 atomic %. The following silicon oxynitride film is formed.

[0094] The metal multilayer film 311 that becomes the source electrode or the drain electrode is formed by DC magnetron sputtering. An aluminum film is laminated on the titanium film using a method described above, and a titanium film is further laminated on the aluminum film. Laminate the layers. (See Figure 3(A))

[0095] The metal multilayer film is then selectively etched to form the source electrode 308 or the drain electrode 309. The electrode 309 is formed. Here, a second photomask is used (see FIG. 3(B)).

[0096] Next, a semiconductor film 303 and a second insulating film 304 are successively formed without exposure to the air. As the semiconductor film 303, zinc oxide containing 10% by weight of silicon oxide was used. The oxide semiconductor layer (ZnO) was deposited by DC magnetron sputtering using a solder target. -SiO X As explained in the first embodiment, an oxide semiconductor (X>0) is used. The deposition of the dielectric layer is carried out in an atmosphere containing only oxygen, and the oxygen flow rate is preferably between 50% and 100%. Preferably, the concentration is 70% or more and 100% or less, and the treatment may be carried out in an atmosphere containing a rare gas. The semiconductor film 303 is preferably formed at a substrate temperature of room temperature (25° C.) or higher and lower than 200° C. I wish.

[0097] Here, the crystallinity evaluation results of the oxide semiconductor layer (ZnO-SiO semiconductor layer) by XRD measurement are as follows: The measurements were carried out by adding 7.5 wt.%, 10 wt.%, and 12 wt.% silicon oxide to zinc oxide. Three types of oxide semiconductor layers (ZnO-SiO We are conducting research on semiconductor layers.

[0098] The XRD measurement results are shown in Figure 26. The horizontal axis represents the rotation angle of the measurement sample and signal detector relative to the incident X-rays. The vertical axis represents the X-ray diffraction intensity (2θ), and the vertical axis represents the X-ray diffraction intensity. Measurement result 601: silicon oxide content 10% by weight Measurement result 602: silicon oxide content 12%. The measurement result 603 of 5% by weight is shown.

[0099] According to the measurement results in FIG. 26, when the silicon oxide content is 7.5 wt %, a peak of 60 4 is detected, but if the silicon oxide content is 10 wt% or more, no peak indicating crystallinity is detected. It is clear that the film is amorphous. X (X>0) If the silicon oxide content of the semiconductor layer is 10% by weight or more, it remains amorphous even after heat treatment at 700°C. You can maintain quality.

[0100] Before forming the semiconductor film 303, the first insulating film 302, the source electrode 308, and the drain electrode The surface of the pole 309 may be etched by about 10 nm by reverse sputtering. By performing reverse sputtering, the first insulating film 302, the source electrode 308 and the drain electrode It is possible to remove hydrogen, moisture, hydrocarbons, etc. adhering to the surface of 309.

[0101] Next, in order to pattern the semiconductor film 303, the second insulating film 304 is selectively etched. Then, the semiconductor film 303 is selectively etched to form an insulator 306. -SiO X (X>0) A semiconductor layer 305 is formed. Here, a third photomask is used. The mask formed on the second insulating film 304 during patterning is then heated in an oxygen atmosphere. The insulator 306 functions as a channel protection film. Dry etching is used to eliminate moisture as much as possible from the manufacturing process of thin film transistors. Subsequent washing with water is not necessary.

[0102] Next, heat treatment is carried out at a temperature of 200°C to 600°C, typically 300°C to 500°C. Here, it is preferable to heat the material in a furnace at 350°C for 1 hour in a nitrogen atmosphere containing oxygen. This heat treatment causes rearrangement at the atomic level in the semiconductor layer 305. The treatment (including photo-annealing) releases the strain that inhibits carrier movement. The timing of the treatment is not particularly limited as long as it is after the semiconductor film 303 is formed. In this embodiment, the semiconductor layer 305 is covered with the insulator 306, so after the heat treatment, This is preferable because deterioration of the semiconductor layer 305 can be reduced.

[0103] In this embodiment, the channel formation region is a ZnO-SiO X(X>0) Semiconductor layer 305 In the figure, the gate electrode 301 and the ZnO-SiO X (X>0) The semiconductor layer 305 overlaps, This is the region sandwiched between the source electrode 308 and the drain electrode 309. The distance L3 to the drain electrode 309 corresponds to the channel length.

[0104] The upper and lower layers of the channel forming region of the semiconductor layer 305 are formed of a material having a nitrogen content of 3 atomic % or more. A silicon oxynitride film having a thickness of 0.1% or less is formed, and a channel forming region is sandwiched between the silicon oxynitride films. This can prevent hydrogen, moisture, etc. from penetrating or diffusing into the channel forming region. The formation of silicon oxynitride film does not cause hysteresis or charge-up in thin film transistors. It is preferable to carry out the process under conditions where no

[0105] In addition, ZnO-SiO X (X>0) Intrusion or diffusion of hydrogen, moisture, etc. from the side of the semiconductor layer To prevent this, a third insulating film 310 may be formed to cover the thin film transistor. The formation of the insulating film 310 is performed in such a manner that hysteresis and charge-up do not occur in the thin film transistor. The third insulating film 310 is preferably a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon dioxide film. The silicon nitride film can be formed by RF sputtering. Alternatively, a silicon oxynitride film having a nitrogen content of 3 atomic % or more and 30 atomic % or less may be formed by a method. By using a silicon oxynitride film with a nitrogen content of 3 atomic % or more and 30 atomic % or less, This can prevent hydrogen, moisture, etc. from penetrating or diffusing into the resistor.

[0106] In addition, ZnO-SiO X (X>0) A buffer layer between the semiconductor layer and the metal multilayer film An oxide semiconductor film may be formed as a layer.

[0107] (Fourth embodiment) In this embodiment, a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. Note that the same parts as those in the first embodiment or parts having similar functions and steps are explained below. The clarification is omitted.

[0108] First, a gate electrode 401 is formed on a substrate 400. Here, a first photomask is used. (See Figure 4(A)).

[0109] Next, a first insulating film 402 which will become a gate insulating film, a first semiconductor film 403, and a second semiconductor film 404 are formed. The conductive film 412 is continuously formed without being exposed to the air (see FIG. 4(B)). The first insulating film 402 is formed by RF sputtering. A silicon oxynitride film of 0 atomic % or less is formed, and an IGZO semiconductor is formed as the first semiconductor film 403. The layer was formed by DC magnetron sputtering, and the second semiconductor film 412 was made of Al-Zn-O The oxide semiconductor film is formed by heating the substrate at room temperature (2 It is preferable that the temperature is between 5°C and 200°C.

[0110] The Al-Zn-ON oxide semiconductor film referred to here is an oxide semiconductor film having a stoichiometric ratio of Al:Zn: This does not mean that O:N=1:1:1:1, but is simply written for ease of notation. The composition ratio of these elements can be adjusted appropriately by adjusting the film formation conditions.

[0111] Next, heat treatment is carried out at a temperature of 200°C to 600°C, typically 300°C to 500°C. Here, it is preferable to heat the material in a furnace at 350°C for 1 hour in a nitrogen atmosphere containing oxygen. This heat treatment forms an IGZO semiconductor layer and an Al-Zn-ON oxide semiconductor layer. This heat treatment (including photo-annealing) causes the rearrangement of the carriers at the atomic level. The distortion that inhibits the movement is released. There are no particular limitations as long as it is after the formation of the third and second semiconductor films 412.

[0112] Next, in order to pattern the first semiconductor film 403, the second semiconductor film 412 is selectively The first semiconductor film 403 is selectively etched to form an IGZO semiconductor film. The layer 405 is formed by dry etching using chlorine gas. The second semiconductor film 412 functions as a buffer layer. The removed area exposes the surface of the gate insulating film. The mask formed on the second semiconductor film 412 during patterning is heated in an oxygen atmosphere. The cross-sectional structure of the substrate at this stage is shown in FIG. (See Figure 4(C)). Moisture is eliminated as much as possible from the manufacturing process of thin film transistors. Therefore, subsequent washing with water is not necessary.

[0113] The carrier concentration of the second semiconductor film 412, which serves as a buffer layer, is higher than that of the IGZO semiconductor layer. Since the IGZO semiconductor layer has excellent electrical conductivity, it is possible to directly connect the source electrode or drain electrode to the IGZO semiconductor layer. In comparison with the case where a buffer layer is provided, the contact resistance can be reduced by providing the buffer layer.

[0114] Next, a metal multilayer film that will become the source electrode or drain electrode is formed. Using magnetron sputtering, an aluminum film is laminated on the titanium film, and then an aluminum film is A titanium film is laminated on an aluminum film. A titanium target and an aluminum target are placed in the sputtering chamber. Both the aluminum target and the aluminum target are set up, and the film is continuously formed by stacking them in order using a shutter. This allows continuous lamination in the same chamber.

[0115] Next, the metal multilayer film is selectively etched to form the source electrode 408 or the drain electrode 409 is formed. Here, a third photomask is used. Etching is dry etching. At this time, the metal multilayer film and the second semiconductor film 412 can be etched, and the IGZO semiconductor The etching rate is set to be sufficiently different from that of the conductive layer 405. 408, drain electrode 409, source-side buffer layer 413 and drain-side buffer layer The formation of 414 can be performed in the same etching step (see FIG. 4(D)).

[0116] Next, the thin film transistor is covered to prevent the intrusion or diffusion of hydrogen, moisture, etc. from the outside. The third insulating film 410 is formed in this manner. It is preferable to perform the process under conditions that do not cause hysteresis or charge-up. 410 is formed of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. For example, a nitrogen content of 3 atomic % or more and 30 atomic % or more can be obtained by RF sputtering. % or less. A silicon oxynitride film having a nitrogen content of 3 atomic % or more and 30 atomic % or less may be formed. By using a silicon oxynitride film, the penetration or diffusion of hydrogen, moisture, etc. into the thin film transistor can be prevented. It can be prevented.

[0117] Before forming the third insulating film 410, the IGZO semiconductor layer 405, the source electrode 408, and the drain electrode The surface of the electrode 409 may be etched by about 10 nm by reverse sputtering. By performing reverse sputtering, the surface of the source electrode 408 and the drain electrode 409 is covered with It is possible to remove adsorbed hydrogen, moisture, hydrocarbons, etc.

[0118] In this embodiment, the channel forming region is formed in the IGZO semiconductor layer 405 by applying a gate voltage The electrode 401 and the IGZO semiconductor layer 405 overlap each other, and the source side buffer layer 413 and the drain side buffer layer 414 are formed. The source-side buffer layer 413 and the drain-side buffer layer 414 are sandwiched between the source-side buffer layer 413 and the drain-side buffer layer 414. The distance L4 to the IN buffer layer 414 corresponds to the channel length (see FIG. 4(E)). .

[0119] The upper and lower layers of the channel forming region of the IGZO semiconductor layer 405 are formed with a nitrogen content of 3 atomic % or more. A silicon oxynitride film of 30 atomic % or less is formed on the upper surface, and the channel forming region is sandwiched between the silicon oxynitride films. This structure prevents hydrogen, moisture, etc. from penetrating or diffusing into the channel formation region. can be done.

[0120] (Embodiment 5) In this embodiment mode, a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. Note that the same parts as those in the first embodiment or parts having similar functions, and the repetition of steps The explanation will be omitted.

[0121] First, a gate electrode 701 is formed on a substrate 700. Here, a first photomask is used. (See Figure 24(A)).

[0122] Next, the first insulating film 702, which will become the gate insulating film, and the semiconductor film 703 are exposed to the air. The first insulating film 702 is formed in succession without being separated from the first insulating film 703 (see FIG. 24(B)). Silicon oxynitride film with a nitrogen content of 3 atomic % to 30 atomic % deposited by RF sputtering and a semiconductor film 703 was formed using In (indium), Ga (gallium), and Zn ( The film was formed by sputtering using a target of oxide containing zinc and silicon oxide. The semiconductor film 703 is formed at a substrate temperature of room temperature (25° C.) or higher and lower than 200° C. is preferred.

[0123] When the semiconductor film 703 is formed, an oxide semiconductor film to be used as the semiconductor film 703 is separately formed. The physical properties of the oxide semiconductor film were evaluated. A three-dimensional view of the sample 510 is shown. The sample 510 for evaluating physical properties was prepared and the Hall effect was measured at room temperature. The carrier concentration and Hall mobility of the oxide semiconductor film were evaluated. The physical property evaluation sample 510 has an insulating film 501 made of silicon oxynitride formed on a substrate 500. An oxide semiconductor film 502 to be evaluated is formed thereon, and electrodes 503 to 506 are formed thereon. The oxide semiconductor film to be evaluated was fabricated by forming a target material containing 2% silicon oxide. The target was formed using three types of targets containing 5%, 5%, and 10% of the added material by weight. A physical property evaluation sample 510 was prepared for each oxide semiconductor film and the Hall effect was measured at room temperature. In addition, as a reference, a target without added silicon oxide was used. A sample including an oxide semiconductor film was also prepared and evaluated in the same manner.

[0124] FIG. 25B shows the carrier concentration of the oxide semiconductor film obtained by Hall effect measurement. In Figure 5(B), the horizontal axis represents the amount of silicon oxide added, and the vertical axis represents the carrier concentration. As the amount increases from 0 wt% to 2 wt%, 5 wt%, and 10 wt%, the carry The concentration of α is 1.6×10 19 / cm 3 From 8.0 × 10 17 / cm 3 , 2.7 × 10 16 / cm 3 , 2.0×10 12 / cm 3 and is declining.

[0125] FIG. 25C shows the Hall mobility of the oxide semiconductor film obtained by Hall effect measurement. In 25(C), the horizontal axis represents the amount of silicon oxide added, and the vertical axis represents the Hall mobility. As the amount of addition increases from 0 wt% to 2 wt%, 5 wt%, and 10 wt%, the H All mobility is 15.1cm 2 / Vs, 8.1cm 2 / Vs, 2.6cm 2 / Vs, 1.8cm 2 / Vs and has decreased.

[0126] From the results shown in FIG. 25(B) and FIG. 25(C), it can be seen that the carrier concentration increases with increasing amount of silicon oxide added. The SiO2 content was 5% by weight and 10% by weight, but the Hall mobility and the SiO2 content tended to decrease. Therefore, there is no significant difference in Hall mobility between the IGZO semiconductor layer and the When silicon oxide is added, the target should contain silicon oxide in the range of more than 0 wt % to 10 wt %. Silicon dioxide may be added, but it is preferably added in the range of more than 0 wt % and not more than 6 wt %. That is, it is preferable that the carrier concentration is 2.0×10 12 / cm 3 Over 1.6 x 1 0 19 / cm 3 It can be in the range of less than 2.0 x 10 16 / cm3 Over 1.6 x 10 19 / cm 3 The range of less than 1.8 cm is preferred. 2 / Vs or more 15. 1cm 2 / Vs is acceptable, but 2.4cm 2 / Vs or more 15.1cm 2 / Vs not yet It is preferable that the range is 100%.

[0127] After the semiconductor film 703 is formed, the temperature is increased to 200° C. or more and 600° C. or less, typically 300° C. or more and 500° C. or less. Here, the substrate is placed in a furnace and heated at 350 This heat treatment causes rearrangement at the atomic level in the IGZO semiconductor layer. This heat treatment (including optical annealing) releases the distortion that inhibits carrier movement. The timing of the heat treatment is not particularly limited as long as it is performed after the semiconductor film 703 is formed. do not have.

[0128] Next, the semiconductor film 703 is selectively etched to pattern the semiconductor film 703. The IGZO semiconductor layer 705 is formed by dry etching using chlorine gas. At this stage, the area where the semiconductor film 703 has been removed has a surface of the gate insulating film. The second photomask is used here. The mask formed on the substrate is removed by ashing in an oxygen atmosphere. The cross-sectional structure corresponds to the cross-sectional view of the substrate shown in FIG. 24(C) (see FIG. 24(C)). In order to eliminate moisture as much as possible from the transistor manufacturing process, washing with water is not performed after this. It's okay.

[0129] Next, a metal multilayer film that will become the source electrode or drain electrode is formed. Using magnetron sputtering, an aluminum film is laminated on the titanium film, and then an aluminum film is A titanium film is laminated on an aluminum film. A titanium target and an aluminum target are placed in the sputtering chamber. Both the aluminum target and the aluminum target are set up, and the film is continuously formed by stacking them in order using a shutter. This allows continuous lamination in the same chamber.

[0130] Next, the metal multilayer film is selectively etched to form the source electrode 708 or the drain electrode 709 is formed. Here, a third photomask is used. Dry etching is used. At this time, the metal multilayer film can be etched and the IGZO semiconductor layer 705 can be sufficiently etched. The etching rate is different from that of the source electrode 708 and the drain electrode 709. The formation of 709 can be performed in the same etching process (see FIG. 24(D)).

[0131] Next, the thin film transistor is covered to prevent the intrusion or diffusion of hydrogen, moisture, etc. from the outside. The third insulating film 710 is formed in this manner. It is preferable to perform the process under conditions that do not cause hysteresis or charge-up. 710 is formed of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. For example, a nitrogen content of 3 atomic % or more and 30 atomic % or more can be obtained by RF sputtering. % or less. A silicon oxynitride film having a nitrogen content of 3 atomic % or more and 30 atomic % or less may be formed. By using a silicon oxynitride film, the penetration or diffusion of hydrogen, moisture, etc. into the thin film transistor can be prevented. It can be prevented.

[0132] Before forming the third insulating film 710, the IGZO semiconductor layer 705, the source electrode 708, and the drain electrode The surface of the electrode 709 may be etched by about 10 nm by reverse sputtering. By performing reverse sputtering, the surface of the source electrode 708 and the drain electrode 709 is covered with It is possible to remove adsorbed hydrogen, moisture, hydrocarbons, etc.

[0133] In this embodiment, the channel forming region is formed in the IGZO semiconductor layer 705 by applying a gate voltage The electrode 701 and the IGZO semiconductor layer 705 overlap each other, forming a source electrode 708 and a drain electrode 709. The distance L5 to the source electrode 708 and the drain electrode 709 is This corresponds to the channel length (see FIG. 24(E)).

[0134] The upper and lower layers of the channel forming region of the IGZO semiconductor layer 705 are formed with a nitrogen content of 3 atomic % or more. A silicon oxynitride film of 30 atomic % or less is formed on the upper surface, and the channel forming region is sandwiched between the silicon oxynitride films. This structure prevents hydrogen, moisture, etc. from penetrating or diffusing into the channel formation region. can be done.

[0135] In this way, a thin film transistor using an IGZO semiconductor layer can be fabricated.

[0136] 25C and 26, the oxide semiconductor layer becomes amorphous by adding silicon oxide. It can be seen that this promotes the improvement of the characteristics of semiconductor devices, thereby reducing variations in characteristics during the manufacture of the semiconductor devices. In addition, Ga contained in the IGZO semiconductor layer has the effect of promoting amorphization. By using silicon oxide instead of Ga, the expensive Ga contained in the IGZO semiconductor layer can be reduced. This can be reduced or eliminated, improving productivity.

[0137] (Embodiment 6) In this embodiment mode, in a display device which is one mode of a semiconductor device, at least An example of manufacturing a part of a driver circuit and a thin film transistor arranged in a pixel portion will be explained below. Reveal.

[0138] The thin film transistors disposed in the pixel portion are formed according to any one of the first to fifth embodiments. The thin film transistors described in Embodiments 1 to 5 are n-channel TFTs. Therefore, some of the driver circuits can be configured with n-channel TFTs. The thin film transistors in the pixel portion are formed on the same substrate.

[0139] FIG. 1 is a block diagram of an active matrix liquid crystal display device, which is one embodiment of a semiconductor device. 5(A). The display device shown in FIG. 5(A) has a pixel structure including a display element on a substrate 5300. a pixel portion 5301 having a plurality of pixels, a scanning line driver circuit 5302 for selecting each pixel, and a It also has a signal line driver circuit 5303 that controls input of a video signal to the pixel.

[0140] The pixel portion 5301 is a signal line driver circuit 5303. The signal line driver circuit 5303 is arranged to extend in the column direction. The signal line driver circuit 5303 is connected to the signal line driver circuit 5303 by lines S1 to Sm (not shown). A plurality of scanning lines G1 to Gn (not shown) are arranged extending from 5302 in the row direction. The scanning line driver circuit 5302 is connected to the signal lines S1 to Sm and the scanning lines G1 to Gn. The image sensor has a plurality of pixels (not shown) arranged in a matrix. signal line Sj (one of the signal lines S1 to Sm), scanning line Gi (one of the scanning lines G1 to Gn), (either one) is connected.

[0141] The thin film transistors described in any of Embodiments 1 to 5 are n-channel TFTs. A signal line driver circuit configured with n-channel TFTs will be described with reference to FIG.

[0142] The signal line driver circuit shown in FIG. 6 includes a driver IC 5601 and a group of switches 5602_1 to 5602_2. 2_M, a first wiring 5611, a second wiring 5612, a third wiring 5613, and a wiring 562 Each of the switch groups 5602_1 to 5602_M includes the first The first thin film transistor 5603a, the second thin film transistor 5603b, and the third thin film transistor It has transistor 5603c.

[0143] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are connected to the first wiring 5611, the second wiring 5612, and the third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor Three signal lines (signal line Sm-2, signal line Sm-1, signal line S m (m=3M)). For example, the J-th row wiring 5621_J (wiring 5621_1 Any one of the wirings 5621_M is connected to the first thin film of the switch group 5602_J. A transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor Connected to signal line Sj-2, signal line Sj-1, and signal line Sj (j=3J) via terminal 5603c. To be continued.

[0144] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0145] It is desirable that the driver IC 5601 be formed using a single crystal semiconductor. Furthermore, the switch group 5602_1 to 5602_M is formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_56 It is advisable to form O2_M on a different substrate and connect them via an FPC or similar. A single crystal semiconductor layer is provided on the same substrate as the element part by bonding, etc., and the driver IC5 601 may be formed.

[0146] Next, the operation of the signal line driver circuit shown in FIG. 6 will be described with reference to the timing chart of FIG. The timing chart in FIG. 7 shows the timing when the i-th scanning line Gi is selected. Furthermore, the selection period of the i-th scanning line Gi is The period is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, the signal line driving circuit of FIG. 6 continues to drive the signal line even when a scanning line of another row is selected. It works the same as 7.

[0147] In the timing chart of FIG. 7, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor 5603 c, the signal line Sj-2, the signal line Sj-1, and the signal line Sj are connected. is doing.

[0148] In the timing chart of FIG. 7, the timing when the i-th scanning line Gi is selected, the timing when the first scanning line Gj is selected, The on-off timing 5703a of the thin film transistor 5603a, the second thin film transistor The on / off timing 5703b of the third thin film transistor 560 3c on / off timing 5703c and the signal input to the Jth row wiring 5621_J This shows No. 5721_J.

[0149] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-2 and is input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj-1, and is output to the wiring 56 during the third sub-selection period T3. The video signal input to the first sub-selection period 21_J is input to the signal line Sj. During the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-2, Data_j-1, and Data_ Let's call it j.

[0150] As shown in FIG. 7, in the first sub-selection period T1, the first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c are turned on. At this time, Data_j-2 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-2 via the transistor 5603a. The second thin film transistor 5603b is turned on, and the first thin film transistor 5603a and The third thin film transistor 5603c is turned off. Data_j-1 is input to the signal line Sj-1 via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on. , the first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j input to the wiring 5621_J is input to the third thin film transistor 5 It is input to the signal line Sj via 603c.

[0151] From the above, the signal line driver circuit of FIG. 6 divides one gate selection period into three, During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit in FIG. The number of connections between the LCD panel and the substrate on which the pixel area is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one-third, the signal line driver circuit in Figure 6 is more reliable and easier to operate. It can improve retention etc.

[0152] As shown in Figure 6, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are In each period, a video signal is input from one wiring to each of multiple signal lines. As long as this can be achieved, there are no limitations on the arrangement, number, driving method, etc. of the thin film transistors.

[0153] For example, three or more signal lines are connected to one wiring in each of three or more sub-selection periods. When a video signal is input to each, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or is preferably divided into three sub-selection periods.

[0154] As another example, as shown in the timing chart of FIG. 8, one selection period is precharge The period Tp is divided into a first sub-selection period T1, a second sub-selection period T2, and a third selection period T3. Furthermore, in the timing chart of FIG. 8, when the i-th scanning line Gi is selected, Timing, on / off timing 5803a of the first thin film transistor 5603a, The on / off timing 5803b of the second thin film transistor 5603b, The on / off timing 5803c of the transistor 5603c and the J-th row wiring 5621_ 8, the signal 5821_J input to the precharge period T p, a first thin film transistor 5603a, a second thin film transistor 5603b, and The third thin film transistor 5603c is turned on. At this time, The precharge voltage Vp is applied to the first thin film transistor 5603a and the second thin film transistor 5603b and the third thin film transistor 5603c are connected to the signal line Sj-2 and the signal line Sj-3, respectively. In the first sub-selection period T1, the first thin film transistor The second thin film transistor 5603b and the third thin film transistor 5603c are turned on. At this time, the Data_j input to the wiring 5621_J -2 is input to the signal line Sj-2 via the first thin film transistor 5603a. In the sub-selection period T2, the second thin film transistor 5603b is turned on, and the first thin film transistor The third thin film transistor 5603a and the third thin film transistor 5603c are turned off. Data_j-1 input to 5621_J is input via the second thin film transistor 5603b. During the third sub-selection period T3, the third thin-film transistor The first thin film transistor 5603a and the second thin film transistor 5603c are turned on. At this time, Data_j input to the wiring 5621_J is The signal is input to the signal line Sj via the thin film transistor 5603c.

[0155] From the above, the signal line driver circuit of FIG. 6 to which the timing chart of FIG. 8 is applied By providing a precharge selection period before the selection period, the signal line can be precharged. Therefore, the video signal can be written to the pixel at high speed. The same parts as those in FIG. 7 are designated by the same reference numerals, and the same parts or parts having similar functions are designated by the same reference numerals. A detailed description of the relevant parts will be omitted.

[0156] The configuration of the scanning line driving circuit will be described. The scanning line driving circuit includes a shift register, a buffer, and a In some cases, a level shifter may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP) are input to the shift register. ) is input, the selection signal is generated. The generated selection signal is The signal is buffered and amplified in the scanning line and then supplied to the corresponding scanning line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be able to pass a large current. It is used.

[0157] One form of a shift register used as part of a scanning line driving circuit will be explained with reference to FIGS. 9 and 10. explain.

[0158] The circuit configuration of the shift register is shown in Figure 9. The shift register shown in Figure 9 is a flip-flop. The first flip-flop is composed of multiple flip-flops 5701_1 to 5701_n. The first clock signal, the second clock signal, the start pulse signal, and the reset signal are input. It works.

[0159] The connection relationship of the shift register in Figure 9 will be explained. The first stage flip-flop 5701 _1 is a first wiring 5711, a second wiring 5712, a fourth wiring 5714, a fifth wiring 5715, 715, the seventh wiring 5717_1, and the seventh wiring 5717_2. The flip-flop 5701_2 in the second stage is connected to the third wiring 5713, the fourth wiring 5714, and the The fifth wiring 5715, the seventh wiring 5717_1, the seventh wiring 5717_2 and the seventh wiring 5 Connected to 717_3.

[0160] Similarly, the flip-flop 5701_i in the i-th stage (flip-flops 5701_1 to 57 01_n) is either the second wiring 5712 or the third wiring 5713, The fourth wiring 5714, the fifth wiring 5715, the seventh wiring 5717_i-1, the seventh wiring 5 717_i and the seventh wiring 5717_i+1. Here, when i is an odd number, The flip-flop 5701_i in the i-th stage is connected to the second wiring 5712, and when i is an even number, In this case, the flip-flop 5701_i in the i-th stage is connected to the third wiring 5713. This will be the case.

[0161] The n-th flip-flop 5701_n is connected to the second wiring 5712 or the third wiring 5713, the fourth wiring 5714, the fifth wiring 5715, the seventh wiring 5717_n- 1, the seventh wiring 5717_n, and the sixth wiring 5716.

[0162] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the This may also be called the power line 2.

[0163] Next, the details of the flip-flop shown in FIG. 9 will be explained with reference to FIG. 10. The flip-flop shown includes a first thin film transistor 5571, a second thin film transistor 5 572, a third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor thin film transistor 5575, sixth thin film transistor 5576, seventh thin film transistor 5 The first thin film transistor 5577 and the eighth thin film transistor 5578 are also included. 571, a second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor thin film transistor 5574, fifth thin film transistor 5575, sixth thin film transistor 5 576, the seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel The gate-source voltage (Vgs) is the threshold voltage (Vth ) is exceeded, the conduction state is reached.

[0164] 10 includes a first wiring 5501, a second wiring 5502, a third wiring 5503, a fourth wiring 5504, a fourth wiring 5505, a fifth wiring 5506, a sixth wiring 5507, a sixth wiring 5508, a sixth wiring 5509, a sixth wiring 5501, a sixth wiring 5502, a sixth wiring 5503, a sixth wiring 5504, a sixth wiring 55 A third wiring 5503, a fourth wiring 5504, a fifth wiring 5505, and a sixth wiring 5506 It has.

[0165] All thin film transistors here are enhancement type n-channel transistors. However, there is no particular limitation thereto, and for example, a depletion type n-channel transistor The drive circuit can also be driven by a capacitor.

[0166] Next, the connection configuration of the flip-flop shown in FIG. 10 will be described below.

[0167] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to a The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0168] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506, and A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0169] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0170] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506, and The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0171] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0172] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0173] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. will be done.

[0174] A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506, and The second electrode of the thin film transistor 5578 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 5501. will be done.

[0175] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5573, and the gate electrode of the third thin film transistor 5574 are connected to the gate electrode of the second thin film transistor 5575. a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0176] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 is a first power supply line, and the sixth wiring 5506 is a second power supply line. It can also be called.

[0177] In the flip-flop 5701_i in the i-th stage, the first wiring 5501 in FIG. 9 is connected to the seventh wiring 5717_i-1 in FIG. 10. 9 is connected to the seventh wiring 5717_i+1 in FIG. 9. Also, the third wiring 5 503 and the seventh wiring 5717_i are connected. Furthermore, the sixth wiring 550 in FIG. 6 and the fifth wiring 5715 are connected.

[0178] When i is an odd number, the fourth wiring 5504 in FIG. 10 is connected to the second wiring 5712 in FIG. When i is an even number, it is connected to the third wiring 5713 in FIG. The fifth wiring 5505 and the fourth wiring 5714 in FIG. 9 are connected.

[0179] However, in the first stage flip-flop 5701_1, the first wiring 550 in FIG. 9. The n-th flip-flop 570 1_n, the second wiring 5502 in FIG. 10 is connected to the sixth wiring 5716 in FIG. can be.

[0180] In addition, the signal line driver circuit and the scanning line driver circuit may be the same as those shown in any of the n-channel It is also possible to manufacture the device using only a panel-type TFT. Since the mobility of the transistor is large, the driving frequency of the driving circuit can be increased. That is, the n-channel TF shown in the first to fifth embodiments can be realized. By using an oxide semiconductor layer for T, it is possible to improve the frequency characteristics (called f characteristics). For example, the scanning pixel using the n-channel TFT shown in any of Embodiments 1 to 5 can be used. The line driver circuit can be operated at high speed, so by increasing the frame frequency, Black screen insertion can be realized.

[0181] Furthermore, the channel width of the transistor of the scanning line driving circuit can be increased, and multiple scanning lines can be formed. By arranging the drive circuit, it is possible to achieve an even higher frame frequency. When a plurality of scanning line driving circuits are arranged, for example, a scanning circuit for driving even-numbered scanning lines is provided. The scanning line driver circuits for driving the odd-numbered scanning lines are arranged on one side, and the scanning line driver circuits for driving the odd-numbered scanning lines are arranged on the opposite side. By placing them on the opposite side, it is possible to increase the frame frequency. In addition, when signals are output to the same scanning line by a plurality of scanning line driving circuits, the display device becomes larger. It is advantageous.

[0182] In addition, when an active matrix light-emitting display device, which is one mode of a semiconductor device, is manufactured, In order to arrange a plurality of thin film transistors in at least one pixel, a plurality of scanning line driving circuits are provided. It is preferable to arrange the active matrix type light emitting display device in the above-mentioned manner. 5(B).

[0183] The light-emitting display device shown in FIG. 5B has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. a signal line driver circuit 5404 for controlling the input of a video signal to a selected pixel; It has 03.

[0184] When a video signal input to a pixel of the light-emitting display device shown in FIG. 5B is in a digital format The pixel emits or does not emit light by switching the transistor on or off. Therefore, gray scale display can be performed using area gray scale or time gray scale. The gradation method divides one pixel into multiple sub-pixels, and each sub-pixel is driven independently based on a video signal. The time gray scale method is a driving method that displays gray scales by changing the time when the pixel emits light. This is a driving method that displays gray scales by controlling the period.

[0185] Light-emitting elements have a higher response speed than liquid crystal elements, making them more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, in accordance with the video signal, the light emitting element of the pixel is By dividing the period into multiple subframes, The total length of the period during which pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0186] In the light-emitting display device shown in FIG. 5B, two switching TFTs are provided in one pixel. When the switching TFT is placed in the first scanning line, the signal is input to the first scanning line, which is the gate wiring of one of the switching TFTs. A signal for switching the other TFT is generated by the first scanning line driver circuit 5402. A signal input to the second scanning line, which is a wiring, is generated by a second scanning line driver circuit 5404. The example shows a signal input to the first scanning line and a signal input to the second scanning line. Both of these may be generated by one scanning line driving circuit. The number of switching TFTs in a device determines the operation of the switching element. It is possible that a plurality of scanning lines are used for each pixel. The signals input to the scanning line driver circuit 100 may all be generated by one scanning line driver circuit, or may be generated by a plurality of scanning line drivers. It may be generated by an automatic circuit.

[0187] In addition, in the light-emitting display device, the driver circuit may be configured with an n-channel TFT. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit may be the same as those shown in any of the n-channel MOS transistors in Embodiments 1 to 5. It is also possible to fabricate the device using only channel TFTs.

[0188] The above-mentioned driving circuit is not limited to liquid crystal display devices and light-emitting display devices, but may also be used in It may also be used in electronic paper, which uses electrically connected elements to drive electronic ink. Electronic paper is also called an electrophoretic display (electrophoretic display) and has the same properties as paper. It is possible to make the display easy to read, consume less power than other display devices, and have a thin and light form factor. This has the advantage that

[0189] (Embodiment 7) The thin film transistors described in any of Embodiments 1 to 5 are manufactured. A semiconductor device (also called a display device) having a display function is used in a pixel portion and further in a driver circuit. In addition, the thin film transistors described in any of Embodiments 1 to 5 can be manufactured. A system-on-panel is formed by forming part or the whole of the driver circuit on the same substrate as the pixel section. It can be formed.

[0190] The display device includes a display element. The display element includes a liquid crystal element (also called a liquid crystal display element), a light-emitting element, A light-emitting element (also called a light-emitting display element) can be used. This category includes elements whose brightness is controlled by the light emitted from the light source, specifically inorganic EL (Electroluminescent) luminescence elements, organic EL elements, etc. Also, electronic ink A display medium whose contrast changes due to an electrical effect can also be used.

[0191] The display device also includes a panel in which a display element is sealed, and a controller for the panel. Furthermore, the display device is manufactured by a method for manufacturing the display device. In the process, the element substrate corresponds to one form before the display element is completed, and the element substrate is Each of the plurality of pixels includes a means for supplying a current to the display element. The pixel electrode of the display element may be formed only, or the conductive film that becomes the pixel electrode may be formed. may be in a state after the film is formed and before the pixel electrode is formed by etching, All forms apply.

[0192] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. Also refers to connectors, such as FPC (Flexible Printed Circuit) Integrated Circuit) or TAB (Tape Automated Board) ding) tape or TCP (Tape Carrier Package) Modules with printed wiring boards attached to the end of TAB tape or TCP or the display element is mounted on an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which the display device (circuit) is directly mounted.

[0193] In this embodiment mode, the appearance and cross section of a liquid crystal display panel, which is one mode of a semiconductor device, will be described. 11A1 and 11A2 show a structure formed on a first substrate 4001. Highly reliable thin films using the oxide semiconductor layers described in any of Embodiments 1 to 5 The transistors 4010 and 4011 and the liquid crystal element 4013 are disposed between the second substrate 4006 and the 11(A) is a top view of the panel sealed with a sealant 4005, and FIG. 11(B) is a top view of the panel sealed with a sealant 4005. (A1) corresponds to the cross-sectional view at MN in (A2).

[0194] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this way, a sealing material 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealing material 4005, and a second substrate 4006. The first substrate 4001 is sealed together with the liquid crystal layer 4008. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0195] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, Wire bonding or TAB method can be used. is an example of mounting a signal line driver circuit 4003 by the COG method, and FIG. 11(A2) is This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0196] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 11B, the thin film transistor included in the pixel portion 4002 is A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 Insulating layers 4020 and 4022 are formed on the thin film transistors 4010 and 4011. 1 is provided.

[0197] The thin film transistors 4010 and 4011 are highly reliable and easy to implement using an oxide semiconductor layer. The thin film transistors described in any of Embodiments 1 to 5 can be applied. In the figure, the thin film transistors 4010 and 4011 are n-channel thin film transistors. .

[0198] The pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. The pixel electrode layer 4030, the counter electrode layer 4031, and the liquid crystal layer 4008 are The overlapping portion corresponds to the liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0199] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Aluminum foil can also be used with PVF film or polyester film. A sheet sandwiched between films can also be used.

[0200] 4035 is a columnar spacer obtained by selectively etching the insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the opposing electrode layer 40 via conductive particles disposed between the pair of substrates. The conductive particles can electrically connect the sealing material 40 to the common potential line. Included in 05.

[0201] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 10 μs to 10 It is optically isotropic, so alignment processing is not required, and viewing angle dependency is small.

[0202] Although this embodiment is an example of a transmissive liquid crystal display device, the present invention can also be applied to a reflective liquid crystal display device. It can also be used in semi-transmissive liquid crystal display devices.

[0203] In the liquid crystal display device of this embodiment, a polarizing plate is provided on the outer side (viewing side) of the substrate, and a polarizing plate is provided on the inner side. An example is shown in which a colored layer and an electrode layer used for a display element are provided in this order, but the polarizing plate is provided on the inner side of the substrate. The laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment. The coloring layer may be appropriately selected depending on the material and manufacturing process conditions of the coloring layer. A light-shielding film that functions as a light-shielding film may be provided.

[0204] In this embodiment, in order to reduce the surface unevenness of the thin film transistor, In order to improve the reliability of the transistor, the thin film transistors obtained in the first to fifth embodiments are The transistor is covered with an insulating layer (insulating layer 4020, insulating layer 4021) which functions as a protective film and a planarizing insulating film. The protective film is made of a material that protects the device from organic matter, metals, and water vapor floating in the air. The protective film is intended to prevent the intrusion of contaminating impurities such as silicon dioxide and the like, and a dense film is preferable. Using the ion beam deposition method, silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film aluminum oxide film, aluminum nitride film, aluminum oxynitride film, or nitride In this embodiment, the protective film is formed of a single layer or a multilayer of an aluminum oxide film. Although the sputtering method is used as an example, the method is not particularly limited and various methods may be used.

[0205] Here, an insulating layer 4020 having a stacked structure is formed as a protective film. As the first layer of the silicon dioxide film, a silicon dioxide film is formed by sputtering. When a silicon film is used, the aluminum film used as the source electrode layer and the drain electrode layer can be It is effective in preventing locking.

[0206] In addition, an insulating layer is formed as the second layer of the protective film. A silicon nitride film is formed by sputtering. When this happens, mobile ions such as sodium penetrate into the semiconductor region and change the electrical properties of the TFT. This can prevent the problem of

[0207] After forming the protective film, the oxide semiconductor layer is annealed (at 300° C. to 400° C.). It is also possible.

[0208] An insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can also be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. In addition, by stacking multiple insulating films made of these materials, it is possible to obtain an insulating layer. 4021 may be formed.

[0209] Siloxane-based resin is a Si-OS compound formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, an organic group having a fluoro group may be used. That's fine.

[0210] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife When the insulating layer 4021 is formed using a material liquid, The oxide semiconductor layer may be annealed (at 300° C. to 400° C.) at the same time as the step of annealing. The baking process of the insulating layer 4021 and the annealing process of the oxide semiconductor layer are combined, so that the semiconductor layer can be efficiently baked. It becomes possible to fabricate semiconductor devices.

[0211] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material can be used.

[0212] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition can be used to form the conductive film. The pixel electrode has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. The resistivity is preferably 0.1 Ω·cm or less.

[0213] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0214] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials applied to 002 are supplied from FPC4018.

[0215] In this embodiment, the connection terminal electrode 4015 is connected to the pixel electrode layer 40 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the same conductive film as the thin film transistors 4010 and 40 The source electrode layer and the drain electrode layer 11 are formed of the same conductive film.

[0216] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0217] In FIG. 11, a signal line driver circuit 4003 is separately formed and mounted on a first substrate 4001. However, this embodiment is not limited to this configuration. Alternatively, a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. Alternatively, the circuit board may be formed separately and mounted.

[0218] FIG. 12 is a diagram showing a TFT substrate manufactured by applying the TFTs shown in any of the first to fifth embodiments. 2600 is used to form a liquid crystal display module as a semiconductor device.

[0219] FIG. 12 shows an example of a liquid crystal display module, in which a TFT substrate 2600 and an opposing substrate 2601 are connected. The substrate is fixed by a bonding material 2602, and a pixel portion 2603 including a TFT and the like and a liquid crystal layer are disposed between the substrate and the bonding material 2602. A display element 2604 and a colored layer 2605 are provided to form a display area. is required for color display, and in the case of the RGB method, it corresponds to each color of red, green, and blue. A colored layer is provided corresponding to each pixel. On the outside, a polarizing plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are arranged. It is composed of a cathode ray tube 2610 and a reflector 2611, and a circuit board 2612 is a flexible wiring board. The wiring board 2609 is connected to the wiring circuit section 2608 of the TFT substrate 2600, and the controller It also incorporates external circuits such as a polarizing plate and a power supply circuit. The layers may be laminated with a retardation film interposed therebetween.

[0220] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-Plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) Switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0221] By the above steps, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. do.

[0222] Note that the structure shown in this embodiment mode may be used in appropriate combination with structures shown in other embodiment modes. It is possible to do so. (Embodiment 8)

[0223] In this embodiment, a semiconductor device to which the thin film transistor described in any of Embodiments 1 to 5 is applied will be described. An example of a semiconductor device is electronic paper.

[0224] Figure 13 shows an active matrix electronic paper as an example of a semiconductor device. The thin film transistor 581 used in the device may be any of the thin film transistors shown in any of Embodiments 1 to 5. A thin film transistor can be applied.

[0225] The electronic paper in Figure 13 is an example of a display device that uses the twisting ball display method. The spherical display method is an electrode layer that uses spherical particles painted in black and white as display elements. and a potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of spherical particles by generating a magnetic field.

[0226] The thin film transistor 581 formed on the substrate 596 is a thin film transistor of a bottom gate structure. The first electrode layer 587 is connected to the insulating layer 586 by the source electrode layer or the drain electrode layer. The first electrode layer 587 and the substrate 5 are in contact with each other through an opening formed in the substrate 585 and are electrically connected. Between the second electrode layer 588 formed on the substrate 97 and the black area 590a and the white area 59 0b and a spherical particle 589 with a liquid-filled cavity 594 around it. The spherical particles 589 are filled with a filler 595 such as resin (see FIG. 13. In this embodiment, the first electrode layer 587 corresponds to a pixel electrode, and the second The first electrode layer 588 corresponds to a common electrode. The first to third embodiments are electrically connected to a common potential line provided on the same substrate. Using any one of the common connection parts shown in embodiment 5, a pair of substrates is connected via conductive particles disposed between the substrates. This allows the second electrode layer 588 and a common potential line to be electrically connected.

[0227] Also, instead of the twist ball, an electrophoretic element can be used. and a particle with a diameter of 10 μm to 2 μm that contains positively charged white particles and negatively charged black particles. Microcapsules with a size of about 0.1 μm are used. When an electric field is applied to the microcapsules by the first electrode layer and the second electrode layer, White particles and black particles move in opposite directions, allowing for white or black to be displayed. The display element that applies this principle is an electrophoretic display element, and is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. In addition, even if power is not supplied to the display, the image that has been displayed can be retained. Therefore, it is necessary to separate the semiconductor device with a display function (simply a display device, or a display device) from the radio wave source. The displayed image is preserved even if the device (also called a semiconductor device) is moved away. This becomes possible.

[0228] Electrophoretic display devices utilize the phenomenon known as dielectrophoresis, in which a substance with a high dielectric constant moves to a region with a high electric field. Electrophoretic display elements utilize the polarizing effect. This eliminates the need for a liquid crystal display device, making it possible to reduce the thickness and weight of the display device compared to a liquid crystal display device.

[0229] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0230] Furthermore, the microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be achieved by applying an electric field to the cell. An active matrix substrate obtained by the thin film transistor of 5 can be used. .

[0231] The particles in the microcapsules may be made of conductive materials, insulating materials, semiconductor materials, or magnetic materials. , liquid crystal materials, ferroelectric materials, electroluminescent materials, electrochromic materials, A material selected from magnetophoretic materials or a composite material thereof may be used.

[0232] Note that the structure shown in this embodiment mode may be used in appropriate combination with structures shown in other embodiment modes. It is possible to do so.

[0233] (Embodiment 9) In this embodiment, a semiconductor device to which the thin film transistor described in any of Embodiments 1 to 5 is applied will be described. An example of a light-emitting display device will be shown as one form of semiconductor device. Here, a light-emitting element that uses electroluminescence is used. The light-emitting element that uses the light-emitting material is either an organic compound or an inorganic compound. Therefore, they are distinguished from one another, and the former are generally called organic EL elements and the latter inorganic EL elements.

[0234] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. These carriers are then injected into a layer containing a light-emitting organic compound, causing a current to flow. The recombination of electrons and holes causes the light-emitting organic compound to form an excited state, When the excited state returns to the ground state, light is emitted. The optical element is called a current-excited light-emitting element.

[0235] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0236] FIG. 14 shows a display device to which digital time gray scale driving can be applied as an example of a semiconductor device to which the present invention is applied. FIG. 2 is a diagram illustrating an example of an element configuration.

[0237] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. In this embodiment, the oxide semiconductor layer described in any of Embodiments 1 to 5 is used for a channel formation region. An example in which two n-channel transistors are used in one pixel will be shown.

[0238] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, It has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0239] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0240] The capacitor element 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. The gate capacitance of the driving transistor 6402 is determined by the channel region A capacitance may be formed between the gate electrode and the transistor.

[0241] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is connected to The driving transistor 6402 is either fully on or off. A video signal is input, that is, the driving transistor 6402 is operated in a linear region. The driving transistor 6402 is operated in a linear region, so that the voltage of the driving transistor 6402 is higher than the voltage of the power supply line 6407. A high voltage is applied to the gate of the driving transistor 6402. The signal line 6405 is connected to A voltage equal to or greater than (power supply line voltage+Vth of the driving transistor 6402) is applied.

[0242] Also, when analog grayscale driving is performed instead of digital time grayscale driving, the signal input is different. By doing so, the same pixel configuration as in FIG. 14 can be used.

[0243] When analog gradation driving is performed, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or greater than the forward voltage of the light emitting element 64 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and It should be noted that the driving transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The potential of the light emitting element is made higher than the gate potential of the capacitor 6402. A current corresponding to a video signal is passed through 6404, enabling analog gradation driving.

[0244] Note that the pixel configuration shown in Fig. 14 is not limited to this. For example, A switch, a resistor, a capacitor, a transistor, a logic circuit, or the like may be added to the circuit.

[0245] Next, the configuration of the light emitting element will be described with reference to FIG. 15. Here, the driving TFT is The cross-sectional structure of a pixel will be explained using the example of the type shown in Figures 15(A), (B), and (C). The TFTs 7001, 7011, and 7021, which are driving TFTs used in semiconductor devices, are actually It can be fabricated in the same manner as the thin film transistors shown in the first to fifth embodiments, and In-Ga-Z Highly reliable thin-film transistors using oxide semiconductor layers, such as nO-based non-single-crystal films is.

[0246] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is emitted from the surface opposite to the substrate. There are two types of emission: top emission, which extracts light from the surface on the substrate side, bottom emission, which extracts light from the surface on the substrate side, and There are light emitting devices with a double-sided emission structure in which light is emitted from the opposite surface. The present invention can also be applied to a light emitting device having a light emitting structure.

[0247] A light emitting element with a top emission structure will be described with reference to FIG.

[0248] In FIG. 15(A), a TFT 7001 which is a driving TFT is an n-type, and a light emitting element 7002 emits light. FIG. 15(A) shows a cross-sectional view of a pixel when incident light exits the anode 7005 side. A cathode 7003 of the light emitting element 7002 and a TFT 7001 which is a driving TFT are electrically connected. A light-emitting layer 7004 and an anode 7005 are stacked in this order on a cathode 7003. 7003 uses various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, MgAg, AlLi, etc. are preferable. 004 may be composed of a single layer or multiple layers stacked together. When the cathode 7003 is configured with multiple layers, an electron injection layer, an electron transport layer, and the like are provided on the cathode 7003. The light-transmitting layer, the light-emitting layer, the hole transport layer, and the hole injection layer are laminated in this order. The anode 7005 is formed using a light-transmitting conductive material. Examples include indium oxide containing tungsten oxide, indium zinc containing tungsten oxide, Lead oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, and silicon oxide are added. Alternatively, a light-transmitting conductive film such as a doped indium tin oxide film may be used.

[0249] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. In the case of the pixel shown in FIG. 15(A), the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as shown by the mark.

[0250] Next, a light emitting element with a bottom emission structure will be described with reference to FIG. When 011 is n-type and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, 15B shows a cross-sectional view of the pixel. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive film 7017. On the cathode 7013, a light-emitting layer 7014 and an anode 7015 are laminated in this order. When the 015 has a light-transmitting property, a shielding film for reflecting or blocking light is applied to cover the anode. The cathode 7013 may have a film 7016 formed thereon, as in the case of FIG. Various conductive materials with small electrical conductivity can be used. The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, An aluminum film having a thickness of 1000 nm can be used as the cathode 7013. 7014 may be composed of a single layer, as in FIG. 15(A), or may be composed of multiple layers stacked together. The anode 7015 does not need to be transparent to light, but As in FIG. 15(A), the light-transmitting conductive material can be used. The shielding film 7016 can be made of, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0251] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 15B, light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0252] Next, a light emitting element with a dual emission structure will be described with reference to FIG. Then, on the conductive film 7027 having light-transmitting properties and electrically connected to the driving TFT 7021, A cathode 7023 of the light-emitting element 7022 is formed as a film. A light-emitting layer 7024 is formed on the cathode 7023. The cathode 7023 is laminated in the same manner as in FIG. Various conductive materials with small electrical conductivity can be used. For example, Al having a thickness of 20 nm is used as the cathode 7023. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 70 may be formed by laminating a plurality of layers. 25 is formed using a light-transmitting conductive material, similar to FIG. 15(A). It is possible.

[0253] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 is the light-emitting element 70. In the case of the pixel shown in FIG. 15C, the light emitted from the light emitting element 7022 is emitted to both the anode 7025 side and the cathode 7023 side as shown by the arrows.

[0254] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0255] In this embodiment, a thin film transistor (driving TFT) that controls driving of a light emitting element is Although an example in which the light emitting element is electrically connected has been shown, it is possible to prevent a current from flowing between the driving TFT and the light emitting element. A control TFT may be connected.

[0256] Note that the semiconductor device shown in this embodiment mode is not limited to the configuration shown in FIG. Various modifications based on the technical concept of the present invention are possible.

[0257] Next, one of the semiconductor devices to which the thin film transistors described in any of Embodiments 1 to 5 is applied will be described. The appearance and cross section of the light-emitting display panel (also called the light-emitting panel) corresponding to the form are shown in Figure 16. FIG. 16A shows a thin film transistor and a light emitting device formed on a first substrate. FIG. 1 is a top view of a panel in which an optical element is sealed between a second substrate and the panel by a sealing material. 6(B) corresponds to a cross-sectional view taken along line HI in FIG. 16(A).

[0258] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. 3b and the scanning line driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealing material 4505, and a second substrate 4506. The seal is sealed together with the filler 4507 by the sealant. Highly airtight protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the product in a protective film (such as a film) or a cover material.

[0259] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 16B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45 shows an example of a thin film transistor 4509 included in a line driver circuit 4503a.

[0260] Thin film transistors 4509 and 4510 are made of In-Ga-Zn-O based non-single crystal films. The thin film transistors described in Embodiments 1 to 5 each having high reliability and using an oxide semiconductor layer In this embodiment, a thin film transistor 4509, 4510 is an n-channel thin film transistor.

[0261] Further, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light-emitting element 4511 is configured by a first electrode layer 4517, an electroluminescent layer The second electrode layer 4512 and the second electrode layer 4513 are stacked in a stacked structure. The direction of the light emitting element 4511 is adjusted according to the direction of the light extracted from the light emitting element 4511. The configuration can be changed as appropriate.

[0262] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable to form the inclined surface so that the inclined surface has a continuous curvature.

[0263] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0264] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511. A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be formed of silicon nitride. It is possible to form a silicon nitride oxide film, a DLC film, etc.

[0265] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a, 4518b, and It is supplied by b.

[0266] In this embodiment, the connection terminal electrode 4515 is connected to the first electrode layer 4 The terminal electrode 4516 is formed from the same conductive film as the thin film transistors 4509 and 517. The source electrode layer and the drain electrode layer 510 are formed from the same conductive film.

[0267] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0268] The second substrate, which is a substrate positioned in the direction in which light is extracted from the light emitting element 4511, is not transparent. In this case, glass plates, plastic plates, polyester films or A light-transmitting material such as an acrylic film is used.

[0269] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV In this embodiment, nitrogen is used as the filler. Use the element.

[0270] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be provided as needed. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0271] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are , a driving element formed by a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate Alternatively, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the operating circuit or only a part of it may be separately formed and mounted. In this embodiment, the structure of FIG. It is not limited to the composition.

[0272] Through the above steps, a highly reliable light-emitting display device (display panel) can be manufactured as a semiconductor device. It is possible.

[0273] Note that the structure shown in this embodiment mode may be used in appropriate combination with structures shown in other embodiment modes. It is possible to do so.

[0274] (Embodiment 10) The semiconductor device to which the thin film transistor described in any of Embodiments 1 to 5 is applied is Electronic paper can be used for anything that displays information. It can be used in electronic devices in various fields. For example, electronic paper can be used to display electronic books. Various applications such as e-books, posters, in-car advertisements on trains and other vehicles, credit cards, etc. This can be applied to displays on cards, etc. Examples of electronic devices are shown in Figures 17 and 18. .

[0275] FIG. 17(A) shows a poster 2631 made of electronic paper. When printed materials are used, the advertisements are replaced manually, but when electronic paper is used, The display of the advertisement can be changed in a short time. Also, the display is stable without any distortion. The poster may be configured to be capable of transmitting and receiving information wirelessly.

[0276] FIG. 17(B) shows an advertisement 2632 inside a vehicle such as a train. When using printed paper, advertisements are exchanged manually, but with electronic paper, This allows you to change the display of your advertisements in a short time without requiring a lot of manpower. It is possible to obtain a stable image without any distortion. It may also be possible to use the following.

[0277] 18 shows an example of an electronic book 2700. For example, the electronic book 2700 includes: It consists of two housings, housing 2701 and housing 2703. 703 is integrated with a shaft portion 2711, and the opening and closing operation is performed around the shaft portion 2711. This configuration allows the book to function like a paper book. do.

[0278] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are also configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, if a sentence is displayed on the right display (display 2705 in FIG. 18) and In FIG. 18, an image can be displayed on the display unit 2707).

[0279] 18 shows an example in which the housing 2701 is provided with an operation unit. 701, a power switch 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The surface may be provided with a keyboard or a pointing device. On the back or side of the It is equipped with a terminal that can be connected to various cables such as a USB cable, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have the function of an electronic dictionary. It may also be composed.

[0280] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0281] Note that the structure shown in this embodiment mode may be used in appropriate combination with structures shown in other embodiment modes. It is possible to do so.

[0282] (Embodiment 11) The semiconductor device using the thin film transistor described in any of Embodiments 1 to 5 can be used in various The present invention can be applied to various electronic devices (including gaming machines). video equipment (also called televisions or television receivers), computers, etc. Digital cameras, digital video cameras, digital photo frames, mobile phones ( Mobile phones, also known as mobile phone devices, portable game machines, portable information terminals, sound reproducing devices, Examples include large game machines such as dick machines.

[0283] FIG. 19(A) shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In this case, the housing 9601 is supported by a stand 9605. This shows a configuration in which the above is supported.

[0284] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the information displayed on the display 9603 is In addition, the remote control operation device 9610 can operate the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0285] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0286] FIG. 19B shows an example of a digital photo frame 9700. The photo frame 9700 has a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example, images taken with a digital camera. By displaying the image data, it can function like a normal photo frame.

[0287] The Digital Photo Frame 9700 has an operation panel, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section. These components may be incorporated on the same surface as the display unit, but they may be incorporated on the side or back. It is preferable to have a recording medium for a digital photo frame as it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The image data can be captured and the captured image data can be displayed on the display portion 9703 .

[0288] The digital photo frame 9700 may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to configure the device so that desired image data can be wirelessly acquired and displayed.

[0289] FIG. 20(A) shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in 20(A) also includes a speaker unit 9884, a recording medium insertion unit 988, 6, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration (including the function of measuring movement, smell or infrared rays), microphone 9889) Of course, the configuration of the portable gaming machine is not limited to the above, and at least It is sufficient that the configuration includes the semiconductor device related to the above, and other auxiliary equipment is appropriately provided. The portable gaming machine shown in FIG. 20(A) can play the program recorded on the recording medium. It has the function of reading RAM or data and displaying it on the display, and wireless communication with other portable gaming machines. The portable gaming machine shown in FIG. 20(A) has a function of sharing information. The function is not limited to this and can have various functions.

[0290] FIG. 20(B) shows an example of a slot machine 9900, which is a large gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. Machine 9900 also has other operating means such as a start lever and stop switch, coin It is equipped with an insertion slot, a speaker, etc. Of course, the configuration of the slot machine 9900 is The present invention is not limited to the above, and may be configured to include at least one aspect of the present invention. The configuration can be such that appropriate equipment is provided.

[0291] FIG. 21(A) shows an example of a mobile phone 1000. The mobile phone 1000 has a housing In addition to the display unit 1002 incorporated in the 1001, the operation buttons 1003 and the external connection port 10 04, speaker 1005, microphone 1006, etc.

[0292] The mobile phone 1000 shown in FIG. 21A displays information by touching the display unit 1002 with a finger or the like. In addition, operations such as making a phone call or sending an email can be performed using the display. This can be done by touching 1002 with a finger or the like.

[0293] The screen of the display unit 1002 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, and the second mode is an input mode that mainly inputs information such as characters. This mode is a combination of two modes: input mode and input mode.

[0294] For example, when making a call or creating an email, the display unit 1002 is used to input characters. This is the main character input mode, and you can input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. I wish.

[0295] In addition, the mobile phone 1000 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above configuration, the orientation of the mobile phone 1000 (portrait or landscape) can be determined and the display The screen display of the display unit 1002 can be automatically switched.

[0296] The screen mode can be switched by touching the display unit 1002 or by operating the housing 1001. The type of image displayed on the display unit 1002 can be selected by operating the operation button 1003. For example, the image signal to be displayed on the display unit can be switched by If the data is text data, the mode switches to display mode, and if the data is text data, the mode switches to input mode.

[0297] In the input mode, the optical sensor of the display unit 1002 detects a signal and displays it. If there is no input by touch operation of the part 1002 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0298] The display unit 1002 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to capture images of finger veins, palm veins, etc.

[0299] FIG. 21B is also an example of a mobile phone. The mobile phone in FIG. 21B has a housing 9411. A display device 9410 including a display portion 9412 and an operation button 9413 is mounted on a housing 9401. An operation button 9402, an external input terminal 9403, a microphone 9404, a speaker 9405, and The communication device 9400 includes a light emitting unit 9406 that emits light when an incoming call is received, and has a display function. The display device 9410 can be attached to and detached from the communication device 9400 having a telephone function in two directions as shown by the arrows. Therefore, the display device 9410 and the communication device 9400 can be attached to each other with their short axes facing each other. The display device 9410 and the communication device 9400 can be attached to each other with their long axes facing each other. When only the function is required, the display device 9410 is removed from the communication device 9400. The communication device 9400 and the display device 9410 can be used independently. It can send and receive images or input information via digital or wired communication, and each is rechargeable. It has a battery.

[0300] Note that the structure shown in this embodiment mode may be used in appropriate combination with structures shown in other embodiment modes. It is possible to do so.

[0301] (Embodiment 12) In this embodiment, a semiconductor device to which the thin film transistor described in any of Embodiments 1 to 5 is applied will be described. As one embodiment of the semiconductor device, an example of an electronic book will be shown. In this embodiment, the electronic book shown in FIGS. ) and FIG. 23, between the first display panel 4311 and the second display panel 4312, An example in which a double-sided display type third display panel 4313 is mounted will be described. 22(A) shows the electronic book in a double-page spread, and FIG. 22(B) shows the electronic book in a closed state. FIG. 23 is a horizontal cross-sectional view of the electronic book.

[0302] The electronic book shown in FIGS. 22A and 22B has a first display panel having a first display portion 4301. a second display panel 4311 having an operation unit 4304 and a second display unit 4307; 12, and a third display panel 43 having a third display portion 4302 and a fourth display portion 4310. 13, a first display panel 4311, a second display panel 4312, and a third display panel The third display panel 4 has a binding portion 4308 provided at one end thereof and a binding portion 4313. 313 is inserted between the first display panel 4311 and the second display panel 4312. The electronic book in FIGS. 22A and 22B includes a first display portion 4301, a second display portion 4307, and a third display portion 4308. The computer has four display screens: a third display unit 4302 and a fourth display unit 4310.

[0303] A first display panel 4311, a second display panel 4312, and a third display panel 4313 The first display panel 4311 and the second display panel 4312 are flexible and easy to bend. The first display panel 4312 is made of a plastic substrate, and the second display panel 4313 is made of a thin film. In other words, an example of an electronic book can be made as shown in FIG. In a lateral cross section, the third display panel 4313 is a first display panel 4311 and a second display panel 4312. The electronic book reader can be more flexible than the second display panel 4312. By making the outer display panel harder than the display panel 4313, it feels like a book. This allows for easy handling and prevents the third display panel 4313 from being damaged.

[0304] The third display panel 4313 has both a third display portion 4302 and a fourth display portion 4310. The third display panel 4313 is a dual-emission type display panel. Alternatively, a single-side emission type display panel may be attached to the backlight. Alternatively, two liquid crystal display panels may be used, sandwiching a display panel (preferably a thin EL light-emitting panel).

[0305] 22(A) and 22(B) includes a driving device that controls the display of the first display unit 4301. A scanning line driver circuit (not shown) and a scanning line driver circuit 4 for controlling the display of the second display portion 4307. 322a, 4322b and the display of the third display unit 4302 and / or the fourth display unit 4310. A scanning line driver circuit (not shown) for controlling the display, a first display portion 4301, a second display portion 43 07, a signal for controlling the display of the third display unit 4302 and / or the fourth display unit 4310 The first display portion 4301 has a scanning line driver circuit 4323. The driver circuits are provided in the first display panel 4311, and the scanning line driver circuits 4322a and 4322b are provided in the first display panel 4311. b is provided on the second display panel 4312, and the signal line driver circuit 4323 is provided on the binding portion 4308. It is installed inside.

[0306] In the electronic book shown in FIGS. 22(A) and 22(B), the second display panel 4312 is It has a power input switch, a display changeover switch, and other functions associated with it. It is possible.

[0307] 22A and 22B, the input operation of the electronic book is performed by using the first display portion 4301 and the second display portion 4302. It is performed by touching the display unit 4307 with a finger or an input pen, or by operating the operation unit 4304. In FIG. 22(A), the display button 430 displayed on the second display unit 4307 9 is shown, and input can be made by touching it with a finger or the like.

[0308] In addition, how to use an electronic book with the third display panel 4313 inserted as shown in FIGS. 22(A) and 22(B) For example, a sentence is read on the first display unit 4301 and the fourth display unit 4310, and It is convenient to refer to the diagram on the display unit 4307 and the third display unit 4302. The display panel 4313 displays the third display section 4302 and the fourth display section 4310 simultaneously. Therefore, when you start turning the page, the display on the third display unit 4302 The display is switched to the fourth display unit 4310.

[0309] Also, by reading from the first display section 4301 to the third display section 4302, the next page, the third table When the display panel 4313 starts to be turned over, the fourth display unit 4310 and the second display unit 4311 are turned over at a certain angle. The fourth display unit 4310 and the second display unit 4311 display the next page. When you finish using 307 and start turning over the third display panel 4313, the third table The first display unit 4302 and the second display unit 4301 display the next page. This makes it possible to make the change invisible to the naked eye and reduce any visual discomfort.

[0310] Note that the structure shown in this embodiment mode may be used in appropriate combination with structures shown in other embodiment modes. It is possible to do so. [Explanation of symbols]

[0311] 100 boards 101 gate electrode 102 insulating film 103 Semiconductor film 104 insulating film 105 IGZO semiconductor layer 106 Insulators 107 Contact hole (opening) 108 Source electrode 109 Drain electrode 200 boards 201 Gate electrode 202 insulating film 203 Semiconductor Film 204 insulating film 205 Semiconductor layer 206 Insulators 208 Source electrode 209 Drain electrode 210 insulating film 211 Metal multilayer film 212 Semiconductor film 213 Source-side buffer layer 214 Drain side buffer layer 300 boards 301 Gate electrode 302 insulating film 303 Semiconductor Film 304 Insulating film 305 Semiconductor layer 306 Insulators 308 Source Electrode 309 Drain electrode 310 Insulating film 311 Metal multilayer film 400 boards 401 Gate electrode 402 insulating film 403 Semiconductor Film 405 IGZO semiconductor layer 408 Source Electrode 409 Drain electrode 410 insulating film 412 Semiconductor film 413 Source-side buffer layer 414 Drain side buffer layer 500 boards 501 insulating film 502 Oxide semiconductor film 503 Electrode 510 Physical property evaluation samples 581 Thin-film transistor 585 Insulation Layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 594 Cavity 595 Filling material 596 PCB 597 PCB 601 Measurement results 602 Measurement results 603 Measurement results 604 Peak 700 boards 701 Gate electrode 702 insulating film 703 Semiconductor Film 705 IGZO semiconductor layer 708 Source Electrode 709 Drain electrode 710 insulating film 1000 mobile phones 1001 Case 1002 Display section 1003 Operation button 1004 External connection port 1005 Speaker 1006 Mike 2600 TFT substrate 2601 Opposing substrate 2602 Sealing material 2603 Pixel section 2604 Display element 2605 Colored layer 2606 Polarizing plate 2607 Polarizing plate 2608 Wiring circuit section 2609 Flexible wiring board 2610 cold cathode tube 2611 Reflector 2612 Circuit Board 2613 Diffuser 2631 Poster 2632 In-car advertising 2700 e-books 2701 Housing 2703 Housing 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power Switch 2723 Operation Key 2725 Speaker 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 board 4008 Liquid crystal layer 4010 Thin Film Transistor 4011 Thin-film transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4019 Anisotropic conductive film 4020 Insulation layer 4021 Insulation layer 4030 Pixel electrode layer 4031 Counter electrode layer 4032 Insulation layer 4301 Display section 4302 Display section 4304 Operation unit 4307 Display section 4308 copies 4309 Display button 4310 Display section 4311 Display Panel 4312 Display Panel 4313 Display Panel 4323 Signal line driver circuit 4501 Circuit Board 4502 Pixel section 4505 Sealing material 4506 board 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode layer 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode layer 4519 Anisotropic conductive film 4520 Bulkhead 5300 board 5301 Pixel unit 5302 Scanning line driver circuit 5303 Signal line driver circuit 5400 board 5401 Pixel unit 5402 Scanning line driver circuit 5403 Signal line driver circuit 5404 Scanning line driver circuit 5501 Wiring 5502 Wiring 5503 Wiring 5504 Wiring 5505 Wiring 5506 Wiring 5543 nodes 5544 nodes 5571 Thin-film transistor 5572 Thin-film transistor 5573 Thin-film transistor 5574 Thin-film transistor 5575 Thin-film transistor 5576 Thin-film transistor 5577 Thin-film transistor 5578 Thin-film transistor 5601 Driver IC 5602 switches 5611 Wiring 5612 Wiring 5613 Wiring 5621 Wiring 5701 Flip-Flop 5711 Wiring 5712 Wiring 5713 Wiring 5714 Wiring 5715 Wiring 5716 Wiring 5717 Wiring 5721 Signal 5821 Signal 590a black area 590b White area 6400 pixels 6401 Switching transistor 6402 Drive transistor 6403 Capacitor element 6404 Light-emitting element 6405 signal line 6406 scan lines 6407 Power line 6408 Common electrode 7001 TFT 7002 Light-emitting element 7003 Cathode 7004 Light-emitting layer 7005 Anode 7011 Driving TFT 7012 Light-emitting element 7013 Cathode 7014 Light-emitting layer 7015 Anode 7016 Shielding membrane 7017 Conductive film 7021 Driving TFT 7022 Light-emitting element 7023 Cathode 7024 Light-emitting layer 7025 Anode 7027 Conductive film 9400 Communication Equipment 9401 Housing 9402 Scan button 9403 External input terminal 9404 Microphone 9405 Speaker 9406 Light-emitting part 9410 Display device 9411 Housing 9412 Display section 9413 Operation button 9600 Television Equipment 9601 Housing 9603 Display section 9605 Stand 9607 Display section 9609 Operation Key 9610 Remote Control Machine 9700 Digital Photo Frame 9701 Housing 9703 Display section 9881 Case 9882 Display section 9883 Display section 9884 Speaker section 9885 Operation Key 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 Case 9893 Connection section 9900 slot machine 9901 Housing 9903 Display section 4321a Scanning line driver circuit 4322a Scanning line driver circuit 4503a Signal line driver circuit 4504a Scanning line driver circuit 4518a FPC 5603a Thin Film Transistor 5603b Thin Film Transistor 5603c Thin Film Transistor 5703a Timing 5703b Timing 5703c Timing 5803a Timing 5803b Timing 5803c Timing

Claims

[Claim 1] forming a gate electrode over a substrate having an insulating surface; forming a first silicon oxynitride film containing nitrogen in an amount of 3 atomic % or more and 30 atomic % or less above the gate electrode; forming an oxide semiconductor layer above the first silicon oxynitride film in an atmosphere containing 50% to 100% oxygen; forming a second silicon oxynitride film containing nitrogen at 3 atomic % to 30 atomic % above the oxide semiconductor layer; selectively etching the second silicon oxynitride film to form a protective film; selectively etching the oxide semiconductor layer using the protective film as a mask to form an island-shaped semiconductor layer; selectively etching the protective film to form an opening; The method for manufacturing a semiconductor device further includes forming a conductive layer above the protective film, the conductive layer being electrically connected to the island-shaped semiconductor layer.

Images