Full-duplex scheme for asymmetric communication links using zero disparity modulation
Zero-disparity modulation in Ethernet PHY devices addresses interference in asymmetric links by creating a spectral notch, enhancing efficiency and reducing complexity and costs in automotive networks.
Patent Information
- Application Number
- JP2025017294
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-23
- Filing Date
- 2025-02-05
- Publication Date
- 2025-09-04
AI Technical Summary
Existing communication systems face interference issues due to spectral overlap between high-speed and low-speed signals in asymmetric Ethernet links, particularly in automotive networks, which can complicate design, increase cost, and require complex echo cancellation.
Implementing zero-disparity modulation schemes, such as bipolar NRZ or Manchester code modulation, to reduce spectral overlap by creating a notch near DC, allowing simultaneous transmission of high-speed and low-speed signals without strict frequency separation or echo cancellation.
The solution significantly reduces interference, simplifies the design, lowers costs, and reduces power consumption by eliminating the need for complex filtering and echo cancellation, resulting in a more efficient and cost-effective Ethernet PHY device.
Smart Images
Figure 2025129130000001_ABST
Abstract
Description
[Technical Field]
[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 557,119, filed February 23, 2024, the disclosure of which is incorporated herein by reference.
[0002] The present disclosure relates generally to digital communications, and more particularly to methods and systems for full-duplex communications using zero disparity modulation. [Background technology]
[0003] Various communication systems and applications involve bidirectional communication at asymmetric data rates, where the data rate for upstream communication differs from the data rate for downstream communication. For example, a communication link between a video camera and a controller typically carries a high data rate signal that conveys sensor data from the camera to the controller and a low data rate signal that conveys control data from the controller to the camera. Another example of an asymmetric communication link is a link connecting a processor and a display. In such a link, the data rate from the processor to the display is typically much higher than the data rate in the opposite direction.
[0004] The above description is presented as a comprehensive overview of the related art in this field and should not be construed as an admission that any of the information it contains constitutes prior art to the present patent application. Summary of the Invention
[0005] One embodiment described herein provides an Ethernet physical layer (PHY) device for use in an automotive network. The Ethernet PHY device includes a cable interface, a transmitter, and a receiver. The cable interface is configured to connect to an Ethernet cable. The transmitter is configured to generate an outbound signal by modulating outbound data with zero disparity modulation at a first data rate and transmit the outbound signal to the Ethernet cable via the cable interface. The receiver is configured to receive an inbound signal from the Ethernet cable via the cable interface, the inbound signal having a second data rate lower than the first data rate and at least partially overlapping in spectrum with the outbound signal, and demodulate the inbound signal to generate inbound data.
[0006] In some embodiments, the transmitter is configured to obtain the outbound data from one or more sensors, and the receiver is configured to receive control data in the inbound signal for controlling the one or more sensors.
[0007] In a disclosed embodiment, the transmitter is configured to modulate the outbound data using bipolar non-return-to-zero (NRZ) modulation. In another embodiment, the transmitter is configured to modulate the outbound data using Manchester code modulation.
[0008] In yet another embodiment, the transmitter is configured to modulate the outbound data using pulse amplitude modulation (PAM) to generate a PAM signal and to filter the PAM signal with a high pass filter (HPF). In some embodiments, the receiver is configured to demodulate the inbound signal using a zero disparity decoder.
[0009] According to one embodiment described herein, there is also provided an Ethernet physical layer (PHY) device for use in an automotive network. The Ethernet PHY device includes a cable interface, a receiver, and a transmitter. The cable interface is configured to connect to an Ethernet cable. The receiver is configured to receive an inbound signal modulated with zero disparity modulation at a first data rate from the Ethernet cable via the cable interface and demodulate the inbound signal to generate inbound data. The transmitter is configured to generate an outbound signal by modulating outbound data at a second data rate lower than the first data rate, the outbound signal having at least a partial spectral overlap with the inbound signal, and to transmit the outbound signal via the cable interface to the Ethernet cable.
[0010] In some embodiments, the receiver is configured to receive sensor data from one or more sensors in the inbound data, and the transmitter is configured to transmit control data for controlling the one or more sensors in the outbound data.
[0011] In one embodiment, the receiver is configured to demodulate the inbound signal using a bipolar non-return to zero (NRZ) decoder. In another embodiment, the receiver is configured to demodulate the inbound signal using a Manchester Code decoder. In yet another embodiment, the receiver is configured to demodulate the inbound signal using a pulse amplitude modulation (PAM) decoder. In a disclosed embodiment, the transmitter is configured to modulate the outbound data with outbound zero disparity modulation.
[0012] According to one embodiment described herein, there is also provided a method for communication in an Ethernet physical layer (PHY) device in an automotive network. The method includes generating an outbound signal by modulating outbound data with zero disparity modulation at a first data rate, and transmitting the outbound signal on an Ethernet cable. An inbound signal is received from the Ethernet cable. The inbound signal has a second data rate that is lower than the first data rate. The inbound signal at least partially overlaps the spectrum of the outbound signal. Demodulating the inbound signal to generate inbound data.
[0013] According to one embodiment described herein, there is further provided a method for communication in an Ethernet physical layer (PHY) device in an automotive network. The method includes receiving an inbound signal modulated with zero disparity modulation at a first data rate from an Ethernet cable and demodulating the inbound signal to generate inbound data. An outbound signal is generated by modulating outbound data at a second data rate that is lower than the first data rate. The outbound signal at least partially overlaps in spectrum with the inbound signal. The outbound signal is transmitted over the Ethernet cable.
[0014] The present disclosure will be more fully understood from the following detailed description of the embodiments thereof, taken in conjunction with the drawings. [Brief explanation of the drawings]
[0015] [Figure 1] FIG. 1 is a block diagram that schematically illustrates an asymmetric automotive Ethernet link, according to one embodiment described herein.
[0016] [Figure 2] 2 is a block diagram that schematically illustrates the internal configuration of a camera-side physical layer (PHY) device in the link of FIG. 1, according to one embodiment described herein.
[0017] [Figure 3] 1 is a flowchart that schematically illustrates a method for asymmetric Ethernet communication, according to one embodiment described herein.
[0018] [Figure 4] FIG. 2 is a block diagram that schematically illustrates a low-speed (LS) receiver in the camera-side PHY device of FIG. 1, in accordance with an embodiment described herein.
[0019] [Figure 5] FIG. 2 is a block diagram that schematically illustrates a high-speed (HS) transmitter in the camera-side PHY device of FIG. 1, according to one embodiment described herein.
[0020] [Figure 6] FIG. 2 is a block diagram that schematically illustrates a camera-side PHY device, according to one embodiment described herein.
[0021] [Figure 7] FIG. 2 is a block diagram that schematically illustrates a central (switch-side) PHY device, according to one embodiment described herein.
[0022] [Figure 8] FIG. 10 is a block diagram that schematically illustrates a camera-side PHY device in accordance with an alternative embodiment described herein.
[0023] [Figure 9] 10 is a graph showing the spectrum of the HS and LS signals in the camera side PHY device of FIG. 8 according to an alternative embodiment described herein. DETAILED DESCRIPTION OF THE INVENTION
[0024] The embodiments described herein provide improved techniques for multiplexing signals transmitted in opposite directions over a shared communication link. The embodiments disclosed herein are primarily described in the context of an asymmetric Ethernet link connecting a camera or other sensor to a switch or other central controller in an automotive Ethernet communication system. However, this selection is made merely by way of example. In alternative embodiments, the disclosed techniques can be used in any other suitable system, application, and / or with any other suitable communication protocol, including asymmetric communications. Non-limiting examples of alternative applications include industrial and enterprise networks.
[0025] In some embodiments, an automotive Ethernet communication link includes two Ethernet physical layer (PHY) devices communicating over an Ethernet cable. One PHY device is connected to a camera or other sensor and is referred to as the "camera-side" or "sensor-side" PHY device. The other PHY device is connected to a switch or central controller and is referred to as the "switch-side" or "central" PHY device. The Ethernet signals transmitted by the camera-side PHY device are referred to as "high-speed" (HS) signals, and the Ethernet signals transmitted by the switch-side PHY device are referred to as "low-speed" (LS) signals. In one example embodiment, the data rate of the HS signals is 5 Gbps, and the data rate of the LS signals is 100 Mbps.
[0026] In the disclosed embodiment, the HS PHY device and the LS PHY device simultaneously transmit HS and LS signals over the cable. The LS signal has a significantly narrower spectrum than the HS signal. When both signals are transmitted simultaneously, the spectrum of the LS signal typically overlaps underneath the spectrum of the HS signal. Unless addressed, the spectral overlap can cause interference between the two signals.
[0027] In some embodiments, interference between the HS signal and the LS signal is reduced by appropriate design of the modulation scheme of the HS signal. In the embodiments described herein, the HS signal is modulated using zero-disparity modulation. In this context, the term "zero-disparity modulation" refers to a modulation scheme in which the modulated signal has a spectral notch near zero frequency (0 Hz, also referred to as "direct current" - DC). Equivalently, the term "zero-disparity modulation" can be defined as a modulation scheme in which the modulated signal has an average amplitude of zero (or approaching zero). One example of zero-disparity modulation is bipolar non-return to zero (bipolar NRZ). Another example is Manchester code modulation. Yet another example is pulse amplitude modulation (PAM) followed by high-pass filtering (HPF). All three examples are described in detail below. Alternatively, any other suitable zero-disparity modulation can be used.
[0028] When using zero disparity modulation for the HS signal, the spectrum of the LS signal falls into a spectral region where the HS signal has very low power content, resulting in a significant reduction in interference in both directions (from the LS signal to the demodulation of the HS signal and from the HS signal to the demodulation of the LS signal).
[0029] The disclosed multiplexing scheme is superior to conventional schemes such as frequency-division multiplexing (FDD) and time-division multiplexing (TDD) in terms of, for example, cost, size, and design simplicity of the PHY device. Unlike FDD, the disclosed multiplexing scheme uses the spectral shape of the signal to distinguish between signals transmitted in the two link directions, thus eliminating the need for strict frequency separation and filtering between the HS and LS signals. Unlike TDD, the multiplexing scheme described herein allows for continuous simultaneous transmission of two signals (“full duplex”) and does not require switching and timing circuitry. Additionally, the low level of interference between the HS and LS signals eliminates the need for echo cancellation in the PHY device. Therefore, the disclosed PHY device is simpler to implement and has lower cost, size, and power consumption.
[0030] 1 is a block diagram that schematically illustrates an asymmetric automotive Ethernet link 20, according to one embodiment described herein. Link 20 is typically installed in a vehicle 22 as part of an automotive Ethernet communication system. In alternative embodiments, link 20 may be used in any other suitable system or application, such as an industrial or enterprise network. Link 20 comprises a pair of Ethernet PHY devices 24A and 24B that communicate over an Ethernet cable 28. Cable 28 may include, for example, a twisted-pair automotive Ethernet cable or any other suitable medium that is shared between both transmission directions of the link.
[0031] In this example, PHY device 24A ("camera-side PHY") is locally connected to camera 32, and PHY device 24B ("central PHY") is locally connected to a port of a switch or central controller. PHY device 24A receives sensor data (e.g., video data) from camera 32, generates HS signals carrying the sensor data, and transmits the HS signals to PHY device 24B over cable 28. PHY device 24B receives control data for controlling camera 32, for example from the central controller, generates LS signals carrying the control data, and transmits the LS signals to PHY device 24A over cable 28.
[0032] 1, the camera-side PHY device 24A includes an HS transmitter 36, an LS receiver 40, and a hybrid 44. The hybrid 44 serves as a cable interface for both transmission and reception. The HS transmitter 36 acquires sensor data from the camera 32, generates an HS signal (including modulating the sensor data using zero disparity modulation as described below), and transmits the HS signal over the cable 28 via the hybrid 44. The LS receiver 40 receives the LS signal from the cable via the hybrid 44, demodulates the LS signal, and forwards control data to the camera 32.
[0033] 1, central PHY device 24B includes HS receiver 48, LS transmitter 52, and hybrid 44. HS receiver 48 receives HS signals from cable 28 via hybrid 44, demodulates the HS signals, and forwards sensor data to its locally connected switch or central controller. LS transmitter 52 obtains control data from the switch or central controller, generates LS signals, and transmits the LS signals over cable 28 via hybrid 44.
[0034] The graphs at the bottom of Figure 1 show the spectra of the HS and LS signals in one embodiment. The vertical axis shows power spectral density (PSD) in arbitrary logarithmic units. The horizontal axis shows frequency in GHz. Plot 56 shows the spectrum of the HS signal transmitted by HS transmitter 36 (in camera-side PHY device 24A). Plot 60 shows the spectrum of the LS signal transmitted by LS transmitter 52 (in central PHY device 24B).
[0035] As can be seen, the HS and LS signals have partial spectral overlap: spectrum 60 of the LS signal coincides with the lower part of spectrum 56 of the HS signal. To reduce the level of interference between the two signals, given the partial overlap, the modulation scheme used in the HS signal has a spectral notch 64 near DC (zero frequency). Notch 64 is achieved by modulating the sensor data using zero-disparity modulation, in which the DC component is typically reduced to zero. In various embodiments, the HS transmitter 36 may modulate the sensor data using any suitable type of zero-disparity modulation.
[0036] In one embodiment, the HS transmitter 36 modulates the sensor data using bipolar NRZ modulation. In bipolar NRZ, the modulator receives a sequence of "0" and "1" bits. The "0" bits are mapped to a symbol value of zero. The "1" bits in the sequence are alternately mapped to +V and -V. When averaged (e.g., integrated) over time, the average amplitude of the modulated signal approaches zero.
[0037] In another embodiment, the HS transmitter 36 modulates the sensor data using Manchester code modulation. In Manchester code modulation, each individual symbol is positive for a portion of the symbol interval and negative for the remainder of the symbol interval, such that the average amplitude of each symbol is zero. In one example, a bit value of "0" maps to a symbol equal to +V during the first half of the symbol interval and transitions to -V during the second half of the symbol interval. A bit value of "1" maps to a symbol equal to -V during the first half of the symbol interval and transitions to +V during the second half of the symbol interval.
[0038] In the frequency domain, the spectra of both bipolar NRZ and Manchester code modulation have a spectral notch near DC (since the average signal amplitude is essentially zero), similar to notch 64. This property reduces interference between the HS and LS signals.
[0039] In various embodiments, the LS transmitter 52 (in the central PHY device 24B) may use various types of modulation to modulate the control data to generate the LS signal. The modulation used for the LS signal may, but need not necessarily, be zero-disparity modulation. For example, in some embodiments, the LS transmitter 52 may use PAM (e.g., PAM-2 or PAM-4) to generate the LS signal. Alternatively, however, in some embodiments, the LS transmitter 52 may use zero-disparity modulation for the LS signal as well. This implementation is useful, for example, because it reduces baseline wander effects, in which the baseline level of a signal changes slowly over time. In the non-limiting example of FIG. 1, it can also be seen that the spectrum 60 has a spectral notch at DC caused by the use of zero-disparity modulation by the LS transmitter 52.
[0040] FIG. 2 is a block diagram that schematically illustrates the internal configuration of a camera-side PHY device 24A according to one embodiment described herein.
[0041] In this example, the HS transmitter 36 includes a framing module 68, a bipolar NRZ encoder 72, a digital-to-analog converter (DAC) 76, and a transmit (Tx) filter 80. The framing module 68 formats the sensor data into frames, including, in some embodiments, calculation of forward error correction (FEC) and cyclic redundancy check (CRC) bits. The encoder 72 encodes the resulting bit stream in bipolar NRZ (i.e., alternately mapping "0" bits to "0" and "1" bits to "1" and "-1"). The DAC 76 converts the output of the encoder 72 into an analog signal with three analog values {-V, 0, +V}. The Tx filter 80 filters the output of the DAC 76. The resulting HS signal is transmitted over the cable 28 via the hybrid 44.
[0042] 2, LS receiver 40 includes a low-pass (LP) filter 84, an analog-to-digital converter (ADC) 88, an NRZ decoder 92, a framing module 96, and a clock-data recovery (CDR) module 100. LP filter 84 applies low-pass filtering to the LS signal received from cable 28 via hybrid 44.
[0043] The spectral response of the LP filter 84 is designed to pass the spectrum of the LS signal (e.g., spectrum 60 in FIG. 1 ) while suppressing most of the spectrum of the HS signal (e.g., spectrum 56 in FIG. 1 ). As explained above, the spectral notch 64 reduces the amount of power of the HS signal that overlaps with the LS signal. Combined with the low-pass filtering of the LP filter 84, the amount of energy of the HS signal that leaks to the LS receiver 40 is minimal. As a result, interference caused by the transmission of the HS signal to the reception of the LS signal is minimized.
[0044] The ADC 88 digitizes the filtered signal at the output of the LP filter 84. The NRZ decoder 92 decodes the digitized signal. The framing module 96 decodes and removes the FEC and CRC bits. The resulting control data is delivered to the camera 32. The CDR module 100 reconstructs the clock of the LS signal and controls the sampling clock of the ADC 88.
[0045] 3 is a flow chart that generally illustrates a method for asymmetric Ethernet communication, according to one embodiment described herein. The method focuses on the operation of the camera-side PHY device 24A. The left side of the diagram illustrates operations related to transmitting HS signals. The right side of the diagram illustrates operations related to receiving LS signals.
[0046] In a receive sensor data operation 104, the HS transmitter 36 receives sensor data from the camera 32. In a modulate operation 108, the HS transmitter 36 modulates the sensor data with bipolar NRZ modulation. In a transmit operation 112, the HS transmitter 36 transmits an HS signal onto the cable 28.
[0047] In a receive control signal operation 116, the LS receiver 40 receives the LS signal from the cable 28. In a demodulate operation 120, the LS receiver 40 demodulates the LS signal to regenerate the control data. In a forward operation 124, the LS receiver 40 forwards the control data to the camera 32.
[0048] FIG. 4 is a block diagram that schematically illustrates the internal structure of an LS receiver in camera-side PHY device 24A according to another embodiment described herein. In this example, the LS signal is also modulated using bipolar NRZ modulation. The example LS receiver in FIG. 4 has an analog front-end (AFE) 128 followed by a digital processor 132. The AFE 128 includes an analog LP filter 136, a gain block 140, and a pair of comparators 144. The digital block 132 includes a downsampler 148, a slicer (also referred to as a decision circuit) 156, a framing module 160, and a clock data recovery (CDR) module 152.
[0049] LP filter 136 (similar to LP filter 84 of FIG. 2) applies low-pass filtering to the LS signal received from cable 28. As explained above, this filtering removes the vast majority of the energy in the HS signal that may leak into the LS receiver.
[0050] Gain block 140 amplifies the filtered LS signal to the appropriate level expected by comparator 144. Comparator 144 compares the level of the LS signal to -0.5 and +0.5. The outputs of the two comparators are summed together. At the output of AFE 128, the resulting signal is a sequence of analog values with three possible values {-V, 0, +V} due to the bipolar modulation of the LS signal.
[0051] Downsampler 148 samples the output of AFE 128 at a rate of one sample per symbol (i.e., at the symbol rate of the LS signal). Slicer 156 determines, for each sample generated by downsampler 148, whether the sample represents a "1," a "0," or a "-1." Framing module 160 operates similarly to framing module 96 of FIG. 2.
[0052] 5 is a block diagram that schematically illustrates the internal structure of an HS transmitter in camera side PHY device 24A, according to another embodiment described herein. In this embodiment, the HS transmitter includes a digital processor 164 followed by an AFE 168. The digital processor 164 includes a framing module 172 and a bipolar NRZ mapper 176. The AFE 168 includes a three-level DAC 180 and an analog Tx filter 184.
[0053] Framing module 172 receives sensor data from camera 32 and frames the data, similar to framing module 68 of FIG. 2. Mapper 176, in one embodiment, maps the framed sensor data to a bipolar NRZ sequence of {-1, 0, 1} values. DAC 180 converts the {-1, 0, 1} values to respective analog values. Tx filter 185 filters the output of DAC 180, similar to filter 80 of FIG. 2. The resulting HS signal is transmitted over cable 28 via hybrid 44. In alternative embodiments, other suitable types of HS modulation can be used, and the HS transmitter may have any other suitable configuration.
[0054] Figure 6 is a block diagram that schematically illustrates a camera-side PHY device according to one embodiment described herein. The camera-side PHY device of Figure 6 includes an AFE 188 and a digital processor 192. In addition to the hybrid 44, the AFE 188 includes transmit circuitry similar to that of the AFE 128 of Figure 4 (including the LP filter 136, gain block 140, and comparator 144) and receive circuitry similar to that of the AFE 168 of Figure 5 (including the 3-level DAC 204 and analog Tx filter 208). The digital processor 192 includes transmit circuitry similar to that of the digital processor 132 of Figure 4 (including the downsampler 148, slicer 156, framing module 160, and CDR module 152) and receive circuitry similar to that of the digital processor 164 of Figure 5 (including the framing module 196 and bipolar NRZ mapper 200).
[0055] In the configuration of FIG. 6, the transmit clock may be independent of the receive clock.
[0056] 7 is a block diagram that schematically illustrates the internal structure of central PHY device 24B in accordance with one embodiment described herein. PHY device 24B includes AFE 212 and digital processor 216. In this example, the LS signal is modulated using conventional PAM, and the HS signal is modulated using bipolar NRZ.
[0057] The transmit circuitry in the digital processor 216 includes a framing / mapping module 216 and a physical coding sublayer (PCS) module 220, the outputs of which are multiplexed by a multiplexer 224. The framing / mapping module 216 receives a bit stream as input and generates a higher rate bit stream according to bipolar NRZ. In one embodiment, the framing / mapping module 216 repeats incoming "1" bits as "+3" and "-3" and converts incoming "0" bits into an alternating sequence of "+1" and "-1".
[0058] The PAM mapping module outputs a sequence of digital PAM symbols for the LS signal. A pre-emphasis filter 232 filters the sequence of PAM symbols. In one embodiment, the pre-emphasis filter 232 comprises an equal-length symmetric LP filter that converts sequences of "+1" and "-1" to zeros. The transmit circuitry in the AFE 212 includes a DAC 236 that converts the digital PAM signal to an analog PAM signal, and an analog Tx filter 240 that filters the analog PAM signal. The output of the filter 240 is transmitted to the cable 28 via the hybrid 44.
[0059] The receiver circuit in the AFE 212 includes an analog LP filter 244 that filters the HS signal received from the cable 28 via the hybrid 44. An ADC 248 digitizes the HS signal. In the digital processor 216, the receiver circuit includes a CDR module 252 that recovers the HS signal clock and controls the sampling clock of the ADC 248. A downsampler 256 reduces the rate of the digitized HS signal to one sample per symbol. A feed-forward equalizer (FFE) 260 and a decision-feedback equalizer (DFE) 276 equalize the signal. The equalizers 260 and 276 typically include digital filters with adaptive coefficients (taps). Alternatively, other suitable types of equalizers can be used. A slicer 264 makes bit decisions. A frame and demapping module 268 and a PCS module extract and output the sensor data.
[0060] In some embodiments, a digital echo cancellation (DEC) module 280 removes the echo of the transmitted LS signal from the received HS signal. In alternative embodiments, analog echo cancellation can be used. In yet other embodiments, the receive performance of PHY device 24B is sufficient without echo cancellation, and echo cancellation module 280 is omitted.
[0061] The central PHY device 24B of Figure 7 can be implemented without using certain elements of a conventional IEEE 802.2ch compatible PHY device. Certain blocks (e.g., framing modules 216 and 268 and mux 224) may be new, while other elements may require minor modifications. In some embodiments, certain elements (e.g., analog LP filter 244 and / or DFE 276) can be omitted. In the configuration of Figure 7, the transmit clock and receive clock may be locked to each other.
[0062] Figure 8 is a block diagram that schematically illustrates a camera-side PHY device according to an alternative embodiment described herein. In this example, the HS signal is modulated using PAM-4, and a spectral notch near DC is generated by analog filtering of the PAM-4 signal. The resulting signal spectrum is shown below in Figure 9. Alternatively, digital filtering can be used.
[0063] In this example, the internal structure of PHY device 24A is similar to that of Figure 6. The PHY device of Figure 8 differs from that of Figure 6 in the following respects: The digital processor 192 includes a PAM-4 mapper 284 instead of the bipolar NRZ mapper 200. The AFE188 includes a 4-level DAC288 instead of a 3-level DAC204.
[0064] In some embodiments, when using PAM-4 modulation followed by high-pass filtering for the HS signal, the central PHY device 24B can be similar to that of FIG. 7 above.
[0065] 9 is a graph showing the spectra of the transmitted HS signal and the received LS signal at the camera side PHY device of FIG. 8 in accordance with an alternative embodiment described herein. The vertical axis shows power spectral density (PSD) in arbitrary logarithmic units. The horizontal axis shows frequency. Plot 292 shows the spectrum of the HS signal transmitted by the HS transmitter 36. Plot 296 shows the spectrum of the LS signal received by the LS receiver. As can be seen, the HS signal spectrum 292 has a spectral notch 300 near zero frequency. This notch is created by the high-pass filtering action of the analog Tx filter 208 (FIG. 8).
[0066] The configurations of the various communication links and PHY devices, and their components, such as HS and LS transmitters and receivers, shown in Figures 1-8 are merely example configurations shown for clarity, and any other suitable configurations may be used in alternative embodiments.
[0067] Various elements of the disclosed communications links and PHY devices may be implemented using dedicated hardware or firmware, such as using hardwired or programmable logic in one or more application specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs). Additionally or alternatively, certain elements of the disclosed communications links and PHY devices may be implemented in software and / or using a combination of hardware and software elements. Elements not essential to an understanding of the disclosed technology have been omitted from the figures for the sake of clarity.
[0068] In some embodiments, certain functions of the disclosed communications links and PHY devices may be implemented in one or more programmable processors, such as one or more central processing units (CPUs) or microcontrollers, that are programmed in software to perform the functions described herein. This software may be downloaded to any of the processors, for example, in electronic form over a network, or alternatively or additionally, may be provided on and / or stored on non-transitory tangible media such as magnetic, optical, or electronic memory.
[0069] Although the embodiments described herein primarily address automotive Ethernet links, the methods and systems described herein may also be used in other applications involving bidirectional communication at asymmetric data rates.
[0070] It should be noted that the above-described embodiments are cited as examples, and that the present invention is not limited to what has been particularly shown and described above. Rather, the scope of the present invention includes both combinations and subcombinations of the various features described above, as well as variations and modifications thereof, which would occur to one skilled in the art upon reading the foregoing description and which are not disclosed in the prior art. Documents incorporated by reference into this patent application are considered integral parts of this application, except that, to the extent that any term is defined in these incorporated documents in a manner that contradicts a definition expressly or impliedly made herein, only the definition in this specification shall be considered.
Claims
1. 1. An Ethernet physical layer (PHY) device for use in an automotive network, the Ethernet PHY device comprising: a cable interface configured to connect to an Ethernet cable; a transmitter configured to generate an outbound signal by modulating outbound data with zero disparity modulation at a first data rate, and to transmit the outbound signal via the cable interface onto the Ethernet cable; and a receiver configured to receive from the Ethernet cable via the cable interface an inbound signal having a second data rate lower than the first data rate, the inbound signal having at least a partial spectral overlap with the outbound signal, and to demodulate the inbound signal to generate inbound data.
1. An Ethernet PHY device comprising:
2. 10. The Ethernet PHY device of claim 1, wherein the transmitter is configured to obtain the outbound data from one or more sensors, and the receiver is configured to receive control data in the inbound signal for controlling the one or more sensors.
3. 10. The Ethernet PHY device of claim 1, wherein the transmitter is configured to modulate the outbound data using bipolar non-return to zero (NRZ) modulation.
4. 10. The Ethernet PHY device of claim 1, wherein the transmitter is configured to modulate the outbound data using Manchester Code modulation.
5. 10. The Ethernet PHY device of claim 1, wherein the transmitter is configured to modulate the outbound data using pulse amplitude modulation (PAM) to generate a PAM signal and to filter the PAM signal with a high-pass filter (HPF).
6. 6. The Ethernet PHY device of claim 1, wherein the receiver is configured to demodulate the inbound signal using a zero disparity decoder.
7. 1. An Ethernet physical layer (PHY) device for use in an automotive network, the Ethernet PHY device comprising: a cable interface configured to connect to an Ethernet cable; a receiver configured to receive an inbound signal modulated with zero disparity modulation at a first data rate from the Ethernet cable via the cable interface and to demodulate the inbound signal to generate inbound data; and a transmitter configured to generate an outbound signal by modulating outbound data at a second data rate lower than the first data rate, the outbound signal having at least a partial spectral overlap with the inbound signal, and to transmit the outbound signal over the Ethernet cable via the cable interface.
1. An Ethernet PHY device comprising:
8. 8. The Ethernet PHY device of claim 7, wherein the receiver is configured to receive sensor data from one or more sensors in the inbound data, and the transmitter is configured to send control data for controlling the one or more sensors in the outbound data.
9. 8. The Ethernet PHY device of claim 7, wherein the receiver is configured to demodulate the inbound signal using a bipolar non-return to zero (NRZ) decoder.
10. 8. The Ethernet PHY device of claim 7, wherein the receiver is configured to demodulate the inbound signal using a Manchester code decoder.
11. 8. The Ethernet PHY device of claim 7, wherein the receiver is configured to demodulate the inbound signal using a pulse amplitude modulation (PAM) decoder.
12. 12. The Ethernet PHY device of claim 7, wherein the transmitter is configured to modulate the outbound data with outbound zero disparity modulation.
13. 1. A method for communication in an Ethernet physical layer (PHY) device in an automotive network, the method comprising: generating an outbound signal by modulating outbound data with zero disparity modulation at a first data rate, and transmitting the outbound signal on an Ethernet cable; and receiving an inbound signal from the Ethernet cable having a second data rate lower than the first data rate, the inbound signal having at least a partial spectral overlap with the outbound signal; and demodulating the inbound signal to generate inbound data. A method for providing the above.
14. Generating the outbound signal includes obtaining the outbound data from one or more sensors, and receiving the inbound signal includes receiving control data in the inbound signal for controlling the one or more sensors.
14. The method for communication according to claim 13.
15. 14. The method for communication of claim 13, wherein generating the outbound signal comprises modulating the outbound data using bipolar non-return to zero (NRZ) modulation.
16. 14. The method for communication of claim 13, wherein generating the outbound signal comprises modulating the outbound data using Manchester code modulation.
17. 14. The method for communication of claim 13, wherein generating the outbound signal comprises modulating the outbound data using pulse amplitude modulation (PAM) to generate a PAM signal, and filtering the PAM signal with a high pass filter (HPF).
18. 18. A method for communication according to any one of claims 13 to 17, wherein demodulating the inbound signal comprises applying a zero disparity decoder.
19. 1. A method for communication in an Ethernet physical layer (PHY) device in an automotive network, the method comprising: receiving an inbound signal modulated with zero disparity modulation at a first data rate from an Ethernet cable, and demodulating the inbound signal to generate inbound data; and modulating outbound data at a second data rate lower than the first data rate to generate an outbound signal that at least partially overlaps in spectrum with the inbound signal; and transmitting the outbound signal over the Ethernet cable. A method for providing the above.
20. 20. The method for communication of claim 19, wherein receiving the inbound signal comprises receiving sensor data from one or more sensors in the inbound data, and transmitting the outbound signal comprises transmitting control data for controlling the one or more sensors in the outbound data.