Semiconductor device
The semiconductor device addresses charge-up issues by using a passivation film and light-shielding film to block charge accumulation, improving sensitivity and stability.
Patent Information
- Application Number
- JP2024030599
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-29
- Publication Date
- 2025-09-10
AI Technical Summary
Charge-up in semiconductor sensors due to accumulated charged particles in interlayer insulating films and wiring layers affects the potential distribution and electrical characteristics, reducing sensitivity.
A semiconductor device with a passivation film covering specific wiring layers and junctions, and a light-shielding film to prevent charge-up and improve sensitivity.
The structure effectively blocks charge accumulation, enhancing sensitivity by preventing charge-up and maintaining stable electrical characteristics.
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Figure 2025132800000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor device including a semiconductor sensor that detects radiation (charged particle beams, electromagnetic waves, light, etc.). [Background technology]
[0002] In the manufacture of a semiconductor device including a semiconductor sensor, impurities are injected into a semiconductor substrate to form an N-type semiconductor region, a P-type semiconductor region, etc. in the semiconductor substrate, and an interlayer insulating film, a wiring layer, a contact, etc. are formed on top of that to form a semiconductor sensor (e.g., a photodiode).
[0003] However, in such semiconductor sensors, some of the irradiated charged particles that are not captured by the semiconductor layer may accumulate (charge up) in the interlayer insulating film, etc. While charge up can be avoided by opening (removing) the interlayer insulating film above the semiconductor layer to expose the surface of the semiconductor layer, it is difficult to avoid charge up around the wiring layer. This may affect the potential distribution in the semiconductor sensor region, potentially changing the electrical characteristics of the semiconductor sensor. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Publication No. 63-299175 Summary of the Invention [Problem to be solved by the invention]
[0005] The present invention has been made in view of the above-mentioned problems, and provides a semiconductor device that can improve the sensitivity of a semiconductor sensor while avoiding charge-up. [Means for solving the problem]
[0006] A semiconductor device according to a first aspect of the present invention includes a semiconductor sensor formed on a semiconductor substrate for detecting radiation, an interlayer insulating film formed on an upper layer of the semiconductor substrate, a wiring layer disposed on the interlayer insulating film, and a passivation film covering the wiring layer. The passivation film is configured to cover the entire first wiring layer of the wiring layers, and to cover only a portion of a second wiring layer of the wiring layers.
[0007] A semiconductor device according to a second aspect of the present invention includes a semiconductor sensor formed on a semiconductor substrate for detecting radiation, an interlayer insulating film formed on the semiconductor substrate, and a wiring layer disposed on the interlayer insulating film. The wiring layer is wired so as to cover all of the junctions of the sensor regions of the multiple semiconductor layers constituting the semiconductor sensor. Here, "all" is used to mean that the junctions are substantially covered by the wiring layer, and the exposed portions are negligibly small.
[0008] A semiconductor device according to a third aspect of the present invention includes a semiconductor sensor formed on a semiconductor substrate for detecting radiation, an interlayer insulating film formed on an upper layer of the semiconductor substrate, and a light-shielding film formed on the interlayer insulating film, the light-shielding film having an opening above the semiconductor sensor and configured to cover an area of the semiconductor substrate excluding an area above the semiconductor sensor. [Brief explanation of the drawings]
[0009] [Figure 1] FIG. 1 is a plan view illustrating a semiconductor device 1 according to a first embodiment of the present invention. [Figure 2] 2 is a cross-sectional view along AA' in FIG. [Figure 3] FIG. 4 is a cross-sectional view illustrating a semiconductor device 1 according to a second embodiment of the present invention. [Figure 4] FIG. 10 is a plan view illustrating a semiconductor device 1 according to a third embodiment of the present invention. [Figure 5] 5 is a cross-sectional view taken along the line AA′ of FIG. 4. [Figure 6] FIG. 11 is a cross-sectional view showing a modified example of the third embodiment. [Figure 7] FIG. 10 is a cross-sectional view illustrating a semiconductor device 1 according to a fourth embodiment of the present invention. [Figure 8] FIG. 10 is a cross-sectional view of a semiconductor device 1 according to a modified example of the fourth embodiment. [Figure 9] FIG. 10 is a cross-sectional view of a semiconductor device 1 according to a modified example of the fourth embodiment. [Figure 10] FIG. 10 is a cross-sectional view of a semiconductor device 1 according to a modified example of the fourth embodiment. [Figure 11] FIG. 10 is a plan view illustrating a semiconductor device 1 according to a fifth embodiment of the present invention. [Figure 12] 12 is a cross-sectional view taken along the line AA′ of FIG. 11. [Figure 13] FIG. 10 is a plan view illustrating a semiconductor device 1 according to a sixth embodiment of the present invention. [Figure 14] 14 is a cross-sectional view taken along the line AA′ of FIG. 13. [Figure 15] FIG. 13 is a cross-sectional view illustrating a semiconductor device 1 according to a modified example of the sixth embodiment. [Figure 16] FIG. 13 is a cross-sectional view illustrating a semiconductor device 1 according to a modified example of the sixth embodiment. [Figure 17] FIG. 10 is a schematic diagram showing an example of use of the semiconductor device 1 according to the sixth embodiment. [Figure 18] FIG. 10 is a schematic diagram showing an example of use of the semiconductor device 1 according to the sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, the present embodiment will be described with reference to the accompanying drawings. In the accompanying drawings, functionally identical elements may be designated by the same numerals. Note that the accompanying drawings show embodiments and implementation examples according to the principles of the present disclosure, but these are for understanding the present disclosure and are not to be used to interpret the present disclosure in a limiting manner. The descriptions in this specification are merely typical examples and are not intended to limit the scope or application of the present disclosure in any way.
[0011] Although the present embodiment has been described in sufficient detail to enable those skilled in the art to implement the present disclosure, it should be understood that other implementations and forms are possible, and that changes in configuration and structure and substitutions of various elements are possible without departing from the scope and spirit of the technical ideas of the present disclosure. Therefore, the following description should not be interpreted as being limited thereto.
[0012] [First embodiment] A semiconductor device 1 according to a first embodiment of the present invention will be described with reference to Figures 1 and 2. Figure 1 is a plan view illustrating the configuration of the semiconductor device 1, and Figure 2 is a cross-sectional view taken along line AA' in Figure 1 (the arrow indicates the extraction direction). This semiconductor device 1 includes a photodiode as an example of a semiconductor sensor that detects radiation, on a semiconductor substrate 11. The photodiode is composed of a P-type well 12 formed on the semiconductor substrate 11, an N-type region 13 formed on the surface of the P-type well 11, a P+ type region 14 formed on the P-type well 12 and functioning as a contact region, and an N+ type high concentration layer 15 formed in the N- type region 13 and functioning as a contact region.
[0013] An interlayer insulating film 16, for example, is formed on the entire surface of the semiconductor substrate 11, including the region where the photodiode is formed. The interlayer insulating film 16 can be made of, for example, NSG (nondoped silicate glass).
[0014] Via contacts V1 and V2 are formed in the interlayer insulating film 16, vertically penetrating the interlayer insulating film 16 to reach the P+ type high concentration layer 14 and the N+ type high concentration layer 15. Wirings 18 and 19 are formed above the via contacts V1 and V2. The via contacts V1 and V2 and the wirings 18 and 19 may be made of, for example, copper (Cu), aluminum (Al), tungsten (W), or the like. The via contacts V1 and V2 and the wirings 18 and 19 may be formed in the interlayer insulating film 16 via a barrier metal (titanium nitride, etc.).
[0015] The wiring layer 18 is a power supply wiring that supplies a voltage (e.g., a ground voltage) to the photodiode, and the wiring layer 19 is a readout wiring that outputs a signal from the photodiode. A passivation film 21 is deposited so as to cover the wiring layers 18 and 19. The passivation film 21 can be formed, for example, from a silicon oxide film (SiO2).
[0016] The passivation film 21 covers the entire wiring layer 19 serving as a readout wiring, while covering only the side surfaces of the wiring layer 18 serving as a power supply wiring. The upper surface of the wiring layer 18 is not covered by the passivation film 21 (is exposed).
[0017] With this configuration, the leak path to the wiring layer 19 is blocked by the passivation film 21, and the leak current does not flow into the wiring layer 19 serving as the readout wiring. The interlayer insulating film 16 and the passivation film 21 have leak paths due to adsorbed moisture and the like, and charges that have built up in the interlayer insulating film 16 and the passivation film 21 flow through the leak paths into the wiring layer 18 serving as the power supply wiring, the surface of which is exposed. Therefore, charge buildup is suppressed. The wiring layer 18 serving as the power supply wiring is a large-capacity fixed-potential wiring, so even if charge buildup flows in, it does not affect the operation of the photodiode.
[0018] In the manufacture of semiconductor devices, a protective film (passivation film) made of an insulating material is typically formed on top of the metal wiring layer to prevent corrosion of the metal wiring within the device due to moisture in the operating environment. However, when such a passivation film is applied to a semiconductor device used under irradiation with charged particles, such as a sensor for detecting radiation (charged particle beam, electromagnetic wave, light, etc.), components of the irradiated charged particles that are not captured by the semiconductor layer accumulate (charge up) on the passivation film, thereby affecting the operation of the semiconductor device. In the first embodiment, this problem is solved by the structure of the passivation film 21 described above.
[0019] [Second embodiment] Next, a semiconductor device 1 according to a second embodiment of the present invention will be described with reference to Fig. 3. The planar structure of the semiconductor device 1 according to the second embodiment is similar to that of the first embodiment (Fig. 1). FIG. 3 is a cross-sectional view of the semiconductor device 1 according to the second embodiment taken along line AA'.
[0020] In the first embodiment, the passivation film 21 covers the entire wiring layer 19 as a readout wiring, but covers only the side surfaces of the wiring layer 18 as a power supply wiring, leaving the top surface exposed. In contrast, in the second embodiment (FIG. 3), the passivation film 21 covers the entire wiring layer 18 as a power supply wiring, but covers only the side surfaces of the wiring layer 19 as a readout wiring, leaving the top surface exposed.
[0021] This configuration can also achieve substantially the same effects as in the first embodiment. Although the leakage path to the wiring layer 19 as the readout wiring remains and has an effect, on the other hand, charged particles that cannot reach the photodiode and have charged up in the interlayer insulating film 16 or the passivation film 21 can be made to flow into the wiring layer 19 and used as an output signal, thereby improving the detection sensitivity of the photodiode.
[0022] [Third embodiment] Next, a semiconductor device 1 according to a third embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. 4 is a plan view illustrating the configuration of the semiconductor device 1 according to the third embodiment, and FIG. 5 is a cross-sectional view taken along line AA' in FIG. 4. As with the above-described embodiments, this semiconductor device 1 includes a photodiode as an example of a semiconductor sensor for detecting radiation on a semiconductor substrate 11. The photodiode includes a P-type well 12 formed on the semiconductor substrate 11, an N-type region 13 formed on the surface of the P-type well 11, a P+ type region 14 formed on the P-type well 12 and functioning as a contact region, and an N+ type high-concentration layer 15 formed in the N-type region 13 and functioning as a contact region.
[0023] An interlayer insulating film 16, for example, is formed on the entire surface of the semiconductor substrate 11 including the photodiode formation region. In addition, via contacts V1 and V2 are formed in the interlayer insulating film 16, vertically penetrating the interlayer insulating film 16 to reach the P+ type high concentration layer 14 (contact layer) and the N+ type high concentration layer 15 (contact layer), and wirings 18 and 19 are formed above the via contacts V1 and V2.
[0024] The wiring layers 18 and 19 in this third embodiment are formed to cover all of the junctions between the multiple semiconductor layers 12, 13, 14, and 15 that constitute the photodiode. For example, the wiring layer 19 is formed to cover all of the junctions between the P-type well 12 and the N-type region 13, as well as the junctions between the N+-type high-concentration layer 15 and the N-type region 13. Here, "covering" refers to a positional relationship in which the covered portions are invisible in a planar view (XY plane). The wiring layer 18 is also formed to cover the junctions between the P-type well 12 and the P+-type high-concentration layer 14. The term "junctions" refers not only to junctions between different conductivity types, such as P-type and N-type, but also to junctions between the same conductivity types, such as P+-type and P-type or N+-type and N-type.
[0025] In this way, because the wiring layers 18 and 19 cover the junctions of the various semiconductor layers, charged particles generated near the junctions of the photodiode are absorbed by the wiring layers 18 and 19 made of a conductor and read out as signal charge, preventing charge-up. Note that, as shown in Figure 6, it is also possible to form a passivation film 22 that covers the wiring layers 18 and 19. Charge-up occurs in the passivation film 22, but because the upper parts of the various junctions of the photodiode are covered with the wiring layers 18 and 19, the shielding effect blocks the electric field effect from the charged-up charges, so there is no effect on the PN junctions.
[0026] [Fourth embodiment] Next, a semiconductor device 1 according to a fourth embodiment of the present invention will be described with reference to FIG. 7. The planar layout of the semiconductor device 1 according to the fourth embodiment is similar to that of the third embodiment (FIG. 4), and therefore a duplicated description will be omitted. However, as shown in FIG. 7, the semiconductor device 1 according to the fourth embodiment differs from the third embodiment in that the wiring layers 18 and 19 are formed across two different layers. In the fourth embodiment, the wiring layers 18 and 19 are also formed so as to cover the junctions of the semiconductor layers of the photodiode, as in the third embodiment, and therefore the same effects as those of the third embodiment can be achieved.
[0027] 8, the wiring layer 18 may be formed not only above the P+ type high concentration layer 14 but also extending to the junction between the N- type region 13 and the P- type well 12, so that the wiring layer 18 and the wiring layer 19 overlap in the region where the wiring layer 19 covers the junction. Also, in FIGS. 7 and 8, the wiring layer 18 is positioned above the wiring layer 19, but conversely, the wiring layer 19 may be disposed above the wiring layer 18, as shown in FIGS. 9 and 10.
[0028] [Fifth embodiment] A semiconductor device 1 according to the fifth embodiment will be described with reference to Fig. 11 and Fig. 12. Fig. 11 is a plan view illustrating the configuration of the semiconductor device 1, and Fig. 12 is a cross-sectional view taken along line AA' of Fig. 11.
[0029] This semiconductor device 1 includes a photodiode as an example of a semiconductor sensor for detecting radiation, on a semiconductor substrate 11. The photodiode is composed of a P-type well 12 formed on the semiconductor substrate 11, an N-type region 13 formed on the surface of the P-type well 11, a P+ type region 14 formed on the P-type well 12 and functioning as a contact region, and an N+ type high concentration layer 15 formed in the N- type region 13 and functioning as a contact region.
[0030] For example, a first interlayer insulating film 16 and a second interlayer insulating film 17 are formed on the entire surface of the semiconductor substrate 11 including the photodiode formation region. The first interlayer insulating film 16 can be formed of, for example, nondoped silicate glass (NSG), and the second interlayer insulating film 17 can be formed of, for example, phosphorus silicate glass (PSG). By appropriately controlling the ratio of the film thicknesses of the first interlayer insulating film 16 and the second interlayer insulating film 17, the reflectance of the anti-reflection film formed by the first interlayer insulating film 16 and the second interlayer insulating film 17 can be adjusted to a desired value.
[0031] Via contacts V1 and V2 are formed in the first interlayer insulating film 16, vertically penetrating the first interlayer insulating film 16 to reach the P+ type high concentration layer 14 and the N+ type high concentration layer 15. Furthermore, wirings 18 and 19 are formed in the second interlayer insulating film 17 on the upper ends of the via contacts V1 and V2. The via contacts V1 and V2 and the wirings 18 and 19 may be made of, for example, copper (Cu), aluminum (Al), tungsten (W), or the like. The via contacts V1 and V2 and the wirings 18 and 19 may be formed in the first interlayer insulating film 16 and the second interlayer insulating film 17 via a barrier metal (titanium nitride, etc.).
[0032] A blocking film (light-shielding film) 20 is formed on the entire surface of the second interlayer insulating film 17 except for the incident region of the photodiode (part of the N-type region 13). The blocking film 20 is formed of a thin film of, for example, chromium (Cr), tungsten (W), tantalum (Ta), or the like, and serves to block light and other radiation irradiated from above the semiconductor device 1. The blocking film 20 is formed in regions other than above the N-type region 13, which is the incident region of the photodiode, and blocks light and other radiation from above. In particular, the blocking film 20 is preferably formed to cover the junctions of the multiple semiconductor layers 13, 14, 15, etc. of the photodiode 20. Because the blocking film 20 is made of a conductive film such as a thin chromium film, it does not cause charge buildup of charged particles. Wiring 21 for applying a unique potential is connected to the blocking film 20. Applying a unique potential to the wiring 21 allows for control of incident radiation. By applying a unique potential to the blocking film 20, a potential barrier is formed, which prevents low-energy electrons from entering the photodiode (enabling energy resolution of incoming electrons). Note that a passivation film made of silicon nitride (SiN) or the like may be further formed on the upper surface of the blocking film 20.
[0033] [Sixth embodiment] A semiconductor device 1 according to a sixth embodiment will be described with reference to Figures 13 and 14. Figure 13 is a plan view illustrating the configuration of the semiconductor device 1, and Figure 14 is a cross-sectional view taken along line AA' in Figure 13. The basic configuration of the sixth embodiment is the same as that of the fifth embodiment, and the same components as those in Figures 11 and 12 are denoted by the same reference numerals in Figures 13 and 14, so duplicated descriptions will be omitted.
[0034] In the sixth embodiment, a strip-shaped blocking film 20D is formed above N-type region 13, which is the incident region of the photodiode, so as to further divide N-type region 13 into two. This allows the photodiode to essentially have multiple incident regions.
[0035] [Variations] 15 and 16 show modifications of the fifth and sixth embodiments. In the modification of FIG. 15, interlayer insulating films 16 and 17 above N-type region 13 are removed to form hole H, and the surface of N-type region 13 is exposed to the outside. In the modification of FIG. 16, interlayer insulating films 16 and 17 and blocking film 20D remain in a strip shape above N-type region 13, and interlayer insulating films 16 and 17 are removed in other regions to form holes H1 and H2. Because N-type region 13, which is the photosensitive portion, is exposed to the outside, radiation (charged particles, electromagnetic waves, light, etc.) is more easily captured by the N-type region, improving the detection sensitivity of the photodiode.
[0036] [Usage example] 17 and 18, examples of using the semiconductor device 1 according to the fifth and sixth embodiments will be described. FIGS. 17 and 18 show an electron microscope, which has an electron gun 31, a focusing lens 32, an objective lens 33, and a sensor 34. An electron beam generated by the electron gun 31 is focused and accelerated by the focusing lens 32, and then the electron beam is irradiated onto a sample S. The irradiated electron beam generates secondary electrons and reflected electrons from the sample S, which can be detected by the sensor 34 to obtain an imaging signal. The semiconductor device 1 according to the fifth and sixth embodiments can be used as the sensor 34.
[0037] Such sensors 34 are exposed to strong ultraviolet rays and radiation, which can cause problems such as radiation damage (the generation of semiconductor crystal defects) and degradation of sensor characteristics. However, according to the configurations of the above-described embodiments, the sensor portion is protected from these radiations and ultraviolet rays by the blocking film 20, and the generation of radiation damage and degradation of sensor characteristics can be minimized.
[0038] The electrons emitted from the surface of the sample S include backscattered electrons, which are generated when primary electrons are reflected by the surface of the sample S, and secondary electrons, which are emitted when atoms on the surface of the sample S are excited by the primary electrons, the former having relatively high energy, while the latter having low energy. For this reason, as shown in Figure 17, in an electron microscope, a voltage is usually applied between the sample S and a sensor 34 by a battery 36 so that the sensor 34 side has a positive potential, and the resulting electric field increases the efficiency of collecting secondary electrons.
[0039] Conversely, as shown in Fig. 18, it is also common to further provide a battery 37 with a reverse potential that reduces the voltage applied between the sample S and the sensor 34, thereby intentionally lowering the collection efficiency of secondary electrons and reducing the contribution (proportion) of secondary electrons to the imaging signal, thereby obtaining an image mainly composed of reflected electrons. When the semiconductor device 1 of the above-described embodiment is used as the sensor 34, a voltage can be applied to the blocking film 20 by an independent battery 38 that creates a negative voltage between the sample S and the blocking film 20. In this case, the potential barrier created by the blocking film 20 prevents low-energy secondary electrons from entering the sensor, making it possible to obtain an image based only on signals from reflected electrons.
[0040] [others] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. [Explanation of symbols]
[0041] 11...Semiconductor substrate 12...P-type well 13…N-type region 14...P+ type high concentration layer 15...N+ type high concentration layer 16...Interlayer insulating film 17...Interlayer insulating film 18, 19...wiring layer 20, 20D...Blocking membrane 21, 22... Passivation film 31...Electron gun 32...Converging lens 33...Objective lens 34...Sensor 36~38…Battery H, H1, H2...hole S: Sample V1, V2...Via contact
Claims
1. a semiconductor sensor formed on a semiconductor substrate for detecting radiation; an interlayer insulating film formed on the semiconductor substrate; a wiring layer disposed on the interlayer insulating film; a passivation film covering the wiring layer; Equipped with The passivation film is configured to cover the entire first wiring layer of the wiring layers, while covering only a portion of the second wiring layer of the wiring layers.
2. the first wiring layer is an output wiring that outputs an output signal from the semiconductor sensor, 2. The semiconductor device according to claim 1, wherein said second wiring layer is a power supply wiring connected to said semiconductor sensor.
3. the first wiring layer is a power supply wiring connected to the semiconductor sensor, and the second wiring layer is an output wiring that outputs an output signal from the semiconductor sensor. The semiconductor device according to claim 1 .
4. a semiconductor sensor formed on a semiconductor substrate for detecting radiation; an interlayer insulating film formed on the semiconductor substrate; a wiring layer disposed on the interlayer insulating film; Equipped with The semiconductor device, wherein the wiring layer is wired so as to cover all of the joints of the sensor regions of the plurality of semiconductor layers that constitute the semiconductor sensor.
5. The semiconductor device according to claim 4 , further comprising a passivation film covering said wiring layer.
6. the wiring layer further includes a first wiring layer and a second wiring layer formed above the first wiring layer; 5. The semiconductor device according to claim 4, wherein said first wiring layer is wired so as to cover all of said junction portions.
7. 7. The semiconductor device according to claim 6, wherein said second wiring layer is arranged so that said first wiring layer and said second wiring layer overlap in a region where said first wiring layer covers said junction portion.
8. the first wiring layer is a readout wiring for reading out a signal from the semiconductor sensor, 7. The semiconductor device according to claim 6, wherein said second wiring layer is a power supply wiring connected to said semiconductor sensor.
9. the first wiring layer is a power supply wiring connected to the semiconductor sensor, 7. The semiconductor device according to claim 6, wherein said second wiring layer is a readout wiring for reading out a signal from said semiconductor sensor.
10. a semiconductor sensor formed on a semiconductor substrate for detecting radiation; an interlayer insulating film formed on the semiconductor substrate; a blocking film formed on the interlayer insulating film; Equipped with The semiconductor device, wherein the blocking film is configured to cover an area of the semiconductor substrate except for an area above the semiconductor sensor.
11. The semiconductor device according to claim 10 , wherein the blocking film is configured to cover a PN junction of the semiconductor sensor.
12. The semiconductor device according to claim 10 , wherein the blocking film is given an independent potential different from each region of the semiconductor sensor.
13. 13. The semiconductor device according to claim 10, wherein the blocking film includes a dividing film formed on the incident area of the semiconductor sensor so as to divide the incident area.
14. The semiconductor device according to claim 10 , wherein the interlayer insulating film above an incident region of the semiconductor sensor is removed.
Citation Information
Patent Citations
Manufacture of photodiode
JP1988299175A