108 results about "Thin-film diode" patented technology

A semiconductor device having a semiconductor element (a thin film transistor, a thin film diode, a photoelectric conversion element of silicon PIN junction, or a silicon resistor element) which is light-weight, flexible (bendable), and thin as a whole is provided as well as a method of manufacturing the semiconductor device. In the present invention, the element is not formed on a plastic film. Instead, a flat board such as a substrate is used as a form, the space between the substrate (third substrate (17)) and a layer including the element (peeled layer (13)) is filled with coagulant (typically an adhesive) that serves as a second bonding member (16), and the substrate used as a form (third substrate (17)) is peeled off after the adhesive is coagulated to hold the layer including the element (peeled layer (13)) by the coagulated adhesive (second bonding member (16)) alone. In this way, the present invention achieves thinning of the film and reduction in weight.

It is an object of the present invention to provide a semiconductor device capable of preventing deterioration due to penetration of moisture or oxygen, for example, a light-emitting apparatus having an organic light-emitting device that is formed over a plastic substrate, and a liquid crystal display apparatus using a plastic substrate. According to the present invention, devices formed on a glass substrate or a quartz substrate (a TFT, a light-emitting device having an organic compound, a liquid crystal device, a memory device, a thin-film diode, a pin-junction silicon photoelectric converter, a silicon resistance element, or the like) are separated from the substrate, and transferred to a plastic substrate having high thermal conductivity.

An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element. Methods of fabricating integrated programmable conductor memory cell and diode devices are also disclosed.

A thin-film transistor including a channel layer being formed of an oxide semiconductor transparent to visible light and having a refractive index of nx, a gate-insulating layer disposed on one face of the channel layer, and a transparent layer disposed on the other face of the channel layer and having a refractive index of nt, where there is a relationship of nx>nt. A thin-film transistor including a substrate having a refractive index of no, a transparent layer disposed on the substrate and having a refractive index of nt, and a channel layer disposed on the transparent layer and having a refractive index of nx, where there is a relationship of nx>nt>no.

A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

The present invention provides a planar polymer memory device that can operate as a non-volatile memory device. A planar polymer memory device can be formed with two or more electrodes and an electrode extension associated with one electrode, wherein a selectively conductive medium and dielectric separate the electrodes. The method for forming a planar polymer memory device comprises at least one of forming a first electrode with an associated plug, forming a second electrode, forming a passive layer over the extension, depositing an organic polymer and patterning the organic polymer. The method affords integration of a planar polymer memory device into a semiconductor fabrication process. A thin film diode (TFD) can further be employed with a planar polymer memory device to facilitate programming. The TFD can be formed between the first electrode and the selectively conductive medium or the second electrode and the selectively conductive medium.

To simplify a manufacturing process of a transverse electric field mode liquid crystal display device by using a non-linear resistance element such as a TFD (Thin Film Diode) as a switching element. In a liquid crystal display device having a pair of substrates with liquid crystal interposed therebetween, one of the substrates consists of an electrode substrate. On the electrode substrate, there are provided a first group of electrodes, a second group of electrodes crossing the first group of electrodes with an insulating layer interposed therebetween, non-linear resistance elements, one end of each of the non-linear resistance elements being connected to the respective one of the second group of electrodes, and pixel electrodes opposing the first group of electrodes, each pixel electrode being connected to the other end of each of the non-linear resistance elements. Since the non-linear resistance elements have a so-called TFD (MIM) structure made of metal-insulating layer-metal, the manufacturing process is simple. Therefore, it is possible to manufacture the transverse electric field mode display device at low cost.

A thin film diode panel comprises a pixel electrode formed on a substrate, the pixel electrode including a stem portion and a plurality of branch portions extended from the stem portion, and a data electrode line formed on the substrate, the data electrode line including a plurality of branch electrodes formed parallel to the plurality of branch portions. The plurality of branch portions may extend in a direction perpendicular to the stem portion and the plurality of branch electrodes may extend in a direction perpendicular to the data electrode line.

Systems and methodologies are provided for temperature compensation of thin film diode voltage levels in memory sensing circuits. The subject invention includes a temperature sensitive bias circuit and an array core with a temperature variable select device. The array core can consist of a thin film diode in series with a nanoscale resistive memory cell. The temperature sensitive bias circuit can include a thin film diode in series with two resistors, and provides a temperature compensating bias voltage to the array core. The thin film diode of the temperature sensitive bias circuit tracks the diode of the array core, while the two resistors create a resistive ratio to mimic the effect of temperature and / or process variation(s) on the array core. The compensating bias reference voltage is generated by the temperature sensitive bias circuit, duplicated by a differential amplifier, and utilized to maintain a constant operation voltage level on the nanoscale resistive memory cell.

A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.

The invention belongs to the technical field of the information memory and particularly relates to a ferroelectric oxide / semiconductor sequentially composite film diode resistance change memory. The resistance change memory comprises a substrate, a bottom electrode, a ferroelectric oxide / semiconductor composite memory function layer and a top electrode, and is prepared by the following method which comprises the following steps: developing compound electrodes, such as strontium ruthenium, lanthanum nickel and the like, or metal on the monocrystal strontium titanate or SiO2 / Si substrate to serve as the bottom electrode; then developing the ferroelectric oxide / semiconductor composite film function layer by a pulsed laser deposition or radio frequency magnetron sputtering method; and developing the metal top electrode to form a single diode memory unit structure. The polarity of the diode changes with the orientation of the electric domain. The ferroelectric oxide / semiconductor composite film diode resistance change memory has the advantages of high memory density, good information retentivity and low power consumption.

An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element. Methods of fabricating integrated programmable conductor memory cell and diode devices are also disclosed.

The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. Further, a short circuit between the electrodes of the thin film diode via the light-blocking layer is prevented. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a light-blocking layer (160) is provided between the substrate and the first semiconductor layer. A metal oxide layer (180) is provided on the side of the light-blocking layer facing the first semiconductor layer. Asperities are provided on the side of the metal oxide layer facing the first semiconductor layer, and the first semiconductor layer has a geometry of asperities conforming with the asperities on the metal oxide layer.

Disclosed is a semiconductor device in which a thin film transistor and a thin film diode are provided on one same substrate, and the characteristics respectively required for the thin film transistor and the thin film diode are achieved. Specifically disclosed is a semiconductor device that includes an insulating layer (104) formed on the surface of a substrate (101), and a thin film transistor and a thin film diode that are formed on the insulating layer (104). A portion of the surface of the insulating layer (104), which is positioned below a semiconductor layer (109) for the thin film diode, is provided with a first recessed and projected pattern (105). Meanwhile, a portion of the surface of the insulating layer (104), which is positioned below a semiconductor layer (108) for the thin film transistor, is not provided with the first recessed and projected pattern (105). The surface of the semiconductor layer (109) for the thin film diode has a second recessed and projected pattern that reflects the shape of the first recessed and projected pattern (105).

A piezo thin-film diode (piezo-diode) cantilever microelectromechanical system (MEMS) and associated fabrication processes are provided. The method deposits thin-films overlying a substrate. The substrate can be made of glass, polymer, quartz, metal foil, Si, sapphire, ceramic, or compound semiconductor materials. Amorphous silicon (a-Si), polycrystalline Si (poly-Si), oxides, a-SiGe, poly-SiGe, metals, metal-containing compounds, nitrides, polymers, ceramic films, magnetic films, and compound semiconductor materials are some examples of thin-film materials. A cantilever beam is formed from the thin-films, and a diode is embedded with the cantilever beam. The diode is made from a thin-film shared in common with the cantilever beam. The shared thin-film may a film overlying a cantilever beam top surface, a thin-film overlying a cantilever beam bottom surface, or a thin-film embedded within the cantilever beam.

A first thin film diode (100A) has a first semiconductor layer (10A) and a first light blocking layer (12A) disposed on the substrate side of the first semiconductor layer. A second thin film diode (100B) has a second semiconductor layer (10B) and a second light blocking layer (12B) disposed on the substrate side of the second semiconductor layer. An insulating film (14) is formed between the first semiconductor layer (10A) and the first light blocking layer (12A) and between the second semiconductor layer (10B) and the second light blocking layer (12B). A thickness D1 of a portion of the insulating film (14) positioned between the first semiconductor layer (10A) and the first light blocking layer (12A) is different from a thickness D2 of a portion of the insulating film (14) positioned between the second semiconductor layer (10B) and the second light blocking layer (12B). The intensity of light in a first wavelength region incident on the first semiconductor layer (10A) is higher than the intensity of light in the first wavelength region incident on the second semiconductor layer (10B). The intensity of light in a second wavelength region including a wavelength longer than the maximum wavelength of the first wavelength region incident on the second semiconductor layer (10B) is higher than the intensity of light in the second wavelength region incident on the first semiconductor layer (10A).

A method for manufacturing liquid crystal display substrates comprises the steps of: (a) providing a substrate having a transparent electrode layer and a metal layer; (b) forming a patterned photoresist layer through half-tone or diffraction; (c) defining signal line area and thin film diode area, or pixel area and conductive electrode-lines by etching; and (d) forming an oxidized layer on partial surface of the metal layer. The disclosure here provides a patterning process of lithography and etching with one photolithography of one single mask in the manufacturing of liquid crystal display substrates. Furthermore, the method disclosed here can effectively increase the yield of manufacturing, and reduce the cost of manufacturing.

(Object) It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof. (Solving Means) When a metal layer 11 is provided over a substrate, an oxide layer 12 is provided in contact with the metal layer 11, a layer to be peeled 13 is formed, and the metal layer 11 is irradiated with a laser beam to perform oxidization and form a metal oxide layer 16, a clear separation is possible with a physical means within the metal oxide layer 12 or at an interface between the metal oxide layer 16 and the oxide layer 12.

The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a silicon layer (171) is provided between the substrate and the first semiconductor layer, facing the first semiconductor layer. Asperities are formed on the side of the silicon layer facing the first semiconductor layer, and asperities are provided on the side of the first semiconductor layer facing the silicon layer and the side thereof opposite the side facing the silicon layer.

A film material is prepared by using polymer as backing material and forming multilayer composite film for packaging film of diamoundloid film through vapour hase surface deposition. the thickness of diamoundloid film is 50-500 nm as its structure can be two layers structure or three layers structure or composite structure of the two but nine layers is the maximum. The vapour phase surface diposition can be chemical and physical vapour phase diposition.

The present invention discloses a small-grain three-dimensional memory (3D-MSG). Each of its memory cells comprises a thin-film diode with critical dimension no larger than 40 nm. The thin-film diode comprises at least a small-grain material, whose grain size G is substantially smaller than the diode size D. The small-grain material is preferably a nano-crystalline material or an amorphous material. The critical dimension f of the small-grain diode is smaller than the critical dimension F of the single-crystalline transistor.

Disclosed is a semiconductor device 1000 including a substrate 1, a thin film diode 100 that is supported by the substrate 1 and has a first semiconductor layer 10 having a light-receiving region 10i, a thin film transistor 200 that is supported by the substrate 1 and has a second semiconductor layer 20, and a metal layer 22a that has an inclined surface 23 that is inclined to the surface of the substrate 1, in which the thin film diode 100 can detect light that enters the light-receiving region 10i and has a prescribed wavelength, in which both the first semiconductor layer 10 and the second semiconductor layer 20 are composed of the same semiconductor film, and in which the inclined surface 23 of the metal layer 22a faces at least a part of the side faces 3R and 3L of the first semiconductor layer 10. This constitution enables an increase in the amount of light absorbed by the thin film diode and an improvement in the effective light reception sensitivity of an optical sensor part.

The present invention provides a liquid crystal display comprising: an insulating substrate; a plurality of color filters formed on the insulating substrate; a plurality of first and second gate lines formed on the color filters; a plurality of pixel electrodes formed on the color filters; a plurality of first MIM diodes formed on the color filters and connecting the first gate line and the pixel electrodes; and a plurality of second MIM diodes formed on the color filters and connecting the second gate line and the pixel electrodes.

A thin film diode array panel comprising: an insulating substrate (110); first and second redundant gate lines (141, 142) made of an opaque conductor and formed on the insulating substrate; first and second floating electrodes (143, 144) made of an opaque conductor, formed on the insulating substrate, and disposed between the first and second redundant gate lines (141, 142); an insulating layer (151, 152) formed on the first and second floating electrodes (143, 144); a first gate line (121) formed on the first redundant gate line (141) and including a first input electrode (123) overlapping the first floating electrode (143) where the insulating layer (151) is interposed between the first input electrode and the first floating electrode; a second gate line (122) formed on the second redundant gate line (142) and including a second input electrode (124) overlapping the second floating electrode (144) where the insulating layer (152) is interposed between the second input electrode (124) and the second floating electrode (144); and a pixel electrode (190) including a first contact electrode (191) overlapping the first floating electrode (143) where the insulating layer (151) is interposed between the first contact electrode (191) and the first floating electrode (143), a second contact electrode (192) overlapping the second floating electrode (144) where the insulating layer (152) is interposed between the second contact electrode (192) and the second floating electrode (144), and a main body is provided.