Semiconductor device
By incorporating a recess in the case-to-base plate joint and using a resin member at their interface, the semiconductor device enhances bonding strength, preventing peeling and improving reliability.
Patent Information
- Application Number
- JP2024031530
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-01
- Publication Date
- 2025-09-11
AI Technical Summary
Conventional semiconductor devices suffer from insufficient bonding strength between the sealing resin and the case, as well as between the sealing resin and the base plate, leading to potential peeling issues.
The semiconductor device incorporates a recess in the joint end of the case relative to the base plate, filled with sealing resin, and uses a resin member at the interface between the case and base plate, enhancing bonding strength through thermal stress management and increased contact area.
This design effectively prevents peeling of the sealing resin from both the case and the base plate, improving the reliability and durability of the semiconductor device.
Smart Images

Figure 2025133524000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor device. [Background technology]
[0002] In recent years, environmental and resource issues have been attracting attention on a global scale, and in order to make effective use of resources, promote energy conservation, and reduce greenhouse gas emissions, high-efficiency semiconductor devices, such as inverter devices that utilize switching of power semiconductor elements, have been attracting attention. Conventionally, there has been known a semiconductor device in which a case is provided on a base plate so as to surround a power semiconductor element (semiconductor chip) arranged on the base plate (see, for example, Patent Document 1). Specifically, this semiconductor device has a configuration in which a sealing resin is filled inside a case adhered to the base plate, and the semiconductor chip is embedded in the base plate. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2022-051139 Summary of the Invention [Problem to be solved by the invention]
[0004] However, in conventional semiconductor devices (see, for example, Patent Document 1), the bonding strength between the sealing resin and the case and the bonding strength between the sealing resin and the base plate are insufficient, which means that the conventional semiconductor device is susceptible to peeling between the sealing resin and the case and between the sealing resin and the base plate.
[0005] An object of the present invention is to provide a highly reliable semiconductor device that suppresses separation between the sealing resin and the case and base plate. [Means for solving the problem]
[0006] The semiconductor device of the present invention comprises a base plate, a substrate arranged on the base plate, a power semiconductor chip arranged on the substrate, a lead frame connected to the power semiconductor chip, a case connected to the base plate and surrounding the substrate, the power semiconductor chip, and the lead frame on the base plate, and a sealing resin filled inside the case and sealing the substrate, the power semiconductor chip, and the lead frame, wherein the joint end of the case relative to the base plate is recessed from the inside toward the outside of the case and has a recess filled with the sealing resin.
[0007] Furthermore, the semiconductor device of the present invention comprises a base plate, a substrate arranged on the base plate, a power semiconductor chip arranged on the substrate, a lead frame connected to the power semiconductor chip, a case connected to the base plate and surrounding the substrate, the power semiconductor chip, and the lead frame on the base plate, and a sealing resin filled inside the case and sealing the substrate, the power semiconductor chip, and the lead frame, and further comprises a resin member formed of a resin different from the sealing resin, arranged at least at a corner formed by an inner surface of the case and an upper surface of the base plate, and joined to the inner surface and the upper surface. [Effects of the Invention]
[0008] According to the present invention, it is possible to provide a highly reliable semiconductor device that can suppress separation between the sealing resin and the case and base plate. [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a plan view schematically showing a semiconductor device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II of FIG. [Figure 3] FIG. 4 is a plan view schematically showing a semiconductor device according to a second embodiment of the present invention. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV of FIG. [Figure 5] FIG. 10 is a cross-sectional view schematically showing a semiconductor device according to a third embodiment of the present invention. [Figure 6] FIG. 10 is a cross-sectional view schematically showing a semiconductor device according to a fourth embodiment of the present invention. [Figure 7] FIG. 10 is a cross-sectional view schematically showing a semiconductor device according to a fifth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a detailed description will be given of a mode (embodiment) for carrying out a semiconductor device of the present invention with reference to the accompanying drawings as appropriate. (First embodiment) Fig. 1 is a plan view schematically showing a semiconductor device 100A according to a first embodiment of the present invention. In Fig. 1, the sealing resin 8 filled inside the case 7 is shaded, and part of the sealing resin 8 is cut away. In Fig. 1, components of the semiconductor device 100A that are embedded in the sealing resin 8 in the shaded portion are shown by hidden lines (dotted lines). Fig. 2 is a cross-sectional view taken along the line II-II of Fig. 1.
[0011] As shown in FIG. 1, the semiconductor device 100A of this embodiment has a configuration in which a substrate 1 on which a power semiconductor chip 2 (described later, see FIG. 2) is mounted is embedded in a sealing resin 8 inside a frame-shaped case 7. As shown in FIG. 1, the substrate 1 has a rectangular (including square) shape in plan view. The semiconductor device 100A of this embodiment has three substrates 1 arranged side by side. However, the number of substrates 1 is not limited to this and can be increased or decreased as needed.
[0012] As shown in FIG. 2, the substrate 1 is disposed on a base plate 6 that forms the bottom of the semiconductor device 100A. The base plate 6 in this embodiment functions as a heat dissipation member to the outside. The base plate 6 can be made of a material with excellent rigidity and thermal conductivity, such as copper, a copper alloy, aluminum, an aluminum alloy, a composite material of aluminum and silicon carbide (AlSiC), or a composite material of magnesium and silicon carbide (MgSiC).
[0013] The substrate 1 of this embodiment is configured to have, in order from the base plate 6 side, a back electrode 1C, an insulating substrate 1A, and a circuit electrode 1B. The back electrode 1C also functions as a heat diffusion plate. The back electrode 1C can be made of a material having excellent electrical and thermal conductivity, such as copper (Cu), a copper (Cu) alloy, aluminum (Al), or an aluminum (Al) alloy.
[0014] The insulating substrate 1A can be made of ceramics such as aluminum nitride (AlN), aluminum oxide (Al2O3), silicon nitride (Si3N4), etc., which have excellent insulating properties and thermal conductivity. The circuit electrode 1B functions as a wiring layer serving as a circuit electrode pattern. The circuit electrode 1B can be made of copper (Cu), a copper (Cu) alloy, aluminum (Al), an aluminum (Al) alloy, or the like, which has excellent electrical and thermal conductivity.
[0015] In such a substrate 1, the back electrode 1C and the insulating substrate 1A, and the insulating substrate 1A and the circuit electrode 1B are joined together with a brazing material (not shown). The back surface electrode 1C of the substrate 1 is fixed to the upper surface of the base plate 6 with the bonding material 3. The bonding material 3 may be, for example, solder containing lead (Pb) or tin (Sn) as a main component, or a metal material with high thermal conductivity. Alternatively, the bonding material 3 may be a sintered bonding material such as copper (Cu) nanoparticles or silver (Ag) nanoparticles.
[0016] As shown in FIG. 2, the substrate 1 has an outer edge E1 of the insulating substrate 1A extending outward in the planar direction of the insulating substrate 1A beyond an outer edge E2 of the back electrode 1C. As a result, a gap 13 is formed between the upper surface 6A of the base plate 6 and the outer edge portion E1 of the insulating substrate 1A. Although not shown, this gap 13 is formed along the entire outer edge of the substrate 1. This gap 13 is filled with a sealing resin 8, which will be described later.
[0017] As shown in FIG. 2, the substrate 1 has a power semiconductor chip 2 mounted on the circuit electrode 1B. The power semiconductor chip 2 is bonded to the circuit electrode 1B via a bonding material 9. The bonding material 9 may be, for example, solder containing lead (Pb) or tin (Sn) as a main component, or a metal material with high thermal conductivity. Alternatively, the bonding material 9 may be a sintered bonding material such as copper (Cu) nanoparticles or silver (Ag) nanoparticles.
[0018] In this embodiment, the substrate 1 is mounted with two or more SiCMOSFET (Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor) chips as the power semiconductor chips 2, but is not limited to this. The power semiconductor chips 2 are, for example, power transistors such as IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs, or diodes, and are made of silicon (Si), silicon carbide (SiC), gallium nitride (GaN), or the like. The semiconductor device 100A of this embodiment wires these power semiconductor chips 2 (circuit elements) to form a power conversion device or the like that converts power, such as an inverter.
[0019] As shown in FIG. 2, a lead frame 4 is bonded to the surface of the power semiconductor chip 2 opposite to the surface bonded to the circuit electrodes 1B. The lead frame 4 is bonded to the power semiconductor chip 2 via a bonding material 10. Examples of the bonding material that can be used include solder containing lead (Pb) or tin (Sn) as a main component, and metal materials with high thermal conductivity. Note that the bonding material 10 can also be a sintered material such as copper (Cu) nanoparticles or silver (Ag) nanoparticles. The lead frame 4 is bonded to the portion of the circuit electrode 1B on which the power semiconductor chip 2 is not mounted by a bonding material 10. The bonding material 10 is the same as the bonding material 10 used to bond the power semiconductor chip 2, and is solder, a sintered bonding material, or the like.
[0020] 2, terminals 5 are connected to the substrate 1 (circuit electrodes 1B). This electrically connects the power semiconductor chip 2 and the terminals 5 via the circuit electrodes 1B, or between the circuit electrodes 1B and the lead frame 4. In this embodiment, the terminals 5 are formed of plate-like terminals made of a conductive metal such as copper, and transmit power to the inside and outside of the semiconductor device 100A.
[0021] Next, case 7 (see FIG. 1) in this embodiment will be described. As shown in FIG. 1, the case 7 defines an area therein in which the substrate 1 is placed. Specifically, the case 7 is formed of a frame-shaped wall member 7A that surrounds the substrate 1, which has a rectangular (including square) shape in a plan view, from all four sides.
[0022] The case 7 is partitioned by wall members 7A into areas in which the substrates 1 are arranged so as to accommodate a plurality of substrates 1 (three in this embodiment) arranged side by side. That is, adjacent substrates 1 share one wall member 7A disposed between them. However, although not shown, in a semiconductor device 100A having only one substrate 1, the case 7 is configured only by the wall member 7A forming a rectangular frame, and the partition wall member 7A is omitted.
[0023] The case 7 in this embodiment is a resin molded product, and wall members 7A forming a rectangular frame and partition wall members 7A are integrally molded. The material of this case 7 is preferably a super engineering plastic such as PPS (polyphenylene sulfide) which has excellent heat resistance and moldability. Furthermore, it is desirable to roughen the inner surface 7B of the case 7 (see FIG. 2) by sandblasting or the like, thereby increasing the bonding strength between the inner surface 7B of the case 7 and the sealing resin 8, which will be described later.
[0024] In addition, the case 7 in this embodiment is connected to the base plate 6 as shown in FIG. Specifically, the lower end of the case 7 is bonded only to the upper surface 6A of the base plate 6. The case 7 and the base plate 6 can be bonded together using an adhesive such as an epoxy, cyanoacrylate, silicone, or polyimide adhesive.
[0025] As shown in Fig. 2, the case 7 has a recess 12 at a joint end 7C of the case 7 where it is joined to the base plate 6. This recess 12 is partially recessed from the inside to the outside of the case 7, thereby forming a groove 12A with a rectangular (including square) cross section between it and the top surface 6A of the base plate 6. As shown in Fig. 2, this groove 12A opens toward the inside of the case 7 and runs around the inner circumferential surface of the rectangular cylindrical case 7, as indicated by the hidden line (dotted line) in Fig. 1. Then, as shown in Fig. 2, this recess 12 is filled with a sealing resin 8, which will be described next.
[0026] 2, the inside of the case 7 is filled with sealing resin 8. As a result, the substrate 1, the power semiconductor chip 2, and the lead frame 4 are embedded in the sealing resin 8 on the base plate 6. Incidentally, the terminals 5 are partially embedded in the sealing resin 8 except for a predetermined lead-out portion. The sealing resin 8 is also filled into the recess 12 of the case 7 and the gap 13 between the substrate 1 (insulating substrate 1A) and the base plate 6, as described above. In this embodiment, the sealing resin 8 may be, for example, but not limited to, an epoxy resin, and may be, for example, a phenolic resin, a polyimide resin, a polyamide resin, a polyamideimide resin, a maleimide resin, a cyanate ester resin, or a silicone resin, with epoxy resin being preferred. The sealing resin 8 may also contain a filler such as alumina or boron nitride, which has high thermal conductivity and insulating properties, or a filler such as silica.
[0027] Next, a method for manufacturing the semiconductor device 100A will be described mainly with reference to FIG. This manufacturing method includes a first step of joining a power semiconductor chip 2 to a substrate 1, a second step of connecting a lead frame 4 on the substrate 1 so as to straddle the power semiconductor chip 2 and the substrate 1, a third step of joining the substrate 1 to a base plate 6, a fourth step of adhering a case 7 to the base plate 6, and a fifth step of filling the inside of the case 7 with sealing resin 8.
[0028] First, in the first step of the manufacturing method, a plurality of power semiconductor chips 2 (two power semiconductor chips 2, 2 in the cross section shown in FIG. 2) are bonded to predetermined positions of circuit electrodes 1B of substrate 1 via bonding material 9. Next, in the second step, the electrodes (not shown) on the upper surface of the power semiconductor chips 2, 2 that are not joined to the circuit electrodes 1B of the substrate 1 are connected to the circuit electrodes 1B that are not connected to the power semiconductor chip 2 by the lead frame 4. In this second step, terminals 5 are attached to the circuit electrodes 1B of the substrate 1 at predetermined positions.
[0029] In the third step, the back surface electrode 1C of the substrate 1 to which the power semiconductor chip 2, the lead frame 4, and the terminal 5 are attached is bonded to the upper surface 6A of the base plate 6 via the bonding material 3.
[0030] In a fourth step, the case 7 is adhered to the upper surface of the base plate 6 so as to surround the substrate 1. As a result, the case 7 surrounds the substrate 1, the power semiconductor chip 2, the lead frame 4, and the terminals 5 on the base plate 6. Next, in the fifth step, potting with sealing resin 8 is performed. First, in this step, uncured sealing resin 8 is poured into the inside of case 7. At this time, uncured sealing resin 8 is poured into the inside of case 7 until it covers at least substrate 1, power semiconductor chip 2, and lead frame 4. Thereafter, the uncured sealing resin 8 is cured by heating, thereby completing the semiconductor device 100A, and thus completing the series of manufacturing steps for the semiconductor device 100A.
[0031] <Action and effect> Next, the effects of the semiconductor device 100A of this embodiment will be described. The semiconductor device 100A of this embodiment comprises a base plate 6, a substrate 1 arranged on the base plate 6, a power semiconductor chip 2 arranged on the substrate 1, a lead frame 4 connected to the power semiconductor chip 2, a case 7 connected to the base plate 6 and surrounding the substrate 1, the power semiconductor chip 2, and the lead frame 4 on the base plate 6, and a sealing resin 8 filled inside the case 7 to seal the substrate 1, the power semiconductor chip 2, and the lead frame 4, and the joining end 7C of the case 7 relative to the base plate 6 is recessed from the inside to the outside of the case 7 and has a recess 12 filled with the sealing resin 8.
[0032] According to the semiconductor device 100A, a recess 12 filled with the sealing resin 8 is formed near the bonding interface between the base plate 6 and the sealing resin 8. This reduces thermal stress that occurs when the sealing resin 8 thermally expands due to heat generated during use of the semiconductor device 100A. The semiconductor device 100A effectively prevents the sealing resin 8 from peeling off from the base plate 6. Furthermore, according to the semiconductor device 100A, the recess 12 is formed in the case 7, thereby increasing the contact area of the sealing resin 8 with the inner surface 7B of the case 7. This effectively prevents the sealing resin 8 from peeling off from the case 7 in the semiconductor device 100A. Furthermore, according to the semiconductor device 100A, the sealing resin 8 is filled in the recess 12, thereby absorbing the load acting in a direction in which the case 7 moves away from the upper surface 6A of the base plate 6. This enables the semiconductor device 100A to increase the bonding strength of the case 7 to the base plate 6. Therefore, the semiconductor device 100A has improved reliability compared to conventional semiconductor devices (see, for example, Patent Document 1).
[0033] In the semiconductor device 100A, the sealing resin 8 is a hard resin such as an epoxy resin. According to such a semiconductor device 100A, peeling between the sealing resin 8 and the case 7 and the base plate 6 can be more effectively suppressed than in a case where a soft resin such as silicone gel is used as the sealing resin.
[0034] Furthermore, in this semiconductor device 100A, the substrate 1 is configured to have, in order from the base plate 6 side, a back electrode 1C, an insulating substrate 1A, and a circuit electrode 1B, and the outer edge E1 of the insulating substrate 1A extends further outward in the surface direction of the insulating substrate 1A than the outer edge E2 of the back electrode 1C, and a sealing resin 8 is filled between the upper surface 6A of the base plate 6 and the outer edge E1 of the insulating substrate 1A (gap 13). According to such a semiconductor device 100A, the sealing resin 8 is filled in the gap 13 between the upper surface 6A of the base plate 6 and the outer edge E1 of the insulating substrate 1A, thereby more effectively preventing the sealing resin 8 from peeling off from the base plate 6.
[0035] (Second embodiment) Next, a semiconductor device according to a second embodiment of the present invention will be described. In this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed descriptions thereof will be omitted. Fig. 3 is a plan view schematically showing a semiconductor device 100B according to a second embodiment of the present invention. In Fig. 3, the sealing resin 8 filled inside the case 7 is shown shaded, and a portion of the sealing resin 8 is cut away. In Fig. 3, components of the semiconductor device 100B that are embedded in the sealing resin 8 in the shaded portion are shown by hidden lines (dotted lines). Fig. 4 is a cross-sectional view taken along line IV-IV in Fig. 3.
[0036] As shown in FIG. 3, the semiconductor device 100B differs from the semiconductor device 100A according to the first embodiment (see FIG. 1) in that the case 7 does not have the recess 12 (see FIG. 1). Specifically, in the semiconductor device 100B, as shown in FIG. 4, the inner side surface 7B of the case 7 is flush in the vertical direction. The semiconductor device 100B also has a resin member 11 at the corner formed by the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6. The resin member 11 is bonded to the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6. As shown in FIG. 3, the resin member 11 runs along the inside of the case 7.
[0037] In this embodiment, the cross-sectional shape of the resin member 11 is rectangular (including square) as shown in Fig. 4. However, the cross-sectional shape of the resin member 11 is not limited to this, and may be, for example, a fan shape or an L shape. Such a resin member 11 can be formed of a resin different from the sealing resin 8. For example, when the sealing resin 8 is an epoxy resin, the resin member 11 is preferably a polyamideimide resin, a polyetheramideimide resin, or a mixed resin of a polyamideimide resin and a polyetheramideimide resin.
[0038] Incidentally, the semiconductor device 100B has the same configuration as the semiconductor device 100A (see FIG. 2), except that the case 7 does not have the recess 12 (see FIG. 1) and has the resin member 11. Therefore, the semiconductor device 100B can be manufactured by adding the step of arranging the resin member 11 to the manufacturing steps of the semiconductor device 100A. Specifically, the manufacturing method of semiconductor device 100B is configured to include a "step of arranging resin member 11" between the "fourth step of adhering case 7 to base plate 6" and the "fifth step of filling sealing resin 8 inside case 7" in the manufacturing method of semiconductor device 100A.
[0039] Specifically, the "resin member 11 placement process" in the manufacturing method of such a semiconductor device 100B is carried out by applying an uncured resin different from the sealing resin 8 to the corner formed by the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6, and then curing it. The method of applying uncured resin to the corner formed by the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6 can be selected appropriately depending on the viscosity of the resin used, for example, by piling or applying it using a sealer gun or plunger.
[0040] <Action and effect> Next, the effects of the semiconductor device 100B of this embodiment will be described. The semiconductor device 100B of this embodiment comprises a base plate 6, a substrate 1 arranged on the base plate 6, a power semiconductor chip 2 arranged on the substrate 1, a lead frame 4 connected to the power semiconductor chip 2, a case 7 connected to the base plate 6 and surrounding the substrate 1, the power semiconductor chip 2, and the lead frame 4 on the base plate 6, and a sealing resin 8 filled inside the case 7 and sealing the substrate 1, the power semiconductor chip 2, and the lead frame 4, and further comprises a resin member 11 formed of a resin different from the sealing resin 8, and arranged at least at the corner formed by an inner surface 7B of the case 7 and an upper surface 6A of the base plate 6, and joined to the inner surface 7B and the upper surface 6A.
[0041] According to such a semiconductor device 100B, the resin member 11 is bonded to at least the corner formed by the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6, thereby increasing the bonding strength between the base plate 6 and the case 7. Furthermore, according to the semiconductor device 100B, the resin member 11 is joined to at least the corner formed by the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6, so that when the uncured sealing resin 8 is poured into the inside of the case 7 in the manufacturing method of the semiconductor device 100B, it is possible to more reliably prevent the uncured sealing resin 8 from leaking from the joint between the case 7 and the base plate 6.
[0042] In addition, in this semiconductor device 100B, the sealing resin 8 can be an epoxy resin, and the resin member 11 can be a polyamideimide resin, a polyetheramideimide resin, or a mixed resin of polyamideimide resin and polyetheramideimide resin. Such a semiconductor device 100B further improves the bonding strength of the resin member 11 to the sealing resin 8. As a result, the semiconductor device 100B can more reliably prevent the sealing resin 8 from peeling off from the case 7 and the base plate 6 when the sealing resin 8 expands or contracts due to temperature changes during use. Therefore, the semiconductor device 100B has improved reliability compared to conventional semiconductor devices (see, for example, Patent Document 1).
[0043] (Third embodiment) Next, a semiconductor device according to a third embodiment of the present invention will be described. In this embodiment, the same components as those in the first and second embodiments are designated by the same reference numerals, and detailed descriptions thereof will be omitted. 5 is a cross-sectional view schematically showing a semiconductor device 100C according to a third embodiment of the present invention, which corresponds to FIG. 4 described in the second embodiment.
[0044] As shown in FIG. 5, the semiconductor device 100C differs from the semiconductor device 100B according to the second embodiment (see FIG. 4) in that the case 7 has a recess 12. The semiconductor device 100C further includes a resin member 11 that is formed from a resin different from the sealing resin 8, and is disposed at least in the recess 12 at a corner formed by the inner side surface 7B of the case 7 and the upper surface 6A of the base plate 6, and is joined to the inner side surface 7B and the upper surface 6A. The semiconductor device 100C has the same configuration as the semiconductor device 100B (see FIG. 4), except that it has the resin member 11 in the recess 12. In addition, both the resin member 11 and the sealing resin 8 are disposed in the recess 12 of the semiconductor device 100C.
[0045] <Action and effect> According to such a semiconductor device 100C, the resin member 11 is bonded within the recess 12 to the corner formed by the inner surface 7B of the case 7 and the upper surface 6A of the base plate 6, and both the resin member 11 and the sealing resin 8 are arranged within the recess 12, so that peeling between the sealing resin 8 and the case 7 and the base plate 6 can be more reliably suppressed. Therefore, the semiconductor device 100C has improved reliability compared to conventional semiconductor devices (see, for example, Patent Document 1).
[0046] (Fourth embodiment) Next, a semiconductor device according to a fourth embodiment of the present invention will be described. In this embodiment, the same components as those in the first to third embodiments are designated by the same reference numerals, and detailed descriptions thereof will be omitted. Fig. 6 is a cross-sectional view schematically showing a semiconductor device 100D according to a fourth embodiment of the present invention, which corresponds to Fig. 4 described in the second embodiment.
[0047] As shown in Figure 6, the semiconductor device 100D differs from the semiconductor device 100B of the second embodiment (see Figure 4) in that the resin member 11 covers the entire upper surface 6A of the base plate 6 exposed between the case 7 and the substrate 1. That is, in the semiconductor device 100D of this embodiment, the resin member 11 is arranged to cover the entire upper surface 6A of the base plate 6 except for the bonding surface 6A1 of the base plate 6 with the substrate 1 and the bonding surface 6A2 of the base plate 6 with the case 7.
[0048] Furthermore, in this semiconductor device 100D, the outer edge E1 of the insulating substrate 1A extends further outward in the surface direction of the insulating substrate 1A than the outer edge E2 of the back electrode 1C, and a resin member 11 is arranged between the upper surface 6A of the base plate 6 and the outer edge E1 of the insulating substrate 1A. Although not shown, a sealing resin 8 may be disposed in addition to the resin member 11 between the upper surface 6A of the base plate 6 and the outer edge E1 of the insulating substrate 1A.
[0049] <Action and effect> According to this semiconductor device 100D, the resin member 11 covers the entire upper surface 6A of the base plate 6, which further reduces peeling between the sealing resin 8 and the case 7 and base plate 6 when the semiconductor device 100D is in use. Therefore, the semiconductor device 100D has improved reliability compared to conventional semiconductor devices (see, for example, Patent Document 1). Furthermore, the resin member 11 of the semiconductor device 100D can also prevent the uncured sealing resin 8 from leaking out from the joint between the case 7 and the base plate 6 during the manufacturing method of the semiconductor device 100B.
[0050] (Fifth embodiment) Next, a semiconductor device according to a fifth embodiment of the present invention will be described. In this embodiment, the same components as those in the first to fourth embodiments are designated by the same reference numerals, and detailed descriptions thereof will be omitted. Fig. 7 is a cross-sectional view schematically showing a semiconductor device 100E according to a fifth embodiment of the present invention, which corresponds to Fig. 5 described in the third embodiment.
[0051] As shown in FIG. 7, in the semiconductor device 100E, a joining end 7C of the case 7 to the base plate 6 is recessed from the inside to the outside of the case 7 and has a recess 12 into which a sealing resin 8 is filled. Furthermore, both the resin member 11 and the sealing resin 8 are disposed in the recess 12 of the semiconductor device 100E. Furthermore, unlike the semiconductor device 100C according to the third embodiment (see FIG. 5), the resin member 11 of the semiconductor device 100E covers the entire upper surface 6A of the base plate 6 exposed between the case 7 and the substrate 1. That is, the resin member 11 is arranged to cover the entire upper surface 6A of the base plate 6 except for the bonding surface 6A1 of the base plate 6 with the substrate 1 and the bonding surface 6A2 of the base plate 6 with the case 7.
[0052] Furthermore, in this semiconductor device 100E, the outer edge E1 of the insulating substrate 1A extends further outward in the surface direction of the insulating substrate 1A than the outer edge E2 of the back electrode 1C, and a resin member 11 is arranged between the upper surface 6A of the base plate 6 and the outer edge E1 of the insulating substrate 1A. Although not shown, a sealing resin 8 may be disposed in addition to the resin member 11 between the upper surface 6A of the base plate 6 and the outer edge E1 of the insulating substrate 1A.
[0053] <Action and effect> According to this semiconductor device 100E, a recess 12 filled with sealing resin 8 is formed at the joining end 7C of the case 7, and the resin member 11 covers the entire upper surface 6A of the base plate 6, so that peeling between the sealing resin 8 and the case 7 and the base plate 6 can be more reliably suppressed when the semiconductor device 100D is in use. Therefore, the semiconductor device 100E has improved reliability compared to conventional semiconductor devices (see, for example, Patent Document 1).
[0054] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and includes various modifications. The above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is also possible to add, replace, or delete part of the configuration of one embodiment with part of the configuration of another embodiment. [Explanation of symbols]
[0055] 1 board 1A insulating substrate 1B circuit electrode 1C back electrode 2. Power semiconductor chips 4 Lead Frame 6 base plate 6A top 6A1 Joint surface 6A2 Joint surface 7 Cases 7B Inside surface 7C Joint end 8 Sealing resin 11 Resin parts 12 recess E1 outer edge E2 outer edge
Claims
1. A base plate and a substrate disposed on the base plate; a power semiconductor chip disposed on the substrate; a lead frame connected to the power semiconductor chip; a case connected to the base plate and surrounding the substrate, the power semiconductor chip, and the lead frame on the base plate; a sealing resin that is filled inside the case and seals the substrate, the power semiconductor chip, and the lead frame; Equipped with The semiconductor device has a recessed portion at the end of the case that is joined to the base plate, the recessed portion being recessed from the inside to the outside of the case and filled with the sealing resin.
2. A base plate and a substrate disposed on the base plate; a power semiconductor chip disposed on the substrate; a lead frame connected to the power semiconductor chip; a case connected to the base plate and surrounding the substrate, the power semiconductor chip, and the lead frame on the base plate; a sealing resin that is filled inside the case and seals the substrate, the power semiconductor chip, and the lead frame; Equipped with The semiconductor device further includes a resin member formed of a resin different from the sealing resin, and positioned at least at the corner formed by the inner surface of the case and the upper surface of the base plate, and joined to the inner surface and the upper surface.
3. 2. The semiconductor device according to claim 1, further comprising a resin member formed of a resin different from the sealing resin, the resin member being positioned at least within the recess at a corner formed by the inner surface of the case and the upper surface of the base plate, and being joined to the inner surface and the upper surface.
4. 4. The semiconductor device according to claim 2, wherein the resin member is arranged to cover the entire upper surface of the base plate except for the joining surface of the base plate with the substrate and the joining surface of the base plate with the case.
5. the substrate is configured to have, in order from the base plate side, a back electrode, an insulating substrate, and a circuit electrode; an outer edge portion of the insulating substrate extends outward in a surface direction of the insulating substrate beyond an outer edge portion of the back surface electrode; 4. The semiconductor device according to claim 1, wherein the sealing resin is filled between the upper surface of the base plate and the outer edge of the insulating substrate.
6. 4. The semiconductor device according to claim 3, wherein the sealing resin and the resin member are disposed in the recess.
7. 3. The semiconductor device according to claim 1, wherein the sealing resin is a hard resin.
8. 4. The semiconductor device according to claim 2, wherein the sealing resin is an epoxy resin, and the resin member is a polyamide-imide resin, a polyether-amide-imide resin, or a mixed resin of a polyamide-imide resin and a polyether-amide-imide resin.
Citation Information
Patent Citations
Semiconductor device
JP2022051139A