Semiconductor process

Abstract

A semiconductor process provides a semiconductor substrate including a plurality of pads and a passivation layer. The passivation layer has a plurality of openings to expose the pads. Forming a ball bottom metal material layer on the connecting pad and the passivation layer; a bump is formed on the under-ball metal material layer by electroplating and overlaps the pad and a portion of the passivation layer in an orthographic projection direction. A patterned photoresist layer is formed on the bumps. The patterned photoresist layer completely covers the bump and extends towards the outer periphery of the bump to cover the ball bottom metal material layer. A first part of the ball bottom metal material layer is formed at the part covered by the patterned photoresist layer, and a second part of the ball bottom metal material layer is formed at the part not covered by the patterned photoresist layer. And removing a second part, which is not covered by the patterned photoresist layer and the bumps, of the under-ball metal material layer. And removing the patterned photoresist layer to expose the first part which is originally covered by the patterned photoresist layer. And removing the first part on the passivation layer by adopting dry etching to form a ball bottom metal layer. And the side wall of the ball bottom metal layer is flush with the side wall of the bump.

Description

Technical Field

[0001] The present invention relates to a semiconductor process. Background Art

[0002] The etchants currently used in the under-ball metallization (UBM) and bump formation processes often adversely affect the bumps. For example, the bottom of the bump is prone to undercutting, causing the bottom dimension to be smaller than the top dimension. This, in turn, reduces the product's electrical performance and reliability. Summary of the Invention

[0003] The present invention provides a semiconductor process that can improve the electrical performance and reliability of products.

[0004] A semiconductor process of the present invention includes at least the following steps. A semiconductor substrate including a plurality of pads and a passivation layer is provided. The passivation layer has a plurality of openings to expose the plurality of pads. A ball bottom metal material layer is formed on the pads and the passivation layer. A bump is formed on the ball bottom metal material layer by electroplating, overlapping the pads and a portion of the passivation layer in the orthographic projection direction. A patterned photoresist layer is formed on the bump. The patterned photoresist layer completely covers the bump and extends toward its outer periphery to cover the ball bottom metal material layer. The portion covered by the patterned photoresist layer forms a first portion of the ball bottom metal material layer, while the portion not covered by the patterned photoresist layer forms a second portion of the ball bottom metal material layer. The second portion of the ball bottom metal material layer not covered by the patterned photoresist layer and the bump is removed. The patterned photoresist layer is removed to expose the first portion originally covered by the patterned photoresist layer. A dry etching process is used to remove the first portion located on the passivation layer to form a ball bottom metal layer. The sidewalls of the ball bottom metal layer are flush with the sidewalls of the bump.

[0005] In one embodiment of the present invention, the step of forming the patterned photoresist layer includes forming a photoresist material entirely on the bump and the under ball metal material layer; and removing the photoresist material on the second portion through a mask.

[0006] In one embodiment of the present invention, the photoresist material is a negative photoresist, and the opening of the mask exposes the photoresist material on the bump and the first portion.

[0007] In one embodiment of the present invention, the photoresist material is a positive photoresist, and the opening of the mask exposes the photoresist material on the second portion.

[0008] In one embodiment of the present invention, the dry etching process includes reactive ion etching.

[0009] In one embodiment of the present invention, in the step of removing the first portion, reactive ion etching is used to directly bombard the first portion of the ball bottom metal material layer to remove the first portion.

[0010] In one embodiment of the present invention, the ball bottom metal material layer is a single layer material or a multi-layer material, and the material includes titanium, copper, tungsten, gold, silver, palladium, platinum or a combination thereof.

[0011] In one embodiment of the present invention, the bump is made of a single-layer material or a multi-layer material, and the material includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof.

[0012] In one embodiment of the present invention, the sidewalls of the UBM layer adjacent to the bumps have rough surfaces formed by reactive ion etching.

[0013] In one embodiment of the present invention, the patterned photoresist layer extends to any side of the bump by a distance not exceeding two micrometers at most.

[0014] Based on the above, the present invention adopts a two-stage process to remove the bottom metal material layer of the ball, and introduces a patterned photoresist layer with a protective function. In this way, when the portion of the bottom metal material layer of the ball not covered by the patterned photoresist layer is removed, the bottom of the bump can be effectively protected from adverse effects by being blocked by the patterned photoresist layer. In this way, the side etching and undercutting of the bump can be effectively improved. After removing the patterned photoresist layer, a dry etching process (not wet etching, i.e., without the use of etching liquid) is used to remove the portion of the bottom metal material layer of the ball originally covered by the patterned photoresist layer, so that the formed bottom metal layer of the ball will not be over-etched. Under the above-mentioned semiconductor process design, the electrical performance and reliability of the product can be improved.

[0015] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figures 1A to 1G is a cross-sectional schematic diagram of a semiconductor structure formed by a semiconductor process according to an embodiment of the present invention;

[0017] Figure 2 is a schematic cross-sectional view of an intermediate step of a semiconductor process according to another embodiment of the present invention;

[0018] Figures 3A to 3G FIG. 4 is a cross-sectional view of another semiconductor structure formed by a semiconductor process according to another embodiment of the present invention. DETAILED DESCRIPTION

[0019] The present invention will be more fully described with reference to the accompanying drawings of the present embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness, dimensions, or sizes of layers or regions in the drawings may be exaggerated for clarity. Identical or similar reference numbers denote identical or similar elements, and detailed descriptions will not be repeated in the following paragraphs.

[0020] Unless otherwise expressly stated, it is in no way intended that any method described herein be construed as requiring that its steps be performed in a specific order.

[0021] Figures 1A to 1G This is a cross-sectional view of a semiconductor structure formed by a semiconductor process according to an embodiment of the present invention. Figure 1A A semiconductor substrate 11 is provided, including a base 110, a plurality of pads 111 (only one is schematically shown), and a passivation layer 112. In some embodiments, the semiconductor substrate 11 can be a silicon wafer, so the base 110 is, for example, a silicon wafer, and a suitable semiconductor element (not shown) can be disposed in the base 110 according to the wafer type requirements.

[0022] Furthermore, the multiple pads 112 and the passivation layer 112 are arranged on the substrate 110, and the passivation layer 112 has multiple openings 112a to expose the multiple pads 111, so that the multiple pads 111 can serve as input / output (I / O) terminals of the semiconductor substrate 11, wherein the material of the pads 112 can be aluminum, copper or other suitable conductive materials, and the material of the passivation layer 112 can be, for example, silicon oxide, silicon nitride or other suitable insulating materials.

[0023] Next, a bottom ball metal material layer 121 is formed on the entire semiconductor substrate 11. For example, the bottom ball metal material layer 121 can be formed on the pad 111 and the passivation layer 112. In this embodiment, Figure 1A As shown, the ball bottom metal material layer 121 can be a double-layer structure including a first ball bottom metal material layer 121a and a second ball bottom metal material layer 121b, that is, the ball bottom metal material layer 121 is a multi-layer material, but the present invention is not limited to this. In other embodiments, other different implementations will be described.

[0024] In some embodiments, the material of the ball-bottom metal material layer 121 includes titanium, copper, tungsten, gold, silver, palladium, platinum, or a combination thereof. For example, the first ball-bottom metal material layer 121a may be a titanium layer, and the second ball-bottom metal material layer 121b may be a copper layer. However, the present invention is not limited thereto. The first ball-bottom metal material layer 121a and the second ball-bottom metal material layer 121b may also be other material combinations. Here, the ball-bottom metal material layer 121 is formed, for example, by a sputtering process.

[0025] Please refer to Figure 1B and Figure 1C A first patterned photoresist layer 10 having an opening 10a is formed on the ball bottom metal material layer 121, and a bump 130 is formed in the opening 10a. The bump 130 can be formed on the ball bottom metal material layer 121 by plating and overlaps with the pad 111 and a portion of the passivation layer 112 in the orthographic projection direction. It should be noted that the material of the first patterned photoresist layer 10 can be selected to be a positive photoresist (such as Figure 2 As shown) or negative photoresist (as Figure 1D As shown in FIG, the bump 130 may also be formed by other suitable methods and is not limited to the electroplating process.

[0026] In this embodiment, the bump 130 may be a three-layer structure including a first metal layer 131 , a second metal layer 132 and a third metal layer 133 , that is, the bump 130 is a multi-layer material, but the present invention is not limited thereto. In other embodiments, other different implementations will be described.

[0027] In some embodiments, the material of the bump 130 includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof. For example, the first metal layer 131 can be a copper layer, the second metal layer 132 can be a nickel layer, and the third metal layer 133 can be a gold layer, but the present invention is not limited thereto. The first metal layer 131, the second metal layer 132 and the third metal layer 133 can also be a combination of other materials.

[0028] In the current semiconductor process, when the two layers directly contacting the ball bottom metal material layer 121 and the bump 130 are made of the same material, preferably, the second ball bottom metal material layer 121b and the first metal layer 131 can both be made of copper layers. The side etching and undercutting phenomenon will be particularly significant. Therefore, the present invention can be more advantageous when the two layers directly contacting the ball bottom metal material layer 121 and the bump 130 are made of the same material, but the present invention is not limited to this.

[0029] Please refer to Figure 1C After the bumps 130 are formed, the first patterned photoresist layer 10 is removed to expose the underlying under-ball metal layer 121. Next, a photoresist material 141 is formed entirely on the bumps 130 and the under-ball metal layer 121.

[0030] Please refer to Figure 1D and Figure 1EA patterned photoresist layer 140 (made from a photoresist material 141) is formed on the bump 130. The patterned photoresist layer 140 completely covers the bump 130 and extends toward its outer periphery 130e to cover the bottom ball metal material layer 121. The portion covered by the patterned photoresist layer 140 forms a first portion P1 of the bottom ball metal material layer 121, while the portion not covered by the patterned photoresist layer 140 forms a second portion P2 of the bottom ball metal material layer 121. An exemplary process for forming the patterned photoresist layer 140 is further described below.

[0031] In this embodiment, if Figure 1D As shown, the photoresist material 141 can be a negative photoresist formed by a suitable deposition process, and the photoresist material 141 on the second part P2 can be removed by the mask 20. For example, the opening 20a of the mask 20 used to perform the exposure process can expose the position where the patterned photoresist layer 140 is to be formed, such as exposing the photoresist material 141 on the bump 130 and the first part P1. In this way, the unexposed portion 141a will dissolve in the developer in the subsequent development process, while the exposed portion 141b will not dissolve in the developer in the subsequent development process due to cross-linking and curing, thereby forming a patterned photoresist layer 140 that protects the bump 130 and the first part P1 of the ball bottom metal material layer 121.

[0032] Then, if Figure 1E As shown, for example, a wet etching process is used to remove the second portion P2 of the ball-base metal material layer 121 that is not covered by the patterned photoresist layer 140 and the bump 130. In this step, since the bump 130 is reliably covered by the patterned photoresist layer 140, the etchant used in the wet etching process can be prevented from adversely affecting the bump 130 (e.g., overetching). The etchant used in the wet etching process can be selected based on the material of the ball-base metal material layer 121, and the present invention is not limited thereto.

[0033] In some embodiments, the distance d that the patterned photoresist layer 140 extends to either side of the bump 130 is preferably no more than two microns to reduce the likelihood that the subsequent removal of the first portion P1 will affect the size (e.g., thickness) of the bump 130. However, the present invention is not limited thereto. In other embodiments, the distance d that the patterned photoresist layer 140 extends to either side of the bump 130 may exceed two microns. The actual distance depends on the desired size and the present invention is not limited thereto.

[0034] In some embodiments, the distance d that the patterned photoresist layer 140 extends to two sides of the bump 130 may be the same to further simplify the process difficulty, but the present invention is not limited thereto.

[0035] In some embodiments, the sidewalls of the patterned photoresist layer 140 are aligned with the sidewalls of the first portion P1 , and the outer periphery 130 e of the bump 130 is retracted from the sidewalls of the patterned photoresist layer 140 and the first portion P1 , but the invention is not limited thereto.

[0036] Please refer to Figure 1F , the patterned photoresist layer 140 is removed to expose the first portion P1 originally covered by the patterned photoresist layer 140 , wherein the first portion P1 may protrude beyond the outer periphery 130 e of the bump 130 .

[0037] Please refer to Figure 1G A dry etching process is used to remove the first portion P1 on the passivation layer 112 to form an UBM layer 120, wherein the sidewall 120s of the UBM layer 120 is aligned with the sidewall 130s of the bump 130. The semiconductor structure 100 is substantially completed through the above-mentioned manufacturing process. Accordingly, in this embodiment, the bottom ball metal material layer 121 is removed sequentially in two stages, and a patterned photoresist layer 140 with a protective function is introduced. In this way, when the portion of the bottom ball metal material layer 121 not covered by the patterned photoresist layer 140 is removed, the bottom of the bump 130 can be effectively protected from adverse effects by being blocked by the patterned photoresist layer 140. In this way, the side etching and undercutting phenomenon of the bump 130 can be effectively improved. After removing the patterned photoresist layer 140, a dry etching process (not using an etching solution) is used to remove the portion of the bottom ball metal material layer 121 originally covered by the patterned photoresist layer 140, so that the formed bottom ball metal layer 120 is located only below the bump 130. Under the above-mentioned semiconductor process design, the electrical performance and reliability of the product can be improved.

[0038] In some embodiments, since the wet etching process has a higher removal rate and the dry etching process has a higher removal accuracy, the design of the semiconductor process of this embodiment can achieve benefits in terms of process time and process cost by combining these two different etching processes.

[0039] In some embodiments, when the line width of the semiconductor structure is less than or equal to 5 microns (fine pitch), undercutting is more likely to occur, resulting in an excessively small bonding area between the bump 130 and the pad 111, thereby causing delamination. Therefore, in the aforementioned situation, the semiconductor process design of this embodiment can have a more significant improvement effect to maintain a better bonding area between the bump 130 and the pad 111.

[0040] In some embodiments, the dry etching process includes reactive ion etching (RIE), and the reactive ion etching can directly bombard the first portion P1 of the under-ball metal material layer 121 to remove the first portion P1. Therefore, the sidewall 120s of the under-ball metal layer 120 and the sidewall 130s adjacent to the bump 130 have a rough surface formed by reactive ion etching (for example, under a microscopic view, the sidewall 120s of the under-ball metal layer 120 and the sidewall 130s adjacent to the bump 130 have an uneven roughened surface). In other words, the sidewall 120s of the under-ball metal layer 120 and the sidewall 130s adjacent to the bump 130 have substantially the same or similar roughness, but the present invention is not limited to this.

[0041] In some embodiments, since reactive ion etching has the advantage of adjustable etching directionality, in this embodiment, a top-to-bottom directionality can be used to etch a local area. Therefore, after removing the first portion P1, the passivation layer 112 below the first portion P1 will also have a rough surface formed by reactive ion etching, and the roughness here will also be greater than the roughness of the surrounding surfaces that have not been subjected to reactive ion etching (such as the passivation layer 112 below the second portion P2), but the present invention is not limited to this.

[0042] It must be noted here that the following embodiments continue to use the component numbers and some contents of the above embodiments, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, please refer to the above embodiments, and the following embodiments will not be repeated.

[0043] Figure 2 is a cross-sectional view of an intermediate step of a semiconductor process according to another embodiment of the present invention. Figure 2 , compared to Figure 1D The photoresist material 142 of this embodiment can be a positive photoresist formed by a suitable deposition process, and the photoresist material 142 on the second portion P2 can be removed by the mask 30. For example, the opening 30a of the mask 30 used in the exposure process can expose a position other than the position where the patterned photoresist layer 140 is to be formed, such as exposing the photoresist material 142 on the second portion P2. In this way, the exposed portion 142a will be dissolved in the developer due to a photochemical reaction in the subsequent development process, while the unexposed portion 142b will not be dissolved in the developer in the subsequent development process, thereby forming a patterned photoresist layer 140 (such as Figure 1E shown).

[0044] Figures 3A to 3G FIG is a cross-sectional view of another semiconductor structure formed by a semiconductor process according to another embodiment of the present invention. Figure 3A, compared to Figure 1A The ball bottom metal material layer 221 shown in the drawings of this embodiment is a single layer material for illustration purposes only, but is not intended to limit the present invention. In another embodiment, the ball bottom metal layer of the present invention may also be a combination of multiple layers of materials (e.g., Figure 1G The bottom ball metal layer 120 is formed by the bottom ball metal material layer 221, and the material of the bottom ball metal material layer 221 includes titanium, copper, tungsten, gold, silver, palladium, platinum, or a combination thereof. Other formation details of the bottom ball metal material layer 221 are similar to those of the bottom ball metal material layer 121 and are not further described here.

[0045] Please refer to Figure 3B and Figure 3C , compared to Figure 1B and Figure 1C , the bump 230 of this embodiment is a single-layer material, which includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof. And the appropriate material for the bottom ball metal layer 221 is selected based on the selected material of the bump 230. In this embodiment, if the material of the bump 230 includes gold, the material of the bottom ball metal layer 221 may include titanium tungsten, gold or a combination thereof. In other feasible embodiments, if the material of the bump of the present invention is selected to include materials such as copper or silver, the material of the bottom ball metal layer 221 may include titanium, copper or a combination thereof, but the present invention is not limited to this. In principle, the material of the bottom ball metal layer 221 depends on the material of the bump 230. Materials with good conductivity and good bonding with the bump material can be used as the bottom ball metal layer. Other formation details of the bump 230 are similar to those of the bump 130 in the previous embodiment and will not be repeated here.

[0046] Please refer to Figure 3D and Figure 3E , similar to Figure 1D and Figure 1E , a patterned photoresist layer 140 is formed on the bump 230, wherein the patterned photoresist layer 140 completely covers the bump 230 and extends toward its outer periphery 230e to cover the ball bottom metal material layer 221, wherein the portion covered by the patterned photoresist layer 140 forms the first portion P12 of the ball bottom metal material layer 221, and the portion not covered by the patterned photoresist layer 140 forms the second portion P22 of the ball bottom metal material layer 221.

[0047] Please refer to Figure 3F , similar to Figure 1F , the patterned photoresist layer 140 is removed to expose the first portion P12 originally covered by the patterned photoresist layer 140 , wherein the first portion P12 may protrude beyond the outer periphery 230 e of the bump 230 .

[0048] Please refer to Figure 3G , similar to Figure 1G, a dry etching process is used to remove the first portion P12 located on the passivation layer 112 to form an under-ball metal layer 220, wherein the sidewall 220s of the under-ball metal layer 220 is aligned with the sidewall 230s of the bump 230. The semiconductor structure 200 is substantially completed through the above-mentioned manufacturing.

[0049] In summary, the present invention employs a two-stage process to remove the bottom metal material layer of the ball, and introduces a patterned photoresist layer with a protective function. Thus, when the portion of the bottom metal material layer of the ball not covered by the patterned photoresist layer is removed, the bottom of the bump is effectively protected from adverse effects by being blocked by the patterned photoresist layer. This effectively improves the undercutting phenomenon of the bump. After removing the patterned photoresist layer, a dry etching process (not using an etching solution) is then used to remove the portion of the bottom metal material layer of the ball originally covered by the patterned photoresist layer, so that the formed bottom metal layer of the ball is not over-etched. Under the aforementioned semiconductor process design, the electrical performance and reliability of the product can be improved.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor process, characterized in that: include: Providing a semiconductor substrate, comprising a plurality of pads and a passivation layer, wherein the passivation layer has a plurality of openings to expose the plurality of pads; forming a ball bottom metal material layer on the pad and the passivation layer; Electroplating to form a bump on the ball bottom metal material layer, and overlapping with the pad and a portion of the passivation layer in the orthographic projection direction; forming a patterned photoresist layer on the bump, wherein the patterned photoresist layer completely covers the bump and extends toward its outer periphery to cover the ball bottom metal material layer, wherein the portion covered by the patterned photoresist layer forms a first portion of the ball bottom metal material layer, and the portion not covered by the patterned photoresist layer forms a second portion of the ball bottom metal material layer; removing the second portion of the bottom ball metal material layer that is not covered by the patterned photoresist layer and the bump; removing the patterned photoresist layer to expose the first portion originally covered by the patterned photoresist layer; as well as The first portion on the passivation layer is removed by a dry etching process to form an under ball metallurgy layer, wherein a sidewall of the under ball metallurgy layer is flush with a sidewall of the bump.

2. The semiconductor process according to claim 1, wherein: The step of forming the patterned photoresist layer comprises: forming a photoresist material on the bump and the bottom metal material layer; and The photoresist material on the second portion is removed through a mask.

3. The semiconductor process according to claim 2, wherein: The photoresist material is a negative photoresist, and the opening of the mask exposes the photoresist material on the bump and the first portion.

4. The semiconductor process according to claim 2, wherein: The photoresist material is positive photoresist, and the opening of the mask exposes the photoresist material on the second portion.

5. The semiconductor process according to claim 1, wherein: The dry etching process includes reactive ion etching.

6. The semiconductor process according to claim 5, characterized in that In the step of removing the first portion, the reactive ion etching is used to directly bombard the first portion of the ball bottom metal material layer to remove the first portion.

7. The semiconductor process according to claim 1, wherein: The ball bottom metal material layer is a single layer material or a multilayer material, and its material includes titanium, copper, tungsten, gold, silver, palladium, platinum or a combination thereof.

8. The semiconductor process according to claim 1, wherein: The bump is made of a single-layer material or a multi-layer material, and the material includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof.

9. The semiconductor process according to claim 1, wherein: The sidewall of the UBM layer adjacent to the bump has a rough surface formed by reactive ion etching.

10. The semiconductor process according to claim 1, wherein: The patterned photoresist layer extends to either side of the bump by a distance of no more than two micrometers.

Images