Optical detection device and electronic equipment

Abstract

To provide an optical detection device capable of reducing circuit area.SOLUTION: An optical detection device of an embodiment of the present disclosure comprises: a first substrate having a photoelectric conversion element that converts light into electricity and at least a portion of a readout circuit capable of outputting a first signal based on charges converted by the photoelectric conversion element; a second substrate laminated with the first substrate and having at least a portion of a signal processing circuit capable of performing signal processing for the first signal; and a wiring layer provided on the first substrate or the second substrate. The signal processing circuit includes a first element provided on the wiring layer.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present disclosure relates to photodetection devices and electronic equipment. [Background technology]

[0002] A device has been proposed that has a structure in which a first semiconductor substrate on which a pixel section is formed and a second semiconductor substrate on which a column circuit and a column memory are formed are stacked (Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-171700 Summary of the Invention [Problem to be solved by the invention]

[0004] In a light detecting device, it is desirable to be able to reduce the circuit area.

[0005] It is desirable to provide a photodetector that can reduce the circuit area. [Means for solving the problem]

[0006] A photodetector according to an embodiment of the present disclosure includes a first substrate having a photoelectric conversion element that converts light into an electric charge and at least a part of a readout circuit that can output a first signal based on the electric charge converted by the photoelectric conversion element, a second substrate that has at least a part of a signal processing circuit that can process the first signal and is stacked on the first substrate, and a wiring layer that is provided on the first substrate or the second substrate. The signal processing circuit has a first element that is provided on the wiring layer. According to an embodiment of the present disclosure, an electronic device includes an optical system and a photodetector that receives light transmitted through the optical system. The photodetector includes a first substrate having a photoelectric conversion element that converts light into an electric signal and at least a part of a readout circuit that can output a first signal based on the electric charge converted by the photoelectric conversion element, a second substrate that includes at least a part of a signal processing circuit that can process the first signal and is stacked on the first substrate, and a wiring layer that is provided on the first substrate or the second substrate. The signal processing circuit has a first element provided on the wiring layer. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a block diagram illustrating an example of a schematic configuration of an imaging device that is an example of a photodetector according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram illustrating an example of a pixel unit of an imaging device according to an embodiment of the present disclosure. [Figure 3] FIG. 3 is a diagram illustrating an example of a circuit configuration of a pixel of an imaging device according to an embodiment of the present disclosure. [Figure 4] FIG. 4 is a diagram illustrating an example of the configuration of a signal processing circuit of an imaging device according to an embodiment of the present disclosure. [Figure 5] FIG. 5 is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to an embodiment of the present disclosure. [Figure 6A] FIG. 6A is a diagram illustrating an example of the configuration of an imaging device according to an embodiment of the present disclosure. [Figure 6B] FIG. 6B is a diagram illustrating an example of the configuration of an imaging device according to an embodiment of the present disclosure. [Figure 7A] FIG. 7A is a diagram illustrating another exemplary configuration of an imaging device according to an embodiment of the present disclosure. [Figure 7B] FIG. 7B is a diagram illustrating another exemplary configuration of the imaging device according to the embodiment of the present disclosure. [Figure 8A] FIG. 8A is a diagram illustrating another exemplary configuration of an imaging device according to an embodiment of the present disclosure. [Figure 8B]FIG. 8B is a diagram illustrating another exemplary configuration of the imaging device according to the embodiment of the present disclosure. [Figure 9A] FIG. 9A is a diagram illustrating another exemplary configuration of an imaging device according to an embodiment of the present disclosure. [Figure 9B] FIG. 9B is a diagram illustrating another exemplary configuration of the imaging device according to the embodiment of the present disclosure. [Figure 10A] FIG. 10A is a diagram illustrating another exemplary configuration of an imaging device according to an embodiment of the present disclosure. [Figure 10B] FIG. 10B is a diagram illustrating another exemplary configuration of the imaging device according to the embodiment of the present disclosure. [Figure 11] FIG. 11 is a diagram illustrating an example of the configuration of an imaging device according to the first modification of the present disclosure. [Figure 12] FIG. 12 is a diagram illustrating another exemplary configuration of the imaging device according to the first modification of the present disclosure. [Figure 13] FIG. 13 is a diagram illustrating a configuration example of an imaging device according to the second modification of the present disclosure. [Figure 14] FIG. 14 is a block diagram illustrating an example of the configuration of an electronic device having an imaging device. [Figure 15] FIG. 15 is a block diagram showing an example of a schematic configuration of a vehicle control system. [Figure 16] FIG. 16 is an explanatory diagram showing an example of the installation positions of the outside-of-vehicle information detection unit and the imaging unit. [Figure 17] FIG. 17 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. [Figure 18] FIG. 18 is a block diagram showing an example of the functional configuration of the camera head and the CCU. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order. 1. Embodiment 2. Variations 3. Application Examples 4. Application Examples

[0009] <1. Embodiment> Fig. 1 is a block diagram showing an example of a schematic configuration of an imaging device which is an example of a photodetector according to an embodiment of the present disclosure. Fig. 2 is a diagram showing an example of a pixel unit of an imaging device according to an embodiment. A photodetector is a device capable of detecting incident light. The imaging device 1 which is a photodetector has a plurality of pixels P each having a photoelectric conversion unit (photoelectric conversion element), and is configured to photoelectrically convert incident light to generate a signal.

[0010] The imaging device 1 can generate a signal by receiving light that has passed through an optical system (not shown) including an optical lens. The imaging device 1 is configured, for example, using a semiconductor substrate (e.g., a silicon substrate) on which a plurality of pixels P are provided. The photoelectric conversion unit of each pixel P of the imaging device 1 is, for example, a photodiode (PD), and is configured to be able to photoelectrically convert light.

[0011] 1 and 2, the imaging device 1 has, as an imaging area, a region (pixel section 100) in which a plurality of pixels P are two-dimensionally arranged in a matrix. The pixel section 100 of the imaging device 1 is a pixel array in which a plurality of pixels P are arranged, and can also be called a light receiving region. The photoelectric conversion section of each pixel P can also be called a photoelectric conversion region.

[0012] The imaging device 1 captures incident light (image light) from a subject to be measured via an optical system including an optical lens. The imaging device 1 captures an image of the subject formed by the optical lens. The imaging device 1 can generate pixel signals by photoelectrically converting the received light (e.g., visible light, infrared light, etc.). The imaging device 1, which is a photodetector, is a device that can receive incident light and generate a signal, and can also be called a light-receiving device.

[0013] The imaging device 1 (photodetector) may be configured as an image sensor, for example. The imaging device 1 may be, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor. The imaging device 1 may have a structure (layered structure) formed by stacking multiple semiconductor layers. The imaging device 1 may be used in various electronic devices such as digital still cameras, video cameras, and mobile phones.

[0014] As shown in Figure 2, the incident direction of light from the subject is the Z-axis direction, the left-right direction on the paper surface perpendicular to the Z-axis direction is the X-axis direction, and the up-down direction on the paper surface perpendicular to the Z-axis and X-axis directions is the Y-axis direction. In the following figures, directions may be indicated based on the direction of the arrow in Figure 2.

[0015] [Schematic configuration of imaging device] 1, the imaging device 1 includes a pixel unit 100, a pixel control unit 105, a signal processing block 112, a control unit 113, and a processing unit 114. The imaging device 1 is also provided with, for example, a plurality of control lines Lread and a plurality of signal lines VSL.

[0016] The control line Lread is a signal line capable of transmitting a signal for controlling the pixel P, and is connected to the pixel control unit 105 and the pixel P of the pixel unit 100. In the example shown in FIG. 1 , in the pixel unit 100, a plurality of control lines Lread are wired for each pixel row made up of a plurality of pixels P arranged in the horizontal direction (row direction). The control line Lread is configured to transmit a control signal for reading out a signal from the pixel P.

[0017] The multiple control lines Lread for each pixel row of the imaging device 1 include, for example, wiring for transmitting signals that control transfer transistors, wiring for transmitting signals that control selection transistors, wiring for transmitting signals that control reset transistors, etc. The control lines Lread can also be said to be drive lines (pixel drive lines) that transmit signals that drive the pixels P.

[0018] The signal lines VSL are signal lines capable of transmitting signals from the pixels P, and are connected to the pixels P of the pixel unit 100 and the signal processing block 112. In the pixel unit 100, for example, a signal line VSL is wired for each pixel column made up of a plurality of pixels P aligned in the vertical direction (column direction). The signal lines VSL are vertical signal lines and are configured to be able to transmit signals output from the pixels P.

[0019] The pixel control unit 105 is configured to be able to control each pixel P of the pixel unit 100. The pixel control unit 105 is a control circuit and is configured by a plurality of circuits including, for example, a buffer, a shift register, an address decoder, etc. The pixel control unit 105 generates a signal for controlling the pixel P and outputs it to each pixel P of the pixel unit 100 via a control line Lread. The pixel control unit 105 is controlled by the control unit 113 and controls the pixels P of the pixel unit 100.

[0020] The pixel control unit 105 generates signals for controlling the pixels P, such as a signal for controlling the transfer transistor, a signal for controlling the selection transistor, and a signal for controlling the reset transistor of the pixel P, and supplies these signals to each pixel P via a control line Lread. The pixel control unit 105 can control the reading of pixel signals from each pixel P. The pixel control unit 105 can also be referred to as a pixel driving unit configured to be able to drive each pixel P. The pixel control unit 105 and the control unit 113 can also be referred to collectively as a pixel control unit.

[0021] The signal processing block 112 is configured to be able to perform signal processing on input pixel signals. The signal processing block 112 has, for example, a signal processing circuit 200 provided for each of the plurality of pixels P. The signal processing circuit 200 (signal processing unit) is provided for, for example, each of the plurality of signal lines VSL.

[0022] The signal processing circuit 200 includes, for example, a load circuit, an AD (Analog-Digital) conversion circuit, a horizontal selection switch, etc. In the image pickup device 1, as an example, a load circuit, an AD conversion circuit, etc. are provided for each pixel column made up of a plurality of pixels P arranged in the column direction (vertical direction) in the pixel section 100. The signal processing circuit 200 is provided for each pixel column and can be called a column circuit. In the image pickup device 1, the plurality of signal processing circuits 200 (column circuits) are arranged, for example, so as to be arranged at a size (arrangement interval) corresponding to the size (pitch) of the pixels P.

[0023] The signals output from each pixel P selected and scanned by the pixel control unit 105 are input to the signal processing block 112 via signal lines VSL. The signal processing block 112 can perform signal processing such as AD conversion of the signal from the pixel P and CDS (Correlated Double Sampling). The signals from each pixel P transmitted through each of the signal lines VSL are subjected to signal processing by the signal processing block 112 and output to the processing unit 114.

[0024] The processing unit 114 is configured to be able to perform signal processing on the input signal. The processing unit 114 is a processing circuit, and is configured, for example, by a circuit that performs various types of signal processing on pixel signals. The processing unit 114 may include a processor and a memory. The processing unit 114 performs signal processing on pixel signals input from the signal processing block 112 and outputs the processed pixel signals. The processing unit 114 can perform various types of signal processing, for example, noise reduction processing, gradation correction processing, etc.

[0025] The control unit 113 is configured to be able to control each unit of the imaging device 1. The control unit 113 receives an externally provided clock, data instructing an operation mode, and the like, and can also output data such as internal information of the imaging device 1. The control unit 113 is a control circuit, and has, for example, a timing generator configured to be able to generate various timing signals.

[0026] The control unit 113 controls the driving of the pixel control unit 105, the signal processing block 112, etc. based on various timing signals (pulse signals, clock signals, etc.) generated by the timing generator. The control unit 113 and the processing unit 114 may be configured integrally.

[0027] [Pixel configuration] 3 is a diagram illustrating an example of a circuit configuration of a pixel of an imaging device according to an embodiment. The pixel P has a photoelectric conversion unit 12 (photoelectric conversion element) and a readout circuit 20. The photoelectric conversion unit 12 is configured to receive light and generate a signal. The readout circuit 20 is configured to be able to output a signal based on the charge generated by photoelectric conversion.

[0028] The photoelectric conversion unit 12 is a light receiving unit (light receiving element) and is configured to be able to generate electric charges by photoelectric conversion. In the example shown in Fig. 3, the photoelectric conversion unit 12 is a photodiode (PD) that converts incident light into electric charges. The photoelectric conversion unit 12 can perform photoelectric conversion to generate electric charges according to the amount of received light.

[0029] The readout circuit 20 includes, for example, a transistor TG, a floating diffusion FD, a transistor AMP, a transistor SEL, and a transistor RST. The readout circuit 20 can read out pixel signals based on charges photoelectrically converted by the photoelectric conversion unit 12.

[0030] The transistor TG is a transfer transistor and is configured to be able to transfer charges photoelectrically converted in the photoelectric conversion unit 12 to the floating diffusion FD. The transistor TG is controlled by a signal STG to electrically connect or disconnect the photoelectric conversion unit 12 and the floating diffusion FD. The transistor TG can transfer charges photoelectrically converted and accumulated in the photoelectric conversion unit 12 to the floating diffusion FD.

[0031] The floating diffusion FD is an accumulation unit configured to be able to accumulate transferred charges. The floating diffusion FD can accumulate charges photoelectrically converted by the photoelectric conversion unit 12. The floating diffusion FD can also be said to be a holding unit capable of holding the transferred charges. The floating diffusion FD accumulates the transferred charges and converts them into a voltage according to the capacitance of the floating diffusion FD.

[0032] The transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffusion FD. The transistor AMP is an amplifying transistor, and can generate and output a signal based on the charge converted by the photoelectric conversion unit 12.

[0033] 3, the gate of the transistor AMP is electrically connected to the floating diffusion FD, and the voltage converted by the floating diffusion FD is input to the gate of the transistor AMP. The drain of the transistor AMP is connected to, for example, a power supply line to which a power supply voltage (power supply voltage VDD1 in the example shown in FIG. 3) is supplied.

[0034] The source of the transistor AMP is connected to a signal line VSL via a transistor SEL. The transistor AMP is configured to generate a signal based on the charge stored in the floating diffusion FD, i.e., a signal based on the voltage of the floating diffusion FD, and output the signal to the signal line VSL.

[0035] The transistor SEL is configured to be able to control the output of a pixel signal. The transistor SEL is electrically connected in series to the transistor AMP, for example, as shown in the example of FIG. 3. The transistor SEL is controlled by a signal SSEL and is configured to be able to output a signal from the transistor AMP to a signal line VSL. The transistor SEL is a selection transistor and can control the output timing of the pixel signal.

[0036] The transistor SEL is configured to be able to output a signal based on the charge converted by the photoelectric conversion unit 12. The transistor SEL can output a pixel signal of the pixel P to a signal line VSL. The transistor SEL may be electrically connected in series between the transistor AMP and a power supply line to which a power supply voltage VDD1 is applied. The transistor SEL may also be omitted as necessary.

[0037] The transistor RST is configured to be able to reset the voltage of the floating diffusion FD. In the example shown in Fig. 3, the transistor RST is electrically connected to a power supply line to which a power supply voltage VDD1 is applied, and is configured to reset the charge of the pixel P. The transistor RST is a reset transistor.

[0038] The transistor RST is controlled by a signal SRST and can reset the charge accumulated in the floating diffusion FD and reset the voltage of the floating diffusion FD. The transistor RST electrically connects the power supply line and the floating diffusion FD and can discharge the charge accumulated in the floating diffusion FD. The transistor RST can also discharge the charge accumulated in the photoelectric conversion unit 12 via the transistor TG.

[0039] The readout circuit 20 may be configured to change the conversion efficiency (gain) when converting electric charge into voltage. For example, the readout circuit 20 may have a transistor (switching transistor) used to set the conversion efficiency. As an example, the switching transistor is electrically connected between the floating diffusion FD and the transistor RST.

[0040] In the readout circuit 20, when the switching transistor is turned on, the capacitance added to the floating diffusion FD of the pixel P increases, and the conversion efficiency (gain) when converting charge to voltage is switched. The switching transistor can change the conversion efficiency by switching the capacitance connected to the gate of the transistor AMP.

[0041] The above-mentioned transistor TG (transfer transistor), transistor AMP (amplification transistor), transistor SEL (selection transistor), transistor RST (reset transistor), and switching transistor are each a MOS transistor (MOSFET) having gate, source, and drain terminals.

[0042] 3, the transistors TG, AMP, SEL, and RST are each configured as an NMOS transistor. The transistors of the pixel P may also be configured as PMOS transistors.

[0043] The pixel control unit 105 (see FIG. 1) of the imaging device 1 supplies control signals to the gates of the transistors TG, SEL, RST, switching transistors, etc. of each pixel P via the control line Lread described above, thereby turning the transistors on (conducting state) or off (non-conducting state).

[0044] The multiple control lines Lread for each pixel row of the imaging device 1 include, for example, a wiring for transmitting a signal STG that controls the transistor TG, a wiring for transmitting a signal SSEL that controls the transistor SEL, a wiring for transmitting a signal SRST that controls the transistor RST, and the like.

[0045] The transistors TG, SEL, RST, and switching transistors are controlled to be turned on and off by the pixel control unit 105. The pixel control unit 105 controls the readout circuit 20 of each pixel P to output a pixel signal from each pixel P to the signal line VSL. The pixel control unit 105 can control the reading out of the pixel signal of each pixel P to the signal line VSL.

[0046] The imaging device 1 may have a configuration in which a plurality of pixels P share one readout circuit 20. For example, in the imaging device 1, a readout circuit 20 may be provided for a plurality of pixels P. A readout circuit 20 is arranged for each of a plurality of pixels P, and the plurality of pixels P share one readout circuit 20. As an example, a 2×2 pixel array consisting of four adjacent pixels P may share one readout circuit 20.

[0047] 4 is a diagram illustrating an example of the configuration of a signal processing circuit of an imaging device according to an embodiment. As shown in FIG. 4, the signal processing circuit 200 includes a load circuit 30 and an AD conversion circuit 40. The load circuit 30 and the AD conversion circuit 40 are provided for each of the multiple signal lines VSL.

[0048] The signal processing circuit 200 may also include a switch SW1, a switch SW11, a switch SW12, and a signal generation circuit 80. The switch SW1 is provided between the signal line VSL and the AD conversion circuit 40. A pixel signal read from the pixel P is input to the AD conversion circuit 40 via the switch SW1. The switch SW1 is configured using, for example, a transistor.

[0049] The load circuit 30 is configured, for example, by a current source capable of supplying current to the signal line VSL and the readout circuit 20. A load circuit 30 is provided for each signal line VSL. The readout circuit 20 of the pixel P is electrically connected to the load circuit 30, for example, via the signal line VSL and a switch SW1. In the example shown in FIG. 4, the load circuit 30 has a transistor Tr1 as a current source.

[0050] The transistor Tr1 of the load circuit 30 is electrically connected to the signal line VSL and is configured to be able to supply a current to the signal line VSL. The transistor Tr1 is electrically connected to the transistor SEL and the transistor AMP of each pixel P via the signal line VSL. The transistor Tr1 can generate a current corresponding to the signal level of a signal input to its gate, for example, and supply the generated current to the transistor AMP. The transistor Tr1 and the transistor AMP form a source follower circuit.

[0051] The signal processing circuit 200 includes a plurality of AD conversion circuits 40 (AD conversion units), and can output pixel signals converted into digital signals by the AD conversion circuits 40. The AD conversion circuits 40 are ADCs (Analog to Digital Converters). For example, an AD conversion circuit 40 is provided for each of the plurality of signal lines VSL. An AD conversion circuit 40 can be provided for each pixel column of the pixel unit 100.

[0052] The AD conversion circuit 40 is configured to convert an input analog signal into a digital signal. The AD conversion circuit 40 performs AD conversion processing on the pixel signal, which is an analog signal input from each pixel P via the signal line VSL.

[0053] The signal generating circuit 80 is configured to be able to generate a reference signal. The signal generating circuit 80 (signal generating unit) is configured to generate, for example, a signal whose signal level changes over time. The signal generating circuit 80 is commonly connected to each AD conversion circuit 40, and can generate a reference signal (reference signal) used for AD conversion and supply it to each AD conversion circuit 40.

[0054] The signal generating circuit 80 includes, for example, a DA conversion circuit (DAC: Digital to Analog Converter) and is configured to generate a ramp signal, which is an analog signal. The signal generating circuit 80 is configured, for example, as a ramp signal generating circuit and generates a ramp signal RAMP, which is a reference signal that changes over time.

[0055] The AD conversion circuit 40 includes, for example, a comparison circuit 50 and a counter (not shown). The AD conversion circuit 40 is configured to be able to convert input pixel signals into digital signals with a predetermined number of bits. The AD conversion circuit 40 is, for example, a single-slope ADC.

[0056] The comparison circuit 50 is configured, for example, by a comparator circuit and is configured to be able to compare the pixel signal with a reference signal (standard signal). The comparison circuit 50 (comparison unit) can compare the pixel signal, which is an analog signal to be converted, with the reference signal to be compared.

[0057] 4, the comparison circuit 50 has a differential amplifier including a transistor Tr11 and a transistor Tr12 that form a differential pair 55, and a transistor Tr21 and a transistor Tr22 that form a current mirror 56.

[0058] The comparison circuit 50 also has a current source 57 including a transistor Tr25. The transistor Tr25 of the current source 57 is configured to be able to supply current to the differential pair 55 and the current mirror 56. The differential pair 55, the current mirror 56, and the current source 57 are electrically connected between a power supply line to which a power supply voltage VDD2 is supplied and a potential line L1. The potential line L1 is a wiring to which a predetermined potential (voltage) is applied, and can also be referred to as a reference potential line. The potential line L1 is, for example, a ground line (GND line).

[0059] The transistors Tr11 and Tr12 are differential input transistors. The transistors Tr11 and Tr12 are each configured by an NMOS transistor, for example. The transistors Tr21 and Tr22 are active load transistors. The transistors Tr21 and Tr22 are each configured by a PMOS transistor, for example.

[0060] The input section 51 and the input section 52 of the comparison circuit 50 are each an input terminal. The input section 51 is electrically connected in series to the capacitive element 41, and the input section 52 is electrically connected in series to the capacitive element 42. In the example shown in Fig. 4, one electrode (terminal) of the capacitive element 41 is electrically connected to the switch SW1, the load circuit 30, etc. The other electrode of the capacitive element 41 is electrically connected to the gate of the transistor Tr11.

[0061] One electrode of the capacitive element 42 is electrically connected to the signal generating circuit 80. The other electrode of the capacitive element 42 is electrically connected to the gate of the transistor Tr12. The capacitive elements 41 and 42 are each formed of a capacitive element such as a MOS capacitor or an MIM (Metal-Insulator-Metal) capacitor.

[0062] A pixel signal output from the pixel P to the signal line VSL is input to an input section 51 of the comparison circuit 50 via a capacitive element 41. A ramp signal RAMP is input from the signal generation circuit 80 to an input section 52 of the comparison circuit 50 via a capacitive element 42.

[0063] The comparison circuit 50 compares the signal output from the pixel P with a ramp signal RAMP whose voltage (potential) changes, and outputs a signal Vout, which is the comparison result, from the output unit 53. The signal Vout output from the comparison circuit 50 is a signal that indicates the magnitude relationship between the signal output from the pixel P and the ramp signal RAMP.

[0064] A counter (not shown) of the AD conversion circuit 40 is configured to count in response to an input signal. The counter (counter circuit) measures the time until the comparison result in the comparison circuit 50 is inverted, based on the input clock signal and the signal Vout from the comparison circuit 50, and can generate a signal indicating the count value.

[0065] The counter can hold, as a pixel signal after AD conversion, a digital signal indicating a count value corresponding to the period from when the comparison circuit 50 starts comparison until the comparison result is inverted (changed). The pixel signals sequentially output from each pixel P are converted into digital signals by AD conversion in the AD conversion circuit 40.

[0066] 4, the switch SW11 has a transistor Tr31 and is electrically connected between a node N1 that connects the signal line VSL and the capacitive element 41 and a potential line L1. The switch SW11 electrically connects or disconnects the node N1 and the potential line L1.

[0067] 4, the switch SW12 has a transistor Tr32 and is electrically connected between a node N2 that connects the signal generating circuit 80 and the capacitive element 42 and the potential line L1. The switch SW12 electrically connects or disconnects the node N2 and the potential line L1. By using the switches SW11 and SW12, it is possible to prevent the nodes N1 and N2 from being in an electrically floating state.

[0068] [Configuration of imaging device] Fig. 5 is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to an embodiment. As shown in Fig. 5, imaging device 1 includes, for example, a semiconductor layer 101, a wiring layer 111, a wiring layer 121, and a semiconductor layer 102. Imaging device 1 has a configuration in which semiconductor layer 101, wiring layer 111, wiring layer 121, and semiconductor layer 102 are stacked in the Z-axis direction.

[0069] 5, a semiconductor layer 101, a wiring layer 111, a wiring layer 121, and a semiconductor layer 102 are provided from the light incident side. The semiconductor layer 101 and the semiconductor layer 102 are made of a semiconductor substrate (e.g., a silicon substrate, an SOI (Silicon On Insulator) substrate, etc.). The semiconductor layer 101 and the semiconductor layer 102 may also be made of a SiGe (Silicon Germanium) substrate, other compound semiconductor materials, etc.

[0070] As an example, the imaging device 1 may be configured with a substrate 201 including a semiconductor layer 101 and a wiring layer 111, and a substrate 202 including a semiconductor layer 102 and a wiring layer 121. The substrate 201 has, for example, the above-described photoelectric conversion unit 12 and readout circuit 20 formed thereon. As shown in FIG. 5, the semiconductor layer 101 has opposing surfaces 11S1 and 11S2. The surface 11S2 is the surface opposite to the surface 11S1. The surface 11S2 of the semiconductor layer 101 is, for example, a light receiving surface (light incident surface).

[0071] The semiconductor layer 102 also has opposing surfaces 12S1 and 12S2. The surface 12S2 of the semiconductor layer 102 is the surface opposite to the surface 12S1. The surfaces 11S1 and 12S1 are, for example, element formation surfaces on which elements such as transistors are formed. A gate electrode, a gate insulating film (e.g., a gate oxide film), etc. may be provided on each of the surfaces 11S1 and 12S1.

[0072] In the semiconductor layer 101, a plurality of photoelectric conversion units 12 (photoelectric conversion elements) are provided along a surface 11S1 and a surface 11S2 of the semiconductor layer 101. The photoelectric conversion units 12 can also be called a photoelectric conversion layer. For example, a plurality of photoelectric conversion units 12 are embedded in the semiconductor layer 101. The photoelectric conversion units 12 are provided between the surface 11S1 and the surface 11S2 of the semiconductor layer 101.

[0073] For example, a transistor TG, a floating diffusion FD, etc. are provided on the surface 11S1 side of the semiconductor layer 101. The floating diffusion FD is configured to include, for example, an n-type semiconductor region. Furthermore, at least some of the other transistors of the readout circuit 20 (transistors AMP, SEL, RST, etc.) may be provided on the surface 11S1 side of the semiconductor layer 101.

[0074] A wiring layer 111 is provided on the surface 11S1 side of the semiconductor layer 101. For example, a lens 31 and a filter 32 are provided on the surface 11S2 side of the semiconductor layer 101. The lens 31 (lens unit) is a lens that condenses light and is an optical member also called an on-chip lens. The lens 31 is provided above the photoelectric conversion unit 12, for example, for each pixel P or for each set of pixels P.

[0075] Light from a subject to be measured is incident on the lens 31 via an optical system such as an imaging lens. The lens 31 guides the incident light to the photoelectric conversion unit 12 of the pixel P. The photoelectric conversion unit 12 of the pixel P photoelectrically converts the light incident via the lens 31 and the filter 32.

[0076] The filter 32 is configured to selectively transmit light in a specific wavelength range from the incident light. The filter 32 is an RGB color filter, a complementary color filter, a filter that transmits infrared light, or the like. The filter 32 is provided above the photoelectric conversion unit 12, for example, for each pixel P or for each set of pixels P. The filter 32 is formed, for example, between the lens 31 and the semiconductor layer 101.

[0077] The filter 32 is provided on the surface 11S2 side of the semiconductor layer 101, for example, for each pixel P or for each set of multiple pixels P. Note that the filter 32 may be omitted from the imaging device 1 as needed. The filter 32 may not be provided for some or all of the pixels P of the imaging device 1. For example, the filter 32 may not be provided for a pixel P that receives white (W) light and performs photoelectric conversion.

[0078] A lens 31, a filter 32, etc. are provided on the side where light from the optical system is incident, and a wiring layer 111 is provided on the side opposite to the side where the light is incident. The lens 31 and the filter 32 are stacked on the semiconductor layer 101 in a thickness direction perpendicular to a surface 11S2 of the semiconductor layer 101. The imaging device 1 is a so-called backside illuminated imaging device.

[0079] A wiring layer 121 is provided on the surface 12S1 side of the semiconductor layer 102. Each of the wiring layers 111 and 121 includes, for example, a conductive film and an insulating film, and has a plurality of wirings and vias (VIAs), etc. Each of the wiring layers 111 and 121 includes, for example, two or more layers of wirings, or three or more layers of wirings.

[0080] The wiring layers 111 and 121 have a configuration in which a plurality of wirings are stacked with an insulating film as an interlayer insulating film (interlayer insulating layer) interposed therebetween. At least a part of each of the wiring layers 111 and 121 is, for example, a wiring layer formed by a back end of line (BEOL), and can also be called a BEOL layer (or a BEOL wiring layer).

[0081] Each of the wiring layers 111 and 121 is formed using a metal material such as aluminum (Al), tungsten (W), or copper (Cu). Note that each of the wiring layers 111 and 121 may be formed using polysilicon or other conductive materials. The interlayer insulating film is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or the like.

[0082] The imaging device 1 has an isolation region 70, which is an isolation region (isolation portion) provided around the pixel P. The isolation region 70 is configured using, for example, a trench (groove portion). The isolation region 70 is provided so as to penetrate the semiconductor layer 101, for example.

[0083] The isolation regions 70 are provided in the semiconductor layer 101 between adjacent pixels P, and separate the pixels P (or photoelectric conversion units 12). At least a portion of the isolation regions 70 is provided on the boundary between adjacent pixels P. It can also be said that the pixels P have a structure partitioned by the isolation regions 70.

[0084] The isolation region 70 has, for example, a full trench isolation (FTI) structure and is formed so as to penetrate the semiconductor layer 101. The isolation region 70 is provided in the semiconductor layer 101 so as to surround each photoelectric conversion unit 12. The isolation region 70 can also be referred to as an inter-pixel isolation portion or an inter-pixel isolation wall.

[0085] An insulating film (insulator) such as an oxide film (e.g., a silicon oxide film) or a nitride film (e.g., a silicon nitride film) is provided within the trench of the isolation region 70. Polysilicon, a metal material, other insulating materials, etc. may be embedded in the isolation region 70. The isolation region 70 may also have a void (cavity).

[0086] A plurality of electrodes 91 are provided on the wiring layer 111, and a plurality of electrodes 92 are provided on the wiring layer 121. The electrodes 91 and 92 are each formed using, for example, copper (Cu). The electrodes 91 and 92 are used to bond metal electrodes together, and can also be called bonding electrodes. The electrodes 91 and 92 may be made of a metal material other than copper, such as nickel (Ni), cobalt (Co), tin (Sn), gold (Au), or other materials.

[0087] As an example, substrate 201 and substrate 202 are bonded together by bonding between metal electrodes (electrodes 91 and 92) made of Cu, i.e., Cu-Cu bonding. Electrodes 91 and 92 electrically connect the circuits of substrate 201 and substrate 202. Note that substrate 201 and substrate 202 may be stacked together using bumps.

[0088] The semiconductor layer 102 and the wiring layer 121 are provided with, for example, a signal processing block 112 including the above-described signal processing circuit 200. The pixel control unit 105, the control unit 113, and the processing unit 114 (see FIG. 1) may be provided on the substrate 202 or on a substrate separate from the substrate 202.

[0089] In the imaging device 1, at least some of the circuit elements of the signal processing circuit 200 are provided on the wiring layers 121 and 111. Some of the circuit elements included in the signal processing circuit 200, such as transistors, capacitance elements, and resistance elements, may be formed on the wiring layer 121 or the wiring layer 111. For example, on the wiring layer 121, transistors used in the load circuit 30 or the AD conversion circuit 40 are provided as thin film transistors (TFTs).

[0090] In the imaging device 1, the transistors constituting the load circuit 30, some of the transistors included in the comparison circuit 50, etc. may each be configured as thin-film transistors and disposed in the wiring layer 121 or the wiring layer 111. For example, the transistor Tr1 of the load circuit 30 may be disposed in the wiring layer 121 or the wiring layer 111. Of the multiple transistors of the comparison circuit 50, some of the transistors may be disposed in the wiring layer 121, and some of the other transistors may be disposed in the semiconductor layer 102.

[0091] 5, a circuit element C1 is provided in the wiring layer 121 of the imaging device 1. In the imaging device 1, for example, a plurality of circuit elements C1 are provided for each signal processing circuit 200. The circuit element C1 is a transistor, a capacitance element, a resistance element, etc. included in the signal processing circuit 200. The circuit element C1 may be a resistance element formed by a diode-connected transistor. As an example, the circuit element C1 is used as the transistor Tr1 of the load circuit 30, the transistor Tr11 of the comparison circuit 50, the transistor Tr12, the capacitance element 41, or the capacitance element 41.

[0092] 5, the semiconductor region 61 is provided in the wiring layer 121 using the insulating film (interlayer insulating film) of the wiring layer 121 as a base film. It can be said that the semiconductor region 61 is arranged to replace a part of the wiring layer 121.

[0093] The insulating film (interlayer insulating film) of the wiring layer 121 is made of, for example, silicon oxide (SiO), silicon nitride (SiN), TEOS, etc. The insulating film of the wiring layer 121 may be made of SiCN, SiCON, Al2O3, HfO2, ZrO2, etc., or may be made of other insulating materials. The insulating film of the wiring layer 121 also serves as a passivation film (protective film) for the thin film transistors, and may be formed so as to cover the periphery of each thin film transistor.

[0094] The semiconductor region 61 is a region (channel region) where a channel is formed. The semiconductor region 61 is a channel region including, for example, an oxide semiconductor. The semiconductor region 61 can be made of an oxide semiconductor such as InGaZnO, InZnO, ZnO, SnO, or TiO2.

[0095] The semiconductor region 61 may be formed using a two-dimensional material (MoS2, WS2, MoSe2, WSe2, HfS2, etc.). The semiconductor region 61 may also be configured using an organic semiconductor (fullerene, rubrene, pentacene, etc.), carbon nanotubes, hydrogenated amorphous silicon, low-temperature polysilicon, etc. as a channel material.

[0096] The electrodes 62a and 62b can be used, for example, as a source electrode and a drain electrode. One of the electrodes 62a and 62b is a source electrode of the circuit element C1, and the other of the electrodes 62a and 62b is a drain electrode of the circuit element C1. The electrodes 62a and 62b can also be used as electrodes (terminals) of a capacitance element (for example, a MOS capacitance).

[0097] The electrodes 62a and 62b are each formed using a metal material such as copper (Cu), tungsten (W), cobalt (Co), or ruthenium (Ru). The electrodes 62a and 62b may be formed using other conductive materials. The electrodes 62a and 62b may be formed using a low-resistance conductive material.

[0098] The gate insulating film 65 is made of, for example, silicon oxide (SiO), silicon nitride (SiN), etc. Also, for example, the gate insulating film 65 is formed using an insulating material such as Al2O3, HfO2, ZrO2, LaO2, HfSiO, Y2O3, SiON, etc. Note that the gate insulating film 65 may be made of other materials.

[0099] The gate electrode 66 is formed using a metal material such as Au, Pt, Cu, Ti, W, Pd, TiN, TaN, TiAl, Bi, In, Al, Sc, Co, or Mo. The gate electrode 66 may also be formed using other conductive materials.

[0100] The circuit element C1 may have a planar structure or a three-dimensional structure. The circuit element C1 may be, for example, a planar transistor. Alternatively, the circuit element C1 may be an element with a vertical structure (for example, a vertical transistor).

[0101] As described above, in the imaging device 1 according to the present embodiment, some of the multiple circuit elements included in the signal processing circuit 200 are provided in the wiring layers (wiring layers 121, 111, etc.). For example, the multiple circuit elements constituting the signal processing circuit 200 are provided separately in the semiconductor layer 102 and the wiring layer 121. This makes it possible to reduce the chip area of ​​the imaging device 1.

[0102] In this embodiment, for example, at least some of the transistors of the signal processing circuit 200 are provided as thin film transistors (TFTs) on the wiring layer 121. Also, for example, at least some of the capacitive elements of the signal processing circuit 200 are provided on the wiring layer 121. This makes it possible to reduce the footprint of the signal processing circuit 200.

[0103] In an imaging device, the load circuit for each pixel column tends to occupy a large proportion of the chip area. Therefore, by arranging the transistor Tr1 of the load circuit 30 for each pixel column on the wiring layer 121, the circuit area of ​​the signal processing circuit 200 can be significantly reduced, and the chip area can be effectively reduced.

[0104] Furthermore, the area of ​​the region in the semiconductor layer 102 where other circuit elements are arranged can be increased. For example, the size of the transistors used in the comparison circuit 50 can be increased. The area (gate width, gate length, etc.) of the transistors in the comparison circuit 50, for example, the transistors Tr11 and Tr12 that make up the differential pair 55, can be increased, thereby suppressing noise from being mixed into pixel signals. This makes it possible to suppress degradation in image quality.

[0105] Furthermore, in the imaging device 1, the circuit elements provided in the wiring layers 121 and 111 and the circuit elements provided in the semiconductor layer 102 can be electrically connected to each other by the wiring of the wiring layers 121 and 111. This allows for improved flexibility in layout.

[0106] 6A and 6B are diagrams illustrating an example of the configuration of an imaging device according to an embodiment. The signal processing circuit 200 may include, for example, a circuit element C1 provided in the wiring layer 121 and a circuit element C2 provided on the surface 12S1 side of the semiconductor layer 102. The circuit elements C1 and C2 are, for example, transistors, capacitance elements, resistance elements, or the like.

[0107] 6A, the circuit element C1 is provided above the circuit element C2. The circuit element C1 can be provided so as to overlap at least a portion of the circuit element C2 in a plan view. In the example shown in FIG. 6A, the circuit element C1 is provided so that the electrode 62a of the circuit element C1 overlaps the gate electrode of the circuit element C2 in a plan view.

[0108] The electrode 62a of the circuit element C1 is located above the gate of the circuit element C2. The circuit element C1 may be provided such that the electrode 62b of the circuit element C1 is located above the gate of the circuit element C2. The electrode 62a of the circuit element C1 may be electrically connected to the gate of the circuit element C2 through, for example, a via (also referred to as a contact).

[0109] The vias connected to the circuit elements C1 and C2 are formed using metal materials such as Au (gold), Pt (platinum), Pd (palladium), copper (Cu), titanium (Ti), tungsten (W), titanium nitride (TiN), tantalum nitride (TaN), titanium aluminum (TiAl), bismuth (Bi), indium (In), aluminum (Al), scandium (Sc), cobalt (Co), molybdenum (Mo), etc. The vias may also be made using other conductive materials.

[0110] As an example, the circuit element C1 may be configured as a transistor Tr1 of the load circuit 30, as shown in FIG. 6B. The circuit element C2 may be configured as a transistor Tr11 (or transistor Tr12) of the differential pair 55 of the comparison circuit 50. For example, an electrode 62a serving as the drain of the transistor Tr1 is electrically connected to the gate electrode of the transistor Tr11. Note that a capacitance element 41 (or capacitance element 42) may be provided in the wiring layer 121 between the transistor Tr1 and the transistor Tr11 (or transistor Tr12).

[0111] 7A and 7B are diagrams illustrating another example configuration of an imaging device according to an embodiment. The circuit elements C1 and C2 of the signal processing circuit 200 may have the structure shown in FIG. 7A. In the example shown in FIG. 7A, the electrode 62a of the circuit element C1 is provided above the source or drain of the circuit element C2. The semiconductor region 61 and gate electrode 66 of the circuit element C1 are located above the gate of the circuit element C2. The electrode 62a of the circuit element C1 is electrically connected to the drain or source of the circuit element C2.

[0112] 7B, the circuit element C1 may be configured as a transistor Tr1 of the load circuit 30. The circuit element C2 may be configured as a transistor Tr31 of the switch SW11. For example, the electrode 62a serving as the drain of the transistor Tr1 is electrically connected to the drain or source of the transistor Tr31.

[0113] 8A and 8B are diagrams illustrating another example configuration of an imaging device according to an embodiment. In the example shown in Fig. 8A, an electrode 62a of a circuit element C1 is provided above the source or drain of a circuit element C2. Alternatively, an electrode 62b of the circuit element C1 may be provided above the source or drain of the circuit element C2. For example, the electrode 62a of the circuit element C1 is electrically connected to the drain or source of the circuit element C2.

[0114] 8B, the circuit element C1 may be configured as a transistor Tr1 of the load circuit 30. The circuit element C2 may be configured as a transistor Tr31 of the switch SW11. For example, the electrode 62a serving as the drain of the transistor Tr1 is electrically connected to the drain or source of the transistor Tr31.

[0115] 9A and 9B are diagrams illustrating another example configuration of an imaging device according to an embodiment. In the example shown in Fig. 9A, a portion of the gate electrode 66 of the circuit element C1 is provided above the gate electrode of the circuit element C2. The gate electrode 66 of the circuit element C1 is electrically connected to the gate electrode of the circuit element C2 through a via.

[0116] 9B, the circuit element C1 may be configured as a capacitance element 41. The circuit element C2 may be configured as a transistor Tr11 of the comparison circuit 50. For example, one electrode (terminal) of the capacitance element 41 is electrically connected to the gate electrode of the transistor Tr11. Alternatively, the circuit element C1 may be configured as a capacitance element 42, and the circuit element C2 may be configured as a transistor Tr12.

[0117] 10A and 10B are diagrams illustrating another example of the configuration of an imaging device according to an embodiment. In the example shown in Fig. 10A, a portion of the gate electrode 66 of the circuit element C1 is provided above the source or drain of the circuit element C2. The gate electrode 66 of the circuit element C1 is electrically connected to the source or drain of the circuit element C2 through a via.

[0118] As an example, the circuit element C1 may be configured as a capacitance element 41 as shown in FIG. 10B. The circuit element C2 may be configured as a transistor Tr31 of the switch SW11. For example, one electrode of the capacitance element 41 is electrically connected to the drain or source of the transistor Tr31. Alternatively, the circuit element C1 may be configured as a capacitance element 42, and the circuit element C2 may be configured as a transistor Tr32.

[0119] [Actions and Effects] The photodetector according to this embodiment includes a first substrate (substrate 201) having a photoelectric conversion element (photoelectric conversion unit 12) that photoelectrically converts light and at least a part of a readout circuit (readout circuit 20) that can output a first signal based on the charge converted by the photoelectric conversion element, a second substrate (substrate 202) that has at least a part of a signal processing circuit (signal processing circuit 200) that can process the first signal and is stacked on the first substrate, and a wiring layer (wiring layer 121 or wiring layer 111) provided on the first substrate or the second substrate. The signal processing circuit has a first element (for example, circuit element C1) provided on the wiring layer.

[0120] In the photodetector (image capture device 1) according to this embodiment, at least some of the circuit elements of the signal processing circuit 200 are provided in the wiring layer 121 (or the wiring layer 111). This makes it possible to reduce the circuit area of ​​the signal processing circuit 200 in the image capture device 1. It is possible to realize a photodetector that allows for a reduced circuit area.

[0121] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0122] <2. Modifications> (2-1. Variation 1) 11 is a diagram illustrating an example configuration of an imaging device according to Modification 1 of the present disclosure. The circuit elements of the signal processing circuit 200 may be provided in a plurality of wiring layers (hierarchies). In the example shown in FIG. 11, the wiring layer 121 is a multi-wiring layer and includes a wiring layer 221 and a wiring layer 222.

[0123] The wiring layer 221 and the wiring layer 222 each include, for example, a conductor film and an insulating film, and have a plurality of wires and vias, an interlayer insulating film, etc. In the wiring layer 121 (multilayer wiring layer), for example, at least some of the transistors of the above-described signal processing circuit 200 can be formed as thin film transistors.

[0124] Some of the multiple circuit elements of the signal processing circuit 200 may be provided separately on the wiring layer 221 and the wiring layer 222. In the example shown in Fig. 11, a circuit element C1a is provided on the wiring layer 221, and a circuit element C1b is provided on the wiring layer 222. The circuit element C1a and the circuit element C1b may each be configured as a thin film transistor, for example. At least one of the circuit element C1a and the circuit element C1b may be a capacitance element or a resistance element.

[0125] 11, circuit element C1a is located in wiring layer 221 and is provided at a different layer from circuit element C2. Circuit element C1b is located in wiring layer 222 and is provided at a different layer from circuit elements C1a and C2. It can also be said that circuit element C1b is provided in an upper layer portion of wiring layer 121, which is a multi-layer wiring layer, and circuit element C1a is provided in a lower layer portion of wiring layer 121.

[0126] As described above, at least some of the circuit elements of the signal processing circuit 200 are arranged on the wiring layer 121. In the present modification, the transistors or capacitance elements of the signal processing circuit 200 are arranged as, for example, circuit elements C1a and C1b on the wiring layers 221 and 222. This enables the imaging device 1 to effectively reduce the circuit area.

[0127] 12 is a diagram illustrating another example configuration of the imaging device according to Modification 1. In the example shown in Fig. 12, the wiring layer 121 is configured to include a wiring layer 221, a wiring layer 222, and a wiring layer 223. The signal processing circuit 200 has a circuit element C1a provided in the wiring layer 221 and a circuit element C1b provided in the wiring layer 222.

[0128] The signal processing circuit 200 may also have a circuit element C1c provided in the wiring layer 223. The circuit elements C1a, C1b, and C1c may be formed in different layers and may be provided so as to be stacked on top of each other. Note that the signal processing circuit 200 may be configured so that circuit elements such as transistors and capacitive elements are provided in only one or two of the wiring layers 221 to 223.

[0129] (2-2. Variation 2) In the above-described embodiment and modified example, examples of the configuration of the photodetector have been described, but the configuration of the photodetector (imaging device) is not limited to the above-described examples. For example, the thin-film transistor provided in the wiring layer may be a vertical transistor. The thin-film transistor may be, for example, a gate-all-around (GAA) TFT having a structure in which a gate is provided so as to surround the periphery of a channel region.

[0130] Some circuit elements of the signal processing circuit 200 may be provided in the wiring layer 121, or may be provided in the wiring layer 111. Furthermore, multiple circuit elements of the signal processing circuit 200 may be arranged separately on the wiring layer 121 and the wiring layer 111. Each transistor (transistors AMP, SEL, RST, etc.) of the readout circuit 20 of the pixel P may be arranged in the wiring layer 111 as a thin-film transistor.

[0131] 13 is a diagram illustrating a configuration example of an imaging device according to Modification 2. The imaging device 1 may have a circuit element C1 provided in the wiring layer 121 and a circuit element C3 provided in the wiring layer 111. The circuit element C3 may be configured as a circuit element of the signal processing circuit 200 or a circuit element of the readout circuit 20.

[0132] At least a part of the transistors of the pixel P may be provided as a circuit element C3 in the wiring layer 111. For example, the transistor TG, the transistor AMP, the transistor SEL, the transistor RST, the switching transistor, etc. may be provided separately in the semiconductor layer 101 and the wiring layer 111. The imaging device 1 can have a structure that is advantageous for miniaturization.

[0133] <3. Application Examples> The imaging device 1 and the like can be applied to any type of electronic device with an imaging function, for example, a camera system such as a digital still camera or a video camera, a mobile phone with an imaging function, etc. Fig. 14 shows a schematic configuration of an electronic device 1000.

[0134] The electronic device 1000 includes, for example, a lens group 1001, an imaging device 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a recording unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.

[0135] The lens group 1001 captures incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies the signal to the DSP circuit 1002 as a pixel signal.

[0136] The DSP circuit 1002 is a signal processing circuit that processes signals supplied from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing the signals from the imaging device 1. The frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 on a frame-by-frame basis.

[0137] The display unit 1004 is formed of a panel display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and records image data of moving or still images captured by the imaging device 1 on a recording medium such as a semiconductor memory or a hard disk.

[0138] In response to a user's operation, the operation unit 1006 outputs operation signals for various functions of the electronic device 1000. The power supply unit 1007 supplies various types of power to the DSP circuit 1002, frame memory 1003, display unit 1004, recording unit 1005, and operation unit 1006 as needed.

[0139] <4. Application Examples> (Example of application to a moving object) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0140] FIG. 15 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0141] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 15, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0142] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, etc.

[0143] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches may be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0144] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc., based on the received images.

[0145] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0146] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0147] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drivetrain control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including avoiding or mitigating collisions between vehicles, following based on the distance between vehicles, maintaining vehicle speed, warning of vehicle collisions, or warning of vehicle lane departure.

[0148] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0149] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0150] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 15, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0151] FIG. 16 is a diagram showing an example of the installation position of the imaging unit 12031.

[0152] In FIG. 16, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0153] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0154] 16 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

[0155] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0156] For example, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on driver operation.

[0157] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drivetrain control unit 12010.

[0158] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. The pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104, which are infrared cameras, and then performing pattern matching on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0159] An example of a mobile object control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 of the above-described configuration. Specifically, for example, the image capturing device 1 or the like can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031, it becomes possible to obtain a high-resolution captured image. It becomes possible to perform high-precision control using the captured image in the mobile object control system.

[0160] (Application example to endoscopic surgery system) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0161] FIG. 17 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0162] 17 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment instrument 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0163] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0164] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens towards an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0165] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0166] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0167] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0168] The light source device 11203 is configured from a light source such as an LED (Light Emitting Diode), and supplies irradiation light to the endoscope 11100 when photographing an operation site or the like.

[0169] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiating light, magnification, focal length, etc.) of the endoscope 11100.

[0170] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0171] The light source device 11203 that supplies illumination light to the endoscope 11100 when photographing the surgical site can be configured from a white light source configured from, for example, an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, making it possible to adjust the white balance of the captured image in the light source device 11203. In this case, it is also possible to capture images corresponding to each RGB in a time-division manner by irradiating the object of observation with laser light from each RGB laser light source in a time-division manner and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0172] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0173] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may be performed using fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0174] FIG. 18 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0175] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so that they can communicate with each other.

[0176] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0177] The imaging unit 11402 is configured with an imaging element. The imaging element constituting the imaging unit 11402 may be one (a so-called single-chip type) or multiple (a so-called multi-chip type). When the imaging unit 11402 is configured with a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured with a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. 3D display enables the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured with a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0178] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0179] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0180] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0181] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0182] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0183] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0184] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0185] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0186] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data sent from the camera head 11102 .

[0187] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0188] Furthermore, the control unit 11413 causes the display device 11202 to display a captured image showing the surgical site, etc., based on the image signal that has been image processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0189] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0190] In the illustrated example, communication is performed by wire using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0191] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. Of the configurations described above, the technology according to the present disclosure can be suitably applied to, for example, the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to provide a high-definition endoscope 11100.

[0192] Although the present disclosure has been described above by way of embodiments, modifications, application examples, and applied examples, the present technology is not limited to the above-described embodiments, etc., and various modifications are possible. For example, although the modifications described above have been described as modifications of the above-described embodiments, the configurations of the modifications can be combined as appropriate.

[0193] In the above embodiments, an imaging device has been described as an example, but the photodetector of the present disclosure may be, for example, a device that receives incident light and converts the light into an electric charge. The output signal may be a signal of image information or a signal of ranging information. The photodetector (imaging device) may be applied to an image sensor, a ranging sensor, etc. Note that the present disclosure is not limited to a back-illuminated image sensor, but may also be applied to a front-illuminated image sensor.

[0194] The photodetector according to the present disclosure may also be applied as a distance measuring sensor capable of measuring distances using a time-of-flight (TOF) method. The photodetector (image capture device) may also be applied as a sensor capable of detecting events, such as an event-driven sensor (also known as an event vision sensor (EVS), an event-driven sensor (EDS), or a dynamic vision sensor (DVS)).

[0195] A photodetector according to one embodiment of the present disclosure includes a first substrate having a photoelectric conversion element and at least a portion of a readout circuit capable of outputting a first signal based on the charge converted by the photoelectric conversion element, a second substrate having at least a portion of a signal processing circuit capable of processing the first signal and stacked on the first substrate, and a wiring layer provided on the first substrate or the second substrate. The signal processing circuit has a first element provided on the wiring layer. This makes it possible to realize a photodetector capable of reducing the circuit area.

[0196] The effects described in this specification are merely examples and are not limited to those described, and other effects may also be achieved. Furthermore, the present disclosure may also be configured as follows. (1) a first substrate having a photoelectric conversion element that converts light into an electric charge and at least a part of a readout circuit that can output a first signal based on the electric charge converted by the photoelectric conversion element; a second substrate having at least a part of a signal processing circuit capable of performing signal processing of the first signal and stacked on the first substrate; a wiring layer provided on the first substrate or the second substrate; Equipped with The signal processing circuit has a first element provided in the wiring layer. Light detection device. (2) The signal processing circuit has, as the first element, a first transistor provided in the wiring layer. The photodetector according to (1) above. (3) The first transistor is a thin film transistor. The photodetector according to (2) above. (4) The first transistor has a channel region including an oxide semiconductor. The photodetector according to (2) or (3) above. (5) the readout circuit is capable of outputting the first signal to a first signal line; The first transistor is electrically connected to the first signal line and is capable of supplying a current to the first signal line. The photodetector according to any one of (2) to (4) above. (6) The signal processing circuit includes an AD conversion circuit capable of converting the first signal into a digital signal. The photodetector according to any one of (2) to (5) above. (7) the AD conversion circuit has a comparison circuit including the first transistor, The comparator circuit is capable of comparing the first signal input to the first transistor with a reference signal. The photodetector according to (6) above. (8) the AD conversion circuit has a comparison circuit including a differential pair and the first transistor, The first transistor is capable of supplying a current to the differential pair. The photodetector according to (6) or (7) above. (9) The first transistor is electrically connected between a first signal line that transmits the first signal and a first potential line. The photodetector according to any one of (2) to (8) above. (10) The signal processing circuit has, as the first element, a capacitive element provided in the wiring layer. The photodetector according to (1) above. (11) the signal processing circuit includes an AD conversion circuit capable of converting the first signal into a digital signal; The AD conversion circuit has a comparison circuit capable of comparing the first signal input via the capacitive element with a reference signal. The photodetector according to (10) above. (12) the first substrate has a first semiconductor layer; the readout circuit includes a second transistor provided on a first surface side of the first semiconductor layer; The first element is provided above the second transistor. The photodetector according to any one of (1) to (11) above. (13) The readout circuit includes: Floating diffusion and a transfer transistor capable of transferring the charges converted by the photoelectric conversion element to the floating diffusion; and the second transistor is capable of outputting the first signal based on the charge accumulated in the floating diffusion; The first element is electrically connected to the second transistor. The photodetector according to (12) above. (14) the first substrate has a first semiconductor layer and the wiring layer; the readout circuit includes a second transistor provided on a first surface side of the first semiconductor layer; The first element is provided above the second transistor. The photodetector according to any one of (1) to (13) above. (15) the second substrate has a second semiconductor layer; the signal processing circuit has a third transistor provided on a second surface side of the second semiconductor layer, The first element is provided above the third transistor. The photodetector according to any one of (1) to (14) above. (16) The first element is electrically connected to the third transistor. The photodetector according to (15) above. (17) the second substrate has a second semiconductor layer and the wiring layer, the signal processing circuit has a third transistor provided on a second surface side of the second semiconductor layer, The first element is provided above the third transistor. The photodetector according to any one of (1) to (16) above. (18) the signal processing circuit has the first element and the second element provided in the wiring layer, The first element and the second element are provided in different layers. The photodetector according to any one of (1) to (17) above. (19) The first element is electrically connected to the second element. The photodetector according to (18) above. (20) An optical system; a photodetector that receives light transmitted through the optical system; Equipped with The photodetector device a first substrate having a photoelectric conversion element that converts light into an electric charge and at least a part of a readout circuit that can output a first signal based on the electric charge converted by the photoelectric conversion element; a second substrate having at least a part of a signal processing circuit capable of performing signal processing of the first signal and stacked on the first substrate; a wiring layer provided on the first substrate or the second substrate; and The signal processing circuit has a first element provided in the wiring layer. electronic equipment. [Explanation of symbols]

[0197] 1...imaging device, 12...photoelectric conversion section, 20...readout circuit, 101, 102...semiconductor layer, 111, 121...wiring layer, 200...signal processing circuit, 201, 202...substrate.

Claims

1. a first substrate having a photoelectric conversion element that converts light into an electric charge and at least a part of a readout circuit that can output a first signal based on the electric charge converted by the photoelectric conversion element; a second substrate having at least a part of a signal processing circuit capable of performing signal processing of the first signal and stacked on the first substrate; a wiring layer provided on the first substrate or the second substrate; Equipped with The signal processing circuit has a first element provided in the wiring layer. Light detection device.

2. The signal processing circuit has, as the first element, a first transistor provided in the wiring layer. The photodetector device according to claim 1 .

3. The first transistor is a thin film transistor. The photodetector device according to claim 2 .

4. The first transistor has a channel region including an oxide semiconductor. The photodetector device according to claim 2 .

5. the readout circuit is capable of outputting the first signal to a first signal line; The first transistor is electrically connected to the first signal line and is capable of supplying a current to the first signal line. The photodetector device according to claim 2 .

6. The signal processing circuit includes an AD conversion circuit capable of converting the first signal into a digital signal. The photodetector device according to claim 2 .

7. the AD conversion circuit has a comparison circuit including the first transistor, The comparator circuit is capable of comparing the first signal input to the first transistor with a reference signal.

7. The photodetector according to claim 6.

8. the AD conversion circuit has a comparison circuit including a differential pair and the first transistor; The first transistor is capable of supplying a current to the differential pair.

7. The photodetector according to claim 6.

9. The first transistor is electrically connected between a first signal line that transmits the first signal and a first potential line. The photodetector device according to claim 2 .

10. The signal processing circuit has, as the first element, a capacitive element provided in the wiring layer. The photodetector device according to claim 1 .

11. the signal processing circuit includes an AD conversion circuit capable of converting the first signal into a digital signal; The AD conversion circuit has a comparison circuit capable of comparing the first signal input via the capacitive element with a reference signal. The optical detection device according to claim 10.

12. the first substrate has a first semiconductor layer; the readout circuit includes a second transistor provided on a first surface side of the first semiconductor layer; The first element is provided above the second transistor. The photodetector device according to claim 1 .

13. The readout circuit includes: Floating diffusion and a transfer transistor capable of transferring the charges converted by the photoelectric conversion element to the floating diffusion; and the second transistor is capable of outputting the first signal based on the charge accumulated in the floating diffusion; The first element is electrically connected to the second transistor. The optical detection device according to claim 12.

14. the first substrate has a first semiconductor layer and the wiring layer; the readout circuit includes a second transistor provided on a first surface side of the first semiconductor layer; The first element is provided above the second transistor. The photodetector device according to claim 1 .

15. the second substrate has a second semiconductor layer; the signal processing circuit includes a third transistor provided on a second surface side of the second semiconductor layer, The first element is provided above the third transistor. The photodetector device according to claim 1 .

16. The first element is electrically connected to the third transistor.

16. The optical detection device of claim 15.

17. the second substrate has a second semiconductor layer and the wiring layer; the signal processing circuit includes a third transistor provided on a second surface side of the second semiconductor layer, The first element is provided above the third transistor. The photodetector device according to claim 1 .

18. the signal processing circuit has the first element and the second element provided in the wiring layer, The first element and the second element are provided in different layers. The photodetector device according to claim 1 .

19. The first element is electrically connected to the second element.

19. The optical detection device of claim 18.

20. An optical system; a photodetector that receives light transmitted through the optical system; Equipped with The photodetector device a first substrate having a photoelectric conversion element that converts light into an electric charge and at least a part of a readout circuit that can output a first signal based on the electric charge converted by the photoelectric conversion element; a second substrate having at least a part of a signal processing circuit capable of performing signal processing of the first signal and stacked on the first substrate; a wiring layer provided on the first substrate or the second substrate; and The signal processing circuit has a first element provided in the wiring layer. electronic equipment.

Images