Multi-junction photovoltaic solar cell with integrated, monolithic blocking diode

The integration of a monolithic blocking diode within the triple-junction photovoltaic solar cell structure addresses the issue of shaded cells by preventing reverse bias and maintaining power delivery, enhancing system reliability.

JP2025134629APending Publication Date: 2025-09-17THE BOEING CO
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Patent Information

Application Number
JP2025005844
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-07
Filing Date
2025-01-16
Publication Date
2025-09-17

AI Technical Summary

Technical Problem

Existing multi-junction photovoltaic solar cells are vulnerable to performance degradation when one or more cells are shaded, leading to reverse bias and potential damage due to short circuits, which conventional discrete external blocking diodes fail to adequately address.

Method used

Integration of a monolithic blocking diode within the solar cell structure, separated by a trench, to protect the circuitry when individual cells are shaded, using a triple-junction configuration with specific semiconductor layers and metal contacts.

Benefits of technology

The integrated monolithic blocking diode effectively prevents damage to shaded cells by redirecting current, maintaining system integrity and power delivery to the load.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a multi-junction photovoltaic solar cell with a monolithic integrated blocking diode, and methods of fabrication.SOLUTION: In a photovoltaic assembly 6 comprising a generic multi-junction photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 having a width C, a first layer 12 has a width D and comprises a conductive metal or metal alloy. A second layer 14 with the width D which can comprise a p-doped first semiconductor material is disposed on the first layer 12. A photovoltaic solar cell stack 15 with a width A is disposed on a left-side portion of the second layer 14 and comprises generic multi-junction semiconductor layers, for example, a, b, c, d, and e. The photovoltaic solar cell stack 15 comprises at least one PN junction (not identified). A first metal contact 18 with a width E is disposed on top of a portion of the PV solar cell stack 15.SELECTED DRAWING: Figure 3A
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Description

[Technical Field]

[0001] This disclosure relates to multi-junction photovoltaic (PV) solar cells with integrated monolithic blocking diodes. In particular, this disclosure relates to triple-junction PV solar cells for use in satellites and spacecraft. [Background technology]

[0002] FIG. 1 shows a schematic electrical diagram of three PV solar cell circuits (A, B, C) connected to a load 4. Each circuit A, B, or C consists of three PV solar cells 2, 2', and 2'' connected in series. The three circuits (circuit "A", circuit "B", and circuit "C") are connected in parallel. When all PV solar cells are illuminated, a forward voltage bias is generated across each cell. The panel current Ip is determined by the voltage difference = (V + -V - ) is powered by a PV solar panel 5. The PV solar panel 5 is connected to a load 4, such as a battery, motor, lights, or computer. However, if one or more of the PV solar cells 2, 2', or 2'' are shaded, the shaded cells become reverse-biased and act as diodes. To mitigate this situation, a series of discrete external blocking diodes 7A, 7B, and 7C are connected in series with the positive terminals of each of the circuits A, B, and C, respectively. These discrete blocking diodes 3A, 3B, and 3C help protect each of the three PV solar cell circuits when one or more PV solar cells are shaded and stop generating energy. Without these discrete external blocking diodes, a short circuit in one circuit would short power in all circuits, thereby significantly reducing the total power delivered to the load 4. Therefore, the discrete external blocking diodes block current from reaching the fault in the other circuits. Summary of the Invention

[0003]

[0003] A multi-junction photovoltaic (PV) solar cell with an integrated monolithic blocking diode and a method for fabricating the same are disclosed. The integrated monolithic blocking diode protects the circuitry of the PV solar cells when one or more PV solar cells are shaded. A triple-junction PV solar cell can include a first conductive substrate, a p-doped second layer disposed on the substrate, and a PV solar cell stack and an adjacent blocking diode stack disposed on the second layer. A trench separates the two stacks, providing electrical isolation. A triple-junction cell can have (1) a first PN junction of Ge, (2) a second PN junction of GaAs, and (3) a third PN junction of InGaP. A first metal contact is disposed on a portion of the PV solar cell stack, and a second metal contact is disposed across the blocking diode stack. Many PV solar cells can be electrically connected in series as a single string. The integrated monolithic blocking diode protects the string when one or more solar cells are shaded. If one solar cell is shaded, the illuminated solar cell may apply a reverse voltage to the shaded cell, damaging it. Extraterrestrial satellites can use these triple-junction PV solar cells with integrated monolithic blocking diodes.

[0004]

[0004] In one example (Type A), a multi-junction photovoltaic (PV) solar cell with an integrated monolithic blocking diode includes the following: (1) a conductive first layer made of a conductive metal with a width D; (2) a p-doped second layer made of a p-doped first semiconductor material with a width D, disposed on the first layer; (3) a PV solar cell stack with a width A, disposed on the p-doped second layer; (4) a blocking diode stack with a width C, disposed on the p-doped second layer; (5) a first vertical trench with a width B, extending into the p-doped second layer and located between the PV solar cell stack and the blocking diode stack; (6) a first metal contact with a width E, disposed on a part of the PV solar cell stack; (7) a second metal contact with a width C, disposed across the entire upper surface of the blocking diode stack. The PV solar cell stack has an effective light-receiving width of F. Both the PV solar cell stack and the blocking diode are disposed on the second layer. The various dimensions follow the following rules: E < A, E < F, F < A, B < C, B < A, A < D, C < D, A = E + F, and D = A + B + C.

[0005]

[0005] In some examples, the PV solar cell further includes an n-doped third layer made of an n-doped first semiconductor material with a width A, disposed on the p-doped second layer (thereby forming a first PN junction in both the PV solar cell stack and the blocking diode stack). The first semiconductor material can be germanium (Ge).

[0006] In some examples, the PV solar cell stack can have the same number of layers as the blocking diode stack. Alternatively, the PV solar cell stack can have fewer layers than the blocking diode stack. Alternatively, the PV solar cell stack can have more layers than the blocking diode stack. The second metal contact can be disposed directly on the p-doped second layer, thereby forming a p-type Schottky diode. In some examples, the second metal contact is disposed directly on the n-doped third layer, thereby forming an n-type Schottky diode.

[0007] The PV solar cell may further include a p-doped fourth layer having a width A disposed on the n-doped third layer. The p-doped fourth layer is made of a p-doped second semiconductor material. The PV solar cell may additionally include an n-doped fifth layer having a width A disposed on the p-doped fourth layer. The n-doped fifth layer is made of an n-doped second semiconductor material. In some examples, the second semiconductor material may be gallium arsenide (GaAs).

[0008] The PV solar cell can additionally include a p-doped sixth layer having a width A disposed on the n-doped fifth layer. The p-doped sixth layer is made of a p-doped third semiconductor material. The PV solar cell can additionally include an n-doped seventh layer having a width A disposed on the p-doped sixth layer. The n-doped seventh layer is made of an n-doped third semiconductor material. The third semiconductor material is indium gallium phosphide (InGaP). This forms a triple-junction PV solar cell. In some examples, the p-doped second semiconductor material is located between the second metal contact and the n-doped third layer, thereby forming a p-type Schottky diode. The PV solar cell can include a first conductor connecting the first metal contact to a negative side of a load and a second conductor connecting the second metal contact to a positive side of the load.

[0009]

[0009] In another example (Type B), a triple-junction photovoltaic (PV) solar cell with an integrated monolithic blocking diode includes: (1) a conductive first layer having a width F and made of a conductive metal; (2) a p-doped second layer having a width F and disposed on the first layer and made of a p-doped first semiconductor material; (3) an n-doped third layer having a width A and disposed on the second layer and made of an n-doped first semiconductor material; (4) a p-doped fourth layer having a width A and disposed on the n-doped third layer and made of a p-doped second semiconductor material; (5) a p-doped fourth layer having a width A and disposed on the p-doped fourth layer; (6) an n-doped fifth layer made of an n-doped second semiconductor material and having a width A; (7) an n-doped seventh layer made of an n-doped third semiconductor material and having a width A; (8) an n-doped eighth layer made of an n-doped second semiconductor material and having a width I; and (9) a p-doped ninth layer made of a p-doped second semiconductor material and having a width I disposed on a portion of the n-doped eighth layer. A PV solar cell stack having a width A is disposed on the second layer, and a blocking diode stack having a width C is also disposed on the second layer. A first vertical trench having a width of B extends into the p-doped second layer and is disposed between the PV solar cell stack and the blocking diode stack. A first metal contact having a width of G is disposed on a portion of the top surface of the PV solar cell stack. A second metal contact having a width of E is disposed on the third layer. A third metal contact having a width of I is disposed on the p-doped ninth layer, and a fourth metal contact having a width of K is disposed on the n-doped eighth layer.

[0010]

[0010] Further, with respect to the example of Type B, the second vertical trench having a width J extends into the n-doped eighth layer and is disposed between the n-doped eighth layer and the fourth metal contact. The third vertical trench having a width D extends into the n-doped third layer and is disposed between the blocking diode stack and the second metal contact. The conductive metal shunt can be a wire connection, a ribbon connection, or an integrated monolithic connection, and electrically connects the third metal contact to the fourth metal contact. The PV solar cell stack has an active solar width having a width H. Both the PV solar cell stack and the blocking diode are disposed on the second layer. The dimensions of this triple-junction assembly follow the following rules: A < F, C < D, B < A, B < C, G < A, I < C, K < C, J < C, G < H, H < A, A = G + H, C = I + J + K, and F = A + B + C + D + E.

[0011]

[0011] In another example, the PV solar cell can additionally include an intermediate layer of n-doped first semiconductor material inserted between the second layer and the second metal contact.

[0012]

[0012] In some examples, all PV solar cells can each have an integrated monolithic blocking diode.

[0013]

[0013] In another example, an extraterrestrial artificial satellite can have a PV solar panel attached to the satellite, and the PV solar panel includes one or more triple-junction PV solar cells with integrated monolithic blocking diodes as described above. For satellite applications, the first semiconductor material can be Ge, the second semiconductor material can be GaAs, and the third semiconductor material can be InGaP.

[0014]

[0014] In another example, a string of three identical individual PV solar cells is electrically connected in series to create a PV assembly using either the Type A or Type B PV solar cell structure described above. Each PV solar cell has its own blocking diode, but only the third PV solar cell is electrically connected to a load. A first conductor is connected at one end to the first layer of the first PV solar cell and at the other end to the upper metal contact at the top of the PV solar cell stack of the second PV solar cell (i.e., a series connection). Furthermore, a second conductor is connected at one end to the first layer of the second PV solar cell and at the other end to the upper metal contact at the top of the PV solar cell stack of the third PV solar cell. This connects the three PV solar cells in series. A third conductor connects the upper metal contact of the first PV solar cell to the negative side of the load, and a fourth conductor connects the upper metal contact of the third PV solar cell to the positive side of the load to complete the circuit.

[0015] In some examples, the PV solar cell can be a two-junction or a three-junction solar cell. Generally, a single-junction solar cell does not generate a high enough voltage to turn on an integrated monolithic blocking diode. [Brief explanation of the drawings]

[0016] [Figure 1]

[0016] Figure 1 shows a schematic electrical diagram of a three PV solar cell circuit connected to a load. [Figure 2A]

[0017] 1 shows a plan view of a schematic example of an electrical circuit including a series of three illuminated triple-junction PV solar cells (connected in series), each with its own individual bypass diode, all connected in series to a load, according to the present disclosure. [Figure 2B]

[0018] 2B is a plan view of a schematic example of an electrical circuit according to the present disclosure shown in FIG. 2A, with the central triple-junction PV solar cell in shadow. [Figure 3A]

[0019] FIG. 1 shows a schematic elevation cross-sectional view of an example of a PV assembly comprised of universal multi-junction photovoltaic solar cells with an integrated monolithic blocking diode, where the number of layers in the PV solar cell is the same as the number of layers in the blocking diode, in accordance with the present disclosure. [Figure 3B]

[0020] 1 is a schematic elevation cross-sectional view of an example of a PV assembly 6 comprised of a generic multi-junction photovoltaic solar cell 8 with an integrated monolithic blocking diode 10, in accordance with the present disclosure, where the number of layers in the PV solar cell 8 is different (i.e., fewer) than the number of layers in the blocking diode 10. [Figure 4A]

[0021] FIG. 1 shows a schematic cross-sectional elevation view of an example of a dual-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 4B]

[0022] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 4C]

[0023] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 5A]

[0024] FIG. 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 5B]

[0025] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 5C]

[0026] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 6A]

[0027] 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure; [Figure 6B]

[0028] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 6C]

[0029] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 7A]

[0030] 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 7B]

[0031] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 7C]

[0032] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 8A]

[0033] FIG. 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 8B]

[0034] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 8C]

[0035] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 9A]

[0036] FIG. 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 9B]

[0037] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 9C]

[0038] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 9D]

[0039] 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode and an integrated monolithic shunt according to the present disclosure. [Figure 10A]

[0040] FIG. 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 10B]

[0041] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 10C]

[0042] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 11A]

[0043] 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 11B]

[0044] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 11C]

[0045] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 12A]

[0046] FIG. 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 12B]

[0047] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 12C]

[0048] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 13A]

[0049] 1 shows a schematic cross-sectional elevation view of an example multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 13B]

[0050] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode with specific material selection according to the present disclosure. [Figure 13C]

[0051] 1 shows a schematic cross-sectional elevation view of an example of a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode, electrically connected to a load, with specific material selections according to the present disclosure. [Figure 14A]

[0052] 1 shows a schematic cross-sectional view of an example of an electrical circuit including a PV assembly including multiple PV solar cells connected in series to a load 4 with a single integrated monolithic blocking diode integrated with the PV solar cell, according to the present disclosure. [Figure 14B]

[0053] 1 illustrates a schematic cross-sectional view of an example of an electrical circuit including multiple PV solar cells connected in series to a load, each PV solar cell including its own individual integrated monolithic blocking diode, according to the present disclosure. [Figure 15]

[0054] 1 shows a schematic cross-sectional view of an example of an electrical circuit including a PV assembly including multiple PV solar cells with a single integrated monolithic blocking diode connected in series to a load, according to the present disclosure. [Figure 16A]

[0055] 1 shows a schematic cross-sectional elevation view of an example of a first step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 16B]

[0056] 1 shows a schematic cross-sectional elevation view of an example of a second step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 16C]

[0057] 1 shows a schematic cross-sectional elevation view of an example of a third step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 16D]

[0058] 10 shows a schematic cross-sectional elevation view of an example of a fourth step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 16E]

[0059] 10 shows a schematic cross-sectional elevation view of an example of a fifth step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 16F]

[0060] 10 shows a schematic cross-sectional elevation view of an example of a sixth step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. [Figure 17]

[0061] 1 shows a process flow chart illustrating an example of processing steps for fabricating a PV solar cell with an integrated monolithic blocking diode using semiconductor processing according to the present disclosure. [Figure 18]

[0062] 1 shows a schematic perspective view of an example extraterrestrial satellite with a pair of PV solar panels mounted thereon, each PV solar panel including a triple-junction PV solar cell with an integrated monolithic blocking diode according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0017]

[0063] The term "PN junction" broadly includes both "p-on-n" and "n-on-p" junctions. The term "metal" includes "metal alloys." The term "active light acceptance width" refers to the exposed portion of a PV solar cell stack that can absorb sunlight and actively convert it into photocurrent. The term "sunlight" is broadly defined to include all photon sources (i.e., "light"). The term "PV solar cell" refers to a PV solar cell that includes one or more pairs of differently doped p-type or n-type semiconductor layers, each pair having a unique PN junction at the interface between the two differently doped semiconductor layers. The terms "conductor" and "connector" are used interchangeably herein. The terms "stack" and "mesa" are used interchangeably herein. The term "integrated" generally refers to a combined structure, particularly an integrated semiconductor structure. The term "monolithic" generally means "consisting of one piece," particularly relating to the formation of integrated electronic circuits on a single chip.

[0018]

[0064] The number of stacked solar cells within a single PV solar cell can range from one solar cell in a single high-efficiency PV solar cell to up to six stacked solar cells. The solar cell stack consists of a series of PN diodes joined by PN tunnel diodes. Individual tunnel junctions are not shown in the diagrams below, but are present in all examples. The schematics shown here do not show the many other layers that can be added to a particular design. In general, the voltage generated by the PV solar cell must be greater than the turn-on voltage of the blocking diode.

[0019]

[0065] FIG. 2A shows a plan view of an example schematic of an electrical circuit according to the present disclosure, including a series 1 of three illuminated triple-junction PV solar cells 2, 2′, 2″ (connected in series), each with its own individual bypass diode 3, 3′, 3″, all connected in series to a load 4. Each PV solar cell 2, 2′, 2″ is a triple-junction cell made up of three series PN junctions stacked on top of each other (shown as three internal diodes connected in series). Typically, when illuminated by sunlight 30, the loop photocurrent I of the circuit pc flows through, for example, the PV solar cell 2 and through the parallel bypass diode 3 (usually blocked, i.e., I blocking =0) is not passed. Note that no discrete external blocking diodes are used in circuit 13 (see Figure 1).

[0020]

[0066] 2B is a plan view of a schematic example of the electrical circuit 13 according to the present disclosure shown in FIG. 2A, with the central three-junction PV solar cell 2' shaded. When the solar cell 2' is shaded, the voltage from the rest of the circuit 13 is reverse biased across the shaded PV solar cell 2' and its associated parallel bypass diode 3'. A current I pcflows through the bypass diode 3'. This circuit voltage is the voltage from the active solar cell in series (e.g., two solar cells) minus the voltage required to turn on the bypass diode 3'.

[0021]

[0067] FIG. 3A shows a schematic elevation cross-sectional view of an example of a PV assembly 6 comprising a generic multijunction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure, where the number of layers in the PV solar cell is the same as the number of layers in the blocking diode 10. A first layer 12 has a width D and comprises a conductive metal or metal alloy. A second layer 14, which may comprise a p-doped first semiconductor material and has a width D, is disposed on the first layer 12. A PV solar cell stack 15, having a width A, is disposed on the left portion of the second layer 14 and comprises generic multijunction semiconductor layers, e.g., a, b, c, d, and e. The PV solar cell stack 15 comprises at least one PN junction (not specified). A first metal contact 18, having a width E, is disposed on a portion of the PV solar cell stack 15. Incident light 30 (e.g., sunlight) illuminates an active area 28 (having a width F) of the PV solar cell stack 15.

[0022]

[0068] In some examples, the semiconductor materials used herein can be selected from doped silicon, doped germanium (Ge), doped gallium arsenide (GaAs), or doped indium gallium phosphide (InGaP), or combinations thereof. The p-dopant element can be selected from boron, gallium, aluminum, or indium, or combinations thereof. The n-dopant element can be selected from phosphorus, arsenic, antimony, bismuth, or lithium, or combinations thereof. The conductive metal contacts 18 and 20 can be selected from Cu, Au, Ag, Al, Ti, or W, or combinations thereof.

[0023]

[0069] Referring further to Fig. 3A, blocking diode 10 is disposed on the right side portion of the second layer 14 and may further include a blocking diode stack 17 of width C composed of general-purpose semiconductor layers a', b', c', d', e', and the second layer 14. The first vertical trench 22 has a width of B and extends to the upper surface of the second layer 14 and is disposed between the PV solar cell stack 15 and the blocking diode stack 17. The second metal contact 20 having a width of C is disposed across the entire upper portion of the blocking diode stack 17 (thereby preventing sunlight 30 from reaching the blocking diode semiconductor stack 17). The photocurrent I pc flows from the first metal contact 18 (at voltage = V-) through the PV solar cell 8 from top to bottom and then downward through the second layer 14. Then, the photocurrent I pc flows horizontally across the conductive p-doped second layer 14. Finally, the photocurrent I pc flows through the blocking diode stack 17 (at voltage = V+) and reaches the second metal contact 20 (from bottom to top). The PV solar cell stack 15 includes, for example, five general-purpose semiconductor layers (a, b, c, d, e) and further includes the second layer 14. The blocking diode stack 17 also includes, for example, five semiconductor layers (a', b', c', d', e') and the second layer 14, which are the same as those used in the adjacent PV solar cell stack 15. The PV solar cell stack 15 and the blocking diode stack 17 are separated by the first vertical trench 22 (however, the second layer 14 is common to both the PV solar cell stack 15 and the blocking diode stack 17). The PV solar cell 8 and the blocking diode 10 share the common first layer 12 and the common second layer 14. Note: Dimensions follow the following rules: E < F, F < A, B < C, A < D, C < D, A = E + F, and D = A + B + C. The PV solar cell 8 includes the first metal contact 18 disposed on the PV solar cell stack 15, and the blocking diode 10 includes the second metal contact 20 disposed on the blocking diode stack 17.

[0024]

[0070] FIG. 3B is a schematic elevation cross-sectional view of an example of a PV assembly 6 comprised of a generic multijunction photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure, where the number of layers in the PV solar cell 8 is different (i.e., fewer) than the number of layers in the blocking diode 10. This example is the same as FIG. 3A, except for the following differences: Here, the top two semiconductor layers 19 (i.e., layers a' and b') have been removed (i.e., by selective etching, as represented by the symbol "X"). A second metal contact 20 is then placed across the top of the reduced-height blocking diode stack 17'. In this example, the reduced-height blocking diode stack 17' is comprised of the same bottom two stacked semiconductor layers (i.e., layers d and e) as used in the adjacent PV solar cell stack 15, for example. The reduced-height blocking diode stack 17' is comprised of fewer layers than the PV solar cell stack 15 (because the top layers a' and b' have been etched away). The PV solar cell 8 and the blocking diode 10 share the same first layer 12 and the same second layer 14. The PV solar cell 8 has a first metal contact 18 disposed on top of the PV solar cell stack 15, and the blocking diode 10 has a second metal contact 20 disposed across the top of the reduced height blocking diode stack 17'.

[0025]

[0071] FIG. 4A shows a schematic elevation cross-sectional view of an example of a two-junction integrated PV assembly 6 including a two-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as FIG. 3A , except for the following differences: A fourth layer 42 made of a p-doped second semiconductor material and having a width A is disposed on the third layer 16; a fifth layer 44 made of an n-doped second semiconductor material and having a width A is disposed on the fourth layer 42; a first vertical trench 22 extends to the top surface of the second layer 14; right-side segment layers 16′, 42′, 44′ (i.e., stack 21) of the blocking diode 10 have been removed (e.g., by etching). Note: In general, a “prime” symbol in a reference numeral (e.g., 42′, 44′) refers to a layer that has been removed (e.g., by etching) from the blocking diode stack to result in a “reduced height” blocking diode stack; a second metal contact 20 is disposed on the second layer 14. A first metal contact 18 is located on the left portion of the fifth layer 44. A first PN junction 24 is located between the second layer 14 and the third layer 16. A second PN junction 26 is located between the second layer 14 and the second metal contact 20. A third PN junction 56 is located between the fourth layer 42 and the fifth layer 44. The PV solar cell 8 includes five stacked layers consisting of (from top to bottom): (a) the active light-receiving width or active area 28 (illuminated by sunlight 30) of the n-doped fifth layer 44, (b) the underlying p-doped fourth layer 42, (c) the underlying n-doped third layer 16, (d) the underlying p-doped second layer 14, and (e) the underlying metallic first layer 12. In this example, the PV solar cell 8 is a dual-junction solar cell including two stacked PN junctions 24 and 56, respectively.

[0026]

[0072] 4B shows a schematic cross-sectional elevation view of an example of a single-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a particular material selection according to the present disclosure. This example is the same as FIG. 4A, except for the following differences: The first layer 12 includes a metal or metal alloy. The second layer 14 includes p-Ge. The third layer 16 includes n-Ge. The fourth layer 42 includes p-GaAs, and the fifth layer includes n-GaAs.

[0027]

[0073] 4C is a schematic elevation cross-sectional view of an example of a single-junction PV assembly 6 including a single-junction PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 4B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0028]

[0074] FIG. 5A shows a schematic elevation cross-sectional view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as FIG. 6A , except for the following differences: A sixth layer 46 made of a p-doped third semiconductor material and having a width A is disposed on the fifth layer 44; a seventh layer 48 made of a p-doped third semiconductor material and having a width A is disposed on the sixth layer 46; a first metal contact 18 is disposed on a left portion of the seventh layer 48; a first vertical trench 22 extends to the top surface of the second layer 14; a right-hand segment (i.e., stack 23) of the blocking diode 10, including layers 16′, 42′, 44′, 46′, and 48′, has been removed (e.g., by etching); a second metal contact 20 is disposed on the second layer 14, thereby forming a Schottky-type second diode 26. A first PN junction 24 is disposed between the second layer 14 and the third layer 16. A second PN junction 26 is disposed between the second layer 14 and the second metal contact 20. A third PN junction 56 is disposed between the fourth layer 42 and the fifth layer 44. A fourth PN junction 62 is disposed between the sixth layer 46 and the seventh layer 48. PV solar cell 8 includes seven stacked layers consisting of (from top to bottom): (a) the active light-receiving width or active area 28 (illuminated by sunlight 30) of n-doped seventh layer 48, (b) the underlying p-doped sixth layer 46, (c) the underlying n-doped fifth layer 44, (d) the underlying p-doped fourth layer 42, and (e) the underlying n-doped third layer 16, (f) the underlying p-doped second layer 14, and (g) the underlying metallic first layer 12. In this example, PV solar cell 8 is a triple-junction solar cell including three stacked PN junctions 24, 56, and 62, respectively.

[0029]

[0075] 5B shows a schematic cross-sectional elevation view of an example of a triple-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using specific material selection according to the present disclosure. This example is the same as FIG. 5A, except for the following differences: The first layer 12 includes a metal or metal alloy. The second layer 14 includes p-Ge. The third layer 16 includes n-Ge. The second layer 42 includes p-GaAs. The fifth layer 44 includes n-GaAs. The sixth layer 46 includes n-InGaP, and the seventh layer 48 includes p-InGaP. The third semiconductor material may include doped InGaP.

[0030]

[0076] 5C is a schematic elevation cross-sectional view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 5B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0031]

[0077] FIG. 6A shows a schematic elevation cross-sectional view of an example of a two-junction integrated PV assembly 6 including a single-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. A fourth layer 42 made of a p-doped second semiconductor material and having a width A is disposed on the third layer 16. A fifth layer 44 made of an n-doped second semiconductor material and having a width A is disposed on the fourth layer 42. A first metal contact 18 is disposed on a left portion of the fifth layer 44. A first vertical trench 22 extends to the top surface of the second layer 14. The right segment layers 42′ and 44′ (i.e., stack 25) of the blocking diode 10 have been removed (e.g., by etching). A second metal contact 20 is disposed on the right segment 16′ of the third layer 16. The PV solar cell 8 includes five stacked layers consisting of (from top to bottom): (a) an active light-receiving width or area 28 (illuminated by sunlight 30) of an n-doped fifth layer 44, (b) an underlying p-doped fourth layer 42, (c) an underlying n-doped third layer 16, (d) an underlying p-doped second layer 14, and (e) an underlying metal first layer 12. The integrated monolithic blocking diode 10 includes a second metal contact 20 that covers the right segment 16′, which in turn covers the second layer 14, which in turn covers the first layer 12. The PV solar cell 8 and the blocking diode 10 share the first layer 12 and the common second layer 14. In this example, the PV solar cell 8 is a dual-junction solar cell that includes two stacked PN junctions, 24 and 56, respectively.

[0032]

[0078] 6B shows a schematic cross-sectional elevation view of an example of a two-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a particular material selection according to the present disclosure. This example is the same as FIG. 6A with the following differences: first layer 12 includes a metal or metal alloy, second layer 14 includes p-germanium, third layers 16 and 16′ both include n-germanium, fourth layer 42 includes p-GaAs, fifth layer 44 includes n-GaAs, and first metal contact 18 and second metal contact 20 include a metal or metal alloy.

[0033]

[0079] 6C is a schematic elevation cross-sectional view of an example of a dual-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 6B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0034]

[0080] 7A shows a schematic cross-sectional elevation view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as FIG. 5A with the following differences: A sixth layer 46 made of a p-doped third semiconductor material and having a width A is disposed on the fifth layer 44. A seventh layer 48 made of an n-doped third semiconductor material and having a width A is disposed on the sixth layer 46. A first metal contact 18 is disposed on a left portion of the seventh layer 48. A fourth PN junction 62 is disposed between the sixth layer 46 and the seventh layer 48. The PV solar cell 8 includes seven stacked layers consisting of (from top to bottom): (a) the effective light-receiving width or area 28 (illuminated by sunlight 30) of the n-doped seventh layer 48, (b) the underlying p-doped sixth layer 46, (c) the underlying n-doped fifth layer 44, (d) the underlying p-doped fourth layer 42, and (e) the underlying n-doped third layer 16, (f) the underlying p-doped second layer 14, and (g) the underlying metallic first layer 12.

[0035]

[0081] 7A , the integrated monolithic blocking diode 10 includes eight stacked layers consisting of (from top to bottom): (a) a second metal contact 20, a seventh layer 48 disposed thereunder, a sixth layer 46 disposed thereunder, a fifth layer 44 disposed thereunder, a fourth layer 42 disposed thereunder, a third layer (i.e., right segment 16′) disposed thereunder, a second layer 14 disposed thereunder, and a first layer 12 disposed thereunder. In this example, the PV solar cell 8 is a triple-junction solar cell including three stacked PN junctions 24, 56, and 62, respectively. Similarly, the blocking diode 10 includes three stacked PN junctions 66, 68, and 74, respectively.

[0036]

[0082] FIG. 7B shows a schematic cross-sectional elevation view of a three-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using specific material selection according to the present disclosure. This example is the same as FIG. 5B, with the following differences: The first layer 12 includes a metal or metal alloy. The second layer 14 includes p-Ge. The third layers 16 and 16′ include n-Ge. The fourth layer 42 includes p-GaAs. The fifth layer 44 includes n-GaAs. The sixth layer 46 includes p-InGaP, and the seventh layer 48 includes n-InGaP. The third semiconductor material may include doped InGaP. The turn-on voltage of this three-junction blocking diode 10 is approximately 2 V.

[0037]

[0083] 7C is a schematic elevation cross-sectional view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 5C, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent Ipc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0038]

[0084] 8A shows a schematic elevation cross-sectional view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. A first layer 12 has a width F and is made of a conductive material such as a metal or metal alloy. A second layer 14 has a width F and is made of a p-doped first semiconductor material and is disposed on the first layer 12. A left segment 16′ of a third layer 16 has a width A and is made of an n-doped first semiconductor material disposed on top of the second layer 14. A right segment 16′ of the third layer 16 has widths C+D+E and is made of an n-doped first semiconductor material disposed on top of the second layer 14. A first vertical trench 22 extends to the top of the second layer 14 and separates the left segment 16′ of the layer 16 from the right segment 16′. The second metal contact 20 has a width E and is located in a portion of the right segment 16′ on the right side of the PV assembly 6, E <FかつE<Cである。

[0039]

[0085] Referring to FIG. 8A, the PV solar cell 8 is comprised of a stack of eight layers including (from top to bottom): (a) a first metal contact 18 having a width of G; (b) a seventh layer 48 made of an n-doped third semiconductor material having a width of A, which includes an effective light-receiving width or active area 28 (illuminated by sunlight 30) having a width of H (A=G+H); and (c) a p-doped third semiconductor material having a width of A. (d) a sixth layer 46, (d) a fifth layer 44 made of an n-doped second semiconductor material and having a width of A, (e) a fourth layer 42 made of a p-doped second semiconductor material and having a width of A, (f) a left segment 16 of the third layer 16 made of an n-doped first semiconductor material and having a width of A, (g) a second layer 14 made of a p-doped first semiconductor material and having a width of F, and (h) a first layer 12 made of a metal or metal alloy and having a width of F. Note: F=A+B+C+D+E

[0040]

[0086] Referring to FIG. 8A, the blocking diode 10 is comprised of a stack of ten layers including (from top to bottom): (a) a third metal contact 84 made of a metal or metal alloy and having a width of I; (b) a ninth layer 82 made of a p-doped second semiconductor material and having a width of I disposed on a portion of the eighth layer 80; (c) an eighth layer 80 made of an n-doped third semiconductor material and having a width of C; (d) a seventh layer 48′ made of a p-doped third semiconductor material and having a width of C; and (e) a p (f) a sixth layer 46' made of a doped third semiconductor material and having a width of C; (f) a fifth layer 44' made of an n-doped second semiconductor material and having a width of C; (g) a fourth layer 42' made of a p-doped second semiconductor material and having a width of C; (h) a third layer 16' made of an n-doped first semiconductor material and having a width of C+D+E; (i) a second layer 14 made of a p-doped first semiconductor material and having a width of F; and (j) a first layer 12 made of a metal or metal alloy and having a width of F.

[0041]

[0087] Referring to FIG. 8A, the second vertical trench 90 is disposed between the fourth layer 42 and the second metal contact 20 and extends to the upper part of the right segment 16'. The blocking diode 10 has a width of C and is disposed between the first vertical trench 22 and the second vertical trench 90. The third metal contact 84 with a width of I is disposed over the entire upper side of the ninth layer 82 and is made of metal or metal alloy. The fourth metal contact 86 has a width of K (K < C) and is disposed on the right side of the eighth layer 80 and is made of metal or metal alloy. The third vertical trench 88 has a width of J (J < ) and is disposed between the ninth layer 82 and the fourth metal contact 86. The conductive metal shunt 92 can be a wire or a ribbon and electrically interconnects the second metal contact 20 and the fourth metal contact 86. The PV solar cell 8 and the blocking diode 10 share a common second layer 14 with the first layer 12. In this example, the PV solar cell 8 is a triple-junction cell having the first PN junction 24, the third PN junction 56, and the fourth PN junction 62.

[0042]

[0088] FIG. 8B shows a schematic elevation cross-sectional view of an example of a triple-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a specific material selection according to the present disclosure. This example is the same as FIG. 8A except for the following differences. The first layer 12 includes metal or metal alloy. The second layer 14 includes p-Ge. The third layers 16 and 16' include n-Ge. The second layer 42 includes p-GaAs. The fifth layer 44 includes n-GaAs. The sixth layer 46 includes p-InGaP. The seventh layer 48 includes n-InGaP. The eighth layer 80 includes n-GaAs. The ninth layer 82 includes p-GaAs. The third metal contact 84 includes metal or metal alloy. The first semiconductor material includes germanium, the second semiconductor material includes Ga, and the third semiconductor material includes InGaP. The turn-on voltage of this blocking diode 10 is about 1V.

[0043]

[0089] 8C is a schematic elevation cross-sectional view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 8B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the third metal contact 84, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the third metal contact 84 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0044]

[0090] 9A shows a schematic cross-sectional elevation view of an example of a triple-junction integrated PV assembly 6 including a triple-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as that shown in FIG. 12A, with the following differences: A portion of the right end side of the right segment 16′ of the third layer 16 has been removed (e.g., by etching), and a second metal contact 20 is disposed directly on top of the second layer 14.

[0045]

[0091] FIG. 9B shows a schematic cross-sectional elevation view of a three-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using specific material selection according to the present disclosure. This example is the same as FIG. 9A with the following differences: The first layer 12 includes a metal or metal alloy. The second layer 14 includes p-Ge. The third layers 16 and 16′ include n-Ge. The second layer 42 includes p-GaAs. The fifth layer 44 includes n-GaAs. The sixth layer 46 includes p-InGaP. The seventh layer 48 includes n-InGaP. The eighth layer 80 includes n-GaAs. The ninth layer 82 includes p-GaAs. The third metal contact 84 includes a metal or metal alloy. The first semiconductor material includes germanium, the second semiconductor material includes Ga, and the third semiconductor material includes InGaP. PN junction 94 comprises a Schottky diode with a turn-on voltage of approximately 1V.

[0046]

[0092] 9C is a schematic elevation cross-sectional view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 9B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the third metal contact 84, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the third metal contact 84 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0047]

[0093] Figure 9D shows a schematic cross-sectional elevation view of an example of a triple-junction integrated PV assembly 6 including a triple-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as that shown in Figure 9C, with the following differences: the metal shunt 92 of Figure 13C is replaced with an integrated monolithic metal shunt 96, which electrically interconnects the top surface of the eighth layer 80 to the top surface of the second layer 14. The configurations shown in Figures 13B and 13D are electrically identical.

[0048]

[0094] FIG. 10A shows a schematic elevation cross-sectional view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as FIG. 7A with the following differences: The first vertical trench 22 extends to the top surface of the second layer 14. The right segment layers 46′ and 48′ (i.e., stack 29) of the blocking diode 10 have been removed (e.g., by etching). The second metal contact 20 is disposed on top of the fifth layer 44′. The integrated monolithic blocking diode 10 includes six stacked layers consisting of (from top to bottom): (a) the second metal contact 20, (b) the fifth layer 44′ disposed thereunder, (c) the fourth layer 42′ disposed thereunder, (d) the third layer (i.e., right segment) 16′ disposed thereunder, (e) the second layer 14 disposed thereunder, and (f) the first layer 12 disposed thereunder. The blocking diode 10 includes two stacked PN junctions 27 and 68, respectively.

[0049]

[0095] FIG. 10B shows a schematic cross-sectional elevation view of an example of a three-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a particular material selection according to the present disclosure. This example is the same as FIG. 10A , with the following differences: first layer 12 includes a metal or metal alloy; second layer 14 includes p-Ge; third layers 16 and 16′ include n-Ge; second layers 42 and 42′ include p-GaAs; fifth layers 44 and 44′ include n-GaAs; sixth layer 46 includes p-InGaP; and seventh layer 48 includes n-InGaP. Right-side segments 46′ and 48′ of the InGaP top cell layer of blocking diode 10 have been removed (e.g., by etching).

[0050]

[0096] 10C is a schematic cross-sectional elevation view of an example triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using certain material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 10B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to first metal contact 18 and second metal contact 20 and at the other end to load 4. First metal contact 18 has a voltage = V-, and second metal contact 20 has a voltage = V+. The turn-on voltage of this triple-junction blocking diode 10 is approximately 1 V.

[0051]

[0097] FIG. 11A shows a schematic elevation cross-sectional view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as FIG. 10A with the following differences: The first vertical trench 22 extends to the top surface of the second layer 14. Layers 44′, 46′, and 48′ (i.e., stack 31) of the right segment of the blocking diode 10 have been removed (e.g., by etching). The second metal contact 20 is disposed on the right segment 16′ of the third layer 16. The integrated monolithic blocking diode 10 includes four stacked layers consisting of (from top to bottom): (a) the second metal contact 20, (b) the right segment 16′ of the third layer 16 disposed thereunder, (c) the second layer 14 disposed thereunder, and (f) the first layer 12 disposed thereunder. The blocking diode 10 includes a PN junction 27.

[0052]

[0098] FIG. 11B shows a schematic elevation cross-section of a three-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a particular material selection according to the present disclosure. This example is the same as FIG. 11A, with the following differences: First layer 12 includes a metal or metal alloy; Second layer 14 includes p-Ge; Third layers 16 and 16′ include n-Ge; Second layer 42 includes p-GaAs; Fifth layer 44 includes n-GaAs; Sixth layer 46 includes p-InGaP; and Seventh layer 48 includes n-InGaP. The right segment of blocking diode 10, GaAs solar cell layers 44′ and 42′ and InGaP layers 46′ and 48′, have been removed (e.g., by etching). The turn-on voltage of blocking diode 10 is approximately 0.2 V.

[0053]

[0099] 11C is a schematic elevation cross-sectional view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as FIG. 11B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0054] [000100] FIG. 12A shows a schematic elevation cross-sectional view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as FIG. 15A, except for the following differences: The first vertical trench 22 extends to the top surface of the second layer 14. Layers 42', 44', 46', and 48' (i.e., stack 33) of the right segment of the blocking diode 10 have been removed (e.g., by etching). A second metal contact 20 is disposed on the p-doped second layer 14, thereby forming a Schottky-type diode 68. The integrated monolithic blocking diode 10 includes three stacked layers consisting of (from top to bottom): (a) the second metal contact 20, (b) the underlying second layer 14, and (c) the underlying first layer 12. The blocking diode 10 includes a Schottky-type diode 68.

[0055] [000101] Figure 12B shows a schematic cross-sectional elevation view of an example of a three-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a particular material selection according to the present disclosure. This example is the same as Figure 12A, except for the following differences: The first layer 12 includes a metal or metal alloy. The second layer 14 includes p-Ge. The second layer 42 includes p-GaAs. The fifth layer 44 includes n-GaAs. The sixth layer 46 includes p-InGaP. The seventh layer 48 includes n-InGaP. The turn-on voltage of this Schottky blocking diode 10 is approximately 0.2 V.

[0056] [000102] Figure 12C is a schematic cross-sectional elevation view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as Figure 12B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0057] [000103] Figure 13A shows a schematic cross-sectional elevation view of an example of a three-junction integrated PV assembly 6 including a three-junction PV solar cell 8 with an integrated monolithic blocking diode 10 according to the present disclosure. This example is the same as Figure 10A, except for the following differences: The first vertical trench 22 extends to the top surface of the second layer 14. The right segment layers 46' and 48' (i.e., stack 35) of the blocking diode 10 have been removed (e.g., by etching). A second metal contact 20 is disposed on the fourth layer 42, thereby forming a Schottky-type diode 70. The integrated monolithic blocking diode 10 includes five stacked layers consisting of (from top to bottom): (a) second metal contact 20, (b) fourth layer 42 disposed thereunder, (c) right segment 16' of third layer 16 disposed thereunder, (d) second layer 14 disposed thereunder, and (e) first layer 12 disposed thereunder. Blocking diode 10 includes two stacked PN junctions, 27 and 70, respectively. The upper PN junction 70 is a Schottky-type diode junction.

[0058] [000104] Figure 13B shows a schematic cross-sectional elevation view of a three-junction integrated PV assembly 6 including a photovoltaic solar cell 8 with an integrated monolithic blocking diode 10 using a particular material selection according to the present disclosure. This example is the same as Figure 13A, except for the following differences: The first layer 12 includes a metal or metal alloy. The second layer 14 includes p-Ge. The third layers 16 and 16' include n-Ge, and the fourth layers 42 and 42' include p-GaAs. The fifth layer 44 includes n-GaAs. The sixth layer 46 includes p-InGaP. The seventh layer 48 includes n-InGaP. The turn-on voltage of the blocking diode 10 is approximately 2V.

[0059] [000105] Figure 13C is a schematic cross-sectional elevation view of an example of a triple-junction PV assembly 6 including a PV solar cell 8 with an integrated monolithic blocking diode 10 using specific material selections according to the present disclosure, where the PV assembly 6 is electrically connected to a load 4. This example is the same as Figure 13B, except for the following additions: Electrical interconnects (e.g., wires and / or ribbons) 53 and 51 are connected at one end to the first metal contact 18 and the second metal contact 20, and at the other end to the load 4. The first metal contact 18 has a voltage = V-, and the second metal contact 20 has a voltage = V+. The photocurrent I pc moves from top to bottom (or from n to p) across the PV solar cell 8. Next, the photocurrent I pc moves from bottom to top (or p to n) in the blocking diode 10. Finally, the photocurrent I pc flows through load 4.

[0060] 14A shows a schematic cross-sectional view of an example of an electrical circuit 190 including a PV assembly 100 consisting of multiple PV solar cells 102, 104, and 106, etc., connected in series to a load 4, with a single integrated monolithic blocking diode 10 integrated with the PV solar cell 106, in accordance with the present disclosure. In this example, the PV assembly 100 includes three PV solar cells 102, 104, and 106 that are triple-junction cells. The third PV solar cell 106, located on the right side (V+ end), has an additional vertical semiconductor stack that forms the blocking diode 10. A first vertical trench 22 separates the PV solar cells 106 from the blocking diode 10. The blocking diode 10 is constructed from the same layers as the triple-junction PV solar cells 106. Incident light 30 (e.g., sunlight) illuminates the active area 28 of each of the PV solar cells 102, 104, and 106. A photocurrent I pc flows from top to bottom (i.e., from n to p) through each PV solar cell. Then, the photocurrent I pc flows horizontally through the p-doped second layer 14, then through the first layer 12, and then through the electrical connectors 120 and 120′ to the next PV solar cell in sequence. Finally, the photocurrent Ipc flows upward through the blocking diode 10 and reaches the second metal contact 20. The photocurrent I pc moves from bottom to top (i.e., p to n) within the blocking diode 10. The assembly 100 uses the same materials and semiconductor fabrication processes to form the blocking diode 10 as the PV solar cell 106. The PV solar cell 106 and the blocking diode 10 share a first layer 12 and a common second layer 14. The photocurrent I pc flows from the second metal contact 20 through the first connector 122 to the load 4 and finally returns from the load 4 through the second connector 124 to the first metal contact 18 .

[0061] 14B is a schematic cross-sectional view of an example of an electrical circuit 290 including a PV assembly 250 comprised of multiple PV solar cells 260, 270, 280, etc. connected in series to a load 4, with each PV solar cell 260, 270, 280, etc. including a respective integrated monolithic blocking diode 262, 272, 282. In this example, the PV assembly 250 includes three triple-junction PV solar cells 260, 270, 280 connected in series.

[0062] 15 shows a schematic cross-sectional view of an example of an electrical circuit 210 including a PV assembly 200 consisting of multiple PV solar cells 202, 204, 206, etc., connected in series to a load 4 with a single integrated monolithic blocking diode 208, according to the present disclosure. The third PV solar cell 206 on the right side (V+ end) has an additional vertical semiconductor stack 208 forming the blocking diode 208. A first vertical trench 22 separates the PV solar cell 206 from the blocking diode 208. The blocking diode 208 is composed of the same materials as those used for the three-junction PV solar cell 206, but has a different layer structure. Incident light 30 (e.g., sunlight) illuminates the active area 28 of each of the PV solar cells 202, 204, 206. The photocurrent I pcthen flows from top to bottom (i.e., from n to p) through the PV solar cell. Then, the photocurrent I from each PV solar cell pc flows horizontally through the p-doped second layer 14, then through the first layer 12, and then through electrical connectors 120 and 120′ to the next PV solar cell in sequence. Finally, the photocurrent I pc flows upward through the blocking diode 208 to the third metal contact 84.

[0063] [000109] With further reference to FIG. 15, the current I from the solar cell flows into the blocking diode 208. pc typically moves from bottom to top (i.e., from p to n). Then, the photocurrent I pc flows from the third metal contact 84 through the first connector 122 to the load 4, and finally from the load 4 through the second connector 124 back to the first metal contact 18. A metal connection 92 electrically interconnects the second metal contact 20 and the fourth metal contact 86. When the third PV solar cell 206 is shaded, the blocking diode 208 is blocked (because it is reverse biased). In this condition, the photocurrent I pc The current then flows from the second metal contact 20, through the metal shunt 92, to the fourth metal contact 86, then to the third metal contact 84, then to the load 4, and finally back to the first metal contact 18. The PV assembly 200 forms the blocking diode 208 using the same materials and semiconductor manufacturing processes as the PV solar cell 206. The PV solar cell 206 and the blocking diode 208 share the first layer 12 and a common second layer 14.

[0064] [000110] In general, blocking diode 10 should be constructed to eliminate as much photocurrent generation as possible, which can be prevented by completely covering the top surface of blocking diode 10 with an opaque metal to prevent sunlight 30 from irradiating blocking diode 10.

[0065] [000111] In some examples, the PV solar cell 8 is constructed in the same layer as the blocking diode 10.

[0066] [000112] In some examples, the PV solar cell 8 is composed of different layers than the blocking diode 10.

[0067] [000113] In some examples, the PV solar cell 8 is made up of fewer layers than the blocking diode 10.

[0068] [000114] In some examples, the PV solar cell 8 is made up of more layers than the blocking diode 10.

[0069] 16A shows a schematic cross-sectional elevation view of an example of a first step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. The first fabrication step includes providing a p-doped first semiconductor substrate layer 14, which may include p-doped germanium.

[0070] [000116] Figure 16B shows a schematic cross-sectional elevation view of an example of a second step in fabricating a multijunction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. The second fabrication step involves epitaxially depositing multiple multijunction solar cell layers 15 and simultaneously diffusing an n-dopant into a p-doped first semiconductor substrate layer 14 to form a p-doped second semiconductor layer 16 on top of the p-doped first semiconductor substrate layer 14. The PV solar cell stack 15 may be composed of a single solar cell 8 or multiple solar cells 8 stacked vertically. In some examples, the second layer 14 may include p-doped germanium. Note that in some examples, the thickness of the multijunction solar cell layer 15 may be approximately 1% of the thickness of the p-doped first semiconductor substrate layer 14. Figure 16C shows a schematic cross-sectional elevation view of an example of a third step in fabricating a multijunction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. The third fabrication step involves cutting shallow trenches 22 with a dicing saw through the multi-junction solar cell layer 15 and into a portion of the n-doped second semiconductor layer 16 to separate the blocking diode mesas 41. Alternatively, photopatterning and etching can be used to define the blocking diode mesas 41.

[0071] 16D shows a schematic cross-sectional elevation view of an example of a fourth step in fabricating a multi-junction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. The fourth fabrication step involves photopatterning and etching away one or more PN diode junctions from blocking diode mesa 41 to form integrated monolithic blocking diode 43. In this step, the entire PN diode (and associated tunnel junction) can be removed.

[0072] 16E shows a schematic cross-sectional elevation view of an example of a fifth step in fabricating a multijunction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. The fifth fabrication step includes forming a pair of metal contacts, e.g., first metal contact 18 and second metal contact 20, by photopatterning and lifting off first metal contact 18 and second metal contact 20 that have been deposited on top of multijunction solar cell 15 and blocking diode 43, respectively.

[0073] 16F shows a schematic cross-sectional elevation view of an example sixth step in fabricating a multijunction photovoltaic solar cell with an integrated monolithic blocking diode according to the present disclosure. The sixth and final fabrication step optionally includes depositing a metal layer 12 on the backside of the p-doped first semiconductor substrate layer 14.

[0074] [000120] A process flowchart illustrating one example of processing steps for fabricating a PV solar cell 8 with an integrated monolithic blocking diode 10 using a semiconductor process according to the present disclosure is shown. Step 300 includes providing a p-doped first semiconductor substrate layer 14, which may include p-doped germanium. Next, step 302 includes epitaxially depositing a plurality of multijunction solar cell layers 15 and simultaneously forming a p-doped second semiconductor layer 16 on top of the p-doped first semiconductor substrate layer 14 by diffusing an n-dopant into the p-doped first semiconductor substrate layer 14. Next, step 304 includes shallowly cutting trenches 22 with a dicing saw through the multijunction solar cell layers 15 and into a portion of the n-doped second semiconductor layer 16 to separate blocking diode mesas 19. Next, step 306 involves photopatterning and etching away one or more PN junctions from the blocking diode mesa 19 to form the blocking diode 17. This step requires removing the entire PN diode (including its associated tunnel junction). Next, step 308 involves depositing (e.g., by photopatterning and lift-off) a pair of metal contacts, such as first metal contact 18 and second metal contact 20, on top of the multi-junction solar cell 15 and the blocking diode 17, respectively. Finally, step 310 optionally involves depositing a metal layer 12 on the backside of the p-doped first semiconductor substrate layer 14.

[0075] 18 shows a schematic perspective view of an example extraterrestrial satellite 400 with a pair of PV solar panels 410, 410′ mounted on the satellite 400, each PV solar panel 410, 410′ including a triple-junction PV solar cell 420 with an integrated monolithic blocking diode (too small to be seen) in accordance with the present disclosure. The PV solar cells 420 are fabricated using the same configuration and semiconductor processes as disclosed herein.

[0076] [000122] Further, the present disclosure includes examples according to the following clauses. Clause 1. A multi-junction photovoltaic (PV) solar cell comprising an integrated monolithic blocking diode, comprising: a first layer of width D containing a conductive metal; a second layer of width D disposed above the first layer and containing a p-doped first semiconductor material; a PV solar cell stack of width A disposed above the second layer; a blocking diode stack of width C disposed above the second layer; a first vertical trench of width B extending into the second layer and located between the PV solar cell stack and the integrated monolithic blocking diode stack; a first metal contact of width E disposed on a part of the upper surface of the PV solar cell stack; and a second metal contact of width C disposed across the entire upper surface of the blocking diode stack, wherein the PV solar cell stack has an effective light-receiving width of width F; both the PV solar cell stack and the integrated monolithic blocking diode stack are disposed above the second layer; E < A, E < F, F < A, B < C, B < A, A < D, C < D, A = E + F, and D = A + B + C, the multi-junction photovoltaic (PV) solar cell.

[0077] [000123] Clause 2. The PV solar cell according to Clause 1, wherein the first semiconductor material contains germanium.

[0078] [000124] Clause 3. The PV solar cell according to Clause 1 or Clause 2, wherein the PV solar cell stack has the same number of layers as the integrated monolithic blocking diode stack.

[0079] [000125] Clause 4. The PV solar cell according to any one of Clauses 1 to 3, wherein the PV solar cell stack has fewer layers than the integrated monolithic blocking diode stack.

[0080] [000126] Clause 5. The PV solar cell according to any one of Clauses 1 to 3, wherein the PV solar cell stack has more layers than the integrated monolithic blocking diode stack.

[0081] [000127] Clause 6. The PV solar cell of any one of clauses 1 to 5, wherein a second metal contact is disposed directly on the second layer, thereby forming a Schottky diode.

[0082] [000128] Clause 7. The PV solar cell of any one of clauses 1 to 6, further comprising a third layer having a width A disposed above the second layer, the third layer comprising an n-doped first semiconductor material.

[0083] [000129] Clause 8. The PV solar cell of clause 7, wherein a second metal contact is disposed directly on the third layer, thereby forming a Schottky diode.

[0084] [000130] Clause 9. The PV solar cell of clause 7 or clause 8, further comprising: a fourth layer having a width A disposed over the third layer and comprising a second semiconductor material that is p-doped; and a fifth layer having a width A disposed over the fourth layer and comprising a second semiconductor material that is n-doped.

[0085] [000131] Clause 10. The PV solar cell of clause 9, further comprising: a sixth layer having a width A disposed over the fifth layer and comprising a p-doped third semiconductor material; and a seventh layer having a width A disposed over the sixth layer and comprising an n-doped third semiconductor material, wherein the first semiconductor material comprises germanium, the second semiconductor material comprises GaAs, and the third semiconductor material comprises InGaP.

[0086] [000132] Clause 11. A triple-junction photovoltaic (PV) solar cell with an integrated monolithic blocking diode, comprising: a first layer having a width of F and comprising a conductive metal; a second layer having a width of F disposed above the first layer and comprising a p-doped first semiconductor material; and a triple-junction PV solar cell stack having a width of A, comprising: a third layer having a width of A disposed above the second layer and comprising an n-doped first semiconductor material; a fourth layer having a width of A disposed above the third layer and comprising a p-doped second semiconductor material; and a fourth layer having a width of A disposed above the fourth layer and comprising an n-doped second semiconductor material. a third layer having a width C disposed above the second layer and including a p-doped first semiconductor material; a sixth layer having a width A disposed above the fifth layer and including a p-doped third semiconductor material; and a seventh layer having a width A disposed above the sixth layer and including an n-doped third semiconductor material, the seventh layer having a width A disposed above the sixth layer and including an n-doped third semiconductor material, the seventh layer having a width C disposed above the second layer; and an integrated monolithic blocking diode stack having a width C disposed above the second layer, the third layer having a width C disposed above the second layer and including an n-doped first semiconductor material; an n-doped second semiconductor material; a fifth layer having a width of C disposed above the fourth layer and including an n-doped second semiconductor material; a sixth layer having a width of C disposed above the fifth layer and including a p-doped third semiconductor material; a seventh layer having a width of C disposed above the sixth layer and including an n-doped third semiconductor material; an eighth layer having a width of C disposed above the seventh layer and including an n-doped second semiconductor material; and a ninth layer having a width of I disposed above a portion of the eighth layer and including a p-doped second semiconductor material. a first trench having a width of B disposed between the triple-junction PV solar cell stack and the integrated monolithic blocking diode stack and extending into the second layer; a first metal contact having a width of G disposed over a portion of the top surface of the seventh layer; a second metal contact having a width of E disposed over the third layer; a third metal contact having a width of I disposed across the top side of the ninth layer; a fourth metal contact having a width of K disposed over a portion of the eighth layer; and a second trench having a width of J disposed between the ninth layer and the fourth metal contact and extending into the eighth layer;A third trench having a width D, disposed between the integrated monolithic blocking diode stack and the second metal contact and extending into the third layer; a first conductor electrically connecting the second metal contact to a fourth metal contact, the triple-junction PV solar cell stack including an effective light receiving width having a width H, both the triple-junction PV solar cell stack and the integrated monolithic blocking diode stack being disposed above the second layer, A < F, D < C, B < A, B < C, G < A, I < C, K < C, J < C, G < H, H < A; A = G + H, C = I + J + K, and F = A + B + C + D + E, a triple-junction photovoltaic (PV) solar cell.

[0087] [000133] The PV solar cell according to clause 11, wherein the first semiconductor material includes Ge, the second semiconductor material includes GaAs, and the third semiconductor material includes InGaP.

[0088] [000134] The PV solar cell according to clause 11 or 12, wherein the first conductor includes an integrated monolithic metal shunt.

[0089] [000135] The PV solar cell according to any one of clauses 11 to 13, configured to be attached to a PV solar cell panel of an extraterrestrial artificial satellite.

[0090] [000136] The PV solar cell according to any one of clauses 11 to 14, further including a second electrical connector connecting the first metal contact to the negative side of the load and a third electrical connector connecting the second metal contact to the positive side of the load.

[0091] [000137] Clause 16. A photovoltaic (PV) assembly comprising a string of three identical, isolated PV solar cells, including a first PV solar cell, a second PV solar cell, and a third PV solar cell, all electrically connected in series, each PV solar cell comprising: a first layer comprising a metal; a second layer comprising a p-doped first semiconductor material; a PV solar cell stack disposed above the second layer and having a first number of doped semiconductor layers; a trench extending into the second layer defining an integrated monolithic blocking diode disposed above the second layer and having a second number of doped semiconductor layers; and a first metal layer disposed in a portion of an upper portion of the PV solar cell stack. a contact; and a second metal contact disposed over the entire top of the integrated monolithic blocking diode stack, wherein the PV assembly further comprises: a first conductor connecting the first layer of the first PV solar cell to the first metal contact of a second PV solar cell disposed adjacent to the first PV solar cell; a second conductor connecting the first layer of the second PV solar cell to the first metal contact of a third PV solar cell disposed adjacent to the second PV solar cell; a third conductor connecting the first metal contact of the first PV solar cell to a negative side of a load; and a fourth conductor connecting the second metal contact of the third PV solar cell to a positive side of a load.

[0092] [000138] Clause 17. The PV assembly of clause 16, wherein the second number of doped semiconductor layers is less than the first number of doped semiconductor layers.

[0093] [000139] Clause 18. A photovoltaic (PV) assembly comprising a string of three separated three-junction PV solar cells, including a first PV solar cell, a second PV solar cell, and a third PV solar cell, all electrically connected in series, wherein the first three-junction PV solar cell and the second three-junction PV solar cell are identical, each comprising: a first layer of the first PV solar cell or the second PV solar cell comprising a metal; a second layer of the first PV solar cell or the second PV solar cell comprising a p-doped first semiconductor material; a three-junction PV solar cell stack of the first PV solar cell or the second PV solar cell comprising a first number of doped semiconductor layers and disposed on top of the second layer; and a first metal contact of the first PV solar cell or the second PV solar cell disposed in a portion of an upper portion of the three-junction PV solar cell stack, wherein the third PV solar cell is a three-junction PV solar cell. The PV solar cell stack of the third PV solar cell includes a solar cell stack and an integrated monolithic blocking diode, the PV solar cell stack of the third PV solar cell including: a first layer of the third PV solar cell including a metal; a second layer of the third PV solar cell including a p-doped first semiconductor material and disposed on top of the first layer of the third PV solar cell; a third layer of the third PV solar cell including an n-doped first semiconductor material and disposed on top of the second layer of the third PV solar cell; a fourth layer of the third PV solar cell including a p-doped second semiconductor material and disposed on top of the third layer of the third PV solar cell; a fifth layer of the third PV solar cell including an n-doped second semiconductor material and disposed on top of the fourth layer of the third PV solar cell; and a sixth layer of the third PV solar cell including a p-doped third semiconductor material and disposed on top of the fifth layer of the third PV solar cell;and a seventh layer of the third PV solar cell comprising an n-doped third semiconductor material and disposed above the sixth layer of the third PV solar cell, the PV solar cell stack of the third PV solar cell being disposed above the second layer of the third PV solar cell, the third PV solar cell further comprising an integrated monolithic blocking diode disposed above the second layer of the third PV solar cell, the integrated monolithic blocking diode of the third PV solar cell being: above the second layer of the third PV solar cell. a third layer of third PV solar cells disposed above the third layer of third PV solar cells; a fourth layer of third PV solar cells disposed above the third layer of third PV solar cells; a fifth layer of third PV solar cells disposed above the fourth layer of third PV solar cells; a sixth layer of third PV solar cells disposed above the fifth layer of third PV solar cells; a seventh layer of third PV solar cells disposed above the sixth layer of third PV solar cells; and a seventh layer of third PV solar cells disposed above the seventh layer of third PV solar cells, comprising an n-doped second semiconductor material. an eighth layer of the third PV solar cell disposed over a portion of the eighth layer of the third PV solar cell; a ninth layer of the third PV solar cell including a p-doped second semiconductor material and disposed over a portion of the eighth layer of the third PV solar cell; a first trench of the third PV solar cell extending into the second layer of the third PV solar cell and disposed between the PV solar cell stack and the blocking diode of the third PV solar cell; a first metal contact of the third PV solar cell disposed over a portion of the top surface of the seventh layer of the third PV solar cell; a second metal contact of the third PV solar cell disposed on an upper side of the second layer of the V solar cell; a third metal contact of the third PV solar cell disposed over an entire upper side of the ninth layer of the third PV solar cell; a fourth metal contact of the third PV solar cell disposed on an upper side of a portion of the eighth layer of the third PV solar cell; and a second trench of the third PV solar cell extending into the eighth layer of the third PV solar cell and disposed between the ninth layer of the third PV solar cell and the fourth metal contact of the third PV solar cell;a third trench of the third PV solar cell extending into a third layer of the third PV solar cell and disposed between the integrated monolithic blocking diode stack and the second metal contact of the third PV solar cell, the PV assembly further comprising: a first electrical conductor connecting the second metal contact of the third PV solar cell to a fourth metal contact of the third PV solar cell; a second electrical conductor connecting the first layer of the first PV solar cell to the first metal contact of the second PV solar cell; a third electrical conductor connecting the first layer of the second PV solar cell to the first metal contact of the third PV solar cell; a fourth electrical conductor connecting the first metal contact of the first PV solar cell to a negative side of a load; and a fifth electrical conductor connecting the third metal contact of the third solar cell to a positive side of a load, wherein the first PV solar cell is disposed adjacent to the second PV solar cell and the second PV solar cell is disposed adjacent to the third PV solar cell;

[0094] Clause 19. The PV assembly of clause 18, wherein the second metal contact of the third PV solar cell is disposed on a top side of the third layer of the third PV solar cell.

[0095] [000140] Clause 20. The PV assembly of clause 18 or 19, wherein the first semiconductor material comprises Ge, the first semiconductor material comprises GaAs, and the first semiconductor material comprises InGaP.

[0096] Clause 21. A method for manufacturing a photovoltaic (PV) solar cell with an integrated monolithic blocking diode, comprising: (a) providing a p-doped first semiconductor substrate layer; (b) epitaxially depositing a plurality of multijunction solar cell layers and simultaneously forming a p-doped second semiconductor layer on top of the p-doped first semiconductor substrate layer by diffusing an n-dopant into the p-doped first semiconductor substrate layer; (c) shallowly cutting trenches with a dicing saw through the multijunction solar cell layer and into a portion of the n-doped second semiconductor layer, thereby isolating the blocking diode mesas; (d) photopatterning and etching away one or more PN junctions from the blocking diode mesa to form a blocking diode; (e) depositing a first metal contact on top of the multijunction solar cell; and (f) depositing a second metal contact on top of the blocking diode; A method comprising:

[0097] [000141] Clause 22. The method of clause 21, further comprising depositing a metal layer on a backside of the p-doped first semiconductor substrate layer.

[0098] [000142] This disclosure refers to various embodiments. However, it should be understood that the disclosure is not limited to the particular embodiments described. Rather, any combination of features and elements, whether related to different embodiments, is contemplated for implementing and practicing the teachings provided herein. Furthermore, when elements of an embodiment are described in the form of "at least one of A and B," it will be understood that an embodiment including only element A, an embodiment including only element B, and an embodiment including elements A and B are each contemplated. Furthermore, while some embodiments may provide advantages over other possible solutions and / or the prior art, whether or not a particular advantage is obtained by a given embodiment is not a limitation of the present disclosure. Accordingly, the embodiments, features, and advantages disclosed herein are merely exemplary and are not considered elements or limitations of the appended claims unless expressly recited in the claims. Similarly, references to "the present invention" should not be construed as generalizations of the inventive subject matter disclosed herein, and are not considered elements or limitations of the appended claims unless expressly recited in the claims.

[0099] [000143] Unless otherwise indicated, terms such as "first," "second," etc. are used herein merely as labels and are not intended to impose any ordinal, positional, or hierarchical requirements on the items to which they refer. Furthermore, a reference to, for example, a "second" item does not require or exclude the presence of, for example, a "first" or lower-numbered item or a "third" or higher-numbered item.

[0100] [000144] Spatial terms (e.g., "beneath," "below," "lower," "above," "upper," etc.) may be used herein to facilitate description of the relationship of one component and / or feature to another component and / or feature or other component(s) and / or feature(s) shown in the figures. These spatial terms encompass various orientations of the device in use or operation in addition to the orientation(s) shown in the figures.

[0101] [000145] As used herein, the terms "comprising" and "comprise(s)" are intended to be interchangeable in all instances with the terms "consisting essentially of," "consist(s) essentially of," "consisting of," and "consist(s) of," respectively. To the extent the terms "includes," "including," "has," "contains," and variations thereof are used herein, such terms are intended to be inclusive in the same manner as the open transitional term "comprises," without excluding additional or other elements.

Claims

1. A photovoltaic (PV) solar cell (8) with an integrated monolithic blocking diode (10), comprising: a first layer (12) comprising a conductive metal and having a width D; a second layer (14) of width D disposed above the first layer (12) and comprising a p-doped first semiconductor material; a PV solar cell stack (15) having a width A and disposed on top of the second layer (12); a blocking diode stack (17) having a width C disposed above the second layer (12); a first vertical trench (22) having a width B extending into the second layer (12) and positioned between the PV solar cell stack (15) and the monolithic blocking diode stack (17) integrated therewith; a first metal contact (18) having a width E and disposed on a portion of the top surface of the PV solar cell stack (15); a second metal contact (20) having a width C disposed across the top surface of said blocking diode stack (17); Equipped with the PV solar cell stack (15) has an effective light-receiving width (28) having a width F; both the PV solar cell stack (15) and the integrated monolithic blocking diode stack (17) are disposed on top of the second layer; E<A, E<F, F<A, B<C, B<A, A<D, C<D, A=E+F, and D=A+B+C. Photovoltaic (PV) solar cell (8).

2. The PV solar cell (8) of claim 1, wherein the first semiconductor material comprises germanium.

3. 2. The PV solar cell (8) of claim 1, wherein the PV solar cell stack (15) comprises the same number of layers as the integrated monolithic blocking diode stack (17).

4. The PV solar cell (8) of claim 1, wherein the PV solar cell stack (15) comprises fewer layers than the integrated monolithic blocking diode stack (17).

5. The PV solar cell (8) of claim 1, wherein the PV solar cell stack (15) comprises more layers than the integrated monolithic blocking diode stack (17).

6. The PV solar cell (8) of claim 1, wherein the second metal contact (20) is disposed directly on the second layer (12), thereby forming a Schottky diode (26).

7. 2. The PV solar cell (8) of claim 1, further comprising a third layer (16) having a width A and disposed above the second layer (14), the third layer (16) comprising an n-doped first semiconductor material.

8. The PV solar cell (8) of claim 7, wherein the second metal contact (20) is disposed directly on top of the third layer (16), thereby forming a Schottky diode (26).

9. 8. A PV solar cell (8) according to claim 7, a fourth layer (42) of width A disposed above the third layer (16) and comprising a p-doped second semiconductor material; a fifth layer (44) of width A disposed above the fourth layer (42) and comprising an n-doped second semiconductor material; The PV solar cell (8) further comprises:

10. 10. A PV solar cell (8) according to claim 9, a sixth layer (46) having a width A and comprising a p-doped third semiconductor material disposed above the fifth layer (44); a seventh layer (48) of width A disposed above the sixth layer (46) and comprising an n-doped third semiconductor material; the first semiconductor material comprises germanium, the second semiconductor material comprises GaAs, and the third semiconductor material comprises InGaP; PV solar cell (8).

11. A triple-junction photovoltaic (PV) solar cell (8) with an integrated monolithic blocking diode (10), comprising: a first layer (12) of width F comprising a conductive metal; a second layer (14) of width F disposed above the first layer (12) and comprising a p-doped first semiconductor material; A triple-junction PV solar cell stack (17) having a width A, a third layer (16) of width A disposed above the second layer (14) and comprising an n-doped first semiconductor material; a fourth layer (42) of width A disposed above the third layer (16) and comprising a p-doped second semiconductor material; a fifth layer (44) having a width A and comprising an n-doped second semiconductor material disposed above the fourth layer (42); a sixth layer (46) having a width A and comprising a p-doped third semiconductor material disposed above the fifth layer (44); a seventh layer (48) of width A disposed above the sixth layer (46) and comprising an n-doped third semiconductor material; a triple-junction PV solar cell stack (17) comprising: a triple-junction PV solar cell stack (15) disposed on top of the second layer; moreover, an integrated monolithic blocking diode stack (17) having a width C disposed on top of the second layer (14), a third layer (16) of width C disposed above the second layer (14) and comprising an n-doped first semiconductor material; a fourth layer (42) of width C disposed above the third layer (16) and comprising a p-doped second semiconductor material; a fifth layer (44) of width C disposed above the fourth layer (42) and comprising an n-doped second semiconductor material; a sixth layer (46) of width C disposed above the fifth layer (44) and comprising a p-doped third semiconductor material; a seventh layer (46) disposed above the sixth layer (46) and having a width C and including an n-doped third semiconductor material; an eighth layer (80) of width C disposed above the seventh layer (48) and comprising an n-doped second semiconductor material; a ninth layer (82) having a width of I and comprising a p-doped second semiconductor material disposed over a portion of the eighth layer (80); an integrated monolithic blocking diode stack (17) comprising: a first trench (22) having a width B and extending into the second layer (14) and disposed between the triple-junction PV solar cell stack (15) and the integrated monolithic blocking diode stack (17); a first metal contact (18) having a width G disposed over a portion of the top surface of said seventh layer (48); a second metal contact (20) having a width E disposed on the upper side of said third layer (16); a third metal contact (84) having a width I disposed across the top side of said ninth layer (82); a fourth metal contact (86) having a width K disposed over a portion of said eighth layer (80); a second trench (88) having a width J disposed between the ninth layer (82) and the fourth metal contact (86) and extending into the eighth layer (80); a third trench (90) having a width D disposed between the integrated monolithic blocking diode stack (17) and the second metal contact (20) and extending into the third layer (16); a first conductor (92) electrically connecting said second metal contact (20) to said fourth metal contact (86); Equipped with the triple-junction PV solar cell stack (17) includes an effective light-receiving width (28) having a width H; the triple-junction PV solar cell stack (15) and the integrated monolithic blocking diode stack (17) are both disposed on top of the second layer (14); A<F, D<C, B<A, B<C, G<A, I<C, K<C, J<C, G<H, H<A; A = G + H, C = I + J + K, and F = A + B + C + D + E, Three-junction photovoltaic (PV) solar cell (8).

12. 12. The PV solar cell (8) of claim 11, wherein the first semiconductor material comprises Ge, the second semiconductor material comprises GaAs, and the third semiconductor material comprises InGaP.

13. The PV solar cell (8) of claim 11, wherein the first conductor (92) comprises an integrated monolithic metal shunt (96).

14. The PV solar cell (8) of claim 11 configured to be mounted on a PV solar panel (410) of an extraterrestrial satellite (400).

15. 12. A PV solar cell (8) according to claim 11, a second electrical connector (53) connecting the first metal contact (18) to the negative side of a load (4); a third electrical connector (51) connecting the second metal contact (20) to the positive side of the load (4); The PV solar cell (8) further comprises:

16. A photovoltaic (PV) assembly (200) comprising: A string (200) of three tri-junction PV solar cells (202, 204, and 206) including a first tri-junction PV solar cell (202), a second tri-junction PV solar cell (204), and a third tri-junction PV solar cell (206), all electrically connected in series, wherein the first tri-junction PV solar cell and the second tri-junction PV solar cell (202 and 204) are identical and each comprise: a first layer (12) of the first or second PV solar cell (202 or 204) comprising a metal; a second layer (14) of the first or second PV solar cell (202 or 204) comprising a p-doped first semiconductor material; a triple-junction PV solar cell stack (15) of the first PV solar cell or the second PV solar cell (202 or 204) including a first number of doped semiconductor layers and disposed on top of the second layer (12 or 12'); a first metal contact (18 or 18′) of the first PV solar cell or the second PV solar cell (202 or 204) disposed in a portion of the upper portion of the three-junction PV solar cell stack (17 or 17′); a string (200) comprising: the third PV solar cell (206) comprises a triple-junction PV solar cell stack (15") and an integrated monolithic blocking diode stack (17"); The triple-junction PV solar cell stack (15'') a first layer (12") comprising a metal; a second layer (14") comprising a p-doped first semiconductor material and disposed above the first layer (12") of the third PV solar cell (206); a third layer (16") comprising an n-doped first semiconductor material and disposed above said second layer (14"); a fourth layer (42") comprising a p-doped second semiconductor material and disposed above said third layer (16"); a fifth layer (44") comprising an n-doped second semiconductor material and disposed above the fourth layer (42"); a sixth layer (46") comprising a p-doped third semiconductor material and disposed above the fifth layer (44") of the third PV solar cell (206); a seventh layer (48") of the third PV solar cell (206) comprising an n-doped third semiconductor material and disposed above the sixth layer (46"); Including, the PV solar cell stack (15") is disposed on top of the second layer (14"); the third PV solar cell (206) further comprises an integrated monolithic blocking diode stack (17") disposed on top of the second layer (14") of the third PV solar cell (206); said integrated monolithic blocking diode stack (17″) a third layer (16") of the third PV solar cells (206) disposed above the second layer (14") of the third PV solar cells (206); a fourth layer (42") of the third PV solar cells (206) disposed above the third layer (16") of the third PV solar cells (206); a fifth layer (44") of the third PV solar cells (206) disposed above the fourth layer (42") of the third PV solar cells (206); a sixth layer (46") of the third PV solar cells (206) disposed above the fifth layer (44") of the third PV solar cells (206); a seventh layer (48") of the third PV solar cells (206) disposed above the sixth layer (46") of the third PV solar cells (206); an eighth layer (80") of the third PV solar cell (206) comprising an n-doped second semiconductor material and disposed above the seventh layer (48") of the third PV solar cell (206); a ninth layer (82") of the third PV solar cell (206) including a p-doped second semiconductor material and disposed over a portion of the eighth layer (80") of the third PV solar cell (206); a first trench (22") of the third PV solar cell (206), extending into the second layer (14") of the third PV solar cell (206) and disposed between the PV solar cell stack (15") and the blocking diode (10") of the third PV solar cell (206); a first metal contact (18") of the third PV solar cell (206) disposed over a portion of an upper surface of the seventh layer (48") of the third PV solar cell (206); a second metal contact (20") of the third PV solar cell (206) disposed on the top side of the second layer (14") of the third PV solar cell (206); a third metal contact (84") of the third PV solar cell (206) disposed over an entire top side of the ninth layer (82") of the third PV solar cell (206); a fourth metal contact (86) of the third PV solar cell (206) disposed over a portion of the eighth layer (80") of the third PV solar cell (206); a second trench (88") of the third PV solar cell (206), extending into the eighth layer (80") of the third PV solar cell (206) and disposed between the ninth layer (82") of the third PV solar cell (206) and the fourth metal contact (86) of the third PV solar cell (206); a third trench (90") of the third PV solar cell (206) extending into the third layer (16") of the third PV solar cell (206) and disposed between the integrated monolithic blocking diode stack (17") and the second metal contact (20") of the third PV solar cell (206); Including, The PV assembly (200) further comprises: a first electrical conductor (92) connecting the second metal contact (20") of the third PV solar cell (206) to the fourth metal contact (86) of the third PV solar cell (206); a second electrical conductor (120) connecting the first layer (12) of the first PV solar cell (202) to the first metal contact (18') of the second PV solar cell (204); a third electrical conductor (120') connecting the first layer (12') of the second PV solar cell (204) to the first metal contact (18") of the third PV solar cell (206); a fourth electrical conductor (124) connecting the first metal contact (18) of the first PV solar cell (202) to the negative side of a load (4); a fifth conductor (122) connecting the third metal contact (84) of the third solar cell (206) to the positive side of the load (4); the first PV solar cell (202) is disposed adjacent to the second PV solar cell (204); A photovoltaic (PV) assembly (200), wherein the second PV solar cell (204) is disposed adjacent to the third PV solar cell (206).

17. 17. The PV assembly (200) of claim 16, wherein the second metal contact (20") of the third PV solar cell (206) is disposed on the top side of the third layer (16") of the third PV solar cell (206).

18. The PV assembly (200) of claim 16, wherein the first semiconductor material comprises Ge.

19. 20. The PV assembly (200) of claim 18, wherein the second semiconductor material comprises GaAs.

20. 20. The PV assembly (200) of claim 19, wherein the third semiconductor material comprises InGaP.