System, method, and computer program for true random number generation

Abstract

To provide a system, a method, and a device.SOLUTION: A system, a method, and a device for automatically generating random numbers are provided. According to an embodiment, the system may include a memory storage storing computer-executable instructions, and at least one processor communicatively connected to the memory storage. The at least one processor may be configured to execute the instructions to perform a startup process for a vehicle, determine a plurality of time stamps when electrical signals flow from a power source to a plurality of segments in each of a plurality of cores of the system during the startup process, and generate a random number on the basis of the determined plurality of time stamps.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] Systems, methods, and computer programs consistent with exemplary embodiments of the present disclosure relate to true random number generation, and more particularly, to generating true random numbers for vehicle functions. [Background technology]

[0002] Modern vehicles are capable of a wide range of complex functions, such as generating telemetry data, sending and receiving data over the Internet, and the like, and in order for the vehicles to perform these functions, they are essentially connected to upstream servers.

[0003] Among these functions are data encryption, authentication, and digital signatures, which are important aspects to the security of the modern vehicle. Typically, cryptographic operations are performed for these functions involving the generation of random numbers. For example, random numbers may be used by the vehicle to generate dynamic (temporary) keys at start-up, for cryptographic exchanges when connecting to endpoints outside the vehicle, and the like.

[0004] Here, random numbers refer to truly random numbers, which may be understood to be random numbers that are not generated by a computer algorithm, but rather are generated by an algorithm that uses entropy (i.e., external, unpredictable physical variables, such as radioactive decay of isotopes, radio atmospherics, and the like).

[0005] For example, one or more truly random values ​​(e.g., radioactive decay of isotopes, radio atmospherics, and the like) may be collected and some of the numbers may be used to generate truly random numbers. In one example, three truly random values ​​may be obtained as 01192935, 83783200, and 28473041, and the last three numbers from the values ​​may be used to generate a truly random number as 935200041.

[0006] In related art, the entropy used to generate random numbers for vehicle functions can be user interactions, such as pressure on the steering wheel, the speed of the vehicle in a particular geolocation, how the user turns the vehicle on a particular road, and the like. However, to generate random numbers based on user interactions, the user interactions may need to be observed and recorded, which can pose problems with privacy laws around the world related to data collection. To avoid such problems, solutions have been proposed to avoid collecting data about the user during vehicle startup and until the first 15 minutes of vehicle operation.

[0007] Nevertheless, the above solutions in the related art may have at least the following drawbacks: since no data is collected during the start-up of the vehicle, true random variables may not be collected and used as entropy for generating random numbers, and therefore it is difficult to ensure that a sufficient amount of entropy is collected to generate suitable random numbers for security functions.

[0008] Therefore, there is a need for a system that can generate random numbers for vehicle functions without compromising user privacy, while also being able to gather enough entropy to generate random numbers suitable for security functions. Summary of the Invention

[0009] An example embodiment of the present disclosure automatically determines random numbers based on multiple timestamps during the startup process when electrical signals flow from a power source to multiple segments in each of the system's multiple cores. Thus, the example embodiment of the present disclosure allows random numbers to be generated for vehicle functions without compromising user privacy, while also being able to gather enough entropy to generate random numbers suitable for security functions.

[0010] According to an embodiment, a system is provided that may include a memory storage that stores computer-executable instructions and at least one processor communicatively coupled to the memory storage, where the at least one processor may be configured to execute the instructions to perform a start-up process for a vehicle, to determine, during the start-up process, a plurality of timestamps when electrical signals flow from a power source to a plurality of segments in each of a plurality of cores of the system, and to generate a random number based on the determined plurality of timestamps.

[0011] According to an embodiment, the timestamps may be in nanoseconds or picoseconds.

[0012] According to an embodiment, at least one processor may be configured to execute instructions to generate a random number by determining one or more portions for each of the determined plurality of timestamps and combining the one or more portions for each of the determined plurality of timestamps to form a random number.

[0013] According to an embodiment, the one or more portions for each of the determined plurality of timestamps may include one or more digits for each of the determined plurality of timestamps.

[0014] According to an embodiment, at least one processor may be configured to execute instructions to combine one or more portions for each of the determined plurality of timestamps by aligning one or more portions for each of the determined plurality of timestamps to form a random number or by performing one or more mathematical operations on one or more portions for each of the determined plurality of timestamps to form a random number.

[0015] According to an embodiment, the system may include a system on a chip (SoC).

[0016] According to an embodiment, the timestamps may be determined using internal debug meters.

[0017] According to an embodiment, the timestamps may be different for every start-up process.

[0018] According to an embodiment, a method performed by a system is provided that may include performing a startup process for a vehicle, determining, during the startup process, multiple timestamps when electrical signals flow from a power source to multiple segments in each of multiple cores of the system, and generating a random number based on the determined multiple timestamps.

[0019] According to an embodiment, the timestamps may be in nanoseconds or picoseconds.

[0020] According to an embodiment, generating the random number may include determining one or more portions for each of the determined plurality of timestamps and combining the one or more portions for each of the determined plurality of timestamps to form a random number.

[0021] According to an embodiment, the one or more portions for each of the determined plurality of timestamps may include one or more digits for each of the determined plurality of timestamps.

[0022] According to an embodiment, combining the one or more portions for each of the determined plurality of timestamps may include aligning the one or more portions for each of the determined plurality of timestamps to form a random number, or performing one or more mathematical operations on the one or more portions for each of the determined plurality of timestamps to form a random number.

[0023] According to an embodiment, the system may include a system on a chip (SoC).

[0024] According to an embodiment, the timestamps may be determined using internal debug meters.

[0025] According to an embodiment, the timestamps may be different for every start-up process.

[0026] According to an embodiment, a non-transitory computer-readable recording medium is provided. The non-transitory computer-readable recording medium may have instructions stored thereon that are executable by at least one processor of a system for causing the at least one processor to perform a method. According to an embodiment, a computer program product is also provided for causing the at least one processor to perform a method. The method includes performing a start-up process for a vehicle, determining, during the start-up process, multiple timestamps when electrical signals flow from a power source to multiple segments in each of multiple cores of the system, and generating a random number based on the multiple determined timestamps.

[0027] According to an embodiment, the timestamps may be in nanoseconds or picoseconds.

[0028] According to an embodiment, generating the random number may include determining one or more portions for each of the determined plurality of timestamps and combining the one or more portions for each of the determined plurality of timestamps to form a random number.

[0029] According to an embodiment, the timestamps may be determined using internal debug meters.

[0030] Additional aspects will be set forth in part in the description that follows, and in part will be apparent from the description, or may be learned by practice of presented embodiments of the present disclosure. [Brief explanation of the drawings]

[0031] The features, advantages, and importance of preferred embodiments of the present disclosure will be described below with reference to the accompanying drawings, in which like reference numerals refer to like elements, and in which: [Figure 1]FIG. 1 illustrates a block diagram of exemplary components in a random number generation (RNG) system according to one or more embodiments. [Figure 2A] FIG. 2A illustrates an example architecture of a random number generation (RNG) system according to one or more embodiments. [Figure 2B] FIG. 2B illustrates an exemplary architecture of a core in a random number generation (RNG) system according to one or more embodiments. [Figure 3] FIG. 3 illustrates a flow diagram of an exemplary method for generating random numbers according to one or more embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0032] The following detailed description of the exemplary embodiments refers to the accompanying drawings, in which the same reference numbers in different drawings may identify the same or similar elements.

[0033] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit implementations to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of implementations. Furthermore, one or more features or components of one embodiment may be incorporated into or combined with another embodiment (or one or more features of another embodiment). Furthermore, in the flowcharts and descriptions of operations provided below, it is understood that one or more operations may be omitted, one or more operations may be added, one or more operations may occur (at least partially) concurrently, or the order of one or more operations may be switched.

[0034] It will be apparent that the systems and / or methods described herein may be implemented in various forms of hardware, firmware, or combinations of hardware and software. The actual specialized control hardware or software code used to implement the systems and / or methods is not a limitation of the implementation. Thus, the operation and behavior of the systems and / or methods are described herein without reference to specific software code. It will be understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0035] Although particular combinations of features are recited in the claims and / or disclosed herein, such combinations are not intended to limit the disclosure of possible implementations. Indeed, many of the features may be combined in ways not specifically recited in the claims and / or disclosed herein. Although each dependent claim listed below may depend directly on only one claim, the disclosure of possible implementations includes each dependent claim in combination with all other claims in the claim set.

[0036] No element, act, or instruction used herein should be construed as critical or required unless expressly stated otherwise. Also, as used herein, the articles "a" and "an" are intended to include one or more items and may be used interchangeably with "one or more." Where only one item is intended, the term "a" or similar terms are used. Also, as used herein, the terms "has," "have," "having," "include," "including," or the like are intended to be open-ended terms. Furthermore, the phrase "based on" is intended to mean "based at least in part on," unless expressly stated otherwise. Furthermore, phrases such as "at least one of [A] and [B]," "[A] and / or [B]," or "at least one of [A] or [B]" should be understood to include A only, B only, or both A and B.

[0037] It is envisioned that the features, advantages, and importance of the exemplary embodiments described herein above are merely part of this disclosure and are not intended to be exhaustive or to limit the scope of this disclosure.

[0038] Further description regarding the features, components, configuration, operation, and implementation aspects of the random number generation system of the present disclosure, according to one or more embodiments, is provided below.

[0039] Exemplary System Architecture FIG. 1 illustrates a block diagram of exemplary components in a random number generation (RNG) system 100 according to one or more embodiments.

[0040] The RNG system may include a system, platform, module, or the like that may be configured to perform one or more operations or actions to generate random numbers. According to embodiments, the RNG system 100 may comprise a chip installed in a vehicle. For example, the RNG system 100 may comprise a system-on-chip (SoC) that is installed in the vehicle and communicatively coupled to one or more components of the vehicle, such as an electronic control unit (ECU) and the like.

[0041] As shown in FIG. 1, the RNG system 100 may include at least one communication interface 110, at least one processor 120, at least one input / output unit 130, and at least one storage 140, although it may be understood that the RNG system 100 may include more or fewer components than those shown in FIG. 1 and / or the components may be arranged in a different manner than in FIG. 1 without departing from the scope of the present disclosure.

[0042] The communication interface 110 may include at least one transceiver-like component (e.g., a transceiver, a separate receiver and transmitter, a bus, etc.) that enables the components of the RNG system 100 to communicate with each other and / or with one or more components external to the RNG system 100, such as via a wired connection, a wireless connection, or a combination of wired and wireless connections.

[0043] For example, communication interface 110 may connect processor 120 to storage 140, thereby allowing them to communicate with and interoperate with each other in performing one or more operations. As another example, communication interface 110 may connect RNG system 100 (or one or more components included therein) to allow them to communicate with and interoperate with each other.

[0044] According to one or more embodiments, the communication interface 110 may include one or more application programming interfaces (APIs) that enable the RNG system 100 (or one or more components included therein) to communicate with one or more software applications.

[0045] The input / output section 130 may include at least one component that enables the RNG system 100 to receive information and / or provide output information. In some embodiments, the input / output section 130 may include at least one input component (e.g., a touchscreen display, a button, a switch, a microphone, a sensor, etc.) and at least one output component (e.g., a display, a speaker, one or more light emitting diodes (LEDs), etc.), each of which may be understood to be separate from one another.

[0046] Storage 140 may include one or more storage media suitable for storing data, information, and / or computer-executable instructions therein. According to an embodiment, storage 140 may include at least one memory storage, such as random access memory (RAM), read-only memory (ROM), and / or another type of dynamic or static storage device (e.g., flash memory, magnetic memory, and / or optical memory), that stores information and / or instructions for use by processor 120. Additionally or alternatively, storage 140 may include a hard disk (e.g., a magnetic disk, optical disk, magneto-optical disk, and / or solid-state disk), compact disk (CD), digital versatile disk (DVD), floppy disk, cartridge, magnetic tape, and / or another type of non-transitory computer-readable medium, along with a corresponding drive.

[0047] According to an embodiment, storage 140 may be configured to store information such as raw data, metadata, or the like. Additionally or alternatively, storage 140 may be configured to store one or more pieces of information associated with one or more operations performed by processor 120. For example, storage 140 may store information defining historical operations performed by processor 120 to generate random numbers, one or more results of operations performed by processor 120, or the like. Furthermore, storage 140 may store data or information required in generating random numbers.

[0048] In some implementations, storage 140 may include multiple storage media and may be configured to store duplicates or copies of at least some of the information on the multiple storage media to provide redundancy and to back up the information or associated data. Additionally, storage 140 may also store computer-readable or computer-executable instructions that, when executed by one or more processors (e.g., processor 120), cause the one or more processors to perform one or more acts / operations described herein.

[0049] Processor 120 may include at least one processor that is programmable or configurable to perform the functions or operations described herein. For example, processor 120 may be configured to execute computer-executable instructions stored in at least one storage medium or memory storage (e.g., storage 140, etc.) to thereby perform one or more acts or operations described herein.

[0050] According to an embodiment, processor 120 may be configured to receive one or more signals and / or one or more user inputs (e.g., via communications interface 110, via input / output 130, etc.) that define one or more instructions for performing one or more operations. Furthermore, processor 120 may be implemented in hardware, firmware, or a combination of hardware and software. For example, processor 120 may include at least one of a central processing unit (CPU), a graphics processing unit (GPU), an accelerated processing unit (APU), a microprocessor, a microcontroller, a digital signal processor (DSP), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), and / or another type of processing or computational component.

[0051] According to an embodiment, the processor 120 may be configured to collect, extract, and / or receive one or more pieces of information (e.g., in the form of signals or data), process the received one or more pieces of information, and thereby generate a random number.

[0052] A description of some example operations that may be performed by processor 120 of RNG system 100 to generate random numbers is provided below with reference to FIG.

[0053] 2A illustrates an example architecture of a RNG system 200, according to one or more embodiments. RNG system 200 may correspond to RNG system 100 in FIG. 1, and therefore, features associated with RNG system 200 and RNG system 100 may be equally applicable to one another unless expressly stated otherwise.

[0054] 2A, RNG system 200 may include multiple cores: core 210, core 220, core 230, and core 240. Each of multiple cores 210, 220, 230, and 240 may comprise a processor core, which may include one or more of a microcontroller, a microprocessor, a digital signal processor (DSP), an application-specific instruction set processor (ASIP), and the like.

[0055] 2B illustrates an exemplary architecture of core 210 in RNG system 200, according to one or more embodiments. It may be understood that cores 220, 230, and 240 may have similar architectures unless expressly stated otherwise.

[0056] As shown in FIG. 2B , core 210 may include multiple segments, i.e., segment 212-a, segment 212-b, segment 212-c, and segment 212-d, and a monitoring module 214. The multiple segments may refer to multiple physical sections / portions that form a core. According to an embodiment, each of the multiple segments may include one or more components of a core. For example, the multiple segments may include one or more of a processor core's control unit, arithmetic logic unit, memory, and the like. According to an embodiment, monitoring module 214 may be configured to monitor and track the startup (power-on) process of RNG system 200. For example, monitoring module 214 may include an internal debug meter of the SoC configured to monitor and track the startup process of the SoC during vehicle startup.

[0057] According to an embodiment, the RNG system 200 may include or be communicatively connected to additional components that enable the monitoring module 214 to monitor and track the startup process of the system. For example, the RNG system 200 may include a high-grade camera and / or an electroencephalogram as part of the SoC's internal diagnostics.

[0058] It may be understood that the configurations shown in Figures 2A and 2B are simplified for purposes of explanation and are not intended to limit the scope of the present disclosure in any way. Specifically, the number of cores and the number of segments may, in fact, be any number. Furthermore, it may be understood that RNG system 200 may include more or fewer components than those shown in Figures 2A and 2B and / or the components may be arranged in a manner different from that shown in Figures 2A and 2B without departing from the scope of the present disclosure.

[0059] Exemplary Operations for Generating Random Numbers in the Present Disclosure Below, some example operations that may be performed by the RNG system of the present disclosure are described with reference to FIG.

[0060] 3 illustrates a flow diagram of an exemplary method 300 for generating random numbers, according to one or more embodiments. One or more operations in method 300 may be performed by at least one processor (e.g., processor 120) of the RNG system.

[0061] 3, at operation S310, at least one processor may be configured to perform a startup process for the vehicle. The startup process may include powering on various components of the vehicle, including multiple segments for each of multiple cores in the system. The method then proceeds to operation S320.

[0062] At operation S320, the at least one processor may be configured to determine, during the startup process, multiple timestamps when an electrical signal flows from a power source to multiple segments in each of multiple cores in the system. According to an embodiment, the multiple timestamps may comprise a time between the start of the startup process and a time when the electrical signal reaches the multiple segments in each of the multiple cores. Further, the multiple timestamps may be in nanoseconds or picoseconds.

[0063] 2B , the times between the start of the startup process and the times when the electrical signal reaches segment 212-a, segment 212-b, segment 212-c, and segment 212-d of core 210 may be 1265 ps, 1326 ps, 2854 ps, and 1124 ps, respectively. Thus, the multiple timestamps may comprise 1265 ps, 1326 ps, 2854 ps, and 1124 ps.

[0064] According to an embodiment, the timestamps may be different for every start-up process.

[0065] It can be understood that when a vehicle powers up during a startup process, electricity can flow from a power source to various components of the vehicle, including multiple segments for each of the system's multiple cores, where each of the multiple segments can power up individually. Here, even though the physical wiring between the components and the order in which they power up remain the same, the time at which the electrical signal flows from the power source to each of the multiple segments will be different each time the vehicle powers up. For example, while the time between the start of the startup process and the time at which the electrical signal reaches segment 212-a is 1265 picoseconds in the above example, that time may be different during subsequent startup processes. Thus, multiple timestamps can be used as entropy to generate random numbers.

[0066] According to an embodiment, the multiple timestamps may be determined using a monitoring module of the RNG system. The monitoring module may include, for example, an internal debug meter included in the SoC. Further, according to an embodiment, the multiple timestamps may be stored in memory. The method then proceeds to operation S330.

[0067] In operation S330, the at least one processor may be configured to generate a random number based on the determined plurality of timestamps.

[0068] According to an embodiment, the at least one processor may be configured to generate a random number based on the determined plurality of timestamps by determining one or more portions for each of the determined plurality of timestamps. For example, the one or more portions for each of the determined plurality of timestamps may include one or more digits for each of the determined plurality of timestamps.

[0069] For example, the at least one processor may be configured to determine the last three digits for each of the determined plurality of timestamps, where the determined last three digits for each of the determined plurality of timestamps may be 265, 326, 854, and 124, respectively, for segment 212-a, segment 212-b, segment 212-c, and segment 212-d of core 210. In another example, the at least one processor may be configured to determine the first and last digits for each of the determined plurality of timestamps, where the determined first and last digits for each of the determined plurality of timestamps may be 15, 16, 24, and 14, respectively, for segment 212-a, segment 212-b, segment 212-c, and segment 212-d of core 210.

[0070] According to an embodiment, the at least one processor may be further configured to generate a random number based on the determined plurality of timestamps by combining one or more portions for each of the determined plurality of timestamps to form the random number.

[0071] According to an embodiment, the at least one processor may be configured to combine one or more portions for each of the determined plurality of timestamps to form the random number by aligning one or more portions for each of the determined plurality of timestamps to form the random number. For example, the at least one processor may be configured to align the last three digits for each of the determined plurality of timestamps to form the random number as 265326854124.

[0072] According to an embodiment, the at least one processor may be configured to combine one or more portions for each of the determined plurality of timestamps to form a random number by performing one or more mathematical operations on one or more portions for each of the determined plurality of timestamps to form a random number. For example, the at least one processor may be configured to multiply the last three digits for each of the determined plurality of timestamps to form the random number as 9148355440.

[0073] It may be understood that the above example provided with reference to timestamps for segments 212-a, 212-b, 212-c, and 212-d of core 210 is simplified for illustrative purposes and is in no way intended to limit the scope of the present disclosure. In particular, timestamps for segments for other cores of the RNG system may also be used.

[0074] In this regard, because the random numbers are generated not based on user interaction but based on timestamps of when electrical signals flow from the power supply to the multiple segments in each of the multiple cores in the system, the random numbers can be generated immediately after startup without compromising user privacy. Furthermore, because the timestamps of when electrical signals flow from the power supply to the multiple segments in each of the multiple cores are different for every startup process and are in nanoseconds / picoseconds, sufficient entropy can be collected to generate random numbers suitable for security functions.

[0075] Thus, the process may also allow the vehicle to make a wireless connection immediately after start-up, since the key may be generated from a random number and available for use immediately after start-up.

[0076] After performing operation S330, method 300 may end or terminate. Alternatively, method 300 may return to operation S310, such that the at least one processor may be configured to repeatedly perform the startup process (at operation S310), determine the multiple timestamps (at operation S320), and generate the random number (at operation S330) for at least a predetermined amount of time.

[0077] For example, a user may start their vehicle at a first time, and the at least one processor may be configured to perform a start-up process (at operation S310), determine a plurality of timestamps (at operation S320), and generate a random number (at operation S330). The user may then start their vehicle at a second time, and the at least one processor may be configured to repeat the steps of performing the start-up process (at operation S310), determining a plurality of timestamps (at operation S320), and generating a random number (at operation S330). It may be understood that the random number generated when the user starts their vehicle at a first time may be different from the random number generated when the user starts their vehicle at a second time.

[0078] Various aspects of the embodiments The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit implementations to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of implementations.

[0079] Some embodiments may relate to systems, methods, and / or computer-readable media at any possible level of technical detail of integration. Furthermore, one or more of the above components described above may be implemented as instructions stored on a computer-readable medium and executable by at least one processor (and / or may include at least one processor). The computer-readable medium may include a computer-readable non-transitory storage medium(s) having computer-readable program instructions thereon for causing a processor to perform operations.

[0080] A computer-readable storage medium may be a tangible device that can hold and store instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory sticks, floppy disks, mechanically encoded devices such as punch cards or ridge structures in grooves having instructions recorded thereon, and any suitable combination thereof. As used herein, computer-readable storage media should not be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or electrical signals transmitted over wires.

[0081] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium into each computing / processing device, or may be downloaded to an external computer or external storage device over a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device.

[0082] The computer-readable program code / instructions for carrying out operations may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for an integrated circuit, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, or the like, and procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection to the external computer may be made (e.g., through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuitry to perform an aspect or operation.

[0083] The computer-readable program instructions may be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to create a machine, such that the instructions, executed by the processor of the computer or other programmable data processing apparatus, create means for implementing the function(s) / act(s) specified in the block(s) of the flowcharts and / or block diagrams. The computer-readable program instructions may also be stored on a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and / or other device to function in a particular manner, such that the computer-readable storage medium having instructions stored therein comprises an article of manufacture including instructions that implement aspects of the function(s) / act(s) specified in the block(s) of the flowcharts and / or block diagrams.

[0084] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause the computer, other programmable apparatus, or other device to perform a series of operational steps to create a computer-implemented process, such that the instructions executing on the computer, other programmable apparatus, or other device implement the function / act specified in the block or blocks of the flowcharts and / or block diagrams.

[0085] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer-readable media according to various embodiments. In this regard, each block in a flowchart or block diagram may represent a microservice module, segment, or portion of instructions, comprising one or more executable instructions for implementing the specified logical function(s). The methods, computer systems, and computer-readable media may include additional, fewer, different, or differently arranged blocks than depicted in the figures. In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two blocks shown in succession may in fact be executed concurrently or substantially concurrently, or the blocks may even be executed in the reverse order, depending on the functionality involved. It should also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a dedicated hardware-based system that performs the specified functions or acts or executes a combination of dedicated hardware and computer instructions.

[0086] It will be apparent that the systems and / or methods described herein may be implemented in various forms of hardware, firmware, or combinations of hardware and software. The actual specialized control hardware or software code used to implement the systems and / or methods is not a limitation of the implementation. Thus, the operation and behavior of the systems and / or methods are described herein without reference to specific software code—it will be understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0087] It can be appreciated that many modifications and variations of the present disclosure are possible in light of the above teachings. It will be apparent that, within the scope of the appended sections, the present disclosure may be practiced otherwise than as specifically described herein.

Claims

1. 1. A system comprising: memory storage for storing computer executable instructions; at least one processor communicatively connected to the memory storage; Equipped with The at least one processor executes the instructions to: Perform the starting process for the vehicle, determining, during the startup process, a plurality of timestamps when an electrical signal flows from a power source to a plurality of segments in each of a plurality of cores in the system; generating a random number based on the determined plurality of timestamps.

2. The system of claim 1 , wherein the plurality of timestamps are in nanoseconds or picoseconds.

3. The at least one processor executes the instructions to: determining one or more portions for each of the determined plurality of timestamps; combining the one or more portions for each of the determined plurality of timestamps to form the random number; The system of claim 1 or 2, configured to generate the random number by

4. The system of claim 3 , wherein the one or more portions for each of the determined plurality of timestamps comprise one or more digits for each of the determined plurality of timestamps.

5. The at least one processor executes the instructions to: aligning the one or more portions for each of the determined plurality of timestamps to form the random number; or performing one or more mathematical operations on the one or more portions for each of the determined plurality of timestamps to form the random number.

4. The system of claim 3, configured to combine the one or more portions for each of the determined plurality of timestamps by:

6. The system of claim 1 or 2, wherein the system comprises a system on a chip (SoC).

7. The system of claim 1 or 2, wherein the plurality of timestamps are determined using an internal debug meter.

8. The system of claim 1 or 2, wherein the multiple timestamps are different for every startup process.

9. A method performed by a system, comprising: performing a starting process for the vehicle; determining, during the startup process, a plurality of timestamps when electrical signals flow from a power source to a plurality of segments in each of a plurality of cores of the system; generating a random number based on the determined plurality of timestamps; A method comprising:

10. The method of claim 9 , wherein the plurality of timestamps are in nanoseconds or picoseconds.

11. The generation of the random numbers includes: determining one or more portions for each of the determined plurality of timestamps; combining the one or more portions for each of the determined plurality of timestamps to form the random number; 11. The method of claim 9 or 10, comprising:

12. The method of claim 11 , wherein the one or more portions for each of the determined plurality of timestamps comprise one or more digits for each of the determined plurality of timestamps.

13. The combination of the one or more portions for each of the determined plurality of timestamps comprises: aligning the one or more portions for each of the determined plurality of timestamps to form the random number; or performing one or more mathematical operations on the one or more portions for each of the determined plurality of timestamps to form the random number. The method of claim 11 , comprising:

14. 11. The method of claim 9 or 10, wherein the system comprises a system on a chip (SoC).

15. The method of claim 9 or 10, wherein the multiple timestamps are determined using an internal debug meter.

16. The method of claim 9 or 10, wherein the multiple timestamps are different for every start-up process.

17. 1. A computer program for causing at least one processor to perform a method, said method comprising: performing a starting process for the vehicle; determining, during the startup process, a plurality of timestamps when electrical signals flow from a power source to a plurality of segments in each of a plurality of cores in the system; generating a random number based on the determined plurality of timestamps; a computer program comprising:

18. 18. The computer program product of claim 17, wherein the plurality of timestamps are in nanoseconds or picoseconds.

19. The generation of the random numbers includes: determining one or more portions for each of the determined plurality of timestamps; combining the one or more portions for each of the determined plurality of timestamps to form the random number; 19. A computer program according to claim 17 or 18, comprising:

20. 19. A computer program product as claimed in claim 17 or 18, wherein the plurality of timestamps are determined using an internal debug meter.

Images