Semiconductor device and power conversion apparatus
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- MITSUBISHI ELECTRIC CORP
- Filing Date
- 2024-03-06
- Publication Date
- 2026-04-23
AI Technical Summary
In transfer mold type semiconductor devices, metal wires can be deformed by the molding resin during the injection process, leading to short circuit defects.
The semiconductor device incorporates a terminal with a notch that allows a portion of the metal wire to be inserted, preventing deformation and contact with other components, thereby suppressing short-circuit defects.
The design effectively prevents short circuits by restricting metal wire deformation and contact, enhancing the reliability and performance of the semiconductor device.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a semiconductor device and a power conversion device. [Background technology]
[0002] Conventionally, a wire bonding method using metal wires has been known as a method for forming internal wiring in semiconductor devices (see, for example, Japanese Utility Model Application Publication No. 1-163345). In Japanese Utility Model Application Publication No. 1-163345, metal wires are formed along the direction in which terminals extend. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Publication No. 1-163345 Summary of the Invention [Problem to be solved by the invention]
[0004] However, in a transfer mold type semiconductor device, when a molding resin is injected as a sealing resin, the metal wires may be deformed by the molding resin, which may result in a short circuit defect.
[0005] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to provide a semiconductor device in which the occurrence of short-circuit defects is suppressed. [Means for solving the problem]
[0006] A semiconductor device according to the present disclosure includes a substrate, a semiconductor element, a terminal, and a metal wire. The semiconductor element is disposed on the substrate. The terminal is disposed at a position farther from the substrate than the semiconductor element. The metal wire connects the semiconductor element and the terminal. The terminal has a notch. A portion of the metal wire is inserted into the notch.
[0007] A power conversion device according to the present disclosure includes a main conversion circuit and a control circuit. The main conversion circuit has the semiconductor device described above and converts input power to output the converted power. The control circuit outputs a control signal to the main conversion circuit to control the main conversion circuit. [Effects of the Invention]
[0008] According to the above, a semiconductor device in which the occurrence of short circuit defects is suppressed can be obtained. [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a side view of a semiconductor device according to a first embodiment. [Figure 2] 1 is a plan view of a semiconductor device according to a first embodiment. [Figure 3] FIG. 2 is a partially enlarged side view of region III in FIG. [Figure 4] FIG. 2 is a plan view of a signal terminal according to the first embodiment. [Figure 5] FIG. 10 is a side view of a semiconductor device according to a second embodiment. [Figure 6] FIG. 10 is a plan view of a semiconductor device according to a second embodiment. [Figure 7] FIG. 10 is a side view of a semiconductor device according to a third embodiment. [Figure 8] FIG. 10 is a plan view of a semiconductor device according to a third embodiment. [Figure 9] FIG. 11 is a plan view of a signal terminal according to a third embodiment. [Figure 10] FIG. 10 is a side view of a semiconductor device according to a fourth embodiment. [Figure 11] FIG. 11 is a partially enlarged side view of region XI in FIG. [Figure 12] FIG. 10 is a plan view of a signal terminal according to a fifth embodiment. [Figure 13] FIG. 13 is a plan view of a signal terminal according to a sixth embodiment. [Figure 14] FIG. 13 is a block diagram showing a configuration of a power conversion system to which a power conversion device according to a seventh embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments of the present disclosure will be described. Unless otherwise specified, the same or corresponding parts in the following drawings will be denoted by the same reference numerals, and the description thereof will not be repeated.
[0011] Embodiment 1 <Configuration of semiconductor device> Fig. 1 is a side view of a semiconductor device 100 according to embodiment 1. Fig. 2 is a plan view of the semiconductor device 100 according to embodiment 1. Fig. 3 is a partially enlarged side view of region III in Fig. 1. Fig. 4 is a plan view of a signal terminal 41 according to embodiment 1.
[0012] 1 to 4 is, for example, a power semiconductor device 100, and mainly includes a substrate 1, a semiconductor element 2, a bonding portion 3, a terminal 4, a metal wire 6, and a sealing portion 7. Note that the sealing portion 7 is indicated by a dotted line in FIGS.
[0013] The substrate 1 has a heat spreader 11, an insulating sheet 12, and a metal foil 13. The heat spreader 11 is disposed on the insulating sheet 12. The insulating sheet 12 is disposed on the metal foil 13. The metal foil 13 is disposed on the surface of the insulating sheet 12 opposite to the surface on which the heat spreader 11 is disposed.
[0014] The heat spreader 11 is made of, for example, copper (Cu). As shown in Fig. 2, the heat spreader 11 includes a plurality of heat spreader portions 11a and 11b. The plurality of heat spreader portions 11a and 11b are spaced apart from each other in the y direction.
[0015] 2, the base material 1 has a main surface 11s. The main surface 11s is the surface to which the semiconductor element 2 is electrically connected. The heat spreader portion 11a has a surface 11sa. The heat spreader portion 11b has a surface 11sb. The surfaces 11sa and 11sb form the main surface 11s of the base material 1.
[0016] As shown in FIGS. 1 and 2, the direction perpendicular to the main surface 11s is defined as the z-direction. The x- and y-directions are directions perpendicular to the z-direction. The y-direction is a direction perpendicular to the x-direction. In other words, the main surface 11s is a surface extending in the x- and y-directions.
[0017] An insulating sheet 12 is connected to the surface of the heat spreader 11 opposite the surfaces 11sa and 11sb. The insulating sheet 12 may be made of a material containing, for example, inorganic powder or glass fiber. The metal foil 13 and the heat spreader 11 are electrically insulated by the insulating sheet 12.
[0018] The material constituting the metal foil 13 may be a metal with excellent thermal conductivity. The material constituting the metal foil 13 may be, for example, any one selected from the group consisting of aluminum, copper, iron, and nickel, or an alloy containing at least any one of them.
[0019] As shown in FIGS. 1 and 2, in a plan view of the main surface 11s, the heat spreader 11 may be smaller than each of the insulating sheet 12 and the metal foil 13 in the x direction and the y direction.
[0020] The substrate 1 may have a three-layer structure including a heat spreader 11, an insulating sheet 12, and a metal foil 13, or may be an insulating substrate. The insulating substrate may be composed of a base plate, an insulating layer, and a circuit pattern. The insulating layer may be disposed on the base plate, and the circuit pattern may be disposed on the insulating layer. The base plate and the circuit pattern are formed of a metal such as copper. The insulating layer ensures electrical insulation from the outside of the semiconductor device 100. The material constituting the insulating layer may be, for example, inorganic ceramic, or may be a material in which ceramic powder is dispersed in a thermosetting resin such as an epoxy resin.
[0021] The semiconductor element 2 includes a plurality of semiconductor element portions 21, 22, 23, and 24. As shown in Fig. 1, the semiconductor element 2 is connected to the main surface 11s of the substrate 1 via bonding portions 3. Specifically, each of the semiconductor element portions 21 and 22 is connected to the surface 11sa via bonding portions 3. Each of the semiconductor element portions 23 and 24 is connected to the surface 11sb via bonding portions 3 (not shown).
[0022] The material constituting the joint 3 may be, for example, solder, a conductive adhesive, or a bonding material containing sinterable silver (Ag) particles or copper (Cu) particles. When the semiconductor element 2 and the substrate 1 are bonded together using a sinterable bonding material, the heat dissipation and lifespan of the joint 3 are improved compared to when solder is used.
[0023] The semiconductor element 2 is a so-called power semiconductor element 2 that controls electric power. The material constituting the semiconductor element 2 may be silicon (Si), or may be a wide bandgap semiconductor material such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond. When such a so-called wide bandgap semiconductor material, which has a wider bandgap than silicon, is used as the material for the semiconductor element 2, a highly efficient semiconductor device 100 that can withstand high temperatures can be obtained.
[0024] The type of semiconductor element 2 does not need to be particularly limited, but may be, for example, an insulated gate bipolar transistor (IGBT), a free wheel diode (FWD), or a metal oxide semiconductor field effect transistor (MOSFET).
[0025] 2, the semiconductor element portions 21 and 22 are spaced apart from each other in the x direction, and the semiconductor element portions 23 and 24 are spaced apart from each other in the x direction.
[0026] 2, each of the semiconductor element portions 21, 23 has a main electrode 81 and three signal electrodes 82. The main electrode 81 and the three signal electrodes 82 are provided on the surfaces (top surfaces) of the semiconductor element portions 21, 23. Each of the semiconductor element portions 22, 24 has a main electrode 83. The main electrode 83 is provided on the surfaces (top surfaces) of the semiconductor element portions 22, 24. The main electrode 81 is arranged spaced apart from each of the three signal electrodes 82 in the x direction. The three signal electrodes 82 may be arranged spaced apart at equal intervals from each other in the y direction.
[0027] The terminal 4 has a main terminal 42 and a plurality of signal terminals 41. As shown in FIG. 2, the main terminal 42 includes a plurality of main terminal portions 42a, 42b, and 42c. The metal wire 6 connects the semiconductor element 2 and the terminal 4. The metal wire 6 includes a plurality of metal wire portions 61, 62, 63, and 64. In the semiconductor device 100 according to the first embodiment, there are six metal wire portions 61, six metal wire portions 62, three metal wire portions 63, and one metal wire portion 64.
[0028] By wire bonding, each of the three metal wire portions 62 connects the main terminal portion 42a, the main electrode 83 of the semiconductor element portion 22, and the main electrode 81 of the semiconductor element portion 21. By wire bonding, each of the three metal wire portions 62 connects the main terminal portion 42c, the main electrode 83 of the semiconductor element portion 24, and the main electrode 81 of the semiconductor element portion 23. In this way, the main terminal 42, through which the main current flows, is electrically connected to the main electrodes 81 and 83 that input and output the main power.
[0029] By wire bonding, the six metal wire portions 61 connect the six signal terminals 41 to the six signal electrodes 82 of the semiconductor element portions 21, 23. In this way, the signal terminals 41 through which control signals flow are electrically connected to the signal electrodes 82 that input and output control signals and sense signals.
[0030] 2, each of the three metal wire portions 63 may connect the main electrode 81 of the semiconductor element portion 21 to the surface 11sb of the heat spreader portion 11b by wire bonding. The metal wire portion 64 may connect the main terminal portion 42b to the surface 11sa of the heat spreader portion 11a by wire bonding.
[0031] The material constituting the metal wire 6 may be any metal, such as aluminum (Al) or copper (Cu). The diameter of the metal wire 6 may be, for example, 80 μm or more and 600 μm or less. In particular, the diameter of the metal wire portion 62 through which the main current flows may be 400 μm. On the other hand, the diameter of the metal wire portion 61 through which the control signal and the like flows may be 200 μm.
[0032] The material constituting the terminals 4 is, for example, copper (Cu). The material constituting the terminals 4 may be any material that has heat dissipation properties in addition to electrical conductivity. For example, the material constituting the terminals 4 may be an alloy containing either copper or aluminum, or a composite material in which these metals are laminated.
[0033] A portion of each of the multiple main terminal portions 42a, 42b, 42c and the multiple signal terminals 41 extends in the x direction from the semiconductor element 2 to the outside of the sealing portion 7. The signal terminals 41 extend in a direction opposite to the direction in which the main terminals 42 extend.
[0034] The sealing portion 7 covers the substrate 1, the semiconductor element 2, the joint portion 3, a portion of the main terminal 42, a portion of the signal terminal 41, and the metal wire 6. As shown in FIG. 1 , the surface of the metal foil 13 opposite to the surface connected to the insulating sheet 12 may be exposed from the sealing portion 7. When the semiconductor device 100 is incorporated into a power converter or the like, the portion of the metal foil 13 exposed from the sealing portion 7 may be connected to a heat dissipation fin. The sealing portion 7 may cover the entire metal foil 13 to electrically insulate the metal foil 13 from the outside.
[0035] A portion of the terminal 4 extends outward from the surface of the sealing portion 7 so as to be connectable to an external device outside the sealing portion 7. The portion of the terminal 4 extending outward from the sealing portion 7 may be bent, for example, by forming. A conductor (not shown) such as a wiring or terminal for electrically connecting to a circuit board or another semiconductor device may be connected to the portion of the terminal 4. Any method can be used to connect the conductor to the portion, but the conductor and the portion may be fixed together by a fixing member such as a screw.
[0036] The material forming the sealing portion 7 may be an insulating resin. The insulating resin may be, for example, an epoxy resin. The sealing portion 7 may be formed by transfer molding.
[0037] As described above, the metal wire portion 61 serving as the metal wire 6 connects the semiconductor element 2 and the terminal 4. When the signal terminal 41 serving as the terminal 4 is disposed at the same height as the semiconductor element 2 in the z direction, the position in the z direction where the metal wire portion 61 is connected to the signal terminal 41 is the same as the position where it is connected to the semiconductor element 2.
[0038] The diameter of the metal wire portion 61 is smaller than the diameter of the metal wire portion 62. Therefore, when resin is injected to form the sealing portion 7, the metal wire portion 61 may be crushed and deformed in the −z direction due to the injection pressure of the resin. If the deformed metal wire portion 61 comes into contact with a member (for example, the heat spreader 11) having a potential different from that of the metal wire, a short circuit defect occurs in the semiconductor device 100.
[0039] Furthermore, when a plurality of metal wire portions 61 are arranged adjacent to each other, there is a risk that the adjacent metal wire portions 61 may come into contact with each other due to vibrations that occur during transportation of the semiconductor device 100 or the injection pressure of the resin when the resin is injected during the manufacturing process of the semiconductor device 100. As a result, a short circuit defect occurs in the semiconductor device 100.
[0040] Here, a feature of the semiconductor device 100 according to the first embodiment is that a notch h is provided in the terminal 4, as shown in FIG. 4 . By arranging the terminal 4 so that a part of the metal wire 6 is inserted into the notch h, the notch h restricts deformation and movement of the metal wire 6. As a result, contact between the metal wire 6 and other components, and contact between adjacent metal wires 6, is suppressed. In this way, the occurrence of short-circuit defects in the semiconductor device 100 is suppressed.
[0041] Furthermore, the signal terminal 41 is disposed at a position farther from the substrate 1 than the semiconductor element 2. Therefore, the metal wire 6 is held on the side of the connection portion 6a connected to the semiconductor element 2 than the center of the metal wire 6 in the x direction, thereby further suppressing deformation of the metal wire 6.
[0042] 3 and 4, the signal terminal 41 has an upper surface 41c, a lower surface 41d, a tip surface 41s1, and a pair of side surfaces 41s2. The upper surface 41c and the lower surface 41d are surfaces that are substantially perpendicular to the z direction. The upper surface 41c and the lower surface 41d face each other in the z direction. The notch h penetrates the signal terminal 41 so as to reach the lower surface 41d from the upper surface 41c.
[0043] As shown in FIG. 4, inside the sealing portion 7, the signal terminal 41 extends in the x direction. The tip surface 41s1 and the pair of side surfaces 41s2 are continuous with the upper surface 41c and the lower surface 41d, respectively. The tip surface 41s1 may be a surface that is substantially perpendicular to the x direction. The pair of side surfaces 41s2 face each other in the y direction. The pair of side surfaces 41s2 may be surfaces that are substantially perpendicular to the y direction. The notch h may be open to the tip surface 41s1. The notch h may be located at a position sandwiched between the pair of side surfaces 41s2 in the y direction, or may be provided in the center of the signal terminal 41 in the width direction (the y direction in the first embodiment).
[0044] A distance t2 from the main surface 11s of the substrate 1 to the upper surface 41c of the signal terminal 41 is greater than a distance t1 from the main surface 11s of the substrate 1 to the surface of the semiconductor element portion 21. In this way, a part of the metal wire portion 61 is inserted into the notch h.
[0045] From a different perspective, as shown in Fig. 3, the metal wire portion 61 includes a vertex portion 6T and connection portions 6a and 6b. The vertex portion 6T is the portion of the metal wire portion 61 that is located at the farthest position from the semiconductor element 2 in the z direction. The connection portion 6a is the portion where the metal wire portion 61 contacts the signal electrode 82. The connection portion 6b is the portion where the metal wire portion 61 contacts the signal terminal 41.
[0046] As described above, the signal terminal 41 is disposed farther from the substrate 1 than the semiconductor element 2. Therefore, as viewed from the semiconductor element portion 21, the connection portion 6b is disposed farther from the connection portion 6a in the z direction. Furthermore, the metal wire portion 61 is curved. Therefore, as viewed from the semiconductor element portion 21, the apex 6T is disposed farther from the connection portion 6b in the z direction. From a different perspective, the distance t3 from the substrate 1 to the apex 6T is greater than the distance t1 from the substrate 1 to the connection portion 6a, and is also greater than the distance t2 from the substrate 1 to the connection portion 6b. In this way, the tip of the signal terminal 41 suppresses deformation of the metal wire portion 61 in the -z direction, and it is possible to suppress contact of the metal wire portion 61 with other members.
[0047] In a plan view of the main surface 11s, a portion of the metal wire portion 61 is surrounded by the cutout portion h. This prevents adjacent metal wires 6 from contacting each other. Even if the metal wire 6 comes into contact with the inner wall of the terminal 4 that forms the cutout portion h, the potentials of the metal wire 6 and the terminal 4 are equal, and therefore the characteristics of the semiconductor device 100 are not affected.
[0048] If the width w of the notch h in the y direction is large, the movement amount of the metal wire portion 61 will increase. On the other hand, if the width w of the notch h in the y direction is small, it will be difficult to insert the metal wire portion 61 into the notch h. Therefore, the width w of the notch h in the y direction may be 1.5 to 2 times the diameter of the metal wire portion 61.
[0049] 3, a part of the region of the metal wire portion 61 from the connection portion 6a to the apex portion 6T is inserted into the notch portion h (see the dotted line in FIG. 3). From a different perspective, the notch portion h is disposed between the apex portion 6T and the connection portion 6a in the x direction. In particular, the notch portion h may be disposed closer to the connection portion 6a than the center of the metal wire portion 61 in the x direction. In this way, the notch portion h holds the metal wire portion 61 on the connection portion 6a side, thereby further suppressing deformation of the metal wire portion 61. As a result, the occurrence of short-circuit defects in the semiconductor device 100 is suppressed.
[0050] In the z direction, the notch h may be located between the vertex 6T and the connecting portion 6a. In the z direction, the notch h may be located in the center between the vertex 6T and the connecting portion 6a. The notch h may be located on the vertex 6T side when viewed from the center between the vertex 6T and the connecting portion 6a. The notch h may be located on the connecting portion 6a side when viewed from the center between the vertex 6T and the connecting portion 6a.
[0051] When the signal terminal 41 is arranged so as not to overlap the substrate 1, the metal wire portion 61 becomes long. As a result, the semiconductor device 100 becomes large in size in the x direction. Furthermore, if the metal wire portion 61 becomes long, there is a risk that the metal wire portion 61 will be significantly deformed during the manufacturing process of the semiconductor device 100 due to vibrations that occur during transportation of the semiconductor device 100 or the injection pressure of the resin when the resin is injected.
[0052] 1 to 3, the signal terminal 41 may be disposed at a position where it partially overhangs the substrate 1. Specifically, in a plan view of the main surface 11s, the signal terminal 41 may partially overlap the substrate 1. In this way, even if the substrate 1 is made larger, the signal terminal 41 is disposed so as to partially overlap the substrate 1, thereby reducing the length of the metal wire portion 61. As a result, it is possible to prevent the semiconductor device 100 from becoming larger in size in the x direction.
[0053] The signal terminal 41 includes a tip region 41a and an outer region 41b. The tip region 41a is a region where the signal terminal 41 overlaps with the base material 1 in a plan view of the main surface 11s. The outer region 41b is a region of the signal terminal 41 other than the tip region 41a, and is a region where the signal terminal 41 does not overlap with the base material 1 in a plan view of the main surface 11s.
[0054] The notch h is provided in the tip region 41a of the signal terminal 41. The connection portion 6b is connected to the outer region 41b of the signal terminal 41 in the x direction. That is, the connection portion 6b is disposed at a position that does not overlap the base material 1 in a plan view of the main surface 11s.
[0055] By doing so, it is possible to prevent the semiconductor device 100 from becoming larger in size in the x direction. Furthermore, the heat spreader 11 may be made larger as the base material 1 becomes larger. As a result, it is possible to improve the heat dissipation performance of the semiconductor device 100. Furthermore, by reducing the length of the metal wire portion 61, it is possible to prevent deformation of the metal wire portion 61 during the manufacturing process of the semiconductor device 100 due to vibrations that occur when the semiconductor device 100 is transported or due to the injection pressure of the resin when the resin is injected.
[0056] Although the case where the notch h is provided in the signal terminal 41 has been described, the notch h may also be provided in the main terminal 42, and the above configuration may also be applied to the main terminal 42 and the metal wire portions 62, 64.
[0057] <Action and effect> A semiconductor device 100 according to the present disclosure includes a substrate 1, a semiconductor element 2, a terminal 4, and a metal wire 6. The semiconductor element 2 is disposed on the substrate 1. The terminal 4 is disposed at a position farther from the substrate 1 than the semiconductor element 2. The metal wire 6 connects the semiconductor element 2 and the terminal 4. The terminal 4 is provided with a notch h. A portion of the metal wire 6 is inserted into the notch h.
[0058] This prevents the metal wires 6 from contacting other members and adjacent metal wires 6 from contacting each other, thereby preventing short circuits from occurring in the semiconductor device 100.
[0059] According to the semiconductor device 100, the terminal 4 includes a tip region 41a and an outer region 41b. The tip region 41a overlaps the base material 1 in a plan view of the base material 1. The outer region 41b is a region other than the tip region 41a. The metal wire 6 is connected to the outer region 41b.
[0060] This makes it possible to prevent the semiconductor device 100 from becoming larger in size in the direction in which the terminals 4 extend. Furthermore, by reducing the length of the metal wires 6, it is possible to prevent deformation of the metal wires 6 during the manufacturing process of the semiconductor device 100 due to vibrations that occur when the semiconductor device 100 is transported or due to the injection pressure of the resin when the resin is injected.
[0061] According to the semiconductor device 100, the notch h is provided at the center of the terminal 4 in the width direction.
[0062] This prevents the metal wires 6 from contacting other members and adjacent metal wires 6 from contacting each other, thereby preventing short circuits from occurring in the semiconductor device 100.
[0063] Embodiment 2 <Configuration of semiconductor device> Fig. 5 is a side view of semiconductor device 100 according to embodiment 2. Fig. 5 corresponds to Fig. 1. Fig. 6 is a plan view of semiconductor device 100 according to embodiment 2. Fig. 6 corresponds to Fig. 2. Semiconductor device 100 shown in Figs. 5 and 6 basically has the same configuration as semiconductor device 100 shown in Figs. 1 to 4 and can obtain the same effects, but differs in that main electrodes 81, 83 (see Fig. 2) are connected to main terminal 42 via joint 3.
[0064] 6, main terminal portion 42a may extend in the x direction to a position overlapping main electrode 81 of semiconductor element portion 21. Main terminal portion 42b may have a protrusion 44 extending in the x direction. Main terminal portion 42c may extend in the x direction to a position overlapping main electrode 81 of semiconductor element portion 23.
[0065] 5, the main terminal portion 42a is connected to a main electrode 81 of the semiconductor element portion 21 via a joint 3. The main terminal portion 42a is connected to a main electrode 83 of the semiconductor element portion 22 via a joint 3. The main terminal portion 42a may have a protrusion 43. The protrusion 43 extends in the y direction from the main terminal portion 42a so as to overlap with the surface 11sb of the heat spreader portion 11b. The protrusion 43 is connected to the surface 11sb of the heat spreader portion 11b via a joint 3 (not shown).
[0066] The protrusion 44 is connected to the surface 11sa of the heat spreader part 11a via a joint 3 (not shown).
[0067] 6, the main terminal portion 42c is connected to a main electrode 81 of the semiconductor element portion 23 via a joint portion 3 (not shown). The main terminal portion 42c is connected to a main electrode 83 of the semiconductor element portion 24 via a joint portion 3 (not shown).
[0068] In this way, by connecting the main terminal 42 and the main electrodes 81, 83 via the joint 3 formed by solder, the heat cycle resistance and lifespan of the semiconductor device 100 are improved compared to connecting the main terminal 42 and the main electrodes 81, 83 via the metal wire portion 62.
[0069] The material constituting the joint 3 connecting the main terminal 42 and the main electrodes 81, 83 may be, for example, solder, a conductive adhesive, or a bonding material containing sinterable silver (Ag) particles or copper (Cu) particles. Using a sinterable bonding material to bond the main terminal 42 and the main electrodes 81, 83 improves the heat dissipation and lifespan of the joint 3 compared to using solder.
[0070] <Action and effect> According to the semiconductor device 100, the semiconductor element 2 has a main electrode 81 and a signal electrode 82. The terminal 4 has a main terminal 42 and a signal terminal 41. The main terminal 42 is connected to the main electrode 81 via a joint 3. The signal terminal 41 is connected to the signal electrode 82 via a metal wire 6.
[0071] This improves the heat cycle resistance and life of the semiconductor device 100.
[0072] Embodiment 3 <Configuration of semiconductor device> FIG. 7 is a side view of a semiconductor device 100 according to a third embodiment. FIG. 7 corresponds to FIG. 5. FIG. 8 is a plan view of the semiconductor device 100 according to the third embodiment. FIG. 8 corresponds to FIG. 6. FIG. 9 is a plan view of a terminal 4 according to the third embodiment. FIG. 9 corresponds to FIG. 4. The semiconductor device 100 shown in FIGS. 7 to 9 basically has the same configuration as the semiconductor device 100 shown in FIGS. 5 and 6 and can achieve the same effects, but differs in that the notch h is provided at an end of the terminal 4 in the width direction.
[0073] From a different point of view, the notch h may be open to the tip surface 41s1 and either of the pair of side surfaces 41s2.
[0074] In this way, the width of the signal terminal 41 in the y direction can be reduced, which in turn makes it possible to reduce the size of the semiconductor device 100 in the y direction. Also, the material of the signal terminal 41 can be reduced.
[0075] <Action and effect> According to the semiconductor device 100, the notch h is provided at the end of the terminal 4 in the width direction.
[0076] In this way, the width of the signal terminal 41 in the y direction can be reduced, which in turn makes it possible to reduce the size of the semiconductor device 100 in the y direction. Also, the material of the signal terminal 41 can be reduced.
[0077] Embodiment 4 <Configuration of semiconductor device> Fig. 10 is a side view of a semiconductor device 100 according to a fourth embodiment. Fig. 10 corresponds to Fig. 5. Fig. 11 is a partially enlarged side view of region XI in Fig. 10. Fig. 10 corresponds to Fig. 3. The semiconductor device 100 shown in Figs. 10 and 11 basically has the same configuration as the semiconductor device 100 shown in Figs. 5 and 6 and can achieve the same effects, but differs in that the tips of the terminals 4 are inclined with respect to the z direction.
[0078] The signal terminal 41 serving as the terminal 4 has an inclined portion 45. The inclined portion 45 is disposed in a tip region 41a of the signal terminal 41. The inclined portion 45 is inclined in the z direction, which is a direction perpendicular to the main surface 11s of the substrate 1, so as to be located between the connecting portion 6b and the vertex portion 6T.
[0079] In this way, the position of the notch h in the z direction can be changed by tilting the tip of the signal terminal 41 in the z direction. As a result, during the manufacturing process of the semiconductor device 100, it is possible to suppress deformation of the metal wire 6 due to vibrations that occur during transportation of the semiconductor device 100 or due to the injection pressure of the resin when the resin is injected.
[0080] <Action and effect> According to the semiconductor device 100, the metal wire 6 has a vertex 6T and a connection portion 6b. The vertex 6T is farthest from the semiconductor element 2. The connection portion 6b is in contact with the terminal 4. The terminal 4 has an inclined portion 45. In a direction perpendicular to the main surface 11s of the substrate 1, the inclined portion 45 is located between the connection portion 6b and the vertex 6T.
[0081] This prevents the metal wires 6 from contacting other members and adjacent metal wires 6 from contacting each other, thereby preventing short circuits in the semiconductor device 100.
[0082] Embodiment 5 <Configuration of semiconductor device> FIG. 12 is a plan view of a signal terminal 41 according to the fifth embodiment. FIG. 12 corresponds to FIG. 4. The semiconductor device 100 shown in FIG. 12 basically has the same configuration as the semiconductor device 100 shown in FIGS. 1 to 4 and can achieve the same effects, but differs in that the cutout portion h has a pair of inclined surfaces 41s3. Specifically, the cutout portion h has a pair of inclined surfaces 41s3, an inner wall surface 41s4, and a bottom surface 41s5. The pair of inclined surfaces 41s3, the inner wall surface 41s4, and the bottom surface 41s5 form the cutout portion h.
[0083] The inclined surface 41s3 is continuous with the side surface 41s2 and the inner wall surface 41s4. The bottom surface 41s5 is the surface of the cutout portion h that is the deepest in the x direction from the tip of the signal terminal 41. The bottom surface 41s5 is continuous with the inner wall surface 41s4.
[0084] The portion where the inclined surface 41s3 connects to the inner wall surface 41s4 is located between the portion where the inclined surface 41s3 connects to the side surface 41s2 and the bottom surface 41s5 in the x direction. In this manner, each of the pair of inclined surfaces 41s3 is inclined toward the center A1 in the width direction of the signal terminal 41. From a different perspective, as shown in FIG. 12 , in a plan view of the main surface 11s, the inclined surface 41s3 is inclined so as to face the center A1. In other words, the distance between the pair of inclined surfaces 41s3 gradually narrows from the tip of the signal terminal 41 toward the bottom surface 41s5. This makes it easier to insert the metal wire 6 into the cutout h.
[0085] <Action and effect> According to the semiconductor device 100, the notch h has an inclined surface 41s3. The inclined surface 41s3 is inclined toward the center A1.
[0086] This makes it easier to insert the metal wire 6 into the notch h.
[0087] Embodiment 6 <Configuration of semiconductor device> FIG. 13 is a plan view of a signal terminal 41 according to the sixth embodiment. FIG. 13 corresponds to FIG. 12. The semiconductor device 100 shown in FIG. 13 basically has the same configuration as the semiconductor device 100 shown in FIG. 12 and can achieve the same effects, but differs in that the cutout portion h has a return surface 41s6. Specifically, the return surface 41s6 protrudes from the inner wall surface 41s4 toward the center A1 (see FIG. 12). The return surface 41s6 is continuous with the inner wall surface 41s4 and the inclined surface 41s3. The return surface 41s6 faces the bottom surface 41s5.
[0088] In this way, during the manufacturing process of the semiconductor device 100, the metal wire 6 is prevented from being pushed out of the cutout portion h due to vibrations that occur when the semiconductor device 100 is transported or due to the injection pressure of the resin when the resin is injected.
[0089] <Action and effect> According to the semiconductor device 100, the notch h has a return surface 41s6. The return surface 41s6 protrudes toward the center A1 (see FIG. 12).
[0090] In this way, during the manufacturing process of the semiconductor device 100, the metal wire 6 is prevented from being pushed out of the cutout portion h due to vibrations that occur when the semiconductor device 100 is transported or due to the injection pressure of the resin when the resin is injected.
[0091] Embodiment 7 Here, a description will be given of a power conversion device to which the semiconductor devices described in the above-mentioned Embodiments 1 to 6 are applied. Although the present disclosure is not limited to a specific power conversion device, a case in which the present disclosure is applied to a three-phase inverter will be described below as Embodiment 7.
[0092] Fig. 14 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied. The power conversion system shown in Fig. 14 is composed of a power supply 400, a power conversion device 200, and a load 300. The power supply 400 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 400 can be composed of various elements, such as a DC system, a solar cell, or a storage battery. It may also be composed of a rectifier circuit or an AC / DC converter connected to an AC system. The power supply 400 may also be composed of a DC / DC converter that converts DC power output from the DC system into a predetermined power.
[0093] The power conversion device 200 is a three-phase inverter connected between a power source 400 and a load 300, and converts DC power supplied from the power source 400 into AC power and supplies the AC power to the load 300. As shown in Fig. 14 , the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.
[0094] The load 300 is a three-phase electric motor driven by AC power supplied from the power conversion device 200. The load 300 is not limited to a specific application, but is an electric motor mounted on various electric devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.
[0095] The power conversion device 200 will be described in detail below. The main conversion circuit 201 includes switching elements and freewheel diodes (neither of which is shown). When the switching elements are switched, DC power supplied from the power source 400 is converted into AC power and supplied to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit that can be configured from six switching elements and six freewheel diodes connected in anti-parallel to each switching element.
[0096] The semiconductor device 100 according to at least one of the first to sixth embodiments is configured as a semiconductor module 202 for at least one of the switching elements and freewheeling diodes of the main conversion circuit 201. Two of the six switching elements are connected in series to form upper and lower arms, and each upper and lower arm constitutes one phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to a load 300.
[0097] The main conversion circuit 201 also includes a drive circuit (not shown) that drives each switching element, but the drive circuit may be built into the semiconductor module 202, or may be provided separately from the semiconductor module 202. The drive circuit generates drive signals that drive the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with control signals from a control circuit 203 (described later), the drive circuit outputs to the control electrodes of each switching element a drive signal that turns the switching element on and a drive signal that turns the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is equal to or less than the threshold voltage of the switching element.
[0098] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 300. Specifically, it calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. Then, it outputs a control command (control signal) to a drive circuit provided in the main conversion circuit 201 so that an on signal is output to a switching element that should be in the on state at each time point, and an off signal is output to a switching element that should be in the off state at each time point. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element in accordance with this control signal.
[0099] In the power conversion device according to this embodiment, the semiconductor device 100 according to the above-described embodiments 1 to 6 is applied as a semiconductor module 202 to at least one of each switching element and each freewheel diode of the main conversion circuit 201, thereby improving electrical insulation and improving the reliability of the power conversion device.
[0100] In the present embodiment, an example in which the present disclosure is applied to a two-level three-phase inverter has been described, but the present disclosure is not limited to this and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is described, but a three-level or multi-level power conversion device may also be used. When supplying power to a single-phase load, the present disclosure may also be applied to a single-phase inverter. Furthermore, when supplying power to a DC load or the like, the present disclosure may also be applied to a DC / DC converter or an AC / DC converter.
[0101] Furthermore, the power conversion device to which the present disclosure is applied is not limited to cases in which the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.
[0102] The semiconductor devices described in the respective embodiments can be combined in various ways as needed. In addition, the dependent claims described in the claims also contemplate dependent aspects corresponding to the combinations.
[0103] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. Unless there is a contradiction, at least two of the embodiments disclosed herein may be combined. The basic scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.
[0104] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) A substrate; a semiconductor element disposed on the substrate; a terminal disposed at a position farther from the substrate than the semiconductor element; a metal wire connecting the semiconductor element and the terminal; The terminal is provided with a notch, A portion of the metal wire is inserted into the notch. (Appendix 2) the semiconductor element has a main electrode and a signal electrode; The semiconductor device described in Appendix 1, wherein the terminal has a main terminal connected to the main electrode via a joint and a signal terminal connected to the signal electrode via the metal wire. (Appendix 3) the terminal includes a tip region overlapping the base material in a plan view of the base material, and an outer region other than the tip region, 3. The semiconductor device according to claim 1, wherein the metal wire is connected to the external region. (Appendix 4) 4. The semiconductor device according to claim 1, wherein the notch is provided at the center of the terminal in a width direction. (Appendix 5) 5. The semiconductor device according to claim 4, wherein the cutout has an inclined surface that slopes toward the center. (Appendix 6) 6. The semiconductor device according to claim 4, wherein the cutout portion has a return surface that protrudes toward the center. (Appendix 7) 4. The semiconductor device according to claim 1, wherein the notch is provided at an end of the terminal in a width direction. (Appendix 8) the metal wire has a top portion farthest from the semiconductor element and a connection portion in contact with the terminal; 8. The semiconductor device according to claim 1, wherein the terminal has an inclined portion located between the connection portion and the apex portion in a direction perpendicular to the main surface of the substrate. (Appendix 9) a main conversion circuit including the semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 8, which converts input power and outputs the converted power; a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. [Explanation of symbols]
[0105] 1 substrate, 2 semiconductor element, 3 joint portion, 4 terminal, 6 metal wire, 6a connection portion, 6b connection portion, 6T vertex portion, 7 sealing portion, 11 heat spreader, 11a, 11b heat spreader portion, 11s main surface, 11sa, 11sb surface, 12 insulating sheet, 13 metal foil, 21, 22, 23, 24 semiconductor element portion, 41 signal terminal, 41a tip region, 41b outer region, 41c upper surface, 41d lower surface, 41s1 tip surface, 41s2 side surface, 41s3 inclined surface, 41s4 inner wall surface, 41s5 bottom surface, 41s6 return surface, 42 main terminal, 42a, 42b, 42c main terminal portion, 43, 44 convex portion, 45 inclined portion, 61, 62, 63, 64 Metal wire portion, 81, 83 main electrodes, 82 signal electrodes, 100 semiconductor device, 200 power conversion device, 201 main conversion circuit, 202 semiconductor module, 203 control circuit, 300 load, 400 power supply, A1 center, h notch, t1, t2, t3 distance, w width.
Claims
1. A substrate; a semiconductor element disposed on the substrate; a terminal disposed at a position farther from the substrate than the semiconductor element; a metal wire connecting the semiconductor element and the terminal; The terminal is provided with a notch, A portion of the metal wire is inserted into the notch.
2. the semiconductor element has a main electrode and a signal electrode; 2. The semiconductor device according to claim 1, wherein the terminal comprises a main terminal connected to the main electrode via a joint, and a signal terminal connected to the signal electrode via the metal wire.
3. the terminal includes a tip region overlapping the base material in a plan view of the base material, and an outer region other than the tip region, 3. The semiconductor device according to claim 1, wherein the metal wire is connected to the external region.
4. 3. The semiconductor device according to claim 1, wherein the notch is provided at a center in a width direction of the terminal.
5. The semiconductor device according to claim 4 , wherein said cutout portion has an inclined surface inclined toward said center.
6. The semiconductor device according to claim 4 , wherein the notch has a return surface that protrudes toward the center.
7. 3. The semiconductor device according to claim 1, wherein the notch is provided at an end of the terminal in a width direction.
8. the metal wire has a top portion farthest from the semiconductor element and a connection portion in contact with the terminal; 3. The semiconductor device according to claim 1, wherein the terminal has an inclined portion located between the connection portion and the apex portion in a direction perpendicular to the main surface of the substrate.
9. a main conversion circuit including the semiconductor device according to claim 1 or 2, which converts input power and outputs the converted power; a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.