Current estimation circuit for power transistors and method for estimating current for power transistors

Abstract

To provide current estimation circuit and method for a power transistor that correctly estimate a current between conductive terminals even when a threshold voltage Vth varies.SOLUTION: In a current estimation circuit 7, a voltage detection unit 3 detects a terminal voltage Vds_on applied between the drain and source while an FET 1 is on, and a temperature detection unit 4 detects a junction temperature Tj of the FET 1. A memory unit 6 stores data indicating the relationship between the terminal voltage Vds_on, a current Id, the junction temperature Tj of the FET, and the variation amount Vth_shift of the threshold voltage of the FET with respect to a plurality of gate drive voltages. A current estimation unit 5 estimates the drain current dependent on the variation amount Vth_shift corresponding to each gate drive voltage stored in the memory unit according to the terminal voltage Vds_on and the junction temperature Tj detected when the gate drive unit drives the gate of the FET with the plurality of gate drive voltages, and performs statistical processing on them to obtain an optimal value as the final estimated current.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a circuit and a method for estimating a current flowing between conduction terminals of a power transistor.

Background Art

[0002] Regarding power transistors used in inverters and the like, an overcurrent detection circuit for monitoring the energization current is provided to detect that an overcurrent exceeding the allowable current has flowed. When the detected current reaches a predetermined value, the output of the inverter is restricted to protect the system including the power transistor. If the accuracy of this current detection is improved, the required margin for the current capacity design of the power transistor can be reduced, so that cost reduction and the like can be achieved. In recent years, many techniques for reducing the switching loss and generated noise of a power transistor by detecting the energization current and controlling the driving speed of the power transistor according to the detected value have been reported. Also in such applications, the reduction of loss and noise becomes possible as the current detection accuracy is increased.

[0003] As a technique for detecting the drain current Id flowing through a power device, temperature-dependent data of the on-resistance Ron of the power device measured in advance is stored in a memory as correlation information, the temperature and the on-voltage Vds_on during the on-period of the power device are detected during operation, and a method for estimating Id using the correlation information and the two detected values has been proposed.

[0004] Here, the on-resistance Ron of a high-voltage vertical power device consists of four resistance elements shown in Equation (1), and among these, the channel resistance Rch and the drift resistance Rd occupy most of it. Ron≒Rch+Rd+Rsub+ Rpackage …(1) Rsub: Substrate resistance, Rpackage: Resistance of mounting components The channel resistance Rch and the drift resistance Rd are expressed by Equation (2) and Equation (3), respectively.

[0005]

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[0006] Here, although it depends on the device structure, generally both the threshold voltage Vth and the electron mobility μn_ch in the channel have negative temperature characteristics. In the practical range, for example, with a gate drive voltage Vgs of 20V, the temperature characteristics of the electron mobility μn_ch have a greater influence than the threshold voltage Vth. Therefore, the channel resistance Rch has positive temperature characteristics. On the other hand, since the electron mobility μn_d in the drift layer also has negative temperature characteristics, the drift resistance Rd also has positive temperature characteristics. Based on the above, conventional techniques focus on the temperature dependence of the on-resistance Ron and estimate the drain current Id using the on-resistance Ron data and the detected values ​​of the on-voltage Vds_on and junction temperature Tj. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Patent No. 5448706 [Patent Document 2] Japanese Patent Publication No. 2019-192950 [Overview of the project] [Problems that the invention aims to solve]

[0008] For example, SiC (silicon carbide) MOSFETs, which have been increasingly put into practical use as power devices in recent years, have a problem in that the threshold voltage Vth fluctuates during use due to the charge trapping phenomenon at the gate oxide interface. As a result of this fluctuation, the channel resistance Rch fluctuates according to equation (2), and the temperature characteristics of the on-resistance Ron also fluctuate. Considering this fluctuation, it is difficult to correctly estimate the current Id by simply detecting the on-voltage Vds_on and junction temperature Tj as in conventional techniques.

[0009] The present invention has been made in view of the above circumstances, and its object is to provide a current estimation circuit and method for a power transistor that can correctly estimate the current between conduction terminals even when the threshold voltage Vth fluctuates. [Means for solving the problem]

[0010] According to the power transistor current estimation circuit described in claim 1, the voltage detection unit (3) detects the terminal voltage applied between the conductive terminals while the power transistor (1) is ON, and the temperature detection unit (4) detects the temperature of the power transistor at the same timing as the voltage detection unit detects the voltage. A power transistor is a transistor used for switching over relatively large amounts of power, and is a general term for power MOSFETs, SiC MOSFETs, IGBTs, etc. The memory unit (6,23) stores data that has been acquired in advance, showing the relationship between terminal voltages, junction temperatures of the power transistor, and threshold voltage fluctuations of the power transistor with respect to multiple gate drive voltages.

[0011] The current estimation unit (5,22) estimates a current that depends on the fluctuation amount corresponding to each gate drive voltage, which is stored in the memory unit, based on the terminal voltage detected by the voltage detection unit and the temperature detected by the temperature detection unit when the gate drive unit drives the gate of the power transistor with multiple gate drive voltages. The optimal value obtained by performing statistical processing on each current estimated for each of the multiple gate drive voltages is ultimately considered the estimated current. Here, what is simply referred to as "current" is the current that flows between the conductive terminals of the power transistor.

[0012] With this configuration, when the gate of a power transistor is driven by multiple gate drive voltages, data indicating the fluctuation amount of the threshold voltage of the power transistor, corresponding to the terminal voltage and temperature obtained for each gate drive voltage, can be obtained from the storage unit. Since the fluctuation of the threshold voltage affects the fluctuation of the current flowing between the conductive terminals, a data set of current corresponding to the fluctuation amount of the threshold voltage obtained for each gate drive voltage can be obtained. The current is estimated by selecting the data with the closest values ​​from each data set, and the optimal value obtained by performing statistical processing on these is taken as the final estimated current. Therefore, even if the threshold voltage fluctuates while the power transistor is in use, the current can be estimated with high accuracy.

[0013] According to the power transistor current estimation circuit described in claim 2, the data stored in the memory unit are characteristics of on-resistance, junction temperature, and the amount of variation of the on-resistance corresponding to multiple gate drive voltages, and the current estimation unit estimates the current using the detected voltage and temperature between the conduction terminals and the data stored in the memory unit. Since fluctuations in the threshold voltage affect fluctuations in the junction temperature by affecting fluctuations in on-resistance, it is possible to estimate the current corresponding to the amount of threshold voltage variation for the temperature obtained for each gate drive voltage. Furthermore, the number of data parameters to be stored in the memory unit can be reduced by one.

[0014] According to the power transistor current estimation circuit described in claim 3, the on-resistance data stored in the memory unit is data obtained when the power transistor is operated by a gate drive voltage obtained by adding or subtracting a value including the fluctuation amount from each of a plurality of reference gate drive voltages for each junction temperature. This makes it possible to estimate the current with high accuracy based on data obtained in advance for a power transistor that is in a state without characteristic degradation before being used in the market. [Brief explanation of the drawing]

[0015] [Figure 1] In the first embodiment, a functional block diagram showing the configuration of the current estimation circuit is provided. [Figure 2]Circuit diagram showing the configuration of the voltage detection unit [Figure 3] Waveform diagram showing the voltages applied to each input terminal of the differential amplifier [Figure 4] Flowchart showing the main process [Figure 5] Flowchart showing the Id, Vth_shift detection process [Figure 6] Image diagram of the three-dimensional data map at Vgs = 20V stored in the memory unit [Figure 7] Image diagram of the three-dimensional data map at the same Vgs = 18V [Figure 8] Diagram showing the Ron-Vth_shift data when the junction temperature Tj = 25℃ at Vgs = 20V is applied [Figure 9] Diagram showing the Ron-Vth_shift data when the junction temperature Tj = 25℃ at Vgs = 18V is applied [Figure 10] Diagram showing the Id-Vth_shift data when the junction temperature Tj = 25℃ at Vgs = 20V is applied [Figure 11] Diagram showing the Id-Vth_shift data when the junction temperature Tj = 25℃ at Vgs = 18V is applied [Figure 12] Diagram showing the processing image corresponding to step S19 [Figure 13] Diagram showing the data table corresponding to FIG. 6 [Figure 14] Diagram showing the data table corresponding to FIG. 7 [Figure 15] Diagram showing the data table created in step S13 [Figure 16] Diagram showing the data table created in step S17 [Figure 17] Diagram showing the data table created in step S14 [Figure 18] Diagram showing the data table created in step S18 [Figure 19] Diagram explaining the process of step S19 [Figure 20]This figure shows a data table for when the gate drive voltage Vgs reference is set to five different values. [Figure 21] This diagram shows the on-resistance Ron for five different reference gate drive voltages Vgs, in 10°C increments within the junction temperature range Tj = -50°C to 200°C. [Figure 22] Figure 21 shows the data plotted in the figure. [Figure 23] In the second embodiment, a functional block diagram showing the configuration of the current estimation circuit is provided. [Figure 24] Flowchart showing the main process [Figure 25] Flowchart showing the ID detection process [Modes for carrying out the invention]

[0016] (First Embodiment) As shown in Figure 1, the current estimation circuit of this embodiment estimates the junction temperature Tj of a power transistor, such as a SiC (silicon carbide) MOSFET 1. The gate drive unit 2, which drives the gate of FET 1, receives a PWM signal generated by a PWM signal generation unit (not shown) and a Vgs command as inputs. The gate drive unit 2 is configured to change the voltage applied to the gate of FET 1 according to the input Vgs command.

[0017] The drain and source terminals of FET1, which are conductive terminals, are connected to the respective input terminals of the voltage detection unit 3. The temperature detection unit 4 detects the junction temperature Tj of FET1. The voltage detection unit 3 detects the on-voltage Vds_on of FET1, and these on-voltage Vds_on and junction temperature Tj are input to the current estimation unit 5.

[0018] Figure 2 shows a specific configuration example of the voltage detection unit 3. The input terminals INP and INM of the differential amplifier 11 are connected to the drain and source of the FET 1 via diodes 12P and 12M, respectively. In addition, current sources 13P and 13M are connected between the power supply VCC and the input terminals INP and INM, respectively. This prevents high voltages from being applied to the input terminals INP and INM, while allowing the on-voltage Vds_on to be detected by the differential amplifier 11, as shown in Figure 3.

[0019] The current estimation unit 5 estimates the drain current Id of the FET1 based on the input on-voltage Vds_on and junction temperature Tj, and the Ron-Tj-Vth_shift data stored in the storage unit 6, which is a non-volatile memory. The storage unit 6 stores Ron-Tj-Vth_shift data that has been acquired in advance as follows.

[0020] Substituting equations (2) and (3) into equation (1) yields equation (4).

[0021]

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[0022] A=Lch / (Wch×Cox), B=Ld / (q×Nd×Ad), C = Rsub + Rpackage, and these coefficients A to C do not depend on the junction temperature Tj.

[0023] The on-resistance Ron' when the threshold voltage Vth changes is given by equation (4). Equation (5) is obtained by considering the fluctuation amount Vth_shift.

[0024]

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[0025] As shown in equation (5), the on-resistance Ron' when a certain gate drive voltage Vgs is applied when a certain fluctuation Vth_shift occurs is equal to the on-resistance Ron' when a gate drive voltage Vgs is applied minus a certain fluctuation Vth_shift when the actual fluctuation Vth_shift = 0V.

[0026] Here, two voltages, for example 20V and 18V, are selected as reference voltages for the gate drive voltage. The step size of the shift voltage, Vth_shift, is set to 0.1V. The gate drive voltage Vgs of FET1 is then varied within a range of ±1V from the reference voltage, and the junction temperature Tj of FET1 is varied in 20°C increments between 0°C and 200°C, for example, to measure the on-resistance Ron of FET1 for each measurement parameter. The measurement results of the on-resistance Ron for each measurement parameter are stored in the storage unit 6 as Ron-Tj-Vth_shift data. The stored data shows the dependence of the on-resistance Ron on the junction temperature Tj for Vth_shift = 1V to -1V when a gate drive voltage Vgs of 20V and 18V is applied. The above constitutes the current estimation circuit 7.

[0027] Figures 6 and 7 correspond to gate drive voltages Vgs = 20V and 18V, respectively. Figures 13 and 14 are tables showing the 3D data map of the Ron-Tj-Vth_shift data, with each data value being a table.

[0028] Next, the operation of this embodiment will be explained. As shown in Figure 4, when power is supplied to the system and a command to start detecting the drain current Id is input to the current estimation unit 7 (S1; YES), the Id, Vth_shift detection process shown in Figure 5 is executed (S2). When a command to end the detection of the drain current Id is input (S3; YES), the process is terminated.

[0029] As shown in Figure 5, the gate drive unit 2 sets the gate drive voltage Vgs = 20V according to the PWM signal (S11). The voltage detection unit 3 and temperature detection unit 4 detect the on-voltage Vds_on and junction temperature Tj, respectively, during the period when FET1 is ON (S12). The temperature estimation unit 5 extracts the Tj-Vth_shift data corresponding to the detected junction temperature Tj from the Ron-Tj-Vth_shift data at Vgs = 20V obtained from the storage unit 6, and creates "Ron-Vth_shift data at Vgs = 20V" (S13). Then, using the created data and the detected on-voltage Vds_on, Calculate Id = Vds_on / Ron and create "Id-Vth_shift data when Vgs = 20V" (S14).

[0030] Next, the gate drive voltage Vgs is set to 18V (S15), and the same processing as in steps S12 to S14 is performed on that gate drive voltage Vgs (S16 to S18). Figures 8 and 9 show the Ron-Vth_shift data when the junction temperature Tj=25℃ when Vgs=20V is applied and when the junction temperature Tj=25℃ when Vgs=18V is applied, and Figures 15 and 16 show the data table created in steps S13 and S17. Also, Figures 10 and 11 show the Id-Vth_shift data when the junction temperature Tj=25℃ when Vgs=20V is applied and when the junction temperature Tj=25℃ when Vgs=18V is applied, and Figures 17 and 18 show the data table created in steps S14 and S18.

[0031] Then, from the data extracted in steps S14 and S18, two values ​​that bring the currents Id of both sides closest are selected and statistically processed (S19). "Statistical processing" refers to, for example, the average value of both sides, or, if three or more reference values ​​for the gate drive voltage Vgs are set, the median or mode of the three or more values ​​may also be used. Here, the average value is used. In Figure 19, the data from Figures 17 and 18 are arranged vertically, and the matching value is selected by setting Id = 99.1A for the case where Vth_shift = 0.6V, which minimizes the difference between the maximum and minimum currents Id. Figure 12 shows the corresponding processing image.

[0032] As another example, Figure 20 shows the case where the gate drive voltage Vgs reference is set to five different values, and data for 12V, 14V, and 16V are added. In this case, the case where the difference in current Id is smallest is still Vth_shift=0.6V, but the values ​​are different: Id=98.7A for Vgs=16V, Id=99.5A for Vgs=14V, and Id=99.7A for Vgs=12V. In this case, Average value: 99.2A Median: 99.1A Mode: 99.1A This is the result. While the computational load is lighter when using the median or mode, it is preferable to select the mean: 99.2A as the optimal value.

[0033] In step S19, the shift voltage Vth_shift is also obtained by statistically processing the two closest values, but this is not used in this embodiment. The shift voltage Vth_shift is used in the second embodiment.

[0034] Furthermore, Figures 21 and 22 show the on-resistance Ron for each gate drive voltage Vgs, in 10°C increments within the junction temperature range Tj = -50°C to 200°C, when five different reference gate drive voltage Vgs are set as shown in Figure 20. For example, if the rated temperature is 0°C to 150°C, it is desirable to select a voltage higher than 16V as the reference gate drive voltage Vgs, where the temperature characteristic of the on-resistance Ron shows a positive value within this temperature range. The same applies to the range of the rated current. This allows the number of reference gate drive voltages Vgs to be limited to those with on-resistance Ron values ​​that are more approximate, thereby reducing the capacity of the memory unit 6.

[0035] As described above, according to this embodiment, in the current estimation circuit 7, the voltage detection unit 3 detects the terminal voltage Vds_on applied between the drain and source during the period when the FET1 is ON, and the temperature detection unit 4 detects the junction temperature Tj of the FET1 at the same timing as the voltage detection unit 3 detects the voltage. The storage unit 6 stores data that has been acquired in advance, showing the relationship between the terminal voltage Vds_on, current Id, junction temperature Tj of the FET1, and the amount of change Vth_shift of the threshold voltage Vth of the FET1 for multiple gate drive voltages.

[0036] The current estimation unit 5 estimates the drain current Id, which is dependent on the fluctuation amount Vth_shift corresponding to each gate drive voltage and stored in the memory unit 6, according to the terminal voltage Vds_on and junction temperature Tj detected when the gate drive unit 2 drives the gate of FET1 with multiple gate drive voltages. The optimal value obtained by performing statistical processing on the current Id estimated for each gate drive voltage Vgs is then set as the final estimated current Id. This allows for highly accurate estimation of the current Id even if the threshold voltage Vth fluctuates while FET1 is in use.

[0037] Furthermore, the data stored in the memory unit 6 consists of characteristics of the on-resistance Ron, junction temperature Tj, and fluctuation amount Vth_shift corresponding to multiple gate drive voltages. The current estimation unit 5 estimates the current Id using the detected on-voltage Vds_on and the data stored in the memory unit 6. This reduces the number of parameters in the data stored in the memory unit 6 by one.

[0038] Furthermore, the on-resistance Ron data stored in the memory unit 6 is set to data obtained when the FET1 is operated by adding or subtracting a value including the fluctuation amount Vth_shift from each of the multiple reference gate drive voltages Vgs at each junction temperature Tj. This allows for highly accurate estimation of the current Id based on data previously obtained for the FET1 in a state without characteristic degradation before market use. In addition, since the multiple gate drive voltages are determined within a range where the temperature dependence of the on-resistance Ron is always positive within the rated temperature and rated current of the FET1, the number of reference gate drive voltages Vgs can be limited to those that more closely approximate the value of the on-resistance Ron, thereby reducing the capacity of the memory unit 6.

[0039] (Second Embodiment) In the following description, parts identical to those in the first embodiment are denoted by the same reference numerals and their descriptions are omitted, while the differences are described. As shown in Figure 23, the current estimation circuit 21 of the second embodiment includes a current estimation unit 22 and a storage unit 23, which replace the current estimation unit 5 and the storage unit 6.

[0040] Next, the operation of the second embodiment will be described. As shown in Figure 24, when steps S1 and S2 are executed, the current estimation unit 22 stores the shift voltage Vth_shift data obtained in step S2 in the storage unit 23 (S21). In addition, Ron-Tj data corresponding to the shift voltage Vth_shift stored in step S21 is created from the Ron-Tj-Vth_shift data at Vgs=20V obtained from the storage unit 23, and this is also stored in the storage unit 23 (S22). Then, after performing the Id detection process (S23), the process moves to step S3.

[0041] In the Id detection process shown in Figure 25, when the same process as in steps S11 to S12 is performed (S31 to S32), the current Id is calculated from the Ron-Tj data stored in step S22 and the on-voltage Vds_on and junction temperature Tj detected in step S32 (S33).

[0042] As described above, according to the second embodiment, the current estimation unit 22 stores the fluctuation amount Vth_shift estimated at a predetermined estimation timing in the storage unit 23, and drives the gate drive unit 2 with a constant voltage until the fluctuation amount Vth_shift estimated at the next estimation timing is stored in the storage unit 6. Then, the on-resistance Ron and junction temperature Tj data corresponding to the fluctuation amount Vth_shift for a constant voltage are read from the storage unit 6, and the current Id is estimated from the detected on-voltage Vds_on and junction temperature Tj and the read data. This makes it possible to estimate the current Id without increasing the losses generated in the FET1.

[0043] (Other embodiments) The configuration of the voltage detection unit is not limited to that shown in Figure 2. This disclosure is described in accordance with the embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the equivalence. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and concept of this disclosure. [Explanation of symbols]

[0044] In the diagram, 1 represents a SiC MOSFET, 2 a gate drive unit, 3 a voltage detection unit, 4 a temperature detection unit, 5 a current estimation unit, 6 a memory unit, and 7 a current estimation circuit.

Claims

1. A gate drive unit (2) that can change the voltage driving the gate of the power transistor (1), A voltage detection unit (3) detects the terminal voltage applied between the conductive terminals during the period when the power transistor is turned on, A temperature detection unit (4) detects the temperature of the power transistor at the same time as the voltage detection unit detects the voltage, A storage unit (6, 23) stores data that has been acquired in advance, showing the relationship between the terminal voltages, the current flowing between the conductive terminals, and the amount of fluctuation of the threshold voltage of the power transistor for multiple gate drive voltages, The system includes a current estimation unit (5, 22) that estimates the current flowing between the conductive terminals using the terminal voltage detected by the voltage detection unit, the temperature detected by the temperature detection unit, and the data stored in the storage unit. The current estimation unit estimates the current, which depends on the amount of fluctuation corresponding to each gate drive voltage, according to the terminal voltage detected by the voltage detection unit and the temperature detected by the temperature detection unit, when the gate drive unit drives the gate with the plurality of gate drive voltages. A power transistor current estimation circuit that uses the optimal value obtained by performing statistical processing on each current estimated for multiple gate drive voltages as the final estimated current.

2. The data stored in the memory unit is a characteristic of the on-resistance corresponding to the multiple gate drive voltages, the junction temperature of the power transistor, and the amount of variation. The current estimation circuit for a power transistor according to claim 1, wherein the current estimation unit estimates the current using the terminal voltage detected by the voltage detection unit, the temperature detected by the temperature detection unit, and the data stored in the storage unit.

3. The current estimation circuit for a power transistor according to claim 2, wherein the data stored in the memory unit is data obtained when the power transistor is operated by a gate drive voltage obtained by adding or subtracting a value including the fluctuation amount from each of a plurality of reference gate drive voltages for each junction temperature.

4. The current estimation unit (22) stores the amount of fluctuation estimated at a predetermined estimation timing in the storage unit (23). Until the amount of variation estimated at the next estimation timing is stored in the memory unit, the gate drive unit drives the gate with a constant voltage. The current estimation circuit for a power transistor according to claim 2, wherein on-resistance and junction temperature data corresponding to the amount of fluctuation for the constant voltage are read from the memory unit, and the current is estimated from the read data.

5. The current estimation circuit for a power transistor according to any one of claims 1 to 4, wherein the plurality of gate drive voltages are determined within a range in which the temperature dependence of the on-resistance is always positive within the rated temperature and rated current of the power transistor.

6. Data showing the relationship between the terminal voltages of the power transistors, the current flowing between the conductive terminals of the power transistors, and the fluctuation amount of the threshold voltage of the power transistors for multiple gate drive voltages is acquired and stored in advance. When the power transistor is driven by the aforementioned multiple gate drive voltages, the terminal voltage applied between the conductive terminals and the temperature of the power transistor are detected. A method for estimating the current of a power transistor, in which the detected terminal voltage, detected temperature, and pre-stored data are used to estimate the current, and the optimal value obtained by performing statistical processing on each current estimated for each of the multiple gate drive voltages is used as the final estimated current.

7. The data to be stored in advance includes the on-resistance corresponding to the multiple gate drive voltages, the junction temperature of the power transistor, and the characteristics of the amount of variation. A method for estimating the current of a power transistor according to claim 6, wherein the current is estimated using the detected terminal voltage and temperature and data stored in advance.

8. The method for estimating the current of a power transistor according to claim 7, wherein the data to be stored is data obtained when the power transistor is operated by a gate drive voltage obtained by adding or subtracting a value including the fluctuation amount from each of a plurality of reference gate drive voltages for each junction temperature.

9. The estimated amount of change at a predetermined estimated timing is stored, The power transistor is driven at a constant voltage until the amount of fluctuation estimated at the next estimation timing is newly stored. A method for estimating the current of a power transistor according to claim 7, comprising reading on-resistance and junction temperature data corresponding to the amount of fluctuation stored for the constant voltage, and estimating the current from the read data.

10. The method for estimating the current of a power transistor according to any one of claims 6 to 9, wherein the plurality of gate drive voltages are determined within a range in which the temperature dependence of the on-resistance is always positive within the rated temperature and rated current of the power transistor.

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