Display device

Abstract

To provide a display device capable of improving the display quality.SOLUTION: A display device according to one embodiment comprises a first sub-pixel and a second sub-pixel that are spaced apart from each other and emit light in different colors, a rib layer, and a first light-shielding film positioned above the rib layer. The rib layer has a first pixel opening overlapping the first sub-pixel and having a first edge parallel to a first direction, and a second pixel opening overlapping the second sub-pixel and having a second edge parallel to the first direction. The first light-shielding film has a first opening overlapping the first pixel opening and having a third edge parallel to the first direction, and a second opening overlapping the second pixel opening and having a fourth edge parallel to the first direction. A distance along a second direction intersecting the first direction between the second edge and the fourth edge is smaller than a distance along the second direction between the first edge and the third edge.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a display device. [Background technology]

[0002] In recent years, display devices that use organic light-emitting diodes (OLEDs) as display elements have come into practical use. Technology that can improve the display quality of these types of display devices is needed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-59809 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a display device capable of improving display quality. [Means for solving the problem]

[0005] A display device according to one embodiment includes first and second subpixels spaced apart from each other and emitting light of different colors, a rib layer, and a first light-shielding film located above the rib layer, wherein the rib layer has a first pixel opening having a first edge parallel to a first direction and overlapping the first subpixel, and a second pixel opening having a second edge parallel to the first direction and overlapping the second subpixel, the first light-shielding film has a first opening having a third edge parallel to the first direction and overlapping the first pixel opening, and a second opening having a fourth edge parallel to the first direction and overlapping the second pixel opening, and the distance between the second edge and the fourth edge along a second direction intersecting the first direction is smaller than the distance between the first edge and the third edge along the second direction. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device according to the first embodiment. [Figure 2] FIG. 2 is a schematic plan view showing an example of a layout of sub-pixels. [Figure 3] FIG. 3 is a schematic cross-sectional view of the display device taken along line III-III in FIG. [Figure 4] FIG. 4 is a diagram showing an example of a layer structure that can be applied to a display element. [Figure 5] FIG. 5 is a diagram showing an example of the internal emission spectrum of the light-emitting layer. [Figure 6] FIG. 6 is a schematic plan view showing elements for realizing functions related to a touch panel. [Figure 7] FIG. 7 is a schematic plan view showing an example of the layout of the light-shielding film. [Figure 8] FIG. 8 is a schematic plan view showing the pixel openings and the openings in the light-shielding film shown in FIG. [Figure 9] FIG. 9 is a schematic plan view showing an example of a layout of metal lines. [Figure 10] FIG. 10 is a schematic plan view showing the pixel openings and metal line openings shown in FIG. [Figure 11] FIG. 11 is a schematic plan view showing an example of pixel openings, openings in a light-shielding film, and openings in a metal line. [Figure 12] FIG. 12 is a schematic plan view showing another example of pixel openings, openings in a light-shielding film, and openings in metal lines. [Figure 13] FIG. 13 is a schematic plan view showing still another example of pixel openings, openings in a light-shielding film, and openings for metal lines. [Figure 14] FIG. 14 is a diagram showing an example of an emission spectrum. [Figure 15] FIG. 15 is a diagram showing the relationship between the angle and luminance of a sub-pixel. [Figure 16] FIG. 16 is a schematic cross-sectional view of a display device according to the second embodiment. [Figure 17]FIG. 17 is a schematic plan view showing an example of pixel openings and openings in a light-shielding film according to the second embodiment. [Figure 18] FIG. 18 is a schematic plan view showing another example of pixel openings and openings in a light-shielding film according to the second embodiment. [Figure 19] FIG. 19 is a schematic cross-sectional view of a display device according to the third embodiment. [Figure 20] FIG. 20 is a schematic plan view showing an example of pixel openings and metal line openings according to the third embodiment. [Figure 21] FIG. 21 is a schematic plan view showing another example of pixel openings and metal line openings according to the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Some embodiments will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment for the sake of clarity, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted as appropriate.

[0008] In the drawings, mutually orthogonal X-, Y-, and Z-axes are shown as necessary to facilitate understanding. The direction along the X-axis is referred to as the X-direction (first direction), the direction along the Y-axis is referred to as the Y-direction (second direction), and the direction along the Z-axis is referred to as the Z-direction. Viewing various elements parallel to the Z-direction is referred to as a planar view.

[0009] The display device according to each embodiment is an organic electroluminescence display device having an organic light-emitting diode (OLED) as a display element, and can be installed in various electronic devices such as televisions, personal computers, in-vehicle equipment, tablet terminals, smartphones, mobile phone terminals, and wearable terminals.

[0010] [First embodiment] 1 is a diagram showing an example of the configuration of a display device DSP according to the first embodiment. The display device DSP includes an insulating substrate 10. The substrate 10 has a display area DA for displaying an image and a peripheral area SA around the display area DA. The substrate 10 may be made of glass or a flexible resin film.

[0011] In this embodiment, the shape of the substrate 10 in plan view is rectangular. However, the shape of the substrate 10 in plan view is not limited to rectangular, and may be other shapes such as square, circular, or elliptical.

[0012] The display area DA includes a plurality of pixels PX arranged in a matrix in the X and Y directions. Each pixel PX includes a plurality of subpixels SP that emit different colors. In this embodiment, it is assumed that the pixel PX includes a subpixel SP1 (first subpixel) that emits blue light, a subpixel SP2 (second subpixel) that emits green light, and a subpixel SP3 (third subpixel) that emits red light. However, the pixel PX may include subpixels SP of other colors, such as white, in addition to or instead of the subpixels SP1, SP2, and SP3.

[0013] The subpixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a drive transistor 3, and a capacitor 4. The pixel switch 2 and the drive transistor 3 are switching elements formed of, for example, thin film transistors.

[0014] In the display area DA, there are arranged a plurality of scanning lines GL that supply scanning signals to the pixel circuits 1 of each subpixel SP, a plurality of signal lines SL that supply video signals to the pixel circuits 1 of each subpixel SP, and a plurality of power supply lines PL. In the example of Fig. 1, the scanning lines GL and the power supply lines PL extend in the X direction, and the signal lines SL extend in the Y direction.

[0015] The gate electrode of the pixel switch 2 is connected to the scanning line GL. The source electrode of the pixel switch 2 is connected to the signal line SL. The drain electrode of the pixel switch 2 is connected to the gate electrode of the drive transistor 3 and the capacitor 4. The source electrode of the drive transistor 3 is connected to the power line PL and the capacitor 4. The drain electrode of the drive transistor 3 is connected to the display element DE.

[0016] The configuration of the pixel circuit 1 is not limited to the example shown in the drawing. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0017] 2 is a schematic plan view showing an example of the layout of subpixels SP1, SP2, and SP3. The subpixels SP1, SP2, and SP3 are spaced apart from one another. In the example of FIG. 2, the subpixels SP2 and SP3 are aligned with the subpixel SP1 in the X direction. Furthermore, the subpixels SP2 and SP3 are aligned with the subpixel SP1 in the Y direction.

[0018] When the subpixels SP1, SP2, and SP3 are laid out in this manner, the display area DA is formed with columns in which the subpixels SP2 and SP3 are alternately arranged in the Y direction, and columns in which multiple subpixels SP1 are repeatedly arranged in the Y direction. These columns are arranged alternately in the X direction. Note that the layout of the subpixels SP1, SP2, and SP3 is not limited to the example in FIG. 2.

[0019] A rib layer 5 is disposed in the display area DA. The rib layer 5 has pixel openings AP1, AP2, and AP3 (first to third pixel openings) that overlap the subpixels SP1, SP2, and SP3, respectively. In the example of FIG. 2, the pixel opening AP1 is larger than the pixel openings AP2 and AP3, and the pixel openings AP2 and AP3 are equal. That is, the aperture ratio of the subpixel SP1 is larger than the aperture ratios of the subpixels SP2 and SP3, and the aperture ratio of the subpixel SP2 and the aperture ratio of the subpixel SP3 are equal. Note that the sizes of the pixel openings AP1, AP2, and AP3 are not limited to this example. For example, the pixel opening AP2 may be larger than the pixel opening AP3.

[0020] Subpixel SP1 includes a lower electrode LE1 and an organic layer OR1 that overlap with pixel aperture AP1. Subpixel SP2 includes a lower electrode LE2 and an organic layer OR2 that overlap with pixel aperture AP2. Subpixel SP3 includes a lower electrode LE3 and an organic layer OR3 that overlap with pixel aperture AP3. Each of subpixels SP1, SP2, and SP3 includes an upper electrode UE. The upper electrode UE is disposed in common to subpixels SP1, SP2, and SP3.

[0021] The portions of the lower electrode LE1, organic layer OR1, and upper electrode UE that overlap with the pixel aperture AP1 constitute the display element DE1 of the subpixel SP1. The portions of the lower electrode LE2, organic layer OR2, and upper electrode UE that overlap with the pixel aperture AP2 constitute the display element DE2 of the subpixel SP2. The portions of the lower electrode LE3, organic layer OR3, and upper electrode UE that overlap with the pixel aperture AP3 constitute the display element DE3 of the subpixel SP3. The display elements DE1, DE2, and DE3 may further include a cap layer, which will be described later. The rib layer 5 is formed in a lattice pattern in a planar view and surrounds each of the display elements DE1, DE2, and DE3.

[0022] 3 is a schematic cross-sectional view of the display device DSP taken along line III-III in FIG. 2. A circuit layer 11 is disposed on the above-described substrate 10. The circuit layer 11 includes various circuits and wirings such as the pixel circuits 1, scanning lines GL, signal lines SL, and power supply lines PL shown in FIG. 1. The circuit layer 11 is covered with an organic insulating layer 12. The organic insulating layer 12 functions as a planarizing film that flattens unevenness caused by the circuit layer 11.

[0023] The lower electrodes LE1, LE2, and LE3 are disposed on the organic insulating layer 12. The rib layer 5 is disposed on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by the rib layer 5. Although not shown in the cross section of FIG. 3, the lower electrodes LE1, LE2, and LE3 are each connected to the pixel circuit 1 of the circuit layer 11 (the drain electrode of the drive transistor 3 shown in FIG. 1) through a contact hole provided in the organic insulating layer 12.

[0024] The organic layer OR1 covers the lower electrode LE1 through a pixel opening AP1. The organic layer OR2 covers the lower electrode LE2 through a pixel opening AP2. The organic layer OR3 covers the lower electrode LE3 through a pixel opening AP3. In the example of FIG. 3, the organic layers OR1, OR2, and OR3 are spaced apart from one another, but functional layers such as a hole injection layer (hole injection layer HIL shown in FIG. 4) included in the organic layers OR1, OR2, and OR3, which will be described later, may be a common layer that is continuous across the organic layers OR1, OR2, and OR3.

[0025] The upper electrode UE covers the organic layers OR1, OR2, and OR3 and faces the lower electrodes LE1, LE2, and LE3. In the example of Fig. 3, the upper electrode UE is in contact with the rib layer 5 between the organic layers OR1 and OR2 and between the organic layers OR1 and OR3.

[0026] The display elements DE1, DE2, and DE3 each include a cap layer CP that covers the upper electrode UE. In the example of FIG. 3, the cap layer CP is disposed in common to the display elements DE1, DE2, and DE3. The cap layer CP serves as an optical adjustment layer that improves the extraction efficiency of light emitted from the organic layers OR1, OR2, and OR3. In one example, the cap layer CP is configured as a laminate in which multiple transparent layers with different refractive indices are stacked. The thickness of the cap layer CP may be different for each of the display elements DE1, DE2, and DE3, or may be constant. Furthermore, the cap layer CP does not have to be disposed in common to the display elements DE1, DE2, and DE3, and may be spaced apart for each of the display elements DE1, DE2, and DE3.

[0027] A sealing layer SE1 that covers the cap layer CP is disposed in the subpixels SP1, SP2, and SP3. The sealing layer SE1 is covered with a resin layer RS1. The resin layer RS1 is covered with a sealing layer SE2. The sealing layer SE2 is covered with a resin layer RS2.

[0028] 3, metal lines ML (second light-shielding film) that constitute the touch panel electrodes TP are disposed on the sealing layer SE2. The metal lines ML are located above the rib layer 5 and extend along the rib layer 5. The metal lines ML are covered with a resin layer RS2.

[0029] In the example of FIG. 3, color filters CF1, CF2, and CF3 are disposed on the resin layer RS2. The color filters CF1, CF2, and CF3 are located above the rib layer 5. The color filter CF1 is located above the display element DE1. The color filter CF1 is formed of a resin material that is colored blue, for example. The color filter CF2 is located above the display element DE2. The color filter CF2 is formed of a resin material that is colored green, for example. The color filter CF3 is located above the display element DE3. The color filter CF3 is formed of a resin material that is colored red, for example.

[0030] In the example of FIG. 3, a light-shielding film BM (first light-shielding film) is disposed on the resin layer RS2. The light-shielding film BM is located above the rib layer 5 and the metal lines ML, overlaps the rib layer 5 and the metal lines ML in the Z direction, and extends along the rib layer 5 and the metal lines ML. The light-shielding film BM is disposed farther away from the organic layers OR1, OR2, and OR3 in the Z direction than the metal lines ML. The light-shielding film BM is in contact with the color filters CF1, CF2, and CF3 and is covered by the color filters CF1, CF2, and CF3. The light-shielding film BM is formed of a resin material, for example. The resin layer RS2 is located between the light-shielding film BM and the metal lines ML and in contact with the light-shielding film BM and the metal lines ML. The metal lines ML are located between the rib layer 5 and the light-shielding film BM and overlap the rib layer 5 and the light-shielding film BM in the Z direction.

[0031] The color filters CF1, CF2, and CF3 are covered with a resin layer RS3. The resin layers RS1, RS2, and RS3 and the sealing layer SE2 are continuously provided over at least the entire display area DA shown in FIG. 1, and a portion of them extends into the peripheral area SA. The light-shielding film BM may be located between the color filters CF1, CF2, and CF3 and the resin layer RS3.

[0032] A cover member such as a polarizing plate, a protective film, or a cover glass may be further disposed above the resin layer RS3. Such a cover member may be adhered to the resin layer RS3 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0033] The organic insulating layer 12 is formed of an organic insulating material such as polyimide. The rib layer 5 and the sealing layers SE1 and SE2 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON). In one example, the rib layer 5 is formed of silicon oxynitride, and the sealing layers SE1 and SE2 are formed of silicon nitride. The rib layer 5 may be formed of an organic insulating material. The resin layers RS1, RS2, and RS3 are formed of a resin material (organic insulating material) such as epoxy resin or acrylic resin.

[0034] The lower electrodes LE1, LE2, and LE3 each include a reflective layer and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer. The reflective layer can be made of a metal material with excellent light reflectivity, such as silver. Each conductive oxide layer can be made of a transparent conductive oxide, such as ITO (indium tin oxide), IZO (indium zinc oxide), or IGZO (indium gallium zinc oxide).

[0035] The upper electrode UE is formed of a metal material such as an alloy of magnesium and silver (MgAg), etc. For example, the lower electrodes LE1, LE2, LE3 correspond to anodes, and the upper electrode UE corresponds to a cathode.

[0036] The metal wires ML are made of a metal material. In one example, the metal wires ML have a layered structure of titanium (Ti), aluminum (Al), and titanium. However, the metal wires ML may have a layered structure of other metal materials or a single-layer structure.

[0037] 4 is a diagram showing an example of a layer structure applicable to display elements DE1, DE2, and DE3. Here, the case where the lower electrodes LE1, LE2, and LE3 correspond to the anodes and the upper electrode UE corresponds to the cathode will be described as an example.

[0038] The organic layer OR1 includes a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, an emitting layer EM1, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL. The hole injection layer HIL is located on the lower electrode LE1, the hole transport layer HTL is located on the hole injection layer HIL, the electron blocking layer EBL is located on the hole transport layer HTL, the emitting layer EM1 is located on the electron blocking layer EBL, the hole blocking layer HBL is located on the emitting layer EM1, the electron transport layer ETL is located on the hole blocking layer HBL, the electron injection layer EIL is located on the electron transport layer ETL, and the upper electrode UE is located on the electron injection layer EIL. The emitting layer EM1 is formed of a material that emits light in the blue wavelength region.

[0039] In addition to the above-mentioned functional layers, the organic layer OR1 may include other functional layers such as a carrier generation layer as needed, or at least one of the above-mentioned functional layers may be omitted.

[0040] Display element DE2 is configured similarly to display element DE1, except that the organic layer OR2 between the lower electrode LE2 and the upper electrode UE includes an emitting layer EM2 instead of the emitting layer EM1. Display element DE3 is configured similarly to display element DE1, except that the organic layer OR3 between the lower electrode LE3 and the upper electrode UE3 includes an emitting layer EM3 instead of the emitting layer EM1. The emitting layer EM2 is formed of a material that emits light in the green wavelength range. The emitting layer EM3 is formed of a material that emits light in the red wavelength range.

[0041] Functional layers such as the hole injection layer HIL, hole transport layer HTL, electron blocking layer EBL, hole blocking layer HBL, electron transport layer ETL, and electron injection layer EIL may be a common layer that is continuous across the organic layers OR1, OR2, and OR3, or may be separated from one another. Furthermore, the thicknesses of the hole injection layer HIL, hole transport layer HTL, electron blocking layer EBL, hole blocking layer HBL, electron transport layer ETL, and electron injection layer EIL may be different for each of the display elements DE1, DE2, and DE3, or may be constant.

[0042] FIG. 5 is a diagram showing an example of the internal emission spectra of the emitting layers EM1, EM2, and EM3. In the graph shown in FIG. 5, the horizontal axis represents wavelength λ, and the vertical axis represents spectral intensity S. Curves fa1, fa2, and fa3 represent the internal emission spectra of the emitting layers EM1, EM2, and EM3, respectively. The internal emission spectra of the emitting layers EM1, EM2, and EM3 depend on the emitting materials of the emitting layers EM1, EM2, and EM3, respectively. Furthermore, the internal emission spectra of the emitting layers EM1, EM2, and EM3 depend on the PL (Photo Luminescence) spectra of the emitting materials of the emitting layers EM1, EM2, and EM3, respectively.

[0043] Compare the full width at half maximum (FWHM) FW1, FW2, and FW3 of the internal emission spectra of the light-emitting layers EM1, EM2, and EM3, respectively. Here, the full width at half maximum corresponds to the width of the wavelength at which the spectral intensity of the internal emission spectrum becomes half of the maximum value.

[0044] In the example shown in FIG. 5, the spectral intensity s1 is the maximum value of the spectral intensity S of the internal emission spectra of the light-emitting layers EM1, EM2, and EM3, respectively. In FIG. 5, although the spectral intensities s1 of the light-emitting layers EM1, EM2, and EM3 are equal, they may be different from each other. The spectral intensity s2 is a value half of the spectral intensity s1 (s2 = s1 / 2).

[0045] The wavelengths of the internal emission spectrum of the light-emitting layer EM1 at the spectral intensity s2 are wavelengths λ1 and λ2. Therefore, the full width at half maximum FW1 of the internal emission spectrum of the light-emitting layer EM1 corresponds to the difference between wavelength λ2 and wavelength λ1 (FW1 = λ2 - λ1).

[0046] The wavelengths of the internal emission spectrum of the light-emitting layer EM2 at the spectral intensity s2 are wavelengths λ3 and λ4. Therefore, the full width at half maximum FW2 of the internal emission spectrum of the light-emitting layer EM2 corresponds to the difference between wavelength λ4 and wavelength λ3 (FW2 = λ4 - λ3).

[0047] The wavelengths of the internal emission spectrum of the light-emitting layer EM3 at the spectral intensity s2 are wavelengths λ5 and λ6. Therefore, the full width at half maximum FW3 of the internal emission spectrum of the light-emitting layer EM3 corresponds to the difference between wavelength λ6 and wavelength λ5 (FW3 = λ6 - λ5).

[0048] In the example shown in FIG. 5, the full width at half maximum FW1 is smaller than the full widths at half maximum FW2 and FW3 (FW1 < FW2, FW3). Also, the full width at half maximum FW3 is larger than the full width at half maximum FW1 and smaller than the full width at half maximum FW2 (FW1 < FW3 < FW2). Note that the magnitudes of the full widths at half maximum FW1, FW2, and FW3 are not limited to this example. For example, the full widths at half maximum FW2 and FW3 may be equal to each other.

[0049] 6 is a schematic plan view showing elements for realizing functions related to a touch panel. Substrate 10 has ends 10a, 10b, 10c, and 10d. Ends 10a and 10b extend parallel to the Y direction. Ends 10c and 10d extend parallel to the X direction.

[0050] The display device DSP includes a terminal unit T arranged in the peripheral area SA. The terminal unit T is arranged between the display area DA and the edge 10c. In the example of Fig. 6, a flexible circuit board FPC is connected to the terminal unit T.

[0051] A plurality of touch panel electrodes TP are arranged in the display area DA. In the example of Fig. 6, 24 touch panel electrodes TP1 to TP24 (6 rows x 4 columns) are arranged in a matrix. The touch panel electrodes TP1 to TP12 are located in the left half of the display area DA, and the touch panel electrodes TP13 to TP24 are located in the right half of the display area DA. Note that the number and arrangement of the touch panel electrodes TP are not limited to this example.

[0052] The peripheral area SA is provided with a wiring area LA for connecting the touch panel electrodes TP and the terminal portions T. The wiring area LA includes the same number of lead wires LL (LL1 to LL24) as the number of touch panel electrodes TP, and surrounds the display area DA.

[0053] Lead wires LL1 to LL12 connected to the touch panel electrodes TP1 to TP12, respectively, are arranged to pass through the area between the display area DA and the edge 10a. Lead wires LL13 to LL24 connected to the touch panel electrodes TP13 to TP24, respectively, are arranged to pass through the area between the display area DA and the edge 10b.

[0054] The wiring area LA and the touch panel electrodes TP1 to TP24 are connected by relay wirings RL (RL1 to RL24). Specifically, the touch panel electrodes TP1 to TP12 are connected to the lead wires LL1 to LL12 via the relay wirings RL1 to RL12, respectively, and the touch panel electrodes TP13 to TP24 are connected to the lead wires LL13 to LL24 via the relay wirings RL13 to RL24, respectively.

[0055] The lead wires LL1 to LL12 are connected to the terminal portion T via a connection portion 81. The lead wires LL13 to LL24 are connected to the terminal portion T via a connection portion .

[0056] For example, the touch panel electrodes TP1 to TP12, lead wires LL1 to LL12, relay wiring RL1 to RL12 and connection portion 81, and the touch panel electrodes TP13 to TP24, lead wires LL13 to LL24, relay wiring RL13 to RL24 and connection portion 82 have an axisymmetric shape with respect to a center line parallel to the Y direction of the display device DSP.

[0057] One end of a flexible circuit board FPC is connected to the terminal portion T via, for example, a conductive adhesive. The other end of the flexible circuit board FPC is connected to the board of an electronic device on which the display device DSP is mounted. Video signals and power required for image display are supplied to the display device DSP through the flexible circuit board FPC.

[0058] The display device DSP further includes a display controller CT1 that performs control related to image display and a detection controller CT2 that performs control related to touch detection. The display controller CT1 and the detection controller CT2 are configured, for example, by ICs and mounted on a flexible circuit board FPC. The display controller CT1 and the detection controller CT2 may be mounted on separate flexible circuit boards, and these flexible circuit boards may be connected to the terminal units T, respectively.

[0059] In this embodiment, it is assumed that the touch panel electrodes TP1 to TP24 constitute a capacitive touch panel. For example, the detection controller CT2 identifies the position where an object, such as a user's finger, has touched or approached the display area DA based on a change in the capacitance of the touch panel electrodes TP1 to TP24 that occurs when the object touches or approaches the display area DA. This type of method is called a self-capacitance method.

[0060] However, a mutual capacitance method can also be used to detect objects. In this case, in addition to touch panel electrodes TP1 to TP24, drive electrodes are arranged in the display area DA. When an object touches or approaches the display area DA, the electric field between the touch panel electrodes TP1 to TP24 and the drive electrodes is affected by the object, causing a change in capacitance between the touch panel electrodes TP1 to TP24 and the drive electrodes. Based on this change in capacitance, the detection controller CT2 identifies the position where the object has touched or approached.

[0061] 7 is a schematic plan view showing an example of the layout of the light-shielding film BM. The light-shielding film BM is formed in a lattice pattern and surrounds each of the sub-pixels SP1, SP2, and SP3. The light-shielding film BM has openings A1, A2, and A3 (first to third openings) that overlap with the pixel openings AP1, AP2, and AP3, respectively. In the display area DA, a column in which the openings A2 and A3 are alternately arranged in the Y direction and a column in which a plurality of openings A1 are repeatedly arranged in the Y direction are formed. These columns are arranged alternately in the X direction.

[0062] 7, opening A1 is larger than openings A2 and A3, and opening A3 is larger than opening A2. The periphery of opening A1 does not overlap with pixel opening AP1 in plan view. Similarly, the periphery of opening A2 does not overlap with pixel opening AP2 in plan view. Furthermore, the periphery of opening A3 does not overlap with pixel opening AP3 in plan view.

[0063] 8 is a schematic plan view showing pixel openings AP1, AP2, and AP3 and openings A1, A2, and A3 of the light-shielding film BM shown in FIG. As shown, the periphery of pixel opening AP1 is defined as edges E1a, E1b, E1c, and E1d (first edge), the periphery of pixel opening AP2 is defined as edges E2a, E2b, E2c, and E2d (second edge), and the periphery of pixel opening AP3 is defined as edges E3a, E3b, E3c, and E3d (fifth edge). The edges E1a, E1b, E2a, E2b, E3a, and E3b are parallel to the X direction. The edges E1c, E1d, E2c, E2d, E3c, and E3d are parallel to the Y direction.

[0064] Similarly, as shown, the periphery of opening A1 is defined as edges A1a, A1b, A1c, and A1d (third edge), the periphery of opening A2 is defined as edges A2a, A2b, A2c, and A2d (fourth edge), and the periphery of opening A3 is defined as edges A3a, A3b, A3c, and A3d (sixth edge). Edges A1a, A1b, A2a, A2b, A3a, and A3b are parallel to the X direction. Edges A1c, A1d, A2c, A2d, A3c, and A3d are parallel to the Y direction.

[0065] Here, the distance along the Y direction between edge E1a of pixel aperture AP1 and edge A1a of aperture A1 is defined as distance L1a. Similarly, the distance along the Y direction between edges E1b and A1b is defined as distance L1b, the distance along the X direction between edges E1c and A1c is defined as distance L1c, and the distance along the X direction between edges E1d and A1d is defined as distance L1d.

[0066] Furthermore, the distance along the Y direction between edge E2a of pixel aperture AP2 and edge A2a of aperture A2 is defined as distance L2a. Similarly, the distance along the Y direction between edge E2b and edge A2b is defined as distance L2b, the distance along the X direction between edge E2c and edge A2c is defined as distance L2c, and the distance along the X direction between edge E2d and edge A2d is defined as distance L2d.

[0067] Furthermore, a distance along the Y direction between the edge E3a of the pixel aperture AP3 and the edge A3a of the aperture A3 is defined as the distance L3a. Similarly, a distance along the Y direction between the edge E3b and the edge A3b is defined as the distance L3b, a distance along the X direction between the edge E3c and the edge A3c is defined as the distance L3c, and a distance along the X direction between the edge E3d and the edge A3d is defined as the distance L3d.

[0068] In the example shown in FIG. 8, the distances L1a, L1b, L1c, L1d are equal to each other (L1a = L1b = L1c = L1d). Similarly, the distances L2a, L2b, L2c, L2d are equal to each other (L2a = L2b = L2c = L2d), and the distances L3a, L3b, L3c, L3d are equal to each other (L3a = L3b = L3c = L3d). Note that the relationships of the above-mentioned distances L1a to L1d, L2a to L2d, L3a to L3d are not limited to this example.

[0069] In the example shown in FIG. 8, the distances L1a, L3a are equal to each other (L1a = L3a). Similarly, the distances L1b, L3b are equal to each other (L1b = L3b), the distances L1c, L3c are equal to each other (L1c = L3c), and the distances L1d, L3d are equal to each other (L1d = L3d). Note that the relationships of the above-mentioned distances L1a to L1d, L3a to L3d are not limited to this example.

[0070] The distance L2a is smaller than the distances L1a, L3a (L2a < L1a, L3a). Similarly, the distance L2b is smaller than the distances L1b, L3b (L2b < L1b, L3b), the distance L2c is smaller than the distances L1c, L3c (L2c < L1c, L3c), and the distance L2d is smaller than the distances L1d, L3d (L2d < L1d, L3d).

[0071] 9 is a schematic plan view showing an example of the layout of the metal lines ML. The metal lines ML are formed in a lattice pattern and surround each of the subpixels SP1, SP2, and SP3. The metal lines ML have openings A4, A5, and A6 (fourth to sixth openings) that overlap with the pixel openings AP1, AP2, and AP3, respectively. In the display area DA, a column in which the openings A5 and A6 are alternately arranged in the Y direction and a column in which a plurality of openings A4 are repeatedly arranged in the Y direction are formed. These columns are arranged alternately in the X direction.

[0072] 9, opening A4 is larger than openings A5 and A6, and opening A5 is larger than opening A6. The periphery of opening A4 does not overlap with pixel opening AP1 in plan view. Similarly, the periphery of opening A5 does not overlap with pixel opening AP2 in plan view. Furthermore, the periphery of opening A6 does not overlap with pixel opening AP3 in plan view.

[0073] 10 is a schematic plan view showing pixel openings AP1, AP2, and AP3 and metal line ML openings A4, A5, and A6 shown in FIG. As shown, the periphery of opening A4 is defined as edges A4a, A4b, A4c, and A4d (seventh edge), the periphery of opening A5 is defined as edges A5a, A5b, A5c, and A5d (eighth edge), and the periphery of opening A6 is defined as edges A6a, A6b, A6c, and A6d (ninth edge). The edges A4a, A4b, A5a, A5b, A6a, and A6b are parallel to the X direction. The edges A4c, A4d, A5c, A5d, A6c, and A6d are parallel to the Y direction.

[0074] Here, the distance along the Y direction between edge E1a of pixel aperture AP1 and edge A4a of aperture A4 is defined as distance L4a. Similarly, the distance along the Y direction between edges E1b and A4b is defined as distance L4b, the distance along the X direction between edges E1c and A4c is defined as distance L4c, and the distance along the X direction between edges E1d and A4d is defined as distance L4d.

[0075] Also, a distance along the Y direction between the edge E2a of the pixel aperture AP2 and the edge A5a of the aperture A5 is defined as the distance L5a. Similarly, a distance along the Y direction between the edge E2b and the edge A5b is defined as the distance L5b, a distance along the X direction between the edge E2c and the edge A5c is defined as the distance L5c, and a distance along the X direction between the edge E2d and the edge A5d is defined as the distance L5d.

[0076] Furthermore, a distance along the Y direction between the edge E3a of the pixel aperture AP3 and the edge A6a of the aperture A6 is defined as the distance L6a. Similarly, a distance along the Y direction between the edge E3b and the edge A6b is defined as the distance L6b, a distance along the X direction between the edge E3c and the edge A6c is defined as the distance L6c, and a distance along the X direction between the edge E3d and the edge A6d is defined as the distance L6d.

[0077] In the example shown in FIG. 10, the distances L4a, L4b, L4c, L4d are equal to each other (L4a = L4b = L4c = L4d). Similarly, the distances L5a, L5b, L5c, L5d are equal to each other (L5a = L5b = L5c = L5d), and the distances L6a, L6b, L6c, L6d are equal to each other (L6a = L6b = L6c = L6d). Note that the relationships of the above-mentioned distances L4a~L4d, L5a~L5d, L6a~L6d are not limited to this example.

[0078] In the example shown in FIG. 10, the distances L4a, L5a are equal to each other (L4a = L5a). Similarly, the distances L4b, L5b are equal to each other (L4b = L5b), the distances L4c, L5c are equal to each other (L4c = L5c), and the distances L4d, L5d are equal to each other (L4d = L5d). Note that the relationships of the above-mentioned distances L4a~L4d, L5a~L5d are not limited to this example.

[0079] The distance L6a is smaller than the distances L4a, L5a (L6a < L4a, L5a). Similarly, the distance L6b is smaller than the distances L4b, L5b (L6b < L4b, L5b), the distance L6c is smaller than the distances L4c, L5c (L6c < L4c, L5c), and the distance L6d is smaller than the distances L4d, L5d (L6d < L4d, L5d).

[0080] FIG. 11 is a schematic plan view showing an example of a pixel aperture AP1, an aperture A1 of a light-shielding film BM, and an aperture A4 of a metal wire ML. The pixel aperture AP1 and the apertures A1 and A4 overlap each other in a plan view.

[0081] In the example shown in FIG. 11, an edge A1a overlaps an edge A4a in a plan view. Similarly, an edge A1b overlaps an edge A4b in a plan view, an edge A1c overlaps an edge A4c in a plan view, and an edge A1d overlaps an edge A4d in a plan view. In other words, the area of the aperture A1 is equal to the area of the aperture A4, and the periphery of the aperture A1 coincides with the periphery of the aperture A4 in a plan view. Therefore, the distances L1a and L4a are equal to each other (L1a = L4a), the distances L1b and L4b are equal to each other (L1b = L4b), the distances L1c and L4c are equal to each other (L1c = L4c), and the distances L1d and L4d are equal to each other (L1d = L4d).

[0082] FIG. 12 is a schematic plan view showing an example of a pixel aperture AP2, an aperture A2 of a light-shielding film BM, and an aperture A5 of a metal wire ML. The pixel aperture AP2 and the apertures A2 and A5 overlap each other in a plan view.

[0083] In the example shown in FIG. 12, an edge A2a is located between an edge E2a and an edge A5a in the Y direction. Similarly, an edge A2b is located between an edge E2b and an edge A5b in the Y direction, an edge A2c is located between an edge E2c and an edge A5c in the X direction, and an edge A2d is located between an edge E2d and an edge A5d in the X direction. In other words, the area of the aperture A5 is larger than the area of the aperture A2, and the edges A5a to A5d of the aperture A5 overlap the light-shielding film BM in a plan view. Therefore, the distance L2a is smaller than the distance L5a (L2a < L5a), the distance L2b is smaller than the distance L5b (L2b < L5b), the distance L2c is smaller than the distance L5c (L2c < L5c), and the distance L2d is smaller than the distance L5d (L2d < L5d).

[0084] 13 is a schematic plan view showing an example of the pixel aperture AP3, the aperture A3 in the light-shielding film BM, and the aperture A6 in the metal line ML. The pixel aperture AP3 and the apertures A3 and A6 overlap each other in plan view.

[0085] 13, edge A6a is located between edges E3a and A3a in the Y direction. Similarly, edge A6b is located between edges E3b and A3b in the Y direction, edge A6c is located between edges E3c and A3c in the X direction, and edge A6d is located between edges E3d and A3d in the X direction. In other words, the area of ​​opening A3 is larger than the area of ​​opening A6, and edges A3a-A3d of opening A3 overlap with metal wire ML in a plan view. Therefore, distance L3a is larger than distance L6a (L3a>L6a), distance L3b is larger than distance L6b (L3b>L6b), distance L3c is larger than distance L6c (L3c>L6c), and distance L3d is larger than distance L6d (L3d>L6).

[0086] FIG. 14 is a diagram showing an example of an emission spectrum. In the graph shown in FIG. 14, the horizontal axis represents wavelength λ, and the vertical axis represents spectral intensity S. As an example, FIG. 14 shows the spectrum of blue light emitted by the emitting layer EM1 shown in FIG. 4. The emission spectrum includes an internal emission spectrum ES1 and an interference spectrum ES2. The internal emission spectrum ES1 depends on the emitting material of the emitting layer EM1. The interference spectrum ES2 depends on the refractive index and film thickness of the functional layer, cap layer CP, etc. The interference spectrum ES21 shown in FIG. 14 corresponds to the interference spectrum ES2 when the display device DSP is viewed from the front. Furthermore, the interference spectrum ES22 corresponds to the interference spectrum ES2 when the display device DSP is viewed at an angle.

[0087] In the example shown in FIG. 14, the maximum spectral intensity s4 of the interference spectrum ES21 is equal to the maximum spectral intensity s3 of the internal emission spectrum ES1 (s4 = s3). Also, the wavelength λ8 at the spectral intensity s4 of the interference spectrum ES21 is equal to the wavelength λ7 at the spectral intensity s3 of the internal emission spectrum ES1 (λ8 = λ7). On the other hand, the maximum spectral intensity s5 of the interference spectrum ES22 is smaller than the maximum spectral intensity s4 of the interference spectrum ES21 (s5 < s4). Also, the wavelength λ9 at the spectral intensity S5 of the interference spectrum ES22 is smaller than the wavelength λ8 at the spectral intensity s4 of the interference spectrum ES21 (λ9 < λ8). That is, when the viewing angle of the display device DSP is tilted, the wavelength λ of the interference spectrum ES2 changes and the spectral intensity S decreases.

[0088] The luminance of the light emitted from the display device DSP is affected by the wavelength λ and the spectral intensity S of the internal emission spectrum ES1 and the interference spectrum ES②. That is, as the viewing angle of the display device DSP is tilted, the wavelength λ of the interference spectrum ES2 changes and the spectral intensity S decreases as described above, so the luminance decreases. On the other hand, for example, by shifting the interference spectrum ES21 in the long wavelength direction (right direction in the figure), it is possible to suppress the decrease in luminance even when the angle changes. However, since the wavelength λ7 of the internal emission spectrum ES1 and the wavelength λ8 of the interference spectrum ES21 are shifted, there may occur a problem that the luminance when viewed from the front decreases.

[0089] In the above, the emission spectrum of the light emitting layer EM1 has been described, but the same applies to the emission spectra of the light emitting layers EM2 and EM3. However, as shown in FIG. 5, the internal emission spectra of the light emitting layers EM1, EM2, and EM3 are different from each other. Therefore, the amount of change in the wavelength λ and the spectral intensity S of the interference spectrum ES2 when the display device DSP is tilted and the luminance of the light emitted from the display device DSP differ depending on the light emitting layers EM1, EM2, and EM3.

[0090] FIG. 15 is a diagram showing the relationship between the angle θ and the luminance BR of the sub-pixels SP1, SP2, and SP3. In the graph shown in FIG. 15, the horizontal axis represents the angle θ with respect to the axis parallel to the Z direction, and the vertical axis represents the luminance BR when viewing the display device DSP from that angle. Curves fb1, fb2, and fb3 show the luminance at each angle of the sub-pixels SP1, SP2, and SP3, respectively. The angle θ at the origin represents 0°. As shown in FIG. 15, the luminances of the sub-pixels SP1, SP2, and SP3 when the angle θ is 0° are approximately equal.

[0091] As described above using FIG. 5, the full width at half maximum FW3 of the internal emission spectrum of the light-emitting layer EM3 is larger than the full width at half maximum FW1 of the internal emission spectrum of the light-emitting layer EM1 and smaller than the full width at half maximum FW2 of the internal emission spectrum of the light-emitting layer EM2 (FW1 < FW3 < FW2). Also, as the angle θ increases, the maximum spectral intensity s5 and the wavelength λ9 of the interference spectrum ES22 shown in FIG. 14 decrease. Therefore, as the angle θ increases, the luminance BR of the sub-pixel SP1 decreases more significantly than the luminances BR of the sub-pixels SP2 and SP3, and the luminance BR of the sub-pixel SP2 decreases more gently than the luminances of the sub-pixels SP1 and SP3. That is, when comparing the luminances BR of the sub-pixels SP1, SP2, and SP3 at any angle θ other than 0°, the luminance BR of the sub-pixel SP3 is larger than the luminance BR of the sub-pixel SP1 and smaller than the luminance BR of the sub-pixel SP2 (luminance BR of sub-pixel SP1 < luminance BR of sub-pixel SP3 < luminance BR of sub-pixel SP2). Therefore, as the viewing angle of the display device DSP is tilted, there may arise a problem that the color displayed on the display device DSP changes.

[0092] Next, the effects in this embodiment will be described. In this embodiment, the distances L2a-L2d between the edges E2a-E2d of the pixel aperture AP2 overlapping the subpixel SP2 and the edges A2a-A2d of the aperture A2 in the light-shielding film BM are smaller than the distances L1a-L1d between the edges E1a-E1d of the pixel aperture AP1 overlapping the subpixel SP1 and the edges A1a-A1d of the aperture A1 in the light-shielding film BM. Furthermore, the distances L6a-L6d between the edges E3a-E3d of the pixel aperture AP3 overlapping the subpixel SP3 and the edges A6a-A6d of the aperture A6 in the metal line ML are smaller than the distances L4a-L4d between the edges E1a-E1d of the pixel aperture AP1 overlapping the subpixel SP1 and the edges A4a-A4d of the aperture A4 in the metal line ML. With this configuration, some of the light emitted from the subpixel SP2 is blocked by the light-shielding film BM, resulting in a decrease in the luminance BR of the subpixel SP2. Similarly, a portion of the light emitted from the subpixel SP3 is blocked by the metal line ML, and therefore the luminance BR of the subpixel SP3 decreases. On the other hand, the light emitted from the subpixel SP1 is less blocked by the light-shielding film BM than the light emitted from the subpixels SP2 and SP3. In the graph shown in FIG. 15, the luminance BR of each of the subpixels SP2 and SP3 decreases so that the curves fb2 and fb3 approach the curve fb1. This reduces the difference in luminance BR of each of the subpixels SP1, SP2, and SP3 at an arbitrary angle θ. In other words, the color displayed on the display device DSP is less likely to change even when the angle θ is changed. This makes it possible to improve the display quality of the display device DSP.

[0093] Furthermore, for example, if the luminance of the subpixel SP2 is adjusted to match the luminance of the subpixel SP1 using only the metal wire ML, the edges A5a to A5d of the opening A5 may overlap the pixel opening AP2 in a plan view. In such a case, part of the light emitted from the subpixel SP2 may be blocked by the metal wire ML, which may reduce the luminance when the display device DSP is viewed from the front.

[0094] In this embodiment, the light-shielding film BM is disposed farther away from the light-emitting layers EM1, EM2, and EM3 in the Z direction than the metal lines ML. The farther the light-shielding film BM and the metal lines ML are from the light-emitting layers EM1, EM2, and EM3 in the Z direction, the greater the amount of light blocked by the light-shielding film BM and the metal lines ML from the light-emitting layers EM1, EM2, and EM3. That is, when the required amount of light blocking is small and the edges A4a to A6d of the openings A4, A5, and A6 of the metal lines ML do not overlap the pixel openings AP1, AP2, and AP3 in a plan view, the metal lines ML closer to the light-emitting layers EM1, EM2, and EM3 provide light blocking. On the other hand, when the required amount of light blocking is large and the edges A4a to A6d of the openings A4, A5, and A6 of the metal lines ML overlap the pixel openings AP1, AP2, and AP3 in a plan view, the light is blocked by the light-shielding film BM farther from the light-emitting layers EM1, EM2, and EM3. This makes it possible to ensure a sufficient amount of light blocking without reducing the brightness when the display device DSP is viewed from the front.

[0095] In this embodiment, the light-shielding film BM and the metal wire ML are used as a light-shielding film for blocking light emitted from the light-emitting layers EM1, EM2, and EM3, but other light-shielding elements may be used as the light-shielding film. Also, the light-shielding film may be composed of three or more light-shielding elements, or may be composed of one light-shielding element as in the second and third embodiments described later.

[0096] In the above description, if the X direction corresponds to the first direction and the Y direction corresponds to the second direction, edges E1a and E1b correspond to the first edge, edges E2a and E2b correspond to the second edge, edges A1a and A1b correspond to the third edge, edges A2a and A2b correspond to the fourth edge, edges E3a and E3b correspond to the fifth edge, edges A3a and A3b correspond to the sixth edge, edges A4a and A4b correspond to the seventh edge, edges A5a and A5b correspond to the eighth edge, and edges A6a and A6b correspond to the ninth edge.

[0097] Also, when the X direction corresponds to the second direction and the Y direction corresponds to the first direction, the edges E1c, E1d correspond to the first edge, the edges E2c, E2d correspond to the second edge, the edges A1c, A1d correspond to the third edge, the edges A2c, A2d correspond to the fourth edge, the edges E3c, E3d correspond to the fifth edge, the edges A3c, A3d correspond to the sixth edge, the edges A4c, A4d correspond to the seventh edge, the edges A5c, A5d correspond to the eighth edge, and the edges A6c, A6d correspond to the ninth edge.

[0098] Furthermore, when the sub-pixel SP1 that emits light in blue corresponds to the first sub-pixel, the sub-pixel SP2 that emits light in green or the sub-pixel SP3 that emits light in red corresponds to the second sub-pixel. Further, when the sub-pixel SP3 that emits light in red corresponds to the first sub-pixel, the sub-pixel SP2 that emits light in green corresponds to the second sub-pixel.

[0099] [Second Embodiment] Next, the second embodiment will be described. Note that the configurations not particularly mentioned are the same as those in the first embodiment.

[0100] ​​​​​​​​​As shown in FIGS. 16 and 17, even if there is only one layer functioning as a light-shielding film, the same effects as those described above can be obtained.

[0103] 18 is a schematic plan view showing another example of pixel openings AP1, AP2, and AP3 and openings A1, A2, and A3 in light-shielding film BM according to the second embodiment. In the example shown in FIG. 18, distances L2a and L3a are equal to each other (L2a=L3a). Similarly, distances L2b and L3b are equal to each other (L2b=L3b), distances L2c and L3c are equal to each other (L2c=L3c), and distances L2d and L3d are equal to each other (L2d=L3d).

[0104] 18, when the full width at half maximum FW2 of the emitting layer EM2 and the full width at half maximum FW3 of the emitting layer EM3 shown in FIG. 5 are equal, the luminance of the subpixels SP2 and SP3 can be made substantially equal. Therefore, the same effect as that described above can be obtained with the configuration shown in FIG.

[0105] [Third embodiment] Next, a third embodiment will be described. Note that configurations not specifically mentioned are the same as those of the first and second embodiments.

[0106] Fig. 19 is a schematic cross-sectional view of a display device DSP according to a third embodiment. The display device DSP according to the third embodiment shown in Fig. 19 differs from the display device DSP according to the first embodiment in that it does not include the color filters CF1, CF2, and CF3, the light-shielding film BM, and the resin layer RS3 shown in Fig. 3. For example, a polarizing plate may be adhered onto the resin layer RS2 via an adhesive layer such as OCA.

[0107] FIG. 20 is a schematic plan view showing an example of pixel openings AP1, AP2, AP3 and openings A4, A5, A6 of metal lines ML according to the third embodiment. In the example shown in FIG. 20, distance L6a is smaller than distance L4a, and distance L5a is smaller than distance L6a (L5a < L6a < L4a). Similarly, distance L6b is smaller than distance L4b, and distance L5b is smaller than distance L6b (L5b < L6b < L4b). Also, distance L6c is smaller than distance L4c, and distance L5c is smaller than distance L6c (L5c < L6c < L4c). Further, distance L6d is smaller than distance L4d, and distance L5d is smaller than distance L6d (L5d < L6d < L4d).

[0108] FIG. 21 is a schematic plan view showing another example of pixel openings AP1, AP2, AP3 and openings A4, A5, A6 of metal lines ML according to the third embodiment. In the example shown in FIG. 21, distances L5a and L6a are equal to each other (L5a = L6a). Similarly, distances L5b and L\(6b\) are equal to each other (L5b = L6b), distances L\(5c\) and L6c are equal to each other (L5c = L6c), and distances L\(5d\) and L6d are equal to each other (L5d = L6d). [[ID=X6]]

[0109] Even with the configurations as shown in FIGS. 19, 20, and 21, effects similar to the above-described effects can be obtained.

[0110] As described above, based on the display device described as an embodiment of the present invention, all display devices that those skilled in the art can appropriately design and modify and implement also belong to the scope of the present invention as long as they include the gist of the present invention.

[0111] Within the scope of the idea of the present invention, those skilled in the art can conceive of various modifications, and those modifications are also understood to belong to the scope of the present invention. For example, for the above-described embodiments, those in which those skilled in the art appropriately add, delete, or modify components, or add, omit, or change conditions of processes also belong to the scope of the present invention as long as they have the gist of the present invention.

[0112] Furthermore, with regard to other effects brought about by the aspects described in the above embodiments, those that are clear from the description in this specification or that can be appropriately thought of by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0113] DSP...display device, DA...display area, SA...peripheral area, PX...pixel, 5...rib layer, SP1, SP2, SP3...subpixel, LE1, LE2, LE3...lower electrode, OR1, OR2, OR3...organic layer, UE...upper electrode, AP1, AP2, AP3...pixel opening, BM...light-shielding film, ML...metal line.

Claims

1. a first sub-pixel and a second sub-pixel spaced apart from each other and emitting light of different colors; a rib layer having a first pixel opening having a first edge parallel to a first direction and overlapping the first sub-pixel, and a second pixel opening having a second edge parallel to the first direction and overlapping the second sub-pixel; a first light-shielding film located above the rib layer, the first light-shielding film having a first opening having a third edge parallel to the first direction and overlapping the first pixel opening, and a second opening having a fourth edge parallel to the first direction and overlapping the second pixel opening; Equipped with a distance between the second edge and the fourth edge along a second direction intersecting the first direction is smaller than a distance between the first edge and the third edge along the second direction; Display device.

2. the half width of the internal emission spectrum of the light-emitting layer of the first subpixel is smaller than the half width of the internal emission spectrum of the light-emitting layer of the second subpixel; The display device according to claim 1 .

3. the first subpixel emits blue light; the second subpixel emits green light; The display device according to claim 1 .

4. the first subpixel emits blue light; the second subpixel emits red light; The display device according to claim 1 .

5. the first subpixel emits red light; the second subpixel emits green light; The display device according to claim 1 .

6. Further comprising a color filter positioned above the rib layer, the first light-shielding film is in contact with the color filter; The display device according to claim 1 .

7. the first light-shielding film is made of metal; The display device according to claim 1 .

8. a third subpixel that is spaced apart from the first subpixel and the second subpixel and emits light of a color different from that of the first subpixel and the second subpixel; the rib layer further includes a third pixel opening having a fifth edge parallel to the first direction and overlapping the third sub-pixel; the first light-shielding film further includes a third opening that has a sixth edge parallel to the first direction and overlaps with the third pixel opening; a distance between the fifth edge and the sixth edge along the second direction is smaller than a distance between the first edge and the third edge along the second direction; The display device according to claim 1 .

9. a distance between the fifth edge and the sixth edge along the second direction is equal to or greater than a distance between the second edge and the fourth edge along the second direction; The display device according to claim 8 .

10. a second light-shielding film positioned between the rib layer and the first light-shielding film and overlapping the rib layer and the first light-shielding film; The display device according to claim 1 .

11. Further comprising a color filter positioned above the rib layer, the first light-shielding film is in contact with the color filter; The display device according to claim 10.

12. the second light-shielding film is made of metal; The display device according to claim 10 or 11.

13. The light-shielding film further includes a resin layer located between the first light-shielding film and the second light-shielding film. The display device according to claim 10.

14. the resin layer is in contact with the first light-shielding film and the second light-shielding film; The display device according to claim 13.

15. a third subpixel that is spaced apart from the first subpixel and the second subpixel and emits light of a color different from that of the first subpixel and the second subpixel; the rib layer further includes a third pixel opening having a fifth edge parallel to the first direction and overlapping the third sub-pixel; the first light-shielding film further includes a third opening that has a sixth edge parallel to the first direction and overlaps with the third pixel opening; The second light-shielding film is a fourth opening having a seventh edge parallel to the first direction and overlapping the first pixel opening and the first opening; a fifth opening having an eighth edge parallel to the first direction and overlapping the second pixel opening and the second opening; a sixth opening having a ninth edge parallel to the first direction and overlapping the third pixel opening and the third opening; and a distance between the fifth edge and the ninth edge along the second direction is smaller than a distance between the first edge and the seventh edge along the second direction; The display device according to claim 10.

16. a distance between the fifth edge and the sixth edge along the second direction is greater than a distance between the fifth edge and the ninth edge along the second direction; The display device according to claim 15.

17. a distance between the second edge and the fourth edge along the second direction is smaller than a distance between the fifth edge and the sixth edge along the second direction; The display device according to claim 15.

18. the half width of the internal emission spectrum of the light-emitting layer of the first subpixel is smaller than the half width of the internal emission spectrum of the light-emitting layer of the second subpixel and the half width of the internal emission spectrum of the light-emitting layer of the third subpixel; The display device according to claim 8 or 15.

19. the half width of the internal emission spectrum of the light-emitting layer of the third subpixel is larger than the half width of the internal emission spectrum of the light-emitting layer of the first subpixel and smaller than the half width of the internal emission spectrum of the light-emitting layer of the second subpixel; The display device according to claim 8 or 15.

20. the first subpixel emits blue light; the second subpixel emits green light; the third subpixel emits red light; The display device according to claim 8 or 15.

Images