Semiconductor device

Abstract

To provide a semiconductor device capable of suppressing the occurrence of insulation defects.SOLUTION: A semiconductor device includes a substrate 50, 60, a semiconductor element 40 having main electrodes on both sides, and an encapsulating resin body 30. The substrate 50, 60 has a patterned front surface metal body 52, 62 disposed on the front surface of an insulating base material, and a back surface metal body disposed on the back surface of the insulating base material. The back surface metal body has an exposed surface that is exposed from the encapsulating resin body 30. The front surface metal body 52, 62 has a plurality of corners 54, 64 in plan view. Some of the corners 54, 64 are intentionally cut out.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] TECHNICAL FIELD The disclosure herein relates to semiconductor devices. [Background technology]

[0002] Patent Document 1 discloses a semiconductor module including a substrate having metal bodies on both sides, a semiconductor element disposed on the substrate, and an encapsulating resin body that encapsulates the substrate and the semiconductor element. The contents of the prior art document are incorporated by reference as an explanation of the technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2023-10131 Summary of the Invention [Problem to be solved by the invention]

[0004] In Patent Document 1, a laminated substrate (substrate) and a housing are arranged on one surface of a base. A semiconductor chip (semiconductor element) is arranged on a conductor pattern (front surface metal body) of the substrate. The housing is arranged to surround the substrate and the semiconductor element. The substrate is sealed with a sealing resin body (sealing body) that fills the space inside the housing, with the metal layer (rear surface metal body) in contact with the base. In this configuration, where a substrate on which a semiconductor element is mounted is sealed with resin, there is a risk of insulation failure due to voids. In the above-mentioned perspectives and other perspectives not mentioned, further improvements in semiconductor devices are required.

[0005] One object of the present disclosure is to provide a semiconductor device that can suppress the occurrence of insulation defects. [Means for solving the problem]

[0006] A semiconductor device according to one aspect of the disclosure includes: a substrate (50, 60) having an insulating base material (51, 61), a patterned front surface metal body (52, 62) disposed on the front surface of the insulating base material, and a rear surface metal body (53, 63) disposed on the rear surface of the insulating base material; a semiconductor element (40) having a first main electrode (41) and a second main electrode (42) provided on the opposite surface of the first main electrode in the plate thickness direction, the semiconductor element (40) being disposed on a substrate and electrically connected to a surface metal body; a sealing resin body (30) that seals the substrate and the semiconductor element; the rear surface metal body has an exposed surface (53a, 63a) exposed from the sealing resin body and thermally connected to the cooler; The surface metal body has a plurality of corners (54, 55, 64) when viewed in a plan view in the plate thickness direction, At least a portion of the corners are cut away.

[0007] According to the disclosed semiconductor device, at least some of the corners of the front surface metal body are intentionally cut out. The cutouts make it difficult for voids to remain in the corners, for example, when forming the sealing resin body. By cutting out the corners of the front surface metal body away from the back surface metal body, even if voids occur in the corners, it is possible to prevent, for example, the front surface metal body and the back surface metal body from being connected by the voids, which would make it impossible to ensure insulation. As a result, it is possible to provide a semiconductor device that can prevent insulation failure caused by voids.

[0008] Another aspect of the disclosed semiconductor device includes: a substrate (50, 60) having an insulating base material (51, 61), a patterned front surface metal body (52, 62) disposed on the front surface of the insulating base material, and a rear surface metal body (53, 63) disposed on the rear surface of the insulating base material; a semiconductor element (40) having a first main electrode (41) and a second main electrode (42) provided on the opposite surface of the first main electrode in the plate thickness direction, the semiconductor element (40) being disposed on a substrate and electrically connected to a surface metal body; a sealing resin body (30) that seals the substrate and the semiconductor element; the rear surface metal body has an exposed surface (53a, 63a) exposed from the sealing resin body and thermally connected to the cooler; The sealing resin body has a gate mark (32), The substrate has four sides that form a rectangular outline in a plan view in the thickness direction, including a first side (515, 615), a second side (517, 617), and a third side (514, 614) and a fourth side (516, 616) that are located farther from the gate mark than the first side and the second side, The insulation width, which is the width from the end of the surface metal body to the end of the insulating base material, is wider on the third and fourth sides than on the first and second sides.

[0009] Even if air is entrained near the gate, it is pushed by the flow of resin, and voids tend to occur in the encapsulating resin body at positions away from the gate mark. According to the disclosed semiconductor device, the insulation width is wider on the third and fourth sides, which are located away from the gate mark, than on the first and second sides, which are closer to the gate mark. By widening the insulation width, the front surface metal body is spaced apart from the back surface metal body, so even if voids occur adjacent to the ends of the front surface metal body, it is possible to prevent, for example, the front surface metal body and the back surface metal body from being connected by a void, which would make it impossible to ensure insulation. As a result, a semiconductor device can be provided that can prevent insulation defects caused by voids.

[0010] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims and in this section are intended to exemplify correspondences with the following embodiments and are not intended to limit the technical scope. The objectives, features, and advantages disclosed in this specification will become more apparent by reference to the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a diagram showing a power conversion circuit and a drive system to which the semiconductor device according to the first embodiment is applied; [Figure 2]FIG. 1 is a plan view showing a semiconductor device. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. [Figure 4] FIG. 2 is a plan view showing a portion covered with a sealing resin body. [Figure 5] FIG. 2 is a plan view showing the substrate on the drain electrode side. [Figure 6] FIG. 2 is a plan view showing the substrate on the source electrode side. [Figure 7] FIG. 2 is a cross-sectional view showing a power conversion module. [Figure 8] FIG. 10 is a diagram showing a removed area on the substrate on the drain electrode side. [Figure 9] FIG. 10 is a diagram showing a removal area on the substrate on the source electrode side. [Figure 10] FIG. 10 is a diagram showing the final joining portion during molding of the sealing resin body. [Figure 11] FIG. [Figure 12] FIG. 10 is a plan view showing a substrate on the drain electrode side in a semiconductor device according to a second embodiment. [Figure 13] FIG. 2 is a plan view showing the substrate on the source electrode side. [Figure 14] FIG. [Figure 15] FIG. 10 is a plan view showing a substrate on the drain electrode side in a semiconductor device according to a third embodiment. [Figure 16] FIG. 2 is a plan view showing the substrate on the source electrode side. [Figure 17] FIG. 10 is a diagram showing a power conversion circuit and a drive system to which the semiconductor device according to the fourth embodiment is applied. [Figure 18] FIG. 1 is a plan view showing a semiconductor device. [Figure 19] FIG. 2 is a plan view showing a portion covered with a sealing resin body. [Figure 20] FIG. 2 is a plan view showing the substrate on the drain electrode side. [Figure 21] FIG. 2 is a plan view showing the substrate on the source electrode side. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, several embodiments will be described with reference to the drawings. Note that in each embodiment, corresponding components are designated by the same reference numerals, and redundant description may be omitted. When only a portion of the configuration is described in each embodiment, the configuration of another embodiment previously described may be applied to the remaining portion of the configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations of several embodiments may be partially combined together even if not explicitly stated, provided that there is no particular problem with the combination.

[0013] (First embodiment) The semiconductor device of this embodiment is applied to, for example, a mobile object using a rotating electric machine as a drive source. The mobile object may be, for example, an electric vehicle such as a battery electric vehicle (BEV), a hybrid electric vehicle (HEV), or a plug-in hybrid electric vehicle (PHEV), an electric flying object such as a drone or an electric vertical take-off and landing aircraft (eVTOL), a ship, a construction machine, or an agricultural machine. An example of application to a vehicle will be described below.

[0014] <Vehicle drive system> As shown in FIG. 1, a vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power conversion circuit 4.

[0015] The DC power supply 2 is a DC voltage source made up of a rechargeable secondary battery. The secondary battery may be, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, that is, an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion circuit 4 converts power between the DC power supply 2 and the motor generator 3.

[0016] <Power conversion circuit> 1 shows an example of a power conversion circuit 4. The power conversion circuit 4 shown in FIG.

[0017] The smoothing capacitor 6 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 6 is connected to a P line 7, which is a power supply line on the high potential side, and an N line 8, which is a power supply line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 6 is connected to the P line 7 between the DC power supply 2 and the inverter 5. The negative electrode of the smoothing capacitor 6 is connected to the N line 8 between the DC power supply 2 and the inverter 5. The smoothing capacitor 6 is connected in parallel to the DC power supply 2.

[0018] Inverter 5 is a DC-AC conversion circuit. In accordance with switching control by the control circuit, inverter 5 converts DC voltage into three-phase AC voltage and outputs it to motor generator 3. This drives motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, inverter 5 converts the three-phase AC voltage generated by motor generator 3 in response to rotational force from the wheels into DC voltage in accordance with switching control by the control circuit and outputs it to P line 7. In this way, inverter 5 performs bidirectional power conversion between DC power supply 2 and motor generator 3.

[0019] The inverter 5 is configured with upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side.

[0020] The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. The inverter 5 has six arms. Each arm is configured with a switching element. The number of switching elements constituting each arm is not particularly limited. There may be one or more. When there are more than one switching elements, the multiple switching elements connected in parallel to each other are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0021] The illustrated switching element is an n-channel MOSFET 11. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the upper arm 9H, a drain terminal of the MOSFET 11 is connected to a P line 7. In the lower arm 9L, a source terminal of the MOSFET 11 is connected to an N line 8. The source terminal of the MOSFET 11 in the upper arm 9H and the drain terminal of the MOSFET 11 in the lower arm 9L are connected to each other.

[0022] A freewheeling diode 12 is connected in antiparallel to each MOSFET 11. The diode 12 may be a parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode. The anode terminal of the diode 12 is connected to the source terminal of the corresponding MOSFET 11, and the cathode terminal is connected to the drain terminal.

[0023] The switching element is not limited to the MOSFET 11. For example, an IGBT may be used. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. In the case of an IGBT, a freewheeling diode is also connected in anti-parallel.

[0024] The power conversion circuit 4 may include a converter. The converter is a DC-DC conversion circuit configured to be able to convert a DC voltage into, for example, a DC voltage of a different value. The converter is provided between the DC power supply 2 and the smoothing capacitor 6. The converter is configured to include, for example, a reactor and the above-mentioned upper and lower arm circuits 9. This configuration allows for voltage step-up and step-down. The power conversion circuit 4 may also include a filter capacitor that removes power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0025] The power conversion circuit 4 may include a snubber circuit. The snubber circuit is connected in parallel to the upper and lower arm circuits 9. The snubber circuit reduces the inductance of the upper and lower arm circuits 9. In other words, the snubber circuit absorbs a transient high voltage, a so-called switching surge, that occurs when the switching elements (MOSFETs 11) that make up the upper and lower arm circuits 9 are switched. This enables the inverter 5 to perform high-speed switching.

[0026] The power conversion circuit 4 may include a drive circuit for a switching element constituting the inverter 5 or the like. The drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding MOSFET 11, i.e., turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0027] The power conversion circuit 4 may include a control circuit for the switching element. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0028] The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 6. The control circuit outputs, for example, a PWM signal as a drive command. The control circuit is configured with, for example, a processor and a memory. PWM is an abbreviation for Pulse Width Modulation.

[0029] <Semiconductor device> FIG. 2 is a plan view showing an example of a semiconductor device according to this embodiment. FIG. 3 is a cross-sectional view showing an example of a semiconductor device. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a plan view showing a portion covered with a sealing resin body. In FIG. 4, the sealing resin body is indicated by a dashed line, and the substrate and conductor pattern on the source electrode side are indicated by dashed lines. For convenience, bonding wires are omitted from FIG. 4. FIG. 5 is a plan view showing the substrate on the drain electrode side. FIG. 6 is a plan view showing the substrate on the source electrode side. In FIGS. 5 and 6, a surface metal body is shown. The sealing resin body is also indicated by a dashed line.

[0030] In the following, the thickness direction of a semiconductor element (semiconductor substrate) is referred to as the Z direction. The direction perpendicular to the Z direction is referred to as the Y direction. The direction perpendicular to both the Z direction and the Y direction is referred to as the X direction. The X direction, Y direction, and Z direction are mutually perpendicular. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. The planar view from the Z direction is sometimes simply referred to as the planar view.

[0031] The semiconductor device 20 constitutes the upper and lower arm circuits 9, i.e., the inverter 5. The illustrated semiconductor device 20 constitutes one of the upper and lower arm circuits 9, i.e., one phase of the upper and lower arm circuit 9. The semiconductor device 20 may be referred to as a semiconductor module, a power module, or the like. As shown in FIGS. 2 to 6 , the semiconductor device 20 includes a sealing resin body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, a joint portion 80, and an external connection terminal 90.

[0032] The encapsulating resin body 30 encapsulates some of the other elements constituting the semiconductor device 20. The remaining parts of the other elements are exposed to the outside of the encapsulating resin body 30. The encapsulating resin body 30 is formed using a resin material. An example of the resin material is epoxy resin. For example, in a configuration in which the semiconductor device 20 includes a housing, the encapsulating resin body 30 may be a potting resin filled in the storage space of the housing.

[0033] The illustrated sealing resin body 30 is molded by a transfer molding method using resin as the material. Such a sealing resin body 30 may be referred to as a molded resin, a resin molded body, or the like. The sealing resin body 30 has a generally rectangular planar shape. The sealing resin body 30 has, as its outer surface, one surface 30a, a back surface 30b, and side surfaces 30c, 30d, 30e, and 30f. The back surface 30b is the surface opposite to the one surface 30a in the Z direction. The one surface 30a and the back surface 30b are, for example, flat surfaces. The side surface 30d is the surface opposite to the side surface 30c in the Y direction. The side surface 30f is the surface opposite to the side surface 30e in the X direction.

[0034] The sealing resin body 30 has recesses 31 provided between adjacent external connection terminals 90. The recesses 31 are provided on the side surfaces. The recesses 31 are provided to ensure a creepage distance between adjacent external connection terminals 90. The recesses 31 penetrate the sealing resin body 30, for example, in the Z direction. The illustrated recesses 31 are provided on the side surfaces 30c and 30d. The recesses 31 are open not only on the side surfaces but also on the one surface 30a and the back surface 30b. On the side surface 30c, one recess 31 is provided between the P terminal 91 and the N terminal 92, and the other is provided between the N terminal 92 and the O terminal 93. On the side surface 30d, one recess 31 is provided between the signal terminal 94 on the upper arm side and the suspension lead 95, and the other is provided between the signal terminal 94 on the lower arm side and the suspension lead 95.

[0035] The sealing resin body 30 has a gate mark 32. The gate mark 32 is a mark left by a gate when the sealing resin body 30 is molded. The gate mark 32 is recessed relative to the surrounding area of ​​the sealing resin body 30. The illustrated gate mark 32 is provided on the side surface 30f. The gate mark 32 is provided at a position closer to the side surface 30d than to the side surface 30c in the Y direction.

[0036] The semiconductor element 40 is formed by forming a switching element on a semiconductor substrate made of silicon (Si) or a wide bandgap semiconductor with a wider bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 40 is sometimes called a power element or a semiconductor chip.

[0037] The illustrated semiconductor element 40 has the above-described n-channel MOSFET 11 formed on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical structure so that a main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), i.e., in the Z direction. The semiconductor element 40 has main electrodes of a switching element on both sides in its thickness direction, i.e., in the Z direction. Specifically, the main electrodes include a drain electrode 41 on one side and a source electrode 42 on the back side.

[0038] When the diode 12 is a parasitic diode, the source electrode 42 also serves as the anode electrode, and the drain electrode 41 also serves as the cathode electrode. The diode 12 may be configured on a chip separate from the MOSFET 11. The drain electrode 41 is a main electrode on the high potential side, and the source electrode 42 is a main electrode on the low potential side. The drain electrode 41 corresponds to the first main electrode, and the source electrode corresponds to the second main electrode.

[0039] The semiconductor element 40 has a generally rectangular shape in plan view. The semiconductor element 40 has a pad 43 formed on the back surface at a position different from the source electrode 42. The source electrode 42 and the pad 43 are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 41 is formed on almost the entire surface. The source electrode 42 is formed on a portion of the back surface of the semiconductor element 40. The pad 43 is an electrode for signals. The pad 43 is formed at the end opposite the region where the source electrode 42 is formed in the Y direction. The pad 43 includes a pad for a gate electrode.

[0040] The semiconductor device 20 includes a plurality of semiconductor elements 40. The plurality of semiconductor elements 40 may include a plurality of types of semiconductor elements with different specifications. As in the illustrated semiconductor device 20, all of the semiconductor elements 40 may have a common configuration. The plurality of semiconductor elements 40 include a semiconductor element 40H that constitutes an upper arm 9H and a semiconductor element 40L that constitutes a lower arm 9L. The semiconductor element 40H is sometimes referred to as an upper arm element, and the semiconductor element 40L is sometimes referred to as a lower arm element. The semiconductor elements 40H and 40L are aligned in the X direction. The semiconductor elements 40H and 40L are disposed at approximately the same position as each other in the Z direction. The drain electrodes 41 of the semiconductor elements 40H and 40L face the substrate 50. The source electrodes 42 of the semiconductor elements 40H and 40L face the substrate 60.

[0041] The substrates 50, 60 are arranged in the Z direction to sandwich the plurality of semiconductor elements 40. The substrates 50, 60 are arranged so that at least portions thereof face each other in the Z direction. The substrates 50, 60 contain all of the plurality of semiconductor elements 40 in a plan view.

[0042] The substrate 50 is disposed on the drain electrode 41 side. The substrate 60 is disposed on the source electrode 42 side. The substrate 50 is electrically connected to the drain electrode 41 and provides a wiring function. The substrate 60 is electrically connected to the source electrode 42 and provides a wiring function. The substrates 50 and 60 provide a heat dissipation function for dissipating heat generated by the semiconductor element 40.

[0043] The substrate 50 includes an insulating base material 51, a front surface metal body 52, and a back surface metal body 53. The substrate 60 includes an insulating base material 61, a front surface metal body 62, and a back surface metal body 63. The insulating base materials 51, 61 may be made of resin or ceramic. The insulating base material 51 electrically separates the front surface metal body 52 and the back surface metal body 53. The insulating base material 61 electrically separates the front surface metal body 62 and the back surface metal body 63.

[0044] The front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 are provided as metal plates or metal foils. The front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 are made of a metal with good electrical and thermal conductivity, such as Cu or Al. The front surface metal bodies 52, 62 are patterned. The front surface metal bodies 52, 62 may have a plating film of Ni, Au, or the like on the metal surface. The front surface metal body 52 has a P wiring 521 and a relay wiring 522. The P wiring 521 and the relay wiring 522 are electrically separated by a predetermined gap. The gap is filled with a sealing resin body 30.

[0045] The P wiring 521 is connected to the P terminal 91 and the drain electrode 41 of the semiconductor element 40H. The P wiring 521 electrically connects the P terminal 91 and the drain electrode 41 of the semiconductor element 40H. The P wiring 521 has a rectangular shape with its longitudinal direction extending in the Y direction in a plan view. The relay wiring 522 is connected to the drain electrode 41 of the semiconductor element 40L, the joint portion 80, and the O terminal 93. The relay wiring 522 electrically connects the O terminal 93 and the drain electrode 41 of the semiconductor element 40L. The relay wiring 522 has a substantially L-shape in plan view. The relay wiring 522 has a substantially rectangular base portion in plan view and an extension portion connected to the base portion.

[0046] The P wiring 521 and the relay wiring 522 are arranged side by side in the X direction. The relay wiring 522 is arranged so that its extended portion is adjacent to the P wiring 521. The relay wiring 522 is arranged so that its base is closer to the side surface 30d than to the side surface 30d. The drain electrode 41 of the semiconductor element 40L is connected to the relay wiring 522. The joint portion 80 is connected to the extended portion of the relay wiring 522. The P terminal 91 is connected to the P wiring 521 near one end in the Y direction. The O terminal 93 is connected to the relay wiring 522 near one end in the Y direction. The P terminal 91 and the O terminal 93 are arranged on the same side in the Y direction with respect to the semiconductor element 40.

[0047] The surface metal body 62 has an N wiring 621 and a relay wiring 622. The N wiring 621 and the relay wiring 622 are electrically separated by a predetermined gap. This gap is filled with a sealing resin body 30. The N wiring 621 is connected to the N terminal 92 and the source electrode 42 of the semiconductor element 40L. The N wiring 621 electrically connects the N terminal 92 and the source electrode 42 of the semiconductor element 40L. The relay wiring 622 is connected to the source electrode 42 of the semiconductor element 40H and the joint 80. The relay wiring 622 electrically connects the source electrode 42 of the semiconductor element 40H and the drain electrode 41 of the semiconductor element 40L via the joint 80.

[0048] The N wiring 621 has a substantially L-shape in plan view. The relay wiring 622 also has a substantially L-shape in plan view. The N wiring 621 and the relay wiring 622 each have a substantially rectangular base in plan view and an extended portion connected to the base. The N wiring 621 and the relay wiring 622 are arranged to interdigitate with each other. The N wiring 621 and the relay wiring 622 are arranged so that the extended portion of the N wiring 621 is located on the side face 30c side and the extended portion of the relay wiring 622 is located on the side face 30d side. The base of the N wiring 621 and the base of the relay wiring 622 are aligned in the X direction. The extended portion of the N wiring 621 and the extended portion of the relay wiring 622 are aligned in the Y direction.

[0049] The source electrode 42 of the semiconductor element 40L is connected to the base of the N wiring 621. The N terminal 92 is connected to the extended portion of the N wiring 621. The source electrode 42 of the semiconductor element 40H is connected to the base of the relay wiring 622. The joint portion 80 is connected to the extended portion of the relay wiring 622.

[0050] The back surface metal bodies 53, 63 are electrically separated from the front surface metal bodies 52, 62 by the insulating base materials 51, 61. The illustrated back surface metal bodies 53, 63 are so-called solid conductors arranged over almost the entire back surface of the insulating base materials 51, 61. The back surface metal body 53 is exposed from one surface 30a of the sealing resin body 30, and the back surface metal body 63 is exposed from the back surface 30b. The exposed surface 53a of the back surface metal body 53 is approximately flush with the one surface 30a. The exposed surface 63a of the back surface metal body 63 is approximately flush with the back surface 30b.

[0051] The conductive spacer 70 functions as a spacer to ensure a predetermined distance between the semiconductor element 40 and the substrate 60. The conductive spacer 70 ensures a height required for electrically connecting the corresponding signal terminal 94 to the pad 43 of the semiconductor element 40, for example. The conductive spacer 70 is located midway along the electrical and thermal conduction path between the source electrode 42 of the semiconductor element 40 and the substrate 60, providing wiring and heat dissipation functions. The conductive spacer 70 includes a metal material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface. The conductive spacer 70 is a generally rectangular columnar body having approximately the same size as the source electrode 42 in a planar view.

[0052] The conductive spacers 70 may also be referred to as terminals, terminal blocks, metal blocks, etc. The semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor elements 40. Specifically, the semiconductor device 20 includes two conductive spacers 70. One of the conductive spacers 70 electrically connects the source electrode 42 of the semiconductor element 40H to the relay wiring 622. The other conductive spacer 70 electrically connects the source electrode 42 of the semiconductor element 40L to the N wiring 621.

[0053] The joint 80 electrically connects the relay wirings 522, 622. That is, the joint 80 electrically connects the upper arm 9H and the lower arm 9L. The joint 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the X direction. The joint 80 is disposed in the overlapping region of the extended portions of the relay wirings 522, 622 in a plan view. The illustrated joint 80 is a metal columnar body provided separately from the surface metal bodies 52, 62. The joint 80 extends in the Z direction. One end of the joint 80 is connected to the relay wiring 522, and the other end is connected to the relay wiring 622.

[0054] The joint portion 80 may be integrally connected to the surface metal bodies 52, 62. In other words, the joint portion 80 may be provided integrally with the surface metal bodies 52, 62 as part of the substrates 50, 60. A part of the joint portion 80 may be provided as part of the substrate 50, and another part of the joint portion 80 may be provided as part of the substrate 60.

[0055] The external connection terminals 90 are terminals for electrically connecting the semiconductor device 20 to an external device. The external connection terminals 90 are formed using a metal material with good conductivity, such as Cu. The external connection terminals 90 are, for example, a plate material. The external connection terminals 90 are sometimes referred to as leads. The external connection terminals 90 include a P terminal 91, an N terminal 92, an O terminal 93, and a signal terminal 94. The P terminal 91, the N terminal 92, and the O terminal 93 are sometimes referred to as main terminals because they are electrically connected to main electrodes of the semiconductor element 40. The P terminal 91 and the N terminal 92 are sometimes referred to as power supply terminals.

[0056] P terminal 91 is connected to the vicinity of one end of P wiring 521 in the Y direction. P terminal 91 extends approximately in the Y direction in a plan view. A portion of P terminal 91, including the connection portion with P wiring 521, is covered by sealing resin body 30, and the remaining portion protrudes from sealing resin body 30. P terminal 91 protrudes outside sealing resin body 30 from the vicinity of the center in the Z direction on side surface 30c.

[0057] The N terminal 92 is connected to an extending portion of the N wiring 621. The N terminal 92 extends generally in the Y direction in a plan view. A portion of the N terminal 92, including the connection portion with the N wiring 621, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30. The N terminal 92 protrudes from the sealing resin body 30 near the center of the side surface 30c in the Z direction to the outside of the sealing resin body 30.

[0058] The O terminal 93 is connected near one end in the Y direction at the base of the relay wiring 522. The O terminal 93 extends approximately in the Y direction in a plan view. A portion of the O terminal 93, including the connection portion with the relay wiring 522, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30. The O terminal 93 protrudes outside the sealing resin body 30 from near the center in the Z direction on the side surface 30c.

[0059] The P terminal 91, N terminal 92, and O terminal 93 are arranged side by side in the X direction. They are arranged in the order of P terminal 91, N terminal 92, and O terminal 93 in the X direction. The P terminal 91 and N terminal 92, which are power supply terminals, have their sides facing each other in a portion including the portion protruding from the sealing resin body 30. The protruding length of the N terminal 92 is approximately the same as the protruding length of the P terminal 91. The protruding lengths of the P terminal 91 and N terminal 92 are different from the protruding length of the O terminal 93. In the exemplary semiconductor device 20, the protruding length of the O terminal 93 is longer than the protruding length of the N terminal 92 and the protruding length of the P terminal 91.

[0060] The signal terminals 94 are electrically connected to the pads 43 of the corresponding semiconductor elements 40. The signal terminals 94 include a signal terminal connected to the pads 43 of the semiconductor element 40H and a signal terminal connected to the pads 43 of the semiconductor element 40L. The signal terminals 94 are connected to the corresponding pads 43, for example, via bonding wires (not shown). The signal terminals 94 extend generally in the Y direction in a plan view. A portion of the signal terminals 94, including the connection portion with the pads 43, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30. The signal terminals 94 protrude outside the sealing resin body 30 from near the center of the side surface 30d in the Z direction.

[0061] The external connection terminals 90 are provided as part of a lead frame. During the manufacturing process of the semiconductor device 20, unnecessary portions of the lead frame, such as tie bars, are removed. The semiconductor device 20 includes suspension leads 95. Before the unnecessary portions are removed, the suspension leads 95 hold the signal terminals 94 in place via the tie bars. One of the suspension leads 95 is connected to the P wiring 521, and the other is connected to the relay wiring 522. The suspension leads 95 extend generally in the Y direction in a plan view. The two suspension leads 95 are arranged in the X direction to sandwich the signal terminal 94 corresponding to the semiconductor element 40H and the signal terminal 94 corresponding to the semiconductor element 40L. A portion of the suspension lead 95, including the connection portion with the front surface metal body 52, is covered by the sealing resin body 30, and the remaining portion protrudes from the side surface 30d of the sealing resin body 30.

[0062] The semiconductor device 20 includes a bonding material 100. The bonding material 100 may be a solder or a sintered material. The drain electrode 41 of the semiconductor element 40 is connected to the surface metal body 52 via the bonding material 100. The source electrode 42 of the semiconductor element 40 is connected to the conductive spacer 70 via the bonding material 100. The conductive spacer 70 is connected to the surface metal body 62 via the bonding material 100. The joint portion 80 is connected to the surface metal bodies 52, 62 via the bonding material 100. The multiple bonding materials 100 may be made of a common material, or the material of some of the bonding materials 100 may be different from the material of the other bonding materials 100.

[0063] The P terminal 91, N terminal 92, O terminal 93, and hanger lead 95 may be connected to the corresponding surface metal bodies 52, 62 by the above-mentioned bonding material 100. The P terminal 91, N terminal 92, O terminal 93, and hanger lead 95 may be solid-state bonded to the corresponding surface metal bodies 52, 62. Examples of solid-state bonding include ultrasonic bonding, room-temperature bonding, friction stir bonding, diffusion bonding, and friction welding. The illustrated P terminal 91, N terminal 92, O terminal 93, and hanger lead 95 are ultrasonically bonded to the corresponding surface metal bodies 52, 62.

[0064] As described above, in the semiconductor device 20, the sealing resin body 30 seals the multiple semiconductor elements 40 that constitute one phase of the upper and lower arm circuits 9. The sealing resin body 30 integrally seals the multiple semiconductor elements 40, a portion of the substrate 50, a portion of the substrate 60, the multiple conductive spacers 70, the joint portion 80, and a portion of the external connection terminals 90. The sealing resin body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 on the substrates 50, 60.

[0065] The semiconductor element 40 is disposed between the substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the substrates 50 and 60, which are disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The exposed surface 53a of the back surface metal body 53 is substantially flush with one surface 30a of the sealing resin body 30. The exposed surface 63a of the back surface metal body 63 is substantially flush with the back surface 30b of the sealing resin body 30. The exposed surfaces 53a and 63a can improve heat dissipation.

[0066] <Power conversion module> Fig. 7 is a cross-sectional view showing an example of a power conversion module. Fig. 7 shows a part of the power conversion module. Fig. 7 corresponds to Fig. 3.

[0067] The power conversion module 110 includes the semiconductor device 20 and a cooler 111. The cooler 111 is made of a metal material such as Al or Cu. The cooler 111 may have a channel through which a refrigerant flows. The cooler 111 may be a heat dissipation member such as a heat sink. A heat sink may also be called a heat sink or a cooling plate. The heat dissipation member may include heat dissipation fins. A bonding material such as solder or sintered Ag may be interposed between the exposed surfaces 53a, 63a of the rear surface metal bodies 53, 63 and the cooler 111. The cooler 111 may be part of a housing that houses the semiconductor device 20, or may be provided separately from the housing. The exposed surfaces 53a, 63a are thermally connected to the cooler 111.

[0068] Although not shown, the power conversion module 110 includes three semiconductor devices 20 that constitute the inverter 5. The power conversion module 110 may have a structure in which the semiconductor devices 20 and the coolers 111 are alternately stacked in the Y direction. The power conversion module 110 may also have a structure in which three semiconductor devices 20 are arranged side by side between a pair of coolers 111.

[0069] The rear surface metal bodies 53, 63, partly exposed from the sealing resin body 30, are electrically connected to, for example, the chassis of a moving object (vehicle). That is, they are connected to the chassis ground. The chassis ground is the reference potential (ground potential) of the vehicle. The rear surface metal bodies 53, 63 are connected to the chassis ground via, for example, a cooler 111.

[0070] <Corner> As shown in FIG. 5, the insulating base material 51, and therefore the substrate 50, has a generally rectangular shape in plan view. The insulating base material 51 has four corners 510, 511, 512, and 513 and four sides 514, 515, 516, and 517. The corners 510, 511, 512, and 513 are the four corners of the substrate 50 (insulating base material 51). The side 515 is the end opposite the side 514 in the Y direction. The side 517 is the end opposite the side 516 in the X direction. The side 517 is the side on the side of the side surface 30f having the gate mark 32. The corner 510 is defined by the sides 514 and 516. The corner 511 is defined by the sides 514 and 517. The corner 512 is defined by the sides 515 and 516. The corner 513 is defined by sides 515 and 517 .

[0071] The surface metal body 52 has a plurality of corners 54. The corners 54 include four corners 540, 541, 542, and 543 that correspond to the four corners of the substrate 50, and other corners 544, 545, 546, 547, and 548. Corner 540 corresponds to corner 510. Corner 541 corresponds to corner 511. Corner 542 corresponds to corner 512. Corner 543 corresponds to corner 513. Corners 54 are corners that convex outward.

[0072] Corners 544, 545, 546, 547, and 548 are connected to sides that define the gap between P wiring 521 and relay wiring 522. Corner 544 is a corner of the base of relay wiring 522 that is opposite corner 540 in the X direction. Corner 545 is a corner of P wiring 521 that is opposite corner 541 in the X direction. The gap between P wiring 521 and relay wiring 522 extends roughly in the Y direction. Corners 544 and 545 are provided at the end of the gap on the side 514 side. Corner 546 is a corner of the extended portion of relay wiring 522 that is closer to side 514. Corner 547 is a corner of the extended portion of relay wiring 522 that is closer to side 515. Corner 547 is located opposite corner 546 in the Y direction. Corner 548 is an end of P wiring 521 opposite corner 543 in the X direction. Corners 547 and 548 are provided at the end of the gap on the side 515 side.

[0073] Corner 540, which is located farthest from gate mark 32 in plan view, is cut out. Corner 540 has its corners rounded. Corners 544 and 545 are also cut out in the same manner as corner 540. Other corners 541, 542, 543, 546, 547, and 548 are not cut out. Corner 543, which is located closest to gate mark 32, is not cut out.

[0074] FIG. 8 is a diagram showing the removal area on the drain electrode side substrate. FIG. 8 shows corners 540 and 542. Corner 540 is intentionally cut out. In FIG. 8, the cut-out area of ​​corner 540 is shown as removal area 540S. Removal area 540S forms the outline of surface metal body 52 in a plan view, and is the area of ​​a portion defined by corner 540 and imaginary extensions of two straight line segments continuing to corner 540. The two straight line segments continuing to corner 540 are two sides that define corner 540. The dashed-dotted lines are imaginary extensions of the two straight line segments. The length from the boundary between corner 540 and the straight line segments to the intersection of the imaginary extensions is, for example, approximately 2 cm to 5 cm. The same applies to corners 544 and 545.

[0075] Corner 542 is not cut out. Corner 542 has a chamfered shape with a small radius. Removal area 542S resulting from the chamfering of corner 542 is the area defined by corner 542 and the imaginary extensions of two straight lines continuing to corner 542. Removal area 542S is smaller than removal area 540S. The two straight lines continuing to corner 542 are the two sides that define corner 542. The dashed dotted lines are imaginary extensions of the two straight lines. The radius of curvature (R) of corner 542 is, for example, approximately 0.5 cm. The same applies to corners 541, 543, 546, 547, and 548.

[0076] As shown in FIG. 6 , the insulating base material 61, and therefore the substrate 60, has a generally rectangular shape in plan view. The insulating base material 61 has four corners 610, 611, 612, and 613 and four sides 614, 615, 616, and 617. The corners 610, 611, 612, and 613 are the four corners of the substrate 60 (insulating base material 61). The side 615 is the end opposite the side 614 in the Y direction. The side 617 is the end opposite the side 616 in the X direction. The side 617 is the side on the side of the side surface 30f having the gate mark 32. The corner 610 is defined by the sides 614 and 616. The corner 611 is defined by the sides 614 and 617. The corner 612 is defined by the sides 615 and 616. Corner 613 is defined by sides 615 and 617 .

[0077] The surface metal body 62 has a plurality of corners 64. The corners 64 include four corners 640, 641, 642, and 643 that correspond to the four corners of the substrate 60, and other corners 644, 645, 646, 647, 648, and 649. Corner 640 corresponds to corner 610. Corner 641 corresponds to corner 611. Corner 642 corresponds to corner 612. Corner 643 corresponds to corner 613. Corner 64 is a corner that protrudes outward.

[0078] Corners 644, 645, 646, 647, 648, and 649 are connected to the side that defines the gap between N wiring 621 and relay wiring 622. Corner 644 is a corner of the extended portion of N wiring 621 that is on the side 614 side. Corner 645 is a corner of the base of relay wiring 622 that is opposite corner 641 in the X direction. The gap between N wiring 621 and relay wiring 622 has a crank shape in plan view. Corners 644 and 645 are provided at the end of the gap that is on the side 614 side. Corner 646 is a corner of the extended portion of N wiring 621 that is on the side 615 side. Corner 646 is located opposite corner 644 in the Y direction in the extended portion of N wiring 621. Corner 647 is a corner of the extension portion of relay wiring 622 on the side 614 side. Corner 648 is an end portion of N wiring 621 opposite corner 642 in the X direction. Corner 649 is an end portion of relay wiring 622 opposite corner 643 in the X direction. Corner 647 is a corner of the extension portion of relay wiring 622 on the side 615 side. Corners 648 and 649 are provided at the end portions of the gap on the side 615 side.

[0079] A corner 640 located farthest from the gate mark 32 in a plan view is cut out. The corner 640 is rounded. The other corners 641, 642, 643, 644, 645, 646, 647, 648, and 649 are not cut out. A corner 643 located closest to the gate mark 32 is not cut out.

[0080] FIG. 9 is a diagram showing the removal area on the substrate on the source electrode side. FIG. 9 shows corners 640 and 642. Corner 640 is intentionally cut out, similar to corner 540. Removal area 640S forms the outer contour of surface metal body 62 in a plan view, and is the area of ​​the portion defined by corner 640 and imaginary extensions of two straight lines continuing to corner 640. The two straight lines continuing to corner 640 are two sides that define corner 640. The dashed dotted lines are imaginary extensions of the two straight lines. The length from the boundary between corner 640 and the straight lines to the intersection of the imaginary extensions is, for example, approximately 2 cm to 5 cm, similar to corner 540.

[0081] Corner 642 is not cut out. Corner 642 has a chamfered shape with a small radius. A removal area 642S resulting from the chamfering of corner 642 is the area defined by corner 642 and imaginary extensions of two straight lines continuing to corner 642. Removal area 642S is smaller than removal area 640S. The two straight lines continuing to corner 642 are two sides that define corner 642. The dashed dotted lines are imaginary extensions of the two straight lines. The radius of curvature (R) of corner 642 is, for example, approximately 0.5 cm. The same applies to corners 641, 643, 644, 645, 646, 647, 648, and 649.

[0082] <Summary of the First Embodiment> The semiconductor device 20 of this embodiment includes substrates 50, 60, a semiconductor element 40, and an encapsulating resin body 30. The back surface metal bodies 53, 63 have exposed surfaces 53a, 63a exposed from the encapsulating resin body 30 and thermally connected to the cooler 111. The front surface metal bodies 52, 62 are patterned and have multiple corners 54, 64 in a plan view. Some of the multiple corners are intentionally cut out. In the illustrated semiconductor device 20, corners 540, 544, 545, 640 are cut out.

[0083] By cutting out the corners, for example, when forming the sealing resin body 30, voids are less likely to remain in the cut-out corners. By cutting out the corners, voids are less likely to get caught in the corners than with pin corners. By cutting out the corners of the front surface metal bodies 52, 62, the corners are separated from the back surface metal bodies 53, 63. Therefore, even if voids occur in the corners, it is possible to prevent the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 from being connected by the voids, which would result in an inability to ensure insulation. Therefore, it is possible to prevent insulation failure caused by voids.

[0084] As shown in the example, the removal area of ​​the portion that forms the outer contour of the surface metal body 52, 62 in a plan view and is defined by the corner 54, 64 and a virtual extension of two straight lines that connect to any corner 54, 64 may be larger at the cut-out first corner than at the second corner. In the example semiconductor device 20, the removal area 540S of the corner 540, which is the first corner, is sufficiently larger than the removal area 542S of the corner 542, which is the second corner. The removal area 640S of the corner 640, which is the first corner, is sufficiently larger than the removal area 642S of the corner 642, which is the second corner. By intentionally removing a large portion of the corner, the above-mentioned effect can be enhanced.

[0085] As illustrated, the encapsulating resin body 30 may have a gate mark 32. That is, the encapsulating resin body 30 may be a resin molded body. The first corner may include a corner located farthest from the gate mark 32. In the illustrated semiconductor device 20, the corners 54, 64 located farthest from the gate mark 32 are corners 540, 640.

[0086] FIG. 10 shows the final junction during molding of the encapsulating resin body. It shows the state immediately before the resins join during molding of the encapsulating resin body. FIG. 10 illustrates a substrate 50. In the illustrated semiconductor device 20, the corner farthest from the gate is configured to be the final junction of the resin 33 that forms the encapsulating resin body 30. That is, the resin 33 joins at the corner 540, eliminating voids at the corner 540. However, if air is entrained at the final junction, voids will remain at the corner 540. Note that, since corner 54, excluding corner 540, is located midway between the gate and the final junction, the flow of resin 33 pushes the voids there, making it less likely for voids to remain there than at corner 540.

[0087] When the corners 540, 640 are cut out as described above, the front surface metal bodies 52, 62 are spaced apart from the back surface metal bodies 53, 63 at the corners 540, 640. Therefore, even if air is drawn in at the final joining point and voids remain at the corners 540, 640, it is possible to prevent the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 from being connected by the voids and failing to ensure insulation.

[0088] As illustrated, the second corner may include the corner closest to the gate mark 32. In the illustrated semiconductor device 20, the corners 54, 64 closest to the gate mark 32 are corners 543, 643. Because the corners 543, 643 are located near the gate, voids are pushed by the flow of resin 33, and voids are less likely to remain at these corners than at the corner 540.

[0089] As illustrated, the multiple corners 54, 64 may include four corners corresponding to the four corners of the planar, generally rectangular substrates 50, 60. At least one of the four corners may be the first corner. The four corners are corners 540, 541, 542, and 543 in substrate 50, and corners 640, 641, 642, and 643 in substrate 60. By cutting out the corners where voids are likely to occur, it is possible to prevent insulation failures caused by voids.

[0090] <Modification> Although the example in which the corners 540, 544, 545, and 640 of the corners 54 and 64 are cut out has been shown, the present invention is not limited to this. For example, as shown in FIG.

[0091] Although not shown, at least one of the corners 54 may be cut out, but the corner 64 may not be cut out. At least one of the corners 64 may be cut out, but the corner 54 may not be cut out. For example, all of the corners 54, 64 may be cut out. However, if the corners 54, 64 are cut out, the surface metal bodies 52, 62 will become smaller accordingly. Therefore, it is better not to cut out corners where insulation failure due to voids is unlikely to occur. For example, this can increase the degree of freedom in connecting the external connection terminal 90, that is, the degree of freedom in wiring.

[0092] Although the corners 54 and 64, excluding the corners 540, 544, 545, and 640, are shown as being chamfered with a small radius, the present invention is not limited to this and may be chamfered with a C-shape or a pin angle.

[0093] (Second embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used. In the preceding embodiment, at least one corner of the surface metal body is cut out. Instead of or in addition to this, the insulation width may satisfy a predetermined relationship.

[0094] Fig. 12 is a plan view showing the substrate on the drain electrode side in the semiconductor device 20 according to this embodiment. Fig. 12 corresponds to Fig. 5. Fig. 13 is a plan view showing the substrate on the source electrode side. Fig. 13 corresponds to Fig. 6. In Figs. 12 and 13, the sealing resin body is indicated by a dashed line.

[0095] As in the preceding embodiment, the substrates 50 and 60 (insulating base materials 51 and 61) have a generally rectangular planar shape. In the substrate 50, the insulation width, which is the distance from the end of the surface metal body 52 to the end of the insulating base material 51, is wider at the sides 514 and 516 than at the sides 515 and 517. The insulation width W51 at the sides 514 and 516 away from the gate mark 32 is wider than the insulation width W52 at the sides 515 and 517 close to the gate mark 32.

[0096] In the substrate 60, the insulation width, which is the width from the end of the surface metal body 62 to the end of the insulating base material 61, is wider at the sides 614 and 616 than at the sides 615 and 617. The insulation width W61 at the sides 614 and 616 away from the gate mark 32 is wider than the insulation width W62 at the sides 615 and 617 close to the gate mark 32.

[0097] The insulation width is the width excluding the corners 54, 64 when the corners 54, 64 are cut out. The other configurations are the same as those described in the preceding embodiment. For example, the corners 540, 544, 545, and 640 are cut out.

[0098] <Summary of the second embodiment> As illustrated, the substrates 50, 60 may have four sides that form a rectangular outline in a plan view, including a first side, a second side, and a third side and a fourth side that are located farther from the gate mark 32 than the first and second sides. The insulation width, which is the width from the end of the surface metal body 52, 62 to the end of the insulating base material 51, 61, may be wider on the third and fourth sides than on the first and second sides. In the illustrated semiconductor device 20, sides 515, 615 correspond to the first side, sides 517, 617 correspond to the second side, sides 514, 614 correspond to the third side, and sides 516, 616 correspond to the fourth side.

[0099] Even if air is entrained near the gate, it is pushed by the flow of resin, and voids tend to occur in the encapsulating resin body 30 at positions away from the gate mark 32. The insulation width of the third and fourth sides, which are located away from the gate mark 32, is wider than the insulation width of the first and second sides, which are closer to the gate mark 32, and the front surface metal bodies 52, 62 are spaced apart from the back surface metal bodies 53, 63 at the third and fourth sides. Therefore, even if voids occur adjacent to the ends of the front surface metal bodies 52, 62, it is possible to prevent the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 from being connected by a void and failing to ensure insulation. This, combined with the configuration in which at least one of the corners 54, 64 is cut out, effectively prevents insulation failure due to voids.

[0100] <Modification> In the configuration in which at least one of the corners 54, 64 is cut out, the insulation width of the third and fourth sides located away from the gate mark 32 is wider than the insulation width of the first and second sides located closer to the gate mark 32. However, this is not limiting. For example, as shown in FIG. 14 , in a configuration in which the corner 54 is not cut out, the insulation width of the third and fourth sides located away from the gate mark 32 may be wider than the insulation width of the first and second sides located closer to the gate mark 32. That is, the insulation width W1 of the sides 514, 516 located away from the gate mark 32 may be wider than the insulation width W2 of the sides 515, 517 located closer to the gate mark 32. Although not shown, in a configuration in which the corner 64 is not cut out, the insulation width of the sides 614, 616 located away from the gate mark 32 may be wider than the insulation width of the sides 615, 617 located closer to the gate mark 32.

[0101] As described above, by widening the insulation width of the third and fourth sides located away from the gate and moving them away from the back surface metal bodies 53, 63, it is possible to prevent voids from forming between the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63. This makes it possible to prevent insulation failures caused by voids.

[0102] (Third embodiment) This embodiment is a modification of the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the insulation width was varied depending on the positional relationship with the gate trace. Alternatively, or in addition, the spacing between the conductor patterns and the insulation width may satisfy a predetermined relationship.

[0103] Fig. 15 is a plan view showing the substrate on the drain electrode side in the semiconductor device 20 according to this embodiment. Fig. 15 corresponds to Fig. 5. Fig. 16 is a plan view showing the substrate on the source electrode side. Fig. 16 corresponds to Fig. 6. In Figs. 15 and 16, the sealing resin body is indicated by a dashed line.

[0104] The substrate 50 has a generally rectangular shape in plan view. The surface metal body 52 has a P wiring 521 that is generally rectangular in plan view and a relay wiring 522 that is generally L-shaped in plan view. Of the corners 54, corners 540, 544, and 545 are cut out. The distance between the P wiring 521 and the relay wiring 522 is the insulation width, which is the width from the end of the surface metal body 52 to the end of the insulating base material 51, over its entire length, and is wider than the insulation width of the portion excluding the cut-out corners 540, 544, and 545. Of the distance between the P wiring 521 and the relay wiring 522, a distance W531 between the P wiring 521 and the extended portion of the relay wiring 522 is wider than the insulation width W54. The distance W531 is 1.5 times or more the insulation width W54. Of the gap between the P wiring 521 and the relay wiring 522, the gap W532 between the P wiring 521 and the base of the relay wiring 522 is wider than the gap W531. The gap W532 is at least twice the insulation width W54.

[0105] The substrate 60 has a generally rectangular shape in plan view. The surface metal body 62 has an N wiring 621 that is generally L-shaped in plan view and a relay wiring 622 that is also generally L-shaped in plan view. Of the corners 64, a corner 640 is cut out. The distance between the N wiring 621 and the relay wiring 622 is the insulation width, which is the width from the end of the surface metal body 62 to the end of the insulating base material 61, over the entire length, and is wider than the insulation width of the portion excluding the cut-out corner 640. In the example surface metal body 62, the distance between the N wiring 621 and the relay wiring 622 is substantially the same (constant width) over the entire length. The distance W63 between the N wiring 621 and the relay wiring 622 is wider than the insulation width W64. The distance W63 is 1.5 times or more the insulation width W64. The other configurations are the same as those described in the preceding embodiment (first embodiment).

[0106] <Summary of the third embodiment> In the illustrated configuration including the cutout corners, the surface metal bodies 52, 62 may include a first conductor pattern and a second conductor pattern that has a different potential from the first conductor pattern and is positioned adjacent to the first conductor pattern. The distance between the first conductor pattern and the second conductor pattern may be an insulation width that is the width from the end of the surface metal bodies 52, 62 to the end of the insulating base material 51, 61 and that is wider than the insulation width of the portion excluding the cutout corners. In the illustrated semiconductor device 20, the P wiring 521 and the N wiring 621 correspond to the first conductor pattern, and the relay wirings 522, 622 correspond to the second conductor pattern.

[0107] By making the gap between the first and second conductor patterns wider than the insulation width, the flow of resin between the first and second conductor patterns can be improved. For example, this can prevent voids from being trapped and make trapped voids easier to escape. This can prevent voids from occurring between the first and second conductor patterns and short-circuiting the first and second conductor patterns. Therefore, it can prevent insulation failure caused by voids.

[0108] As shown in the example, the spacing between the first and second conductor patterns may be 1.5 times the insulation width or more. By intentionally widening the spacing rather than relying on manufacturing variations, the flow of resin can be effectively improved. In the example semiconductor device 20, the spacing W532 on the side farther from the gate mark 32, i.e., the spacing on the exit side where the resin escapes, is made wider. This improves the flow of resin from between the patterns to the outer periphery, making it easier for trapped voids to escape.

[0109] <Modification> In the configuration shown in the second embodiment, the distance between the first conductor pattern and the second conductor pattern may be wider than the insulation width. For example, the distance between the P wiring 521 and the relay wiring 522 may be wider than the insulation widths W51 and W52. The distance between the N wiring 621 and the relay wiring 622 may be wider than the insulation widths W61 and W62.

[0110] Although not shown, in a configuration that does not include a cut-out corner, the distance between the first conductor pattern and the second conductor pattern may be wider than the insulation width.

[0111] In the preceding embodiments, the distance between the first and second conductor patterns and the insulation width are not particularly limited. In the first embodiment, the distance between the first and second conductor patterns may be narrower than the insulation width. The distance between the first and second conductor patterns may be equal to the insulation width. For example, the distance between the P wiring 521 and the relay wiring 522 may be narrower than the insulation widths W51 and W52. The distance between the N wiring 621 and the relay wiring 622 may be narrower than the insulation widths W61 and W62.

[0112] (Fourth embodiment) This embodiment is a modification based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, one arm has one switching element. Instead of this, one arm may have multiple switching elements.

[0113] <Power conversion circuit> FIG. 17 shows an example of a power conversion circuit to which the semiconductor device according to this embodiment is applied. FIG. 17 corresponds to FIG. 1. The power conversion circuit 4 includes an inverter 5 and a smoothing capacitor 6, as in the preceding embodiment. The inverter 5 includes upper and lower arm circuits 9 for three phases. Each arm is configured with a plurality of switching elements. In the illustrated power conversion circuit 4, each arm includes two MOSFETs 11 connected in parallel. The two MOSFETs 11 connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage). The other configurations are the same as those shown in the preceding embodiment.

[0114] <Semiconductor device> FIG. 18 is a plan view showing an example of a semiconductor device. FIG. 19 is a plan view showing a portion covered with a sealing resin body. In FIG. 19, the sealing resin body is shown by a dot-dash line, and the substrate and conductor pattern on the source electrode side are shown by a dashed line. For convenience, FIG. 19 omits the pads of the semiconductor element, the bonding wires, and the conductor pattern of the relay substrate. FIG. 20 is a plan view showing the substrate on the drain electrode side. FIG. 21 is a plan view showing the substrate on the source electrode side. In FIGS. 20 and 21, a surface metal body is shown. The sealing resin body is also shown by a dot-dash line.

[0115] As in the previous embodiment, the semiconductor device 20 includes a sealing resin body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, a joint portion 80, and an external connection terminal 90. The semiconductor device 20 further includes an intermediate substrate 105.

[0116] Although not shown, the exposed surface 53a of the back surface metal body 53 is exposed from the one surface 30a. The exposed surface 63a of the back surface metal body 63 is exposed from the back surface 30b. The exposed surfaces 53a, 63a are connected to a cooler (not shown). The P terminal 91, the N terminal 92, and the signal terminal 94 on the semiconductor element 40H side protrude from the side surface 30c. The O terminal 93 and the signal terminal 94 on the semiconductor element 40L side protrude from the side surface 30d. The gate mark 32 is provided on the side surface 30f of the sealing resin body 30. The gate mark 32 is provided in a central region including the center of the side surface 30f in the Y direction.

[0117] The semiconductor device 20 includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are aligned in the X direction. The two semiconductor elements 40L are aligned in the X direction. The semiconductor elements 40H and 40L are aligned in the Y direction. The semiconductor element 40H is arranged so that its pads 43 are located on the side surface 30c. The semiconductor element 40L is arranged so that its pads 43 are located on the side surface 30d.

[0118] The surface metal body 52 of the substrate 50 has a P wiring 521, a relay wiring 522, and an island 523. The relay substrate 105 is mounted on the island 523. The P wiring 521 and the relay wiring 522 are generally U-shaped in plan view. The island 523 is provided at the opening of the U shape of each of the P wiring 521 and the relay wiring 522. The P wiring 521 and the relay wiring 522 are aligned in the Y direction with the opening facing outward. The distance between the P wiring 521 and the relay wiring 522 is generally the same (constant width) over the entire length.

[0119] The surface metal body 52 has a plurality of corners 55. The corners 55 include four corners 550, 551, 552, and 553 corresponding to the corners 510, 511, 512, and 513, and other corners 554, 555, 556, 557, 558, 559, 55A, and 55B.

[0120] Corner 554 of P wiring 521 is located opposite corner 550 in the Y direction. Corner 555 is located opposite corner 551 in the Y direction. Corner 556 of relay wiring 522 is located opposite corner 552 in the Y direction. Corner 557 is located opposite corner 553 in the Y direction. Corners 554 and 556 are formed between P wiring 521 and relay wiring 522 and are located at one end of a gap extending in the X direction, and corners 555 and 557 are located at the other end of the gap.

[0121] Corner 558 is located opposite corner 550 at one end of the U-shape. Corner 559 is located opposite corner 551 at the other end of the U-shape. Corner 55A is located opposite corner 552 at one end of the U-shape. Corner 55B is located opposite corner 553 at the other end of the U-shape.

[0122] All corners 550, 551, 552, and 553 are notched. Corners 554, 555, 556, 557, 558, 559, 55A, and 55B are not notched. Although not shown, similar to the previous embodiment, the removed area of ​​the notched corners 550, 551, 552, and 553 is larger than the removed area of ​​the unnotched corners 554, 555, 556, 557, 558, 559, 55A, and 55B. The distance W55 between the P wiring 521 and the relay wiring 522 is wider than the insulation width W56. The distance W55 is at least 1.5 times the insulation width W56. The insulation width W56 is the width from the end of the surface metal body 52 to the end of the insulating base material 51, excluding the notched corners 540, 541, 542, and 543.

[0123] The surface metal body 62 of the substrate 60 has an N wiring 621 and a relay wiring 622. The N wiring 621 has a substantially C-shape in plan view. The relay wiring 622 has a hexagonal shape similar to a baseball home plate. The relay wiring 622 is provided at the opening of the C-shape of the N wiring 621.

[0124] The surface metal body 62 has a plurality of corners 65. The corners 65 include four corners 650, 651, 652, and 653 corresponding to the corners 610, 611, 612, and 613, and other corners 654, 655, 656, 657, 658, 659, 65A, 65B, 65C, and 65D.

[0125] Corner 654 of N wiring 621 is located opposite corner 650 at one end of the C-shape. Corner 655 is located opposite corner 651 at the other end of the C-shape. Corner 656 is located opposite corner 654 in the Y direction. Corner 657 is located opposite corner 655 in the Y direction. Corner 658 is provided at one end of relay wiring 622 in the Y direction. Corner 659 is located opposite corner 658 in the X direction. Corner 65A is located in the middle of relay wiring 622 in the Y direction. Corner 65B is located opposite corner 65A in the X direction. Corner 65C is provided at the other end of relay wiring 622. Corner 65D is located opposite corner 65C in the X direction.

[0126] Corners 65 are not cut out. A distance W65 between N wiring 621 and relay wiring 622 is wider than an insulation width W66. Distance W65 is 1.5 times or more the insulation width W66. Insulation width W66 is the width from the end of surface metal body 62 to the end of insulating base material 61. In N wiring 621, the distance between the ends of the C shape is wider than distance W65.

[0127] The drain electrode 41 of the semiconductor element 40H is connected to the P wiring 521. The source electrode 42 is connected to the relay wiring 622 via a conductive spacer 70. The drain electrode 41 of the semiconductor element 40L is connected to the relay wiring 522. The source electrode 42 is connected to the N wiring 621 via a conductive spacer 70. The joint portion 80 is disposed in a region where the relay wirings 522, 622 overlap in a plan view. One end of the joint portion 80 is connected to the relay wiring 522, and the other end is connected to the relay wiring 622.

[0128] The illustrated semiconductor device 20 includes two P terminals 91, two N terminals 92, and two O terminals 93. The P terminals 91 are connected to both ends of the U-shape of the P wiring 521, respectively. The N terminals 92 are connected to both ends of the C-shape of the N wiring 621, respectively. The O terminals 93 are connected to both ends of the U-shape of the relay wiring 522, respectively. The signal terminals 94 are electrically connected to corresponding pads 43 via the conductor patterns of the relay substrate 105. The relay substrate 105 is connected to the pads 43 by, for example, bonding wires. The signal terminals 94 are connected to the relay substrate 105 by, for example, bonding wires. The other configurations are the same as those described in the preceding embodiments.

[0129] <Summary of the Fourth Embodiment> The semiconductor device 20 of this embodiment includes substrates 50, 60, a semiconductor element 40, and an encapsulating resin body 30. The back surface metal bodies 53, 63 are exposed from the encapsulating resin body 30. The front surface metal bodies 52, 62 are patterned and have multiple corners 55, 65 in a plan view. Some of the multiple corners are intentionally cut out. In the illustrated semiconductor device 20, some of the corners 55 are cut out. Therefore, as in the previous embodiment, insulation failure due to voids can be suppressed.

[0130] As illustrated, the cut-out first corners may include corners 550, 552 located farthest from the gate mark 32. Cutting out the corners 550, 552 moves the front surface metal body 52 away from the back surface metal body 53 at the corners 550, 552. Therefore, even if air is drawn in at the final joining portion and voids are accumulated at the corners 550, 552, it is possible to prevent the front surface metal body 52 and the back surface metal body 53 from being connected by the voids, which would make it impossible to ensure insulation.

[0131] As shown in the example, the multiple corners 55 may include four corners corresponding to the four corners of the substrate 50 having a generally rectangular planar shape. At least one of the four corners may be the first corner. In the example semiconductor device 20, all four corners 550, 551, 552, and 553 are cut out. By cutting out the corners 550, 551, 552, and 553 where voids are likely to occur, it is possible to prevent insulation failure due to voids.

[0132] In the illustrated configuration including the cutout corner, the surface metal body 52 may include a first conductor pattern and a second conductor pattern adjacent to the first conductor pattern, which has a different potential from the first conductor pattern. The distance between the first conductor pattern and the second conductor pattern may be an insulation width, which is the distance from the end of the surface metal body 52 to the end of the insulating substrate 51, and may be wider than the insulation width of the portion excluding the cutout corner. In the illustrated semiconductor device 20, the P wiring 521 corresponds to the first conductor pattern, and the relay wiring 522 corresponds to the second conductor pattern. By making the distance between the first conductor pattern and the second conductor pattern wider than the insulation width, the flow of resin between the first conductor pattern and the second conductor pattern can be improved. This prevents voids from occurring between the first conductor pattern and the second conductor pattern, which can cause a short circuit between the first conductor pattern and the second conductor pattern.

[0133] As shown in the example, the distance between the first and second conductor patterns may be set to 1.5 times the insulation width or more. By intentionally widening the distance rather than relying on manufacturing variations, the flow of resin can be effectively improved.

[0134] <Modification> At least one of the corners 65 may be cut out. At least one of the corners 65 may be cut out, but corner 55 may not be cut out. The configuration described in this embodiment may be combined with the configuration described in the second embodiment and the configuration described in the third embodiment.

[0135] The number of switching elements constituting each arm is not limited to two, and may be three or more. The semiconductor device 20 may include three or more semiconductor elements 40H, 40L.

[0136] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure encompasses the exemplified embodiments and modifications thereto by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and / or elements shown in the embodiments. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses the omission of parts and / or elements from the embodiments. The disclosure encompasses the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are defined by the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the claims.

[0137] The disclosure in the specification, drawings, etc. is not limited by the claims. The disclosure in the specification, drawings, etc. encompasses the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification, drawings, etc. without being bound by the claims.

[0138] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly on, coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, no intervening elements or layers are present. Other terms used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items. That is, reference to A and / or B means at least one of A and B.

[0139] Spatially relative terms such as "inside," "outside," "back," "below," "low," "top," "top," and the like are used herein to facilitate the description of one element or feature's relationship to other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures were turned over, elements described as "below" or "directly below" other elements or features would then be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0140] Although an example has been shown in which the semiconductor device 20 includes two substrates 50 and 60, the present invention is not limited to this. Only the substrate 50 may be included. Wiring members such as metal plate clips and bonding wires may be used instead of the substrate 60. The present invention can also be applied to a semiconductor device 20 with a single-sided heat dissipation structure.

[0141] Although an example of a 2-in-1 package that provides upper and lower arm circuits 9 for one phase has been shown as the semiconductor device 20, the semiconductor device 20 is not limited to this. For example, the semiconductor device 20 may be a 1-in-1 package that provides one arm, or a 6-in-1 package.

[0142] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be written in a multiple dependent form, with the subsequent clause referring to the preceding clause as an alternative. Furthermore, some clauses may be written in a multiple dependent form, referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.

[0143] <Technical philosophy 1> a substrate (50, 60) having an insulating base material (51, 61), a patterned front surface metal body (52, 62) disposed on the front surface of the insulating base material, and a rear surface metal body (53, 63) disposed on the rear surface of the insulating base material; a semiconductor element (40) having a first main electrode (41) and a second main electrode (42) provided on the surface opposite to the first main electrode in the plate thickness direction, the semiconductor element (40) being disposed on the substrate and electrically connected to the surface metal body; a sealing resin body (30) that seals the substrate and the semiconductor element, the rear surface metal body has an exposed surface (53a, 63a) exposed from the sealing resin body and thermally connected to a cooler, The surface metal body has a plurality of corners (54, 55, 64) when viewed in a plan view in the plate thickness direction, At least a portion of the plurality of corners is cut away.

[0144] <Technical philosophy 2> The plurality of corners include first corners (540, 640) and second corners (542, 642) that are cut-out corners, A semiconductor device according to Technical Idea 1, wherein the removal area defined by the corner and a virtual extension of two straight line portions that form the outer contour of the surface metal body in the planar view and are connected to any of the corners is larger at the first corner than at the second corner.

[0145] <Technical philosophy 3> The sealing resin body has a gate mark (32), The semiconductor device according to Technical Concept 2, wherein the first corner portion includes the corner portion located farthest from the gate mark.

[0146] <Technical philosophy 4> The semiconductor device according to Technical Concept 3, wherein the second corner portion includes the corner portion located closest to the gate mark.

[0147] <Technical philosophy 5> the substrate has a rectangular shape in the plan view, the plurality of corner portions include four corner portions corresponding to four corners of the substrate, The semiconductor device according to Technical Concept 2, wherein at least one of the four corner portions is the first corner portion.

[0148] <Technical philosophy 6> The sealing resin body has a gate mark (32), the substrate has, as four sides forming a rectangular outline in the plan view, a first side (515, 615), a second side (517, 617), and a third side (514, 614) and a fourth side (516, 616) positioned farther from the gate mark than the first side and the second side; A semiconductor device described in any one of technical ideas 1 to 5, wherein the insulation width, which is the width from the end of the surface metal body to the end of the insulating base material, is wider on the third side and the fourth side than on the first side and the second side.

[0149] <Technical philosophy 7> the surface metal body includes a first conductor pattern (521, 621) and a second conductor pattern (522, 622) that has a different potential from the first conductor pattern and is located adjacent to the first conductor pattern, A semiconductor device described in any one of Technical Ideas 1 to 6, wherein the distance between the first conductor pattern and the second conductor pattern is an insulation width, which is the width from the end of the surface metal body to the end of the insulating base material, and is wider than the insulation width of the portion excluding the notched corner portion.

[0150] <Technical philosophy 8> The semiconductor device according to Technical Idea 7, wherein the spacing is 1.5 times or more the insulation width of the portion excluding the notched corner portion. [Explanation of symbols]

[0151] 1... drive system, 2... DC power supply, 3... motor generator, 3a... winding, 4... power conversion circuit, 5... smoothing capacitor, 6... inverter, 7... P line, 8... N line, 9... upper and lower arm circuits, 9H... upper arm, 9L... lower arm, 10... output line, 11... MOSFET, 12... diode, 20... semiconductor device, 30... sealing resin body, 30a... one surface, 30b... back surface, 30c, 30d, 30e, 30f... side surfaces, 31... recessed portion, 32 ...Gate trace, 33...Resin, 40,40H,40L...Semiconductor element, 41...Drain electrode, 42...Source electrode, 43...Pad, 50,60...Substrate, 51,61...Insulating base material, 510,511,512,513,610,611,612,613...Corner portion, 514,515,516,517, 614,615,616,617...Side portion, 52,62...Surface metal body, 52a,62a...Exposed surface, 521...P wiring, 621...N wiring, 522 ,622... relay wiring, 523... island, 53,63... back metal body, 53a,63a... exposed surface, 54,540,541,542,543,544,545,546,547,548,55,550,551,552,553,554,555,556,557,558,559,55A,55B,64,640,641,642,643,644,645, 646,647,648,649,650,651,652 , 653, 654, 655, 656, 657, 658, 659, 64A, 65B, 65C, 65D... Corner portion, 540S, 552S, 640S, 642S... Removal area, 70... Conductive spacer, 80... Joint portion, 90... External connection terminal, 91... P terminal, 92... N terminal, 93... O terminal, 94... Signal terminal, 95... Hanging lead, 100... Joint material, 105... Relay board, 110... Power conversion module, 111... Cooler, 120... Cavity wall surface

Claims

1. a substrate (50, 60) having an insulating base material (51, 61), a patterned front surface metal body (52, 62) disposed on the front surface of the insulating base material, and a rear surface metal body (53, 63) disposed on the rear surface of the insulating base material; a semiconductor element (40) having a first main electrode (41) and a second main electrode (42) provided on a surface opposite to the first main electrode in the plate thickness direction, the semiconductor element (40) being disposed on the substrate and electrically connected to the surface metal body; a sealing resin body (30) that seals the substrate and the semiconductor element, the rear surface metal body has an exposed surface (53a, 63a) exposed from the sealing resin body and thermally connected to a cooler, The surface metal body has a plurality of corners (54, 55, 64) when viewed in a plan view in the plate thickness direction, At least a portion of the plurality of corners is cut away.

2. The plurality of corner portions include first corner portions (540, 640) and second corner portions (542, 642) that are notched corner portions, 2. The semiconductor device according to claim 1, wherein a removal area defined by the corner and a virtual extension of two straight line portions that form the outer contour of the surface metal body in the planar view and are connected to any of the corners is larger at a first corner than at a second corner.

3. The sealing resin body has a gate mark (32), The semiconductor device according to claim 2 , wherein the first corner portion includes the corner portion located farthest from the gate mark.

4. The semiconductor device according to claim 3 , wherein the second corner portion includes the corner portion located closest to the gate mark.

5. the substrate has a rectangular shape in the plan view, the plurality of corner portions include four corner portions corresponding to four corners of the substrate, The semiconductor device according to claim 2 , wherein at least one of the four corner portions is the first corner portion.

6. The sealing resin body has a gate mark (32), The substrate has four sides that form a rectangular outline in the plan view, including a first side (515, 615), a second side (517, 617), and a third side (514, 614) and a fourth side (516, 616) that are positioned farther from the gate mark than the first side and the second side, The semiconductor device according to any one of claims 1 to 5, wherein an insulation width, which is the width from an end of the surface metal body to an end of the insulating substrate, is wider on the third side and the fourth side than on the first side and the second side.

7. the surface metal body includes a first conductor pattern (521, 621) and a second conductor pattern (522, 622) that has a different potential from the first conductor pattern and is located adjacent to the first conductor pattern, The semiconductor device according to any one of claims 1 to 5, wherein the distance between the first conductor pattern and the second conductor pattern is an insulation width, which is the width from the end of the surface metal body to the end of the insulating base material, and is wider than the insulation width of the portion excluding the notched corner portion.

8. 8. The semiconductor device according to claim 7, wherein said spacing is at least 1.5 times the insulation width of the portion excluding said notched corner portion.

9. a substrate (50, 60) having an insulating base material (51, 61), a patterned front surface metal body (52, 62) disposed on the front surface of the insulating base material, and a rear surface metal body (53, 63) disposed on the rear surface of the insulating base material; a semiconductor element (40) having a first main electrode (41) and a second main electrode (42) provided on a surface opposite to the first main electrode in the plate thickness direction, the semiconductor element (40) being disposed on the substrate and electrically connected to the surface metal body; a sealing resin body (30) that seals the substrate and the semiconductor element, the rear surface metal body has an exposed surface (53a, 63a) exposed from the sealing resin body and thermally connected to a cooler, The sealing resin body has a gate mark (32), The substrate has four sides that form a rectangular outline in a plan view in the plate thickness direction, including a first side (515, 615) and a second side (517, 617), and a third side (514, 614) and a fourth side (516, 616) that are positioned farther from the gate mark than the first side and the second side, an insulation width, which is a width from an end of the surface metal body to an end of the insulating base material, is wider on the third side and the fourth side than on the first side and the second side.

Images