Thin film capacitor

The thin film capacitor design with a metal substrate and UV-irradiated dielectric ceramic oxide layer addresses mechanical and dielectric property challenges, enabling flexible, high-capacitance capacitors for curved surfaces and complex electronic devices.

JP2025146179APending Publication Date: 2025-10-03NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE & TECHNOLOGY
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Patent Information

Application Number
JP2024046819
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-22
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

Conventional thin-film capacitors face challenges in achieving desirable mechanical and dielectric properties when manufactured using high-temperature firing or UV light irradiation processes, making them unsuitable for mounting on curved surfaces due to issues like cracks, reduced dielectric constant, and substrate damage.

Method used

A thin film capacitor design featuring a substrate with a metal surface, a dielectric ceramic oxide crystal layer, and an upper metal electrode, where the crystal grain size is 40 μm or less, allowing for ultraviolet light irradiation to form a dense dielectric layer without high-temperature exposure, maintaining mechanical properties and enabling mounting on curved surfaces.

Benefits of technology

The solution results in thin-film capacitors with high flexibility, high capacitance, low dielectric loss, and resistance to short-circuiting, suitable for complex-shaped electronic devices, including those with curved surfaces.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a thin film capacitor capable of being mounted on curved surfaces and having excellent dielectric properties.SOLUTION: The thin film capacitor includes a substrate having a metal surface, a dielectric ceramic oxide crystal layer formed on the metal surface, and an upper metal electrode formed on the dielectric ceramic oxide crystal layer. The grain size of the metal surface is 40 μm or less.SELECTED DRAWING: None
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Description

[Technical Field]

[0001] The present invention relates to a thin film capacitor. [Background technology]

[0002] Capacitors with a structure in which a dielectric ceramic material is sandwiched between metals, and multilayer capacitors with a structure in which dielectric layers made of a dielectric ceramic material and metal electrodes are repeated in hundreds of layers, are used for a variety of applications. Capacitors have traditionally been mounted on IC circuit boards. However, in recent years, there has been a demand for space savings by mounting capacitors in locations other than on the IC circuit board. For example, Patent Documents 1 and 2 propose mounting thin-film decoupling capacitors inside IC circuit boards.

[0003] Furthermore, in the rapidly developing 3D devices typified by wearable devices, the demand for capacitors that can be mounted on curved surfaces is expected to increase due to the aforementioned space-saving needs and the fact that devices increasingly do not have flat surfaces. The following approaches are conceivable to meet this demand: (1) Manufacturing a flexible thin-film capacitor whose base material is made of a single metal or alloy, and mounting it on a curved surface using adhesives or thermocompression bonding; and (2) Forming a metal on the curved surface of a device made of a polymer or other material by plating or printing, and then forming a dielectric layer and upper electrode directly on that metal.

[0004] In a typical thin-film capacitor manufacturing process, a dielectric precursor film is formed on a metal substrate and then fired at temperatures between 800°C and 1000°C to crystallize the dielectric layer. High-temperature firing to form a dense dielectric crystalline layer is crucial for improving capacitor performance. However, the high-temperature firing process simultaneously heats the metal substrate, causing internal stress relaxation and recrystallization and grain growth, which reduces the metal's hardness and folding resistance. Additionally, firing is typically performed in a reducing gas atmosphere containing hydrogen to prevent oxidation of the metal substrate, which can lead to hydrogen embrittlement of the metal substrate. These factors make thin-film capacitors manufactured through high-temperature firing difficult to mount on curved surfaces with small radii of curvature.

[0005] Furthermore, when a dielectric layer is fired at high temperatures in a reducing gas atmosphere, oxygen deficiency causes electrical conductivity, resulting in the loss of dielectric function. Therefore, dielectric layers fired at high temperatures in a reducing gas atmosphere must be made resistant to reduction by adjusting their composition. For example, when forming a dielectric layer using BaTiO3, the insulating properties can be maintained even when fired in a reducing atmosphere by varying the ratio of Ba to Ti or by doping with rare earth elements. However, such composition adjustments to impart reduction resistance can sometimes result in a decrease in the dielectric constant.

[0006] On the other hand, in Patent Document 3 and Non-Patent Documents 1 and 2, BaTiO3 and Ba 0.6 Sr 0.4 It has been proposed to irradiate a precursor film with ultraviolet light rather than high-temperature firing in order to form a TiO3 dielectric layer on a metal substrate. Ceramic materials that can form a crystalline film by ultraviolet light irradiation include materials containing metal ions that absorb ultraviolet light, especially materials containing transition metal ions that cause d-electron transitions. Examples include TiO2, VO2, Fe2O3, Cu2O, ZnO, Y2O3, RuO2, and In. 2-x Sn x O3, SnO2, WO3, BaTiO3, PbTiO3, La x Sr 1-x MnO3, RbLaNb2O7, Mn 3-x-y-z Co x Niy Cu z There have been reports of crystalline films such as O4 and LaNiO3 (Reference: Haribabu Palneedi, Jung Hwan Park, Deepam Maurya, Mahesh Peddigari, Geon-Tae Hwang, Venkateswarlu Annapureddy, Jong-Woo Kim, Jong-Jin Choi, Byung-Dong Hahn, Shashank Priya, Keon Jae Lee, and Jungho Ryu, “Laser Irradiation of Metal Oxide Films and Nanostructures: Applications and Advances”, Advanced Materials 2018,30, e1705148.).

[0007] However, UV light does not necessarily crystallize materials, and this difficulty in crystallization becomes more pronounced when metal substrates are used. The heat imparted to the dielectric layer by UV light escapes through metals with high thermal conductivity, limiting its effective use for crystallization. For example, Patent Document 3 sets a range for the film thickness of the precursor after applying a solution containing an organometallic compound to a metal substrate. The crystallization of the dielectric layer produced by irradiating this precursor film with UV light is observed using X-ray diffraction. Furthermore, Non-Patent Document 2 reports the formation of a dielectric layer by applying a solution containing organometallic compounds, such as an organobarium compound, an organotitanium compound, and BaTiO3 nanoparticles, and then irradiating it with UV light. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-171397 [Patent Document 2] Japanese Patent Publication No. 2020-88260 [Patent Document 3] Japanese Patent Application Laid-Open No. 2009-242900 [Non-patent literature]

[0009] [Non-Patent Document 1] Min-Gyu Kang, Kwang-Hwan Cho, Young Ho Do, Young-Jin Lee, Sahn Nahm, Seok-JinYoon, and Chong-YunKang, “Large in-Plane Permittivity of Ba0.6Sr0.4TiO3 Thin Films Crystallized Using Excimer Laser Annealing at 300℃”, Applied Physics Letter,2012,101,242910. [Non-patent document 2] Tomohiko Nakajima and YuuKi Kitanaka, “Printing Formation of Flexible (001)-Oriented PZT Films on Plastic Substrates”, Materials, 2023, 16, 2116. Summary of the Invention [Problem to be solved by the invention]

[0010] However, the evaluation of crystallinity in Patent Document 3 was performed solely by X-ray diffraction. Because X-ray diffraction does not determine whether the entire dielectric layer is crystallized, the dielectric layer in Patent Document 3 cannot be expected to have sufficient properties for a thin-film capacitor. In fact, in Non-Patent Document 1, which uses manufacturing conditions similar to those in Patent Document 3, transmission electron microscope observation and dielectric property evaluation revealed that only the surface of the dielectric layer was crystallized, while the interior remained amorphous, resulting in a corresponding decrease in dielectric constant. Even if crystallization progresses, problems are anticipated, such as cracks in the crystalline film due to volume shrinkage during crystallization of the amorphous phase caused by calcination of the organic or inorganic salt, or significant damage to the underlying metal, making it impossible to design a thin-film capacitor with desirable mechanical properties. Furthermore, since Non-Patent Document 2 does not include a crystallization process for the organometallic compound, the dielectric layer is composed of amorphous phases and nanoparticles, which is expected to have poor dielectric properties. In other words, thin-film capacitors manufactured using conventional high-temperature firing processes and UV light irradiation processes both have difficulty achieving desirable mechanical and dielectric properties.

[0011] An object of the present invention is to provide a thin film capacitor that can be mounted on a curved surface and has excellent dielectric properties. [Means for solving the problem]

[0012] The present invention has the following aspects. [1] A substrate having a metal surface on its surface; a dielectric ceramic oxide crystal layer formed on the metal surface; an upper metal electrode formed on the dielectric ceramic oxide crystal layer, A thin film capacitor, wherein the crystal grain size of the metal surface is 40 μm or less. [2] The thin film capacitor according to [1], which has a dielectric loss of less than 10% when placed on a flat surface. [3] A thin film capacitor according to [2], which maintains the same capacitance and dielectric loss when placed on a curved surface with a curvature radius of 2 mm or more as when placed on a flat surface. [4] The thin film capacitor according to [3], which does not short-circuit when placed on a curved surface with a curvature radius of 0.75 mm or more. [5] The thin film capacitor according to any one of [1] to [4], wherein the substrate is a single Ni foil. [6] The thin film capacitor according to [5], wherein the substrate has a nanoindentation hardness of 1.2 GPa or more. [7] The thin film capacitor according to [5], wherein the substrate has an elastic deformation power of 10% or more in an indentation hardness test with a maximum load of 50 mN. [8] The thin film capacitor according to [5], wherein the substrate is a rolled Ni foil, and the Young's modulus of the rolled Ni foil is 70 GPa or more. [Effects of the Invention]

[0013] According to the present invention, by using ultraviolet light irradiation, a dense dielectric crystal layer can be formed without exposing the substrate to high temperatures. This allows for the production of thin-film capacitors without changing the mechanical properties of the metal portion of the substrate, or with a substrate having a low heat-resistant material in part. This allows for the production of thin-film capacitors with high flexibility, high capacitance, and low dielectric loss. The thin-film capacitor of the present invention can be mounted not only inside IC circuit boards but also on curved surfaces, making it suitable for use in confined and narrow spaces. Furthermore, when the ferroelectric or piezoelectric material is a dielectric ceramic oxide crystal layer such as BaTiO3, it can be used not only for decoupling applications as a capacitor but also for sensor applications such as thermistors and piezoelectric sensors, thereby promoting the improvement of the performance of electronic devices with complex shapes. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a transmission electron microscope image of a cross section of a Ni foil having BaTiO3 formed thereon, obtained in Example 1. [Figure 2]FIG. 1 is a comparative diagram of XRD patterns of Ni foil having BaTiO3 formed thereon and Ni foil having no dielectric layer formed thereon, measured from the BaTiO3 side, obtained in Example 1 and Comparative Example 1. [Figure 3] 1 is a comparative diagram of optical electron microscope images of Ni foils having BaTiO3 formed thereon, obtained in Example 1 and Comparative Example 1, measured from the side where BaTiO3 is not formed. [Figure 4] 1 is a diagram showing the capacitance and dielectric loss of a thin film capacitor obtained in Example 1 when mounted on a curved surface. [Figure 5] FIG. 1 is a diagram showing a load-displacement curve and elastic deformation power obtained in a nanoindentation test. [Figure 6] FIG. 1 is a comparison diagram of nanoindentation hardness, Young's modulus, and elastic deformation power of Ni foils obtained in Example 1 and Comparative Example 1, each having BaTiO3 formed on the top side thereof and having no dielectric layer formed thereon. DETAILED DESCRIPTION OF THE INVENTION

[0015] An embodiment of the thin film capacitor of the present invention will be described. It should be noted that the present embodiment is specifically described to allow a better understanding of the gist of the invention, and does not limit the present invention unless otherwise specified.

[0016] [Thin film capacitor] A thin film capacitor according to one embodiment of the present invention comprises a substrate, a dielectric ceramic oxide crystal layer formed on the substrate, and an upper metal electrode formed on the dielectric ceramic oxide crystal layer.

[0017] "Base material" When a single metal or alloy is used as the substrate, either rolled foil or electrolytic foil, known as foil, can be used. However, rolled foil is preferable for achieving high flexibility. Examples of materials for the substrate include Ni, Al, Pt, Au, and alloys containing these metals.

[0018] The thickness of the substrate is not particularly limited, but is preferably 1 μm to 100 μm. In particular, from the viewpoint of achieving both mechanical strength and flexibility, the thickness of the substrate is preferably 5 μm to 30 μm.

[0019] When a polymer having a metal portion formed thereon is used as the substrate, polymers known as flexible substrates, such as polyimide, polyethylene terephthalate, and polyethylene naphthalate, can be used. Alternatively, engineering plastics such as cycloolefin polymer, polycarbonate, and polyphenylene sulfide can be used as substrates used in imprinting techniques and mold molding. Examples of metals that can be used to form metal portions on these polymers include Ni, Cu, Ag, Pt, and Au. Metal portions made of these metals can be formed by techniques such as sputtering, electroplating, inkjet coating of metal nanoparticles, and laser direct structuring.

[0020] The crystal grain size on the metal surface of the substrate is 40 μm or less, preferably 20 μm or less, and more preferably 10 μm or less. According to the Hall-Petch relation, when the crystal grain size of the substrate is equal to or less than the upper limit, sufficient bending strength is obtained to enable the capacitor to be installed on a curved surface.

[0021] The crystal grain size on the metal surface of the substrate is measured by a section method on an optical microscope image.

[0022] The nanoindentation hardness of the metal surface of the substrate is preferably 1.2 GPa or more, more preferably 1.5 GPa or more, and even more preferably 2.0 GPa or more. When the nanoindentation hardness of the substrate is equal to or greater than the lower limit, warping of the substrate is suppressed, making subsequent processes easier.

[0023] The nanoindentation hardness of the metal surface of the substrate is measured by the nanoindentation method ISO14577 instrumented indentation test.

[0024] The elastic deformation power of the metal surface of the substrate, measured by an indentation hardness test with a maximum load of 50 mN, is preferably 10% or more, more preferably 15% or more. When the elastic deformation power of the substrate is equal to or greater than the lower limit, the occurrence of plastic deformation during bending is suppressed, making repeated bending easier.

[0025] The method for measuring the elastic deformation power by an indentation hardness test with a maximum load of 50 mN on the metal surface of the substrate is the nanoindentation method ISO14577 instrumented indentation test.

[0026] The Young's modulus of the metal surface of the substrate is preferably 70 GPa or more, more preferably 80 GPa or more. When the Young's modulus of the substrate is equal to or more than the lower limit, warping of the substrate is suppressed, making subsequent processes easier.

[0027] The Young's modulus of the base metal surface is measured by the nanoindentation method ISO14577 instrumented indentation test.

[0028] "Dielectric ceramic oxide crystal layer" Examples of materials for forming the dielectric ceramic oxide crystal layer include BaTiO3, Ba 1-x Sr x TiO3, Ba 1-x Ca x TiO3, BaTi 1-x Zr x O3, BaTi 1-x Sn x O3, etc. These may be used alone or in combination of two or more. A mixed state can be achieved by using different metal elements in the organic or inorganic salt and the crystalline ceramic nanoparticles, or by mixing and using crystalline ceramic nanoparticles made of multiple materials.

[0029] "Organic or inorganic salts" The organic salt or inorganic salt contains a metal component that forms a dielectric layer. Examples of the dielectric layer include BaTiO3, Ba 1-x Sr x TiO3, Ba 1-x Ca xTiO3, BaTi 1-x Zr x O3, BaTi 1-x Sn x O3, and the metal components of the organic or inorganic salts include Ca, Ti, Sr, Zr, Sn, Ba, Pb, and the like.

[0030] The organic salts include organometallic compounds or metal alkoxides, which are represented by the general formula M m R n (M is one or more elements selected from Ca, Ti, Sr, Zr, Sn, Ba, Pb, etc.; R is at least one selected from alkyl groups having 1 to 4 carbon atoms (CH3, C2H5, C3H7, C4H9), carboxyl groups having 1 to 4 carbon atoms (CH3COO, C2H5COO, C3H7COO, C4H9COO), and carbonyl groups, etc.; m and n are integers.) or a long-chain alkoxide having 6 or more carbon atoms is preferred. Examples of preferred organometallic compounds or metal alkoxides include 2-ethylhexanoate, acetylacetone complex, naphthenate, acetate, ethoxide, isopropoxide, etc.

[0031] Inorganic salts include normal salts, acidic salts, and basic salts. Normal salts include ammonium salts, carbonates, nitrates, and halides. Acid salts include hydrogen carbonates and hydrogen sulfates. Examples of basic salts include carbonate hydroxides and hydroxides. Among these, those that do not corrode the substrate when dissolved in water and applied to the substrate are preferred.

[0032] "Crystalline ceramic nanoparticles" Crystalline ceramic nanoparticles, like organic or inorganic salts, are ceramic materials that form dielectric ceramic oxide crystal layers. The size of the crystalline ceramic nanoparticles determines the minimum thickness of the crystal film formed in one pass. It is important that the crystallization-promoting effect of light absorption be exerted even near the interface, where the intensity of penetrating light is lowest, during UV light irradiation. The upper limit of the average primary particle size of crystalline ceramic nanoparticles is set based on the material's absorption coefficient in the UV region, and is set to five times the reciprocal of the absorption coefficient. The lower limit of the average primary particle size is determined based on the desired performance of the crystal film. For example, in the case of BaTiO3, the average primary particle size should be 0.5 nm or more and 110 nm or less. In particular, the average primary particle size is preferably 30 nm or more and 100 nm or less. If the average primary particle size is less than the minimum value, there is a concern that the capacitance will be significantly reduced due to size effects. If the average primary particle size exceeds the upper limit, the effect of promoting crystallization by light absorption will not be fully realized, resulting in insufficient formation of a dense film and a decline in the functionality of the dielectric ceramic oxide crystal layer. In addition, when nanoparticles with a large average primary particle size are used, the bending strength will decrease due to the Hall-Petch relationship, making them more susceptible to fracture, which will limit the installation locations of thin film capacitors.

[0033] Crystalline ceramic nanoparticles include, for example, BaTiO3, Ba 1-x Sr x TiO3, Ba 1-x Ca x TiO3, BaTi 1-x Zr x O3, BaTi 1-x Sn x Examples include O3.

[0034] The thickness of the dielectric ceramic oxide crystal layer is preferably 100 nm or more and 1 μm or less. If the thickness of the dielectric ceramic oxide crystal layer is less than the lower limit, there is a concern that the coercive voltage will be insufficient and the dielectric constant will be significantly reduced due to the size effect of the dielectric material. If the thickness of the dielectric ceramic oxide crystal layer exceeds the upper limit, there is a concern that the capacitance as a capacitor will be reduced and that the bending resistance of the dielectric ceramic oxide crystal layer will be impaired, making it difficult to mount on a curved surface.

[0035] "Top metal electrode" Examples of metals that can be used to form the upper metal electrode include Pt, Au, and Cu.

[0036] The thickness of the upper metal electrode is preferably 30 nm or more and equal to or less than the thickness of the substrate, more preferably 100 nm or more and equal to or less than the thickness of the substrate, and is thin enough to be installed inside a standard circuit board and thick enough to reduce bending stress in the dielectric ceramic oxide crystal layer when bent.

[0037] The thin film capacitor of this embodiment preferably has a dielectric loss of less than 10%, more preferably less than 5%, when placed on a flat surface. If the dielectric loss when placed on a flat surface is less than the upper limit, the standard required for a standard capacitor is met.

[0038] The dielectric loss of a thin film capacitor placed on a flat surface is measured by evaluating the dielectric characteristics at a measurement frequency of 10 kHz.

[0039] When the thin film capacitor of this embodiment is installed on a curved surface with a curvature radius of 2 mm or more, it is preferable that the capacitance and dielectric loss maintain the same values ​​as when it is installed on a flat surface, which makes it possible to install it as a standard capacitor in smart rings, stylus pens, general three-dimensional circuits, etc.

[0040] The capacitance of a thin film capacitor placed on a curved surface with a curvature radius of 2 mm or more is measured by evaluating the dielectric characteristics at a measurement frequency of 10 kHz.

[0041] The dielectric loss when a thin film capacitor is placed on a curved surface with a curvature radius of 2 mm or more is measured by evaluating the dielectric characteristics at a measurement frequency of 10 kHz.

[0042] The thin film capacitor of this embodiment preferably does not short-circuit when installed on a curved surface with a curvature radius of 0.75 mm or more, which makes it possible to mount it on a foldable smartphone, a small screw, etc.

[0043] The method for checking whether or not a short circuit occurs when a thin film capacitor is placed on a curved surface with a curvature radius of 0.75 mm or more is to evaluate the dielectric properties at a measurement frequency of 10 kHz.

[0044] The thin film capacitor of this embodiment can provide a thin film capacitor with high flexibility, large capacitance, and low dielectric loss. The thin film capacitor of the present invention can be mounted not only inside an IC circuit board but also on a curved surface, thereby promoting the improvement of the performance of electronic devices with complex shapes.

[0045] [Method of manufacturing thin film capacitors] A method for manufacturing a thin film capacitor according to one embodiment of the present invention includes a dielectric ceramic oxide crystal layer forming step of forming a dielectric ceramic oxide crystal layer on a substrate, and an upper metal electrode forming step of forming an upper metal electrode on the dielectric ceramic oxide crystal layer.

[0046] "Dielectric ceramic oxide crystal layer formation process" The dielectric ceramic oxide crystal layer forming process includes a step of applying a dielectric ceramic oxide crystal layer forming ink onto a substrate to form a coating film (hereinafter referred to as the "coating process"), a step of drying and calcining the coating film to form a precursor film (hereinafter referred to as the "precursor film forming process"), and a step of crystallizing the precursor film by light irradiation (hereinafter referred to as the "crystallization process"). The dielectric ceramic oxide crystal layer is a dense crystal layer formed by repeating a coating step, a precursor formation step, and a crystallization step in this order. The above-described characteristics of the substrate are maintained not only before the thin film capacitor is manufactured but also after the thin film capacitor is manufactured.

[0047] "Coating process" The dielectric ceramic oxide crystal layer forming ink contains a solvent, the organic salt or inorganic salt, and the crystalline ceramic nanoparticles. In addition, the dielectric ceramic oxide crystal layer forming ink may contain a surfactant to improve wettability to metal parts and dispersibility of nanoparticles. The thickness of the dielectric precursor film can be controlled by controlling the amount of organic salt or inorganic salt and crystalline ceramic nanoparticles contained in the dielectric ceramic oxide crystal layer forming ink. Furthermore, to obtain a high-quality dielectric ceramic oxide crystal layer, it is necessary to control the ratio of the content of the organic salt or inorganic salt to the content of the crystalline ceramic nanoparticles in the dielectric ceramic oxide crystal layer forming ink.

[0048] The solvent is not particularly limited as long as it can dissolve organic or inorganic salts and disperse crystalline ceramic nanoparticles. When an organic salt is used, examples of the solvent include aromatic hydrocarbons such as toluene and xylene, aliphatic hydrocarbons such as liquid paraffin, alcohols such as 1-butanol and isopropanol, and esters such as ethyl acetate. When an inorganic salt is used, examples of the solvent include water and alcohol. These solvents may be used alone or in combination of two or more.

[0049] In the ink for forming a dielectric ceramic oxide crystal layer, the dissolved organic or inorganic salt crystallizes while filling the gaps between the crystalline ceramic nanoparticles, making it essential for forming a dense layer. If the ink for forming a dielectric ceramic oxide crystal layer contains only an organic or inorganic salt, the crystallization of the entire dielectric ceramic oxide crystal layer will not proceed, as described above, or cracks will likely occur in the dielectric ceramic oxide crystal layer. Therefore, it is also important that the ink for forming a dielectric ceramic oxide crystal layer contains crystalline ceramic nanoparticles. In other words, it is essential that the ratio of the content of the organic or inorganic salt to the content of the crystalline ceramic nanoparticles is within an appropriate range.

[0050] In the ink for forming a dielectric ceramic oxide crystal layer, the ratio (V2 / V1) of the volume V2 of the crystalline ceramic nanoparticles to the volume V1 of the ceramic crystals formed by crystallizing an organic or inorganic salt is preferably 0.1 or more and 2.8 or less, more preferably 0.2 or more and 1.5 or less. If V2 / V1 is less than the lower limit, the crystallization of the entire dielectric ceramic oxide crystal layer will be insufficient due to a lack of crystalline ceramic nanoparticles, and its dielectric properties will be reduced. If V2 / V1 exceeds the upper limit, the crystal layer connecting the crystalline ceramic nanoparticles will be insufficient, resulting in an increase in cracks and voids, and its functionality will be reduced. The mixing ratio of the organic or inorganic salt containing a metal element to the crystalline ceramic nanoparticles in the dense crystalline film-forming ink can be appropriately determined from the V2 / V1 ratio. According to this embodiment, ideally, the dense crystalline film has uniform film quality throughout. When the ceramic crystals obtained by crystallizing the organic or inorganic salt and the crystalline ceramic nanoparticles have the same composition, V2 / V1 is set within the above range, and the organic or inorganic salt and the crystalline nanoparticles are mixed so that the ratio (X2 / X1) of the amount of metal component X1 in the organic or inorganic salt to the amount of metal component X2 contained in the crystalline nanoparticles is X2 / X1 = V2 / V1. When the ceramic crystals obtained by crystallizing the organic or inorganic salt and the crystalline ceramic nanoparticles do not have completely identical compositions, the mixing ratio can be appropriately determined taking into account the densities of each.

[0051] In the coating step, the ink for forming a dielectric ceramic oxide crystal layer can be applied to the substrate by a general method that allows for planar coating, such as spin coating, bar coating, die coating, etc. By controlling the coating step, the thickness of the dielectric precursor film can be controlled.

[0052] "Precursor formation process" In the precursor formation process, the dielectric ceramic oxide crystal layer forming ink applied to the substrate is dried at a temperature of 500°C or less. When using a single metal or alloy, such as Ni, with a recrystallization temperature of 350°C or higher as the substrate, drying at a temperature of 300°C or less is desirable to prevent oxidation, softening, and the growth of crystal grains in the substrate. Furthermore, when using a polymer substrate, drying at a temperature below the denaturation / decomposition temperature or softening point of the polymer is desirable. The dielectric ceramic oxide crystal layer forming ink can be dried and calcined using a hot plate, electric furnace, lamp heating, or other means. It may then be irradiated with ultraviolet light of a strength not sufficient to induce crystallization. This converts the organic or inorganic salts contained in the dielectric ceramic oxide crystal layer forming ink into amorphous metal compounds, further densifying the dielectric precursor film composed of amorphous and nanoparticles.

[0053] "Crystallization process" After the coating step and precursor formation step, a highly crystalline dielectric ceramic oxide crystal layer is formed for each layer of the dielectric precursor film by irradiating the dielectric precursor film with ultraviolet light in the crystallization step. During the ultraviolet light irradiation process, the substrate on which the dielectric precursor film has been formed may be heated at a temperature of 500°C or less. In particular, when a single metal or alloy with a recrystallization temperature of 350°C or higher is used as the substrate, heating at a temperature below 350°C is desirable because this suppresses the progress of softening of the substrate and the growth of crystal grains in the substrate metal, prevents oxidation of the substrate, and maintains the mechanical and electrical properties of the substrate metal.

[0054] The ultraviolet light source used to irradiate the dielectric precursor film is not particularly limited, and may be an excimer laser with a wavelength of 193 nm or more and 351 nm or less, a semiconductor laser, a pumped solid-state (DPSS) laser with a wavelength of 193 nm or more and 380 nm or less, etc. Among these, an excimer laser is preferred because it has high photon energy and can significantly promote crystallization.

[0055] The atmosphere in which ultraviolet light is irradiated is not particularly limited, and may be any of air, vacuum, oxygen gas, nitrogen gas, rare gas, hydrogen, or a mixture thereof. The atmospheric gas may be an air stream using a tubular furnace or the like, or may be a still chamber. However, irradiation in hydrogen is not preferred from the viewpoint of suppressing reduction of the dielectric ceramic oxide crystal layer and embrittlement of the base metal portion.

[0056] "Top metal electrode formation process" In the electrode formation process, the upper metal electrode is formed on the crystallized dielectric ceramic oxide crystal layer using methods such as sputtering or vapor deposition, which do not expose the substrate to a high-temperature environment. Metals used to form the upper metal electrode include Cu, Ag, Pt, and Au. These methods are thought to leave the mechanical properties of the metal part of the substrate unchanged, so evaluations using samples either before or after the formation of the upper metal electrode represent the mechanical properties of the completed thin-film capacitor.

[0057] It is also possible to form a multilayer ceramic capacitor by repeatedly forming a dielectric ceramic oxide crystal layer and an upper metal electrode on the upper metal electrode by the above-mentioned method, etc. In this case, in order to maintain the mechanical properties of the metal constituting the substrate, it should not be placed in a high-temperature environment. [Example]

[0058] The present invention will be explained in more detail below with reference to examples, but the present invention is not limited to the following examples.

[0059] [Example 1] 1.000 mL of BaO coating material (product name: SYM-BA05, manufactured by Kojundo Chemical Laboratory Co., Ltd.) containing an organic barium compound at a concentration of 0.5 mol / L, 1.000 mL of TiO coating material (product name: SYM-TI05, manufactured by Kojundo Chemical Laboratory Co., Ltd.) containing an organic titanium compound at a concentration of 0.5 mol / L, and 0.200 mL of a dispersion liquid (BtMin, manufactured by NYAOL Nano Technology, Inc.) containing BaTiO nanoparticles with an average primary particle size of 50 nm at a concentration of 1.6 mol / L were mixed together. 2.200 mL of a dilution solvent consisting of xylene (Wako Special Grade, manufactured by Fujifilm Wako Pure Chemical Corporation) and liquid paraffin (Wako Special Grade, manufactured by Fujifilm Wako Pure Chemical Corporation) mixed in a volume ratio of 9:1 was then added and mixed to obtain thin-film capacitor-forming ink C1. At this time, based on the values ​​provided by the sales company and the values ​​obtained by measurements by the inventors, the ratio (V2 / V1) of the volume V2 of the nanoparticles to the volume V1 of the ceramic crystals formed by crystallizing the organometallic compound was determined to be 0.64.

[0060] Next, the ink C1 for forming thin film capacitors was dropped onto one side of a 0.010 mm thick rolled Ni foil (99%+, manufactured by Nilaco Corporation) as a substrate, and spin-coated at 4000 rpm for 10 seconds. After coating, the Ni foil was pre-baked at 150°C for 5 minutes and then at 300°C for 10 minutes, and then irradiated with a KrF excimer laser with a wavelength of 248 nm and a pulse width of 26 ns at a substrate temperature of 300°C at 30 mJ / cm.2 A dense dielectric precursor film consisting of amorphous and nanoparticles was obtained by irradiating the film with 500 pulses at a fluence of 80 mJ / cm. 2 The ink was then irradiated with 500 pulses at a fluence of 1000 Hz to form a highly crystalline BaTiO3 (dielectric layer). The process from ink application to laser irradiation was repeated three times. The resulting sample was subjected to transmission electron microscope observation, X-ray diffraction measurement, optical microscope observation, nanoindentation testing, and MIT folding endurance testing. A thin-film capacitor was fabricated by forming an upper metal electrode approximately 300 nm thick by Au sputtering on the BaTiO3 surface. The dielectric properties of the resulting thin-film capacitor were measured.

[0061] [Example 2] The laser irradiation was 80 mJ / cm at a substrate temperature of 300°C. 2 A thin film capacitor was obtained under the same conditions as in Example 1, except that the irradiation was 500 pulses at a fluence of 1000.

[0062] [Example 3] The laser irradiation conditions were 30 mJ / cm at a substrate temperature of 300°C. 2 500 pulses at a fluence of 80 mJ / cm 2 A thin film capacitor was obtained under the same conditions as in Example 1, except that the irradiation was 2000 pulses at a fluence of 1000.

[0063] [Example 4] A thin-film capacitor was obtained under the same conditions as in Example 1, except that the raw materials contained in the ink were 1.000 mL of the BaO coating material, 1.000 mL of the TiO coating material, 0.400 mL of the BaTiO nanoparticle dispersion, and 7.200 mL of the dilution solvent, and the obtained ink C2 for forming a thin-film capacitor was used.

[0064] [Example 5] A thin-film capacitor was obtained under the same conditions as in Example 1, except that the ink C3 for forming a thin-film capacitor was used, with the raw materials contained in the ink being 0.700 mL of the BaO coating material, 0.300 mL of an SrO coating material (product name: SYM-SR05, manufactured by Kojundo Chemical Laboratory Co., Ltd.) containing an organic strontium compound at a concentration of 0.5 mol / L, 1.000 mL of the TiO coating material, 0.200 mL of the BaTiO nanoparticle dispersion, and 2.200 mL of the dilution solvent.

[0065] [Comparative Example 1] A thin-film capacitor was obtained under the same conditions as in Example 1, except that the crystallization process was performed by high-temperature firing in a reducing atmosphere. The ink C1 for forming thin-film capacitors was dropped onto one side of the 0.010 mm-thick Ni foil and applied by spin coating at a rotation speed of 4000 rpm for 10 seconds. After application, the Ni foil was dried at 150°C for 5 minutes and then at 300°C for 10 minutes. The process from ink application to drying was repeated three times. The substrate was placed in a tubular furnace and fired at 900°C for 30 minutes while flowing H2 (4%)-N2 (96%) gas at 200 ml / min.

[0066] Comparative Example 2 A thin film capacitor was obtained under the same conditions as in Example 1, except that laser irradiation was not performed.

[0067] Comparative Example 3 The laser irradiation was 30 mJ / cm at a substrate temperature of 300 °C. 2 A thin film capacitor was obtained under the same conditions as in Example 1, except that the irradiation was 500 pulses at a fluence of 1000. Comparative Examples 2 and 3 are comparative examples characterized in that the crystallization of the dielectric layer did not progress.

[0068] Comparative Example 4 A thin film capacitor was obtained under the same conditions as in Example 1, except that the raw materials contained in the ink and the laser irradiation conditions were changed to those described in Non-Patent Document 2. The raw materials contained in the ink were 1.000 mL of the BaO coating material, 1.000 mL of the TiO2 coating material, and 1.000 mL of the BaTiO3 nanoparticle dispersion liquid, and the resulting ink C4 for forming a thin film capacitor was used. The laser irradiation conditions were 40 mJ / cm at a substrate temperature of 300°C. 2 The irradiation was performed with 2000 pulses at a fluence of 1000 Hz.

[0069] All measurements below were carried out at room temperature, approximately 25°C. [Transmission electron microscope observation] Using a transmission electron microscope (product name: H-9500, manufactured by Hitachi High-Tech Corporation), the cross section of the Ni foil with the dielectric layer formed on its surface was observed under the following conditions, and the film thickness and density of the dielectric layer were evaluated. The results are shown in Figure 1. Acceleration voltage: 200kV ·Magnification accuracy: ±10%

[0070] [X-ray diffraction measurement] Using an X-ray diffractometer (product name: SmartLab, manufactured by Rigaku Corporation), X-ray diffraction measurements were performed on Ni foil without a dielectric layer and Ni foil with a dielectric layer formed on the surface (Example 1, Comparative Example 1), and the presence or absence of crystallization of the dielectric layer and grain growth of the Ni foil were evaluated. The results are shown in Figure 2.

[0071] [Optical microscope observation] The Ni foil after the dielectric layer was formed was observed using a digital microscope (product name: VH-7000, manufactured by Keyence Corporation). The surface on which the dielectric layer was not formed was observed to evaluate the crystal grain size of the Ni foil. Both Ni foils that had been etched by acid washing before observation and those that had not been etched were observed. The results are shown in Figure 3.

[0072] The grain size d was evaluated by the Heyn method using the optical microscope image (reference: Yoshimasa Takayama, "Methods for Estimation and Determination of Grain Size", Journal of Japan Institute of Light Metals, 1994, 44, 48.). In the Heyn method, a straight line with a total length L is drawn on the sample image, and the number of intersections between the line and the grain boundary n is calculated. L Count up. L / n L The grain size d is calculated by multiplying the average intercept length calculated by the coefficient 1.78 calculated from the geometrical relation: d = 1.78L / n L It is more in demand. In this evaluation, three lines with a total length L were drawn vertically and horizontally on the sample image, and the arithmetic average was calculated from six measurements.

[0073] [Dielectric property evaluation] Using a precision component analyzer (product name: 6440A, Wayne Kerr Electronics, Inc.), the capacitance and dielectric loss were evaluated under the following conditions: Measurements were taken at 10 points on a thin-film capacitor placed on a flat surface, and the arithmetic mean was calculated. Measurement frequency: 10kHz Measurement voltage: 50mV ·Top electrode diameter: 0.5mm The dielectric properties were measured under bending stress by attaching the thin film capacitor to a metal cylinder with Scotch tape without overlapping, taking care to minimize the tensile stress. The measurement was performed under the same conditions as when the sample was placed on a flat surface, except for the five measurement points. The results are shown in Figure 4.

[0074] [Nanoindentation test] Using a nanoindenter (product name: IMicro, Nanomechanics, Inc.), indentation hardness tests were conducted under the following conditions in accordance with ISO 14577, and nanoindentation hardness, Young's modulus, and elastic deformation power were evaluated. For Ni foil without a dielectric layer and Ni foil with a dielectric layer formed on its surface, the tests were conducted from the Ni surface without the dielectric layer. Measurements were taken at six points on a clean, flat surface, and the arithmetic average was calculated. The results are shown in Figure 5. Indenter approach speed 100nm / s Maximum load: 50mN ·Load application acceleration: 2.5mN / s ·Maximum load holding time: 2 seconds ·Unloading speed: 2.5mN / s

[0075] [MIT folding endurance test] Using an MIT folding fatigue tester (product name: MIT D-2, manufactured by Toyo Seiki Seisakusho Co., Ltd.), folding endurance tests were conducted in accordance with JIS P 8115:2001. The number of times that the test specimens of untreated Ni foil without a dielectric layer and Ni foil with a dielectric layer formed on its surface could be folded back and forth until they broke was evaluated as the number of folding endurance cycles. The long side direction of the test specimen was the rolling direction of the foil. The results are shown in Figure 6. Loading method: Deadweight Test piece dimensions: 15mm x 110mm Load: 9.8N Bending angle: 135° Bending speed: 175 times per minute Bending surface curvature radius: R0.38mm

[0076] [Evaluation results] A transmission electron microscope image of the Ni foil with BaTiO3 formed on top, obtained in Example 1, is shown in Figure 1. The BaTiO3 film thickness is approximately 175 nm, and has a structure consisting of three layers of particles with a diameter of approximately 60 nm, confirming the formation of a dense dielectric layer. Light-colored areas, which represent voids or amorphous parts, are small and are observed at the Ni foil interface, accounting for approximately 3% of the surface area.

[0077] Figure 2 shows a comparison of the XRD patterns of Ni foil without a dielectric layer and the Ni foils with BaTiO3 formed on top, obtained in Example 1 and Comparative Example 1. Comparative Example 1, which includes a process exceeding approximately 500°C, the recrystallization temperature of Ni, exhibits significant changes in the Ni peak intensity ratio and half-width due to Ni recrystallization and grain growth. In contrast, Example 1, which does not include a process exceeding 500°C, exhibits only a small change in the Ni peak. This small change suggests that the thin-film capacitor obtained in Example 1 exhibits only a small change in the mechanical properties of the underlying metal before and after the formation of the dielectric layer. Furthermore, when the crystallite size of the Ni 200 peak was calculated using analysis software PDXL2 (Rigaku Corporation), the values ​​for the Ni foil without a dielectric layer and Example 1 were the same within the margin of error, whereas the value for Comparative Example 1 was 1.5 times larger. The presence or absence of grain growth was also evaluated from the crystallite size determined from XRD.

[0078] Figure 3 shows optical microscope images of the non-dielectric-layered side of the Ni foil with BaTiO3 formed on top, obtained in Example 1 and Comparative Example 1, before etching. In Comparative Example 1, the grain size was determined to be 58.0±17.5 μm. On the other hand, no clear crystal grains were observed in Example 1. Since the smallest grain size observed in Comparative Example 1 was 10 μm, it was determined that the Ni foil in Example 1 was composed of grains smaller than 10 μm. This is due to the fact that the maximum temperature during the capacitor manufacturing process was 300°C, which is below the recrystallization temperature of Ni. These results were independent of whether or not the Ni foil was etched. Furthermore, since crystal grains larger than 60 μm were observed in the Ni foil with the dielectric layer formed by high-temperature sintering using Patent Technology 1, it is clear that grain growth, which is unavoidable in conventional high-temperature sintering processes, was suppressed in Example 1.

[0079] As a result of the dielectric property evaluation, the thin film capacitors obtained in Examples 1 to 5 were free of short circuits and had a dielectric loss of 10% or less, confirming the formation of a dense dielectric layer. On the other hand, the thin film capacitor obtained in Comparative Example 1 had short circuits at all 10 points measured, presumably because the dielectric layer was reduced during firing and cracks in the BaTiO3 occurred due to stress generated during the growth of the Ni foil crystal grains. In Comparative Examples 2 and 3, an additional 80 mJ / cm was applied after the dielectric layer was formed. 2 By irradiating the dielectric layer with ultraviolet light, the interference color of the dielectric layer changes and the capacitance increases by more than two times, so the thin film capacitors of Comparative Examples 2 and 3 are not dense crystalline films, and a large amount of amorphous remains. In Comparative Example 4, the capacitance is 5% or less of that of Example 1, and a large amount of amorphous remains. These facts suggest that there are certain conditions for ultraviolet light irradiation and ink components in order to crystallize the entire dielectric layer. The dielectric properties of the thin film capacitor obtained in Example 1 when mounted on a curved surface are shown in Figure 4. The capacitance of this thin film capacitor when mounted on a flat surface at a measurement frequency of 10 kHz was 1.12 ± 0.08 μCcm -2 The dielectric loss was 0.040±0.008. The dielectric loss was below 10% over the entire measured frequency range, from 100Hz to 200kHz. As shown in Figure 4, these dielectric properties were maintained even when mounted on a curved surface, and when installed on a curved surface with a curvature radius of 2mm or more, the capacitance and dielectric loss maintained the same values, within the margin of error, as the capacitance and dielectric loss when installed on a flat surface. When the curvature radius was 2mm, the capacitance at a measurement frequency of 10kHz was 1.09±0.05μCcm -2 The dielectric loss is 0.043±0.007. There are no short circuits on the curved surface up to a curvature radius of 0.75 mm, and the capacitance at a measurement frequency of 10 kHz is 1 μCcm -2 More than 1.17±0.06μCcm -2 It can be mounted with excellent dielectric properties, with a dielectric loss of 0.066±0.014, which is less than 0.1.

[0080] Nanoindentation testing can evaluate not only basic mechanical properties such as hardness and Young's modulus, but also performance, such as elastic deformation power. Figure 5 shows the load-displacement curve obtained from this test, along with a schematic diagram of the elastic deformation power obtained from the curve. Figure 6 shows the nanoindentation hardness, Young's modulus, and elastic deformation power of Ni foil without a dielectric layer and Ni foils with BaTiO3 on top from Example 1 and Comparative Example 1. The Ni foil of Example 1, in which Ni internal stress relaxation, recrystallization, and grain growth were suppressed, maintained the mechanical properties unique to Ni foil, with a nanoindentation hardness of 2.30 GPa (1.2 GPa or more), a Young's modulus of 88.2 GPa (70 GPa or more), and an elastic deformation power of 17.7% (10% or more). On the other hand, Comparative Example 1, which underwent high-temperature sintering, showed a significant decrease in these mechanical properties due to the progression of Ni internal stress relaxation, recrystallization, and grain growth, resulting in a nanoindentation hardness of 0.69 GPa, a Young's modulus of 63.0 GPa, and an elastic deformation power of 7.2%.

[0081] It is also known that the Vickers hardness can be estimated using the nanoindentation hardness according to the following formula: Vickers hardness (kgf mm 2 ) = 94 × nanoindentation hardness (GPa) From the above formula, the Vickers hardness of the Ni foil of Example 1 and Comparative Example 1 is 216 kgf mm 2 and 64.86 kgf mm 2 As seen in Patent Document 1, etc., the Vickers hardness of Ni foil that has undergone internal stress relaxation, recrystallization, and grain growth is estimated to be 100 kgf mm 2 , that is, the nanoindentation hardness is below 1.1 GPa, so the high nanoindentation hardness of this example cannot be achieved by conventional capacitors.

[0082] Furthermore, standard Ni has a Young's modulus of about 200 GPa, and by rolling this, a highly flexible Ni rolled foil is obtained with a Young's modulus reduced to about 100 GPa. Ni rolled foil that has undergone internal stress relaxation, recrystallization, and grain growth during high-temperature firing has a Young's modulus below 70 GPa, as in Comparative Example 1, so the high Young's modulus of this example is unattainable in conventional capacitors.

[0083] As a result of the MIT folding endurance test, the number of folding times for the Ni foil with no dielectric layer formed thereon and the Ni foils with BaTiO3 formed thereon obtained in Example 1 and Comparative Example 1 were 145.7±14.6, 132.0±9.3, and 29.3±0.5, respectively. This result indicates that the thin film capacitor substrate of the present invention, in which internal stress relaxation, recrystallization, and grain growth of Ni are suppressed, maintains high folding endurance equivalent to that of Ni foil with no dielectric layer formed thereon.

Claims

1. a substrate having a metal surface on its surface; a dielectric ceramic oxide crystal layer formed on the metal surface; an upper metal electrode formed on the dielectric ceramic oxide crystal layer, A thin film capacitor, wherein the crystal grain size of the metal surface is 40 μm or less.

2. 2. The thin film capacitor according to claim 1, wherein the dielectric loss when placed on a flat surface is less than 10%.

3. 3. The thin film capacitor according to claim 2, wherein when placed on a curved surface with a curvature radius of 2 mm or more, the capacitance and dielectric loss maintain the same values ​​as when placed on a flat surface.

4. 4. The thin film capacitor according to claim 3, which does not short-circuit when placed on a curved surface with a radius of curvature of 0.75 mm or more.

5. 5. The thin film capacitor according to claim 1, wherein the substrate is a single Ni foil.

6. The thin film capacitor according to claim 5 , wherein the substrate has a nanoindentation hardness of 1.2 GPa or more.

7. 6. The thin film capacitor according to claim 5, wherein the substrate has an elastic deformation power of 10% or more in an indentation hardness test with a maximum load of 50 mN.

8. 6. The thin film capacitor according to claim 5, wherein the substrate is a rolled Ni foil, and the Young's modulus of the rolled Ni foil is 70 GPa or more.

Citation Information

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