Module
The module improves heat dissipation efficiency in SSD modules by using laminated metal layers on housing surfaces, maintaining performance and preventing temperature-related speed drops.
Patent Information
- Application Number
- JP2024047465
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-25
- Publication Date
- 2025-10-07
AI Technical Summary
Existing SSD modules with a housing configuration for electronic components face challenges in efficiently dissipating heat generated by semiconductor devices to the outside environment, as conventional methods like heat dissipation via a heat-dissipating rubber do not effectively address this issue.
The module incorporates a housing with opposing surfaces featuring a first and second metal layer laminated on the inner surfaces, forming a laminated portion in specific regions to enhance heat dissipation without increasing thickness, using copper foil sheets and aluminum plates for improved thermal conductivity.
This configuration significantly enhances heat dissipation efficiency, preventing temperature rise and maintaining data transfer speeds by effectively dissipating heat generated by semiconductor chips.
Smart Images

Figure 2025147270000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a module. [Background technology]
[0002] Patent Document 1 discloses an electronic device including an SSD (Solid State Drive) module. This conventional electronic device includes a circuit board, a DRAM (Dynamic Random Access Memory), an SSD controller, a NAND flash memory, a connector, a screw fastening portion, and a heat-dissipating rubber. The heat-dissipating rubber is arranged so as to contact the SSD controller and the ground wiring of the motherboard. This allows the electronic device to dissipate heat generated by the SSD controller to the motherboard via the heat-dissipating rubber. Furthermore, by arranging the heat-dissipating rubber so as to cover the SSD controller, the electronic device improves its resistance to vibration and impact. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 2023-140028 Summary of the Invention [Problem to be solved by the invention]
[0004] An external SSD module has a configuration in which a mounting board on which electronic components (semiconductor devices (semiconductor chips)) such as flash memory and a controller are mounted is housed in a housing. In modules with such a configuration, there is a demand for improving the heat dissipation efficiency, which allows the heat generated by the electronic components to be efficiently dissipated to the outside (external environment) via the housing. The conventional technology of Patent Document 1 dissipates heat to the motherboard via heat dissipation rubber. However, the conventional technology of Patent Document 1 does not take into consideration the heat dissipation efficiency of a configuration in which a mounting board is housed in a housing.
[0005] The present invention has been made to solve the above-mentioned problems. That is, one of the objects of the present invention is to provide a module that can improve heat dissipation efficiency. [Means for solving the problem]
[0006] In order to solve the above problem, the module of the present invention is a module comprising a housing having opposing first and second surface portions, and an electronic component mounting board housed in the housing and having a semiconductor device and a substrate on which the semiconductor device is mounted, wherein a first metal layer formed on at least a portion of the inner surface of at least one of the first and second surface portions of the housing is in direct or indirect contact with the housing-side surface of the semiconductor device, and a laminated portion in which the first metal layer and the second metal layer are stacked is formed in at least a portion of the second region between the outer peripheral edge of the first region including the contact surface between the first metal layer and the housing-side surface of the semiconductor device and the outer peripheral edge of the inner surface of the housing. [Effects of the Invention]
[0007] According to the present invention, it is possible to improve heat dissipation efficiency. Note that the effects described here are not necessarily limited to those described herein, and may be any of the effects described in this disclosure. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a perspective view showing the appearance of the module. [Figure 2] FIG. 2 is a perspective view showing an electronic component board group. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III' in FIG. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV' in FIG. [Figure 5] FIG. 5 is a plan view taken along line VV' in FIG. [Figure 6] FIG. 6 is a plan view taken along line VI-VI' in FIG. [Figure 7] FIG. 7 is a diagram showing a schematic cross-sectional configuration of the modules of Comparative Example 1, Comparative Example 2, and Example. [Figure 8A] FIG. 8A is a diagram for explaining the function and effect of the module of the first embodiment. [Figure 8B] FIG. 8B is a diagram for explaining the function and effect of the module of the first embodiment. [Figure 9] FIG. 9 is a graph showing the temperature characteristics of the semiconductor chips of the module of the example and the module of the comparative example 2. [Figure 10] FIG. 10 is a graph showing the temperature characteristics and data transfer rates of the module of the example and the module of Comparative Example 3. [Figure 11] FIG. 11 is a cross-sectional view taken along line III-III' in FIG. [Figure 12] FIG. 12 is a cross-sectional view taken along line IV-IV' in FIG. [Figure 13] FIG. 13 is a plan view taken along line XIII-XIII' in FIG. [Figure 14] FIG. 14 is a plan view taken along line XIV-XIV' in FIG. [Figure 15] FIG. 15 is a cross-sectional view taken along line III-III' in FIG. [Figure 16] FIG. 16 is a cross-sectional view taken along line III-III' in FIG. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. In all the drawings of the embodiments, the same or corresponding parts may be denoted by the same reference numerals.
[0010] <<First Embodiment>> <Configuration> A module according to a first embodiment of the present invention will be described. Fig. 1 is a perspective view showing the appearance of the module. The module according to the first embodiment is an external SSD module. The module includes a housing 100 and an electronic component mounting board group 200 (see Fig. 2).
[0011] The housing 100 has a first surface S1 and a second surface S2 that face each other in the vertical direction, a third surface S3 and a fourth surface S4 that face each other in the width direction, and a fifth surface S5 and a sixth surface S6 that face each other in the front-rear direction. A substantially rectangular storage space is formed in the housing 100 and is surrounded by the inner surfaces of the first surface S1 to the sixth surface S6. An electronic component mounting board group 200 shown in FIG. 2 is stored in this storage space.
[0012] An opening 101 that connects the inside to the outside is formed in the fifth surface S5 of the housing 100. A USB port 223 (see FIG. 2) for connecting to an external device (such as a PC (personal computer)) is exposed to the outside from the opening 101.
[0013] 2, the electronic component mounting board group 200 includes a first mounting board 210 and a second mounting board 220. The first mounting board 210 includes a first board 211 and electronic components including a controller 212 and a NAND flash memory 213 (hereinafter, sometimes referred to as "flash memory 213"). The first board 211 is mounted with electronic components and wiring (not shown). The controller 212 and the NAND flash memory 213 may be referred to as a "semiconductor chip" or a "semiconductor device."
[0014] The controller 212 is a control device for controlling the reading and writing of data from and to the flash memory 213. The flash memory 213 is a non-volatile storage element from which data can be read, written, and erased.
[0015] The second mounting substrate 220 includes a second substrate 221 and electronic components including a connector 222, a USB port 223, and a bridge IC (Bridge-IC) 224 (see FIG. 4). The second substrate 221 is mounted with electronic components and wiring (not shown). For convenience of explanation, the bridge IC 224 may also be referred to as a "semiconductor chip" or a "semiconductor device."
[0016] The connector 222 is a connector for connecting the first mounting board 210 and the second mounting board 220. The USB port 223 is an interface for connecting the module to an external device (such as a PC). The bridge IC 224 is an IC for improving the efficiency of data transfer between the flash memory 213 and the controller 212.
[0017] The examples of electronic components mounted on the first substrate 211 and the second substrate 221 are merely examples and are not limited to these, and electronic components according to the functions provided by the modules are mounted on the substrates.
[0018] Fig. 3 is a cross-sectional view taken along line III-III' in Fig. 1. Fig. 4 is a cross-sectional view taken along line IV-IV' in Fig. 1. Fig. 5 is a plan view taken along line V-V' in Fig. 3. Fig. 6 is a plan view taken along line VI-VI' in Fig. 3.
[0019] 3 and 4, a first metal layer 111 is laminated on the inner surface of the first surface portion S1. A first mounting substrate 210 and a second metal layer 112 are laminated on the first metal layer 111. The first mounting substrate 210 is laminated on the first metal layer 111 so that the surface of the semiconductor chip (controller 212 and flash memory 213) facing the casing 100 and the first metal layer 111 are in contact with each other.
[0020] As shown in FIG. 5, when viewed in a plan view in the direction indicated by the arrow of line V-V' in FIG. 3, the inner surface of the first surface S1 is divided into a rectangular first region R1 (the region surrounded by a dashed line) and a second region R2 extending from the outer periphery of the first region R1 to the outer periphery of the inner surface of the first surface S1. The first region R1 includes at least the contact surface between the surface of the semiconductor chip (controller 212 and flash memory 213) facing the casing 100 and the first metal layer 111. Note that, in this example, the shape of the first region R1 is rectangular, but it may have other shapes. A laminated portion of the first metal layer 111 and the second metal layer 112 is formed in the second region R2. This laminated portion is composed of a portion of the first metal layer 111 laminated on the inner surface (the entire inner surface) of the first surface S1 and the second metal layer 112 laminated on a portion of the first metal layer 111. In this example, the laminated portion is formed over the entire second region R2, but may be formed in only a portion of the second region R2. In this example, the side surfaces of the laminated portion are in contact with the inner surfaces of the side surfaces (third surface S3, fourth surface S4, fifth surface S5, and sixth surface S6) of the housing 100, but the side surfaces of the laminated portion do not have to be in contact with the side surfaces (third surface S3, fourth surface S4, fifth surface S5, and sixth surface S6) of the housing 100. From the viewpoint of heat dissipation efficiency, it is preferable that the side surfaces of the laminated portion are in contact with the side surfaces (third surface S3, fourth surface S4, fifth surface S5, and sixth surface S6) of the housing 100. However, from the viewpoint of ease of design and assembly, it is preferable that the side surfaces of the laminated portion are not in contact with the side surfaces (third surface S3, fourth surface S4, fifth surface S5, and sixth surface S6) of the housing 100. From the viewpoint of ease of assembly, it is preferable that the inner peripheral edge of the laminated section and the outer peripheral edge of the semiconductor chip facing the inner peripheral edge of the laminated section are spaced apart by a predetermined width, which is preferably 2 mm or less from the viewpoint of improving heat dissipation efficiency.
[0021] Each of the first metal layer 111 and the second metal layer 112 is made of a metal such as copper or iron.
[0022] The first metal layer 111 and the second metal layer 112 may be made of the same metal or different metals. The thermal conductivity of the metal (first metal) making up the first metal layer 111 is preferably equal to or higher than the thermal conductivity of the metal (second metal) making up the second metal layer 112, from the viewpoint of obtaining better heat dissipation efficiency.
[0023] The metal constituting the first metal layer 111 is, for example, copper, aluminum, etc. The material constituting the second metal layer 112 is preferably a metal having a thermal conductivity equal to or greater than that of iron. The metal constituting the second metal layer 112 is, for example, aluminum, copper, iron, etc.
[0024] In this example, first metal layer 111 is a copper foil sheet, and second metal layer 112 is an aluminum plate. From the viewpoint of reducing the thickness of the module, the thickness of first metal layer 111 is preferably 0.1 mm or less.
[0025] From the viewpoint of further increasing the heat dissipation path and thereby further improving the heat dissipation efficiency, the thickness of second metal layer 112 is preferably thicker than the thickness of first metal layer 111. From the viewpoint of further increasing the heat dissipation path and thereby further improving the heat dissipation efficiency, the thickness of second metal layer 112 is preferably 0.5 mm or more and 3 mm or less, and more preferably 1 mm or more and 3 mm or less.
[0026] 3 and 4, a first metal layer 111 is laminated on the inner surface of the second surface portion S2. A second mounting substrate 220 and a second metal layer 112 are laminated on the first metal layer 111. The second mounting substrate 220 is provided so that the surface of the semiconductor chip (bridge IC 224) facing the casing 100 comes into contact with the first metal layer 111.
[0027] As shown in FIG. 6, when viewed from above in the direction indicated by the arrows along line VI-VI' in FIG. 3, the inner surface of the second surface portion S2 is divided into a rectangular first region R1 (the region surrounded by a dashed line) and a second region R2 extending from the outer periphery of the first region R1 to the outer periphery of the inner surface of the second surface portion S2. The first region R1 includes at least the contact surface between the surface of the semiconductor chip (bridge IC 224) facing the housing 100 and the first metal layer 111. Note that, although the first region R1 has a rectangular shape in this example, it may have other shapes. A laminated portion of the first metal layer 111 and the second metal layer 112 is formed in the second region R2. This laminated portion is composed of a portion of the first metal layer 111 laminated on the inner surface (the entire inner surface) of the second surface portion S2 and the second metal layer 112 laminated on a portion of the first metal layer 111. In this example, the laminated portion is formed over the entire second region R2, but it may be formed in only a portion of the second region R2. From the viewpoint of heat dissipation efficiency, it is preferable that the side surfaces of the laminated portion contact the side surfaces (third surface S3, fourth surface S4, fifth surface S5, and sixth surface S6) of the housing 100. From the viewpoint of design and ease of assembly, it is preferable that the side surfaces of the laminated portion do not contact the side surfaces (third surface S3, fourth surface S4, fifth surface S5, and sixth surface S6) of the housing 100. From the viewpoint of ease of assembly, it is preferable that the inner peripheral edge of the laminated portion is separated from the outer peripheral edge of the semiconductor chip facing the inner peripheral edge of the laminated portion by a predetermined width. From the viewpoint of improving heat dissipation efficiency, it is preferable that this predetermined width be 2 mm or less.
[0028] The module has a laminated portion of the first metal layer 111 and the second metal layer 112 in a second region R2 on the inner surface of the first surface S1, the second region R2 being outside a first region R1 including the contact surface between the surface of the semiconductor chip facing the housing 100 and the first metal layer 111. Furthermore, the module has a laminated portion of the first metal layer 111 and the second metal layer 112 in a second region R2 on the inner surface of the second surface S2, the second region R2 being outside the first region R1 including the contact surface between the surface of the semiconductor chip facing the housing 100 and the first metal layer 111. By having the laminated portion formed in the second region R2, the module can improve heat dissipation efficiency, thereby enabling efficient dissipation of heat generated by the semiconductor chip to the outside without increasing the thickness of the module. Details of this effect will be described later.
[0029] <Details of effects> The details of the effects of the present invention will be described in comparison with conventional configurations. FIG. 7 is a diagram showing a schematic cross-sectional configuration of a module of Comparative Example 1, a module of Comparative Example 2, and a module of the Example. In the module of Comparative Example 1, an aluminum plate 701 is laminated on the inner surface of the first surface S1 of the housing 100, and an aluminum plate 701 is laminated on the inner surface of the second surface S2 of the housing 100. In the module of Comparative Example 1, the surface of the semiconductor chip facing the housing 100 is in contact with the aluminum plate 701. The aluminum plate 701 typically has a thickness of about 1 mm.
[0030] In the module of Comparative Example 2, graphite sheet 711 is laminated on the inner surface of first surface S1 of housing 100, and graphite sheet 711 is laminated on the inner surface of second surface S2 of housing 100. In the module of Comparative Example 2, the surface of the semiconductor chip facing housing 100 is in contact with graphite sheet 711. The typical thickness of graphite sheet 711 is 0.05 mm or more and 0.1 mm or less, which is thinner than that of aluminum plate 701.
[0031] The module of the example corresponds to the first embodiment. In the module of the example, a first metal layer (copper foil sheet) 111 is laminated on the inner surface of the first surface S1 of the housing 100, and a first metal layer (copper foil sheet) 111 is laminated on the inner surface of the second surface S2 of the housing 100. The typical thickness of the first metal layer (copper foil sheet) 111 is 0.05 mm or more and 0.1 mm or less.
[0032] In the module of the embodiment, the surface of the semiconductor chip facing the housing 100 is in contact with a first metal layer (copper foil sheet) 111 on the inner surface of the first surface portion S1. The module of the embodiment has a laminated portion of the second metal layer (aluminum plate) 112 and the first metal layer (copper foil sheet) 111 in a second region R2 outside a first region R1 including the contact surface between the semiconductor chip and the first metal layer (copper foil sheet) 111.
[0033] In the module of the embodiment, the surface of the semiconductor chip facing the housing 100 is in contact with a first metal layer (copper foil sheet) 111 on the inner surface of the second surface portion S2. The module of the embodiment has a laminated portion of the second metal layer (aluminum plate) 112 and the first metal layer (copper foil sheet) 111 in a second region R2 outside a first region R1 including the contact surface between the semiconductor chip and the first metal layer (copper foil sheet) 111.
[0034] The module of Comparative Example 1 is inexpensive and has high thermal conductivity. However, the module of Comparative Example 1 needs to ensure the thickness of aluminum plate 701, which makes the module thick. The module of Comparative Example 2 can be made thinner. However, the module of Comparative Example 2 is expensive because the cost of graphite sheet 711 is high.
[0035] In contrast to Comparative Example 1 and Comparative Example 2, the module of Example 1 uses a copper foil sheet as the first metal layer 111 that contacts the semiconductor chip. Copper foil sheets are as thick as graphite sheets and inexpensive. However, the thermal conductivity of copper foil sheets in the planar direction is approximately 1 / 3 to 1 / 4 of that of graphite sheets. Therefore, using only copper foil sheets may reduce heat dissipation efficiency (may be insufficient). In contrast, the module of Example 1 has a laminated portion in the second region R2. This allows the module of Example 1 to increase the heat dissipation path compared to using only copper foil sheets, thereby improving heat dissipation efficiency (see Figures 8A and 8B described below).
[0036] 8A and 8B are diagrams for explaining the effects of the module according to the first embodiment. In FIGS. 8A and 8B, the flow of heat is indicated by arrows. FIG. 8A shows a module of a reference example, and FIG. 8B shows a module according to the first embodiment. The module of the reference example differs from the module of the example only in that the second metal layer (aluminum plate) 112 is omitted.
[0037] As shown in Fig. 8A, the cross-sectional area of the first metal layer (copper foil sheet) 111 alone is small, making it difficult for heat to be transmitted to the edge of the first surface S1, and therefore reducing the area of the heat dissipation surface of the housing 100 that releases heat to the outside. In contrast, as shown in Fig. 8B, by providing the laminated portion of the first metal layer (copper foil sheet) 111 and the second metal layer (aluminum plate) 112 in the second region R2, heat is more easily transmitted to the edge of the first surface S1, and the area of the heat dissipation surface of the housing 100 that releases heat to the outside is larger than that of the module of the reference example. As a result, the module of the first embodiment can suppress temperature rise of the semiconductor chip by improving the heat dissipation efficiency of heat generated in the semiconductor chip compared to the module of the reference example.
[0038] FIG. 9 is a graph showing the temperature characteristics of the semiconductor chips in the module of the example and the module of comparative example 2. In FIG. 9, line a1 shows the temperature characteristics of the semiconductor chip when the module of the example is used, and line b1 shows the temperature characteristics of the semiconductor chip when the module of comparative example 2 is used. As shown by lines a1 and b1, the module of comparative example 2, which uses a graphite sheet, employs a graphite sheet with a small heat capacity, so the semiconductor chip becomes hot immediately after use. In contrast, the module of the example employs an aluminum plate with a larger heat capacity than the graphite sheet, so it takes time for the semiconductor chip to become hot. Therefore, the module of the example can suppress the temperature rise of the semiconductor chip when used for a short period of time compared to the module of comparative example 2.
[0039] Figure 10 is a graph showing the temperature characteristics and data transfer speeds of the module of the embodiment and the module of the reference example. In Figure 10, line a11 shows the change in surface temperature of the NAND flash memory 213 when the module of the embodiment is used (2 TB of data is written). Line a12 shows the data transfer speed when the module of the embodiment is used (2 TB of data is written). Line b11 shows the change in temperature of the NAND flash memory 213 when the module of the reference example is used (2 TB of data is written). Line b12 shows the data transfer speed when the module of the reference example is used (2 TB of data is written).
[0040] As shown by line b11, in the module of the reference example, the upper temperature limit (ΔT: 45°C) of the NAND flash memory 213 was reached at time t1, time t3, and time t5. As shown by line b12, in the module of the reference example, a speed drop occurred due to reaching the upper temperature limit from time t1 to time t2, time t3 to time t4, and after time t5. In contrast, in the module of the example, as shown by lines a11 and a12, the upper temperature limit of the NAND flash memory 213 was not reached and no speed drop occurred. Furthermore, since the module of the example did not experience a speed drop due to a temperature rise, the data write time was able to be shortened compared to the module of the reference example.
[0041] <Effects> As described above, the module according to the first embodiment of the present invention can improve heat dissipation efficiency without increasing the thickness of the module by having a laminated portion in the second region R2 outside the first region R1 that includes the contact surface between the surface of the semiconductor chip facing the housing 100 and the first metal layer 111 on the inner surface of the housing 100. The module according to the first embodiment can suppress a decrease in data transfer speed due to an increase in temperature.
[0042] <<Second embodiment>> A module (SSD module) according to a second embodiment of the present invention will be described below. The module according to the second embodiment differs from the module according to the first embodiment in the arrangement of the first metal layer 111 and the second metal layer 112.
[0043] The following description will focus on this difference.
[0044] The external configuration of the module according to the second embodiment is the same as that shown in Fig. 1. Fig. 11 is a cross-sectional view taken along line III-III' in Fig. 1. Fig. 12 is a cross-sectional view taken along line IV-IV' in Fig. 1. Fig. 13 is a plan view taken along line XIII-XIII' in Fig. 11. Fig. 14 is a plan view taken along line XIV-XIV' in Fig. 11.
[0045] 11 and 12, a first metal layer 111 and a second metal layer 112 are laminated on the inner surface of the first surface portion S1. A first mounting substrate 210 is laminated on the first metal layer 111. The first mounting substrate 210 is provided so that the surface of the semiconductor chip (controller 212 and flash memory 213) facing the casing 100 comes into contact with the first metal layer 111, and so that the surface of the semiconductor chip facing the casing 100 comes into contact with the first metal layer 111. In addition, the first metal layer 111 is laminated on the side surface of the second metal layer 112 and the surface opposite the surface facing the casing 100.
[0046] As shown in FIG. 13, when viewed in a plan view in the direction indicated by the arrows along line XIII-XIII' in FIG. 11, the inner surface of the first surface S1 is divided into a rectangular first region R1 (the region surrounded by a dashed line) and a second region R2 extending from the outer periphery of the first region R1 to the outer periphery of the inner surface of the first surface S1. The first region R1 includes at least the contact surface between the surface of the semiconductor chip (controller 212 and flash memory 213) facing the casing 100 and the first metal layer 111. A laminated portion of the second metal layer 112 and the first metal layer 111 is formed in the second region R2. This laminated portion is composed of the second metal layer 112 laminated on the first surface S1 and the first metal layer 111 laminated on the second metal layer 112. Note that, although the laminated portion is formed over the entire second region R2 in this example, the laminated portion may be formed only in part of the second region R2.
[0047] 11 and 12, a first metal layer 111 and a second metal layer 112 are laminated on the inner surface of the second surface portion S2. A second mounting substrate 220 is laminated on the first metal layer 111. The second mounting substrate 220 is provided so that the surface of the bridge IC 224 facing the housing 100 comes into contact with the first metal layer 111. The first metal layer 111 is also laminated on a side surface of the second metal layer 112 and on the surface opposite to the surface facing the housing 100.
[0048] As shown in FIG. 14, when viewed in a plan view in the direction indicated by the arrows along line XIV-XIV' in FIG. 11, the first metal layer 111 on the inner surface of the second surface portion S2 is divided into a rectangular first region R1 (the region surrounded by a dashed line) and a second region R2 extending from the outer periphery of the first region R1 to the outer periphery of the inner surface of the first surface portion S1. The first region R1 includes at least the contact surface between the surface of the semiconductor chip (bridge IC 224) facing the housing 100 and the first metal layer 111. A laminated portion of the second metal layer 112 and the first metal layer 111 is formed in the second region R2. This laminated portion is composed of the second metal layer 112 laminated on the second surface portion S2 and the first metal layer 111 laminated on the second metal layer 112. Note that, although the laminated portion is formed over the entire second region R2 in this example, the laminated portion may be formed only in part of the second region R2.
[0049] The module has a laminated portion of the first metal layer 111 and the second metal layer 112 on the inner surface of the first surface portion S1 in a second region R2 outside a first region R1 including a contact surface between the surface of the semiconductor chip facing the housing 100 and the first metal layer 111. Furthermore, the module has a laminated portion of the first metal layer 111 and the second metal layer 112 on the inner surface of the second surface portion S2 in a second region R2 outside the first region R1 including a contact surface between the surface of the semiconductor chip facing the housing 100 and the first metal layer 111. By having the laminated portion formed in the second region R2, the module can improve heat dissipation efficiency, and therefore can efficiently dissipate heat generated by the semiconductor chip to the outside without increasing the thickness of the module.
[0050] <Effects> As described above, the module according to the second embodiment of the present invention can improve heat dissipation efficiency without increasing the thickness of the module, similar to the module according to the first embodiment. The module according to the second embodiment can suppress a decrease in data transfer rate due to an increase in temperature.
[0051] <<Third Embodiment>> A module according to a third embodiment of the present invention will now be described. The module according to the third embodiment differs from the module according to the first embodiment only in that a heat dissipation agent 1500 (see FIG. 15) is used.
[0052] The following description will focus on this difference.
[0053] <Configuration> The external configuration of the module according to the third embodiment is the same as that shown in Fig. 1. Fig. 15 is a cross-sectional view taken along line III-III' in Fig. 1.
[0054] As shown in FIG. 15 , a first metal layer 111 is laminated on the inner surface of the first surface portion S1. A first mounting substrate 210 and a second metal layer 112 are laminated on the first metal layer 111. The first mounting substrate 210 is provided with a heat dissipation agent 1500 between the surface of the semiconductor chip (controller 212 and flash memory 213) facing the housing 100 and the first metal layer 111, so that the surface of the semiconductor chip facing the housing 100 is in contact with the heat dissipation agent 1500 and the heat dissipation agent 1500 is in contact with the first metal layer 111. The surface of the semiconductor chip (controller 212 and flash memory 213) facing the housing 100 is in indirect contact with the first metal layer 111 via the heat dissipation agent 1500. The heat dissipation agent 1500 can be made of a material that efficiently conducts heat, and for example, a material with a thermal conductivity of 1 (W / m·K) to 5 (W / m·K) can be used.
[0055] A first metal layer 111 is laminated on the inner surface of the second surface portion S2. A second mounting substrate 220 and a second metal layer 112 are laminated on the first metal layer 111. The second mounting substrate 220 is provided such that a heat dissipation agent 1500 is formed between the surface of the bridge IC 224 facing the housing 100 and the first metal layer 111, so that the surface of the bridge IC 224 facing the housing 100 is in contact with the heat dissipation agent 1500 and the heat dissipation agent 1500 is in contact with the first metal layer 111. The surfaces of the semiconductor chips (controller 212 and flash memory 213) facing the housing 100 are in indirect contact with the first metal layer 111 via the heat dissipation agent 1500. The rest of the configuration is the same as that of the module according to the first embodiment.
[0056] <Effects> As described above, the module according to the third embodiment of the present invention can improve heat dissipation efficiency without increasing the thickness of the module, similar to the first embodiment. The module according to the third embodiment can suppress a decrease in data transfer rate due to an increase in temperature. Furthermore, the module according to the third embodiment can further improve heat dissipation efficiency by providing a heat dissipation agent 1500.
[0057] <<Fourth Embodiment>> A module according to a fourth embodiment of the present invention will be described below. The module according to the fourth embodiment differs from the module according to the third embodiment in the arrangement of a heat dissipation agent 1500 (see FIG. 16).
[0058] The following description will focus on this difference.
[0059] <Configuration> The external configuration of the module according to the fourth embodiment is the same as that shown in Fig. 1. Fig. 16 is a cross-sectional view taken along line III-III' in Fig. 1.
[0060] 16, a first metal layer 111 is laminated on the inner surface of the first surface portion S1. A first mounting substrate 210 and a second metal layer 112 are laminated on the first metal layer 111. The first mounting substrate 210 is provided such that a heat dissipation agent 1500 is formed between the surface of the semiconductor chip (controller 212 and flash memory 213) facing the casing 100 and the first metal layer 111, so that the surface of the semiconductor chip facing the casing 100 is in contact with the heat dissipation agent 1500 and the heat dissipation agent 1500 is in contact with the first metal layer 111. The surface of the semiconductor chip (controller 212 and flash memory 213) facing the casing 100 is in indirect contact with the first metal layer 111 via the heat dissipation agent 1500.
[0061] A first metal layer 111 is laminated on the inner surface of the second surface portion S2. A second mounting substrate 220 and a second metal layer 112 are laminated on the first metal layer 111. The second mounting substrate 220 is provided such that a heat dissipation agent 1500 is formed between the surface of the bridge IC 224 facing the housing 100 and the first metal layer 111, so that the surface of the bridge IC 224 facing the housing 100 is in contact with the heat dissipation agent 1500 and the heat dissipation agent 1500 is in contact with the first metal layer 111. The surfaces of the semiconductor chips (controller 212 and flash memory 213) facing the housing 100 are in indirect contact with the first metal layer 111 via the heat dissipation agent 1500.
[0062] Furthermore, a heat dissipation agent 1500 is provided between the second metal layer 112 on the first surface S1 side and the second metal layer 112 on the second surface S2 side so as to be in contact with the second metal layer 112 on the first surface S1 side and the second metal layer 112 on the second surface S2 side. In the module according to the fourth embodiment, the heat dissipation agent 1500 connects the stacked section on the first surface S1 side and the stacked section on the second surface S2 side, thereby making the housing temperature uniform and further improving the heat dissipation effect.
[0063] <Effects> As described above, the module according to the fourth embodiment of the present invention, like the first embodiment, can improve heat dissipation efficiency without increasing the thickness of the module. The module according to the fourth embodiment can suppress a decrease in data transfer rate due to temperature rise. Furthermore, the module according to the fourth embodiment can further improve heat dissipation efficiency by connecting the stacked section on the first surface S1 side and the stacked section on the second surface S2 side with the heat dissipation agent 1500.
[0064] <<Modifications>> The present invention is not limited to the above-described embodiments, and various modifications can be adopted within the scope of the present invention. Furthermore, the above-described embodiments can be combined with each other without departing from the scope of the present invention. For example, the features of the third embodiment can be applied to the second embodiment. For example, the features of the fourth embodiment can be applied to the second embodiment.
[0065] In each of the above embodiments, the module is an SSD module, but the module is not limited to an SSD module and may be a module other than an SSD as long as it has a configuration in which an electronic component mounting board is housed within the housing 100. [Explanation of symbols]
[0066] 100... Housing, 111... First metal layer, 112... Second metal layer, 200... Group of electronic component mounting substrates, 210... First mounting substrate, 212... Controller, 213... NAND flash memory, 220... Second mounting substrate, 221... Second substrate, 224... Bridge IC
Claims
1. a housing having a first surface and a second surface facing each other; an electronic component mounting board housed in the housing and having a semiconductor device and a board on which the semiconductor device is mounted; A module comprising: a first metal layer formed on at least a part of an inner surface of at least one of the first surface portion and the second surface portion of the housing directly or indirectly contacts a surface of the semiconductor device on the housing side; a laminated portion in which the first metal layer and the second metal layer are laminated is formed in at least a part of a second region between an outer circumferential edge of a first region including a contact surface between the first metal layer and a surface of the semiconductor device facing a housing and an outer circumferential edge of the inner surface of the housing; Module.
2. 10. The module of claim 1, the first metal layer is formed on the entire inner surface, the laminated portion is composed of a part of the first metal layer formed on the inner surface of the housing and the second metal layer formed on a part of the first metal layer; Module.
3. 10. The module of claim 1, the first metal layer is formed on a part of the inner surface of the housing, the second metal layer is formed on another part of the inner surface of the housing, and the first metal layer is formed on the second metal layer; the laminated portion is composed of the second metal layer and the first metal layer formed on the second metal layer; Module.
4. 10. The module of claim 1, the laminated portion is formed in the entire second region; Module.
5. 10. The module of claim 1, the stacked portion is formed so that a side surface of the stacked portion contacts the inner surface of the housing; Module.
6. 5. The module of claim 4, an inner peripheral end of the laminated portion and an outer peripheral end of the semiconductor device facing the inner peripheral end of the laminated portion are spaced apart by a predetermined width; Module.
7. 10. The module of claim 1, a first metal constituting the first metal layer and a second metal constituting the second metal layer are the same or different materials; Module.
8. 10. The module of claim 1, the first metal layer is made of copper; the second metal layer is composed of aluminum; Module.
9. 10. The module of claim 1, the thermal conductivity of the first metal constituting the first metal layer is equal to or greater than the thermal conductivity of the second metal constituting the second metal layer; Module.
10. 10. The module of claim 1, a heat dissipation agent is provided between the first metal layer formed on the inner surface of the housing and a surface of the semiconductor device facing the housing, and the first metal layer and the surface of the semiconductor device facing the housing are in indirect contact with each other via the heat dissipation agent; Module.
11. 10. The module of claim 1, the housing is provided with a heat dissipation agent between the laminated portion provided on the inner surface of the first surface portion and the laminated portion provided on the inner surface of the second surface portion; Module.
12. 10. The module of claim 1, The thickness of the second metal layer is greater than the thickness of the first metal layer. Module.
Citation Information
Patent Citations
Electronic apparatus
JP2023140028A