Temperature sense diode and method for manufacturing the same

Abstract

To provide a technique for improving withstand voltage characteristics of a temperature sense diode.SOLUTION: A method for manufacturing a temperature sense diode comprises: a step of preparing a SiC substrate having a specific region; a step of forming a bottom second conductivity type region by ion-implanting a second conductivity type impurity into the specific region; a step of forming an annular second conductivity type region in a range including a surface by ion-implanting the second conductivity type impurity into the specific region; a step of forming a p-type anode region in the specific region; and a step of forming an n-type cathode region in the specific region. The bottom second conductivity type region and the annular second conductivity type region are connected to form a separation region. The specific region is separated into a well region and a drift region by the separation region. The anode region and the cathode region are separated from the separation region by the well region.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The technology disclosed in this specification relates to a temperature sensing diode and a method for manufacturing the same. [Background technology]

[0002] The temperature sensing diode described in Patent Document 1 has an n-type cathode region, a p-type anode region, an n-type well region, a p-type well region, and an n-type drift region. The anode region is arranged to surround the cathode region. The n-type well region is arranged to surround the anode region. The n-type well region is separated from the cathode region by the anode region. The p-type well region is arranged to surround the n-type well region. The p-type well region is separated from the anode region by the n-type well region. The drift region is arranged to surround the p-type well region. The drift region is separated from the n-type well region by the p-type well region. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-188178 Summary of the Invention [Problem to be solved by the invention]

[0004] In the temperature sensing diode of Patent Document 1, the n-type and p-type impurity concentrations increase from the drift region toward the cathode region. Therefore, the n-type impurity concentration in the n-type well region is higher than the n-type impurity concentration in the drift region. As a result, the parasitic bipolar transistor formed by the n-type well region, p-type well region, and drift region is prone to malfunction and turn on, resulting in low voltage resistance. This specification proposes a technology for improving the voltage resistance of temperature sensing diodes. [Means for solving the problem]

[0005] A method for manufacturing a temperature sensing diode according to a first aspect of the present disclosure includes the steps of: preparing a SiC substrate having a first conductivity type specific region in a range including the surface; forming a bottom second conductivity type region extending along the surface at a position spaced from the surface by ion-implanting second conductivity type impurities into the specific region; forming an annular second conductivity type region in a range including the surface by forming a mask having a ring-shaped opening on the surface and ion-implanting second conductivity type impurities into the specific region through the mask; forming a p-type anode region in a range including the surface by ion-implanting p-type impurities into the specific region; and forming an n-type cathode region in a range including the surface by ion-implanting n-type impurities into the specific region. After the bottom second conductivity type region, the annular second conductivity type region, the anode region, and the cathode region are formed, the bottom second conductivity type region and the annular second conductivity type region are connected to form an isolation region. The specific region is separated by the separation region into a well region located within a defined area surrounded by the separation region and a drift region located outside the defined area. The anode region and the cathode region are disposed within the defined area. The anode region contacts the cathode region. The anode region and the cathode region are separated from the separation region by the well region.

[0006] The steps of forming the bottom second conductivity type region, forming the annular second conductivity type region, forming the anode region, and forming the cathode region may be performed in any order.

[0007] In this specification, the first conductivity type means either n-type or p-type, and the second conductivity type means either n-type or p-type, whichever is not the first conductivity type. In other words, if the first conductivity type is n-type, the second conductivity type is p-type, and if the first conductivity type is p-type, the second conductivity type is n-type.

[0008] When a temperature sensing diode is manufactured using the above manufacturing method, the concentration of the first conductivity type impurity in the well region is as low as the concentration of the first conductivity type impurity in the drift region, thereby increasing the voltage resistance of the well region. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a cross-sectional view of a semiconductor device. [Figure 2] FIG. 2 is an enlarged cross-sectional view of a temperature sensing diode. [Figure 3] 3 is a graph showing the impurity concentration distribution along line AA in FIG. 2. [Figure 4] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment. [Figure 5] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment. [Figure 6] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment. [Figure 7] FIG. 2 is a plan view of an annular p-type region according to an embodiment, as viewed from above. [Figure 8] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment. [Figure 9] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment. [Figure 10] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment. [Figure 11] 1A to 1C are explanatory diagrams of a manufacturing method of a temperature sensing diode according to an embodiment.

[0010] Following the above-mentioned first embodiment, additional configurations of the temperature sensing diode and the manufacturing method thereof disclosed in this specification will be described below. (Aspect 2) 2. The manufacturing method according to aspect 1, wherein a first conductivity type impurity concentration in the well region and a first conductivity type impurity concentration in the drift region are lower than a second conductivity type impurity concentration in the isolation region. (Aspect 3) The manufacturing method according to aspect 1 or 2, wherein the first conductivity type impurity concentration is distributed at a substantially constant level in a region spanning the well region, the drift region, and the isolation region. (Aspect 4) a well region of a first conductivity type that is disposed so as to surround the anode region and the cathode region and has a lower first conductivity type impurity concentration than the cathode region; a separation region of a second conductivity type that is disposed so as to surround the well region and is separated from the anode region and the cathode region by the well region; and a drift region of a first conductivity type that is disposed so as to surround the separation region and is separated from the well region by the separation region, wherein the first conductivity type impurity concentration of the well region and the first conductivity type impurity concentration of the drift region are lower than the second conductivity type impurity concentration of the separation region. (Aspect 5) 5. The temperature sensing diode according to aspect 4, wherein a first conductivity type impurity concentration is distributed at a substantially constant level in a region spanning the well region, the drift region, and the isolation region.

[0011] In this specification, "substantially constant" means that the impurity concentration is distributed with a variation within a range of -10% to +10% relative to the average value.

[0012] As shown in FIG. 1 , the semiconductor device 100 includes a semiconductor substrate 10, an upper electrode 66, and a lower electrode 68. The semiconductor substrate 10 is a SiC substrate. The semiconductor substrate 10 includes a boundary region 102 and a plurality of element regions 101. The upper electrode 66 contacts the upper surface of the semiconductor substrate 10 in each element region 101. The lower electrode 68 contacts the lower surface of the semiconductor substrate 10. Each element region 101 includes a metal-oxide-semiconductor field-effect transistor (MOSFET). When the MOSFET is turned on, a current flows from the lower electrode 68 to the upper electrode 66. Instead of a MOSFET, each element region 101 may include another semiconductor element (e.g., an insulated gate bipolar transistor (IGBT), a diode, etc.) that can pass a current from the lower electrode 68 to the upper electrode 66.

[0013] The boundary region 102 is disposed between the two element regions 101. An n-type drift region 24 is provided across the element regions 101 and the boundary region 102. The drift region 24 constitutes the drift region of the MOSFET in each element region 101.

[0014] 2, the semiconductor substrate 10 has a p-type anode region 12, an n-type cathode region 14, an n-type well region 22, and a p-type isolation region 30 within a boundary region 102. The anode region 12, the cathode region 14, the well region 22, the isolation region 30, and the drift region 24 form a temperature sensing diode 104.

[0015] The anode region 12 is disposed in an area including the surface of the semiconductor substrate 10 .

[0016] The cathode region 14 is disposed in an area including the surface of the semiconductor substrate 10. The cathode region 14 is in contact with the anode region 12.

[0017] The well region 22 is disposed so as to surround the anode region 12 and the cathode region 14. The n-type impurity concentration of the well region 22 is lower than the n-type impurity concentration of the cathode region 14.

[0018] The isolation region 30 is disposed so as to surround the well region 22. The isolation region 30 is separated from the anode region 12 and the cathode region 14 by the well region 22. The p-type impurity concentration of the isolation region 30 is lower than the p-type impurity concentration of the anode region 12. The p-type impurity concentration of the isolation region 30 is higher than the n-type impurity concentration of the well region 22.

[0019] The drift region 24 is disposed so as to surround the isolation region 30. The drift region 24 is separated from the well region 22 by the isolation region 30. The n-type impurity concentration of the drift region 24 is lower than the n-type impurity concentration of the cathode region 14. The n-type impurity concentration of the drift region 24 is approximately the same as the n-type impurity concentration of the well region 22. The n-type impurity concentration of the drift region 24 is also lower than the p-type impurity concentration of the isolation region 30.

[0020] 3, the n-type impurity concentration is substantially constant at concentration N1 in the region spanning well region 22, drift region 24, and isolation region 30. In isolation region 30, the p-type impurity concentration is higher than concentration N1, and in well region 22 and drift region 24, the p-type impurity concentration is lower than concentration N1.

[0021] As shown in FIG. 2, the semiconductor device 100 has an anode electrode 62 and a cathode electrode 64. The anode electrode 62 is in contact with the anode region 12. The cathode electrode 64 is in contact with the cathode region 14. The upper surface of the semiconductor substrate 10 is covered with an insulating film 50 except for the area where the electrodes are provided. The anode electrode 62 and the cathode electrode 64 are not in contact with the well region 22. Furthermore, no electrodes are provided on the surfaces of the well region 22 and the isolation region 30. Therefore, the potential of the isolation region 30 is floating. Because the potential of the isolation region 30 is floating, the electrode area can be made smaller than when an electrode is in contact with the isolation region.

[0022] Next, a description will be given of a method for manufacturing the temperature sensing diode 104. The temperature sensing diode 104 is manufactured from a semiconductor substrate 10 shown in Fig. 4. The semiconductor substrate 10 shown in Fig. 4 has an n-type region 20. The n-type region 20 is exposed on the surface of the semiconductor substrate 10.

[0023] 5, bottom p-type region 32 is formed by ion implanting p-type impurities into semiconductor substrate 10 through mask 40. Bottom p-type region 32 is formed within n-type region 20 and at a position away from the surface of semiconductor substrate 10. Bottom p-type region 32 has a shape that extends along the surface of semiconductor substrate 10.

[0024] Next, as shown in FIG. 6, p-type impurities are ion-implanted into the semiconductor substrate 10 through a mask 42 to form the annular p-type region 34. The mask 42 has an opening 42a. When viewed from above, the opening 42a has a ring shape. Therefore, the p-type impurities are implanted into a ring-shaped region on the surface of the semiconductor substrate 10. Therefore, as shown in FIG. 7, when viewed from above, the annular p-type region 34 has a ring shape. Here, the p-type impurities are implanted while changing the implantation depth, thereby forming the annular p-type region 34 that extends along the thickness direction of the semiconductor substrate 10. The annular p-type region 34 is formed in a range that includes the surface of the semiconductor substrate 10.

[0025] The annular p-type region 34 is connected to the bottom p-type region 32 at its lower end. The bottom p-type region 32 and the annular p-type region 34 are connected to form the isolation region 30. The n-type region 20 is separated into the well region 22 and the drift region 24 by the isolation region 30. The well region 22 is located within a partitioned range surrounded by the isolation region 30. The drift region 24 is located outside the partitioned range surrounded by the isolation region 30. In other words, the drift region 24 is arranged to surround the isolation region 30. The concentration of p-type impurities in the isolation region 30 is 1×10 17 ~1×10 19 cm -3 The width H1 of the isolation region 30 is 1 μm or more.

[0026] 8, anode region 12 is formed by ion implanting p-type impurities into semiconductor substrate 10 through mask 44. Anode region 12 is formed in a range that includes the surface of semiconductor substrate 10. Anode region 12 is formed within well region 22. Anode region 12 is separated from isolation region 30 by well region 22.

[0027] 9, the cathode region 14 is formed by ion-implanting n-type impurities into the semiconductor substrate 10 through a mask 46. The cathode region 14 is formed in a range that includes the surface of the semiconductor substrate 10. The cathode region 14 is formed within the well region 22 at a position that contacts the anode region 12. The cathode region 14 is separated from the isolation region 30 by the well region 22.

[0028] 10, an insulating film 50 is formed on the upper surface of the semiconductor substrate 10. Furthermore, openings 52 and 54 are formed in the insulating film 50. The opening 52 is formed above the anode region 12. The opening 54 is formed above the cathode region 14.

[0029] Next, as shown in FIG. 11, an anode electrode 62 and a cathode electrode 64 are formed. The anode electrode 62 is formed in the opening 52 and contacts the anode region 12. The cathode electrode 64 is formed in the opening 54 and contacts the cathode region 14. Through the above steps, the temperature sensing diode 104 is completed. The forward voltage of the temperature sensing diode 104 changes with temperature. Therefore, by detecting the forward voltage while passing a current through the temperature sensing diode 104, the temperature of the element region 101 can be detected.

[0030] In the above-described manufacturing method, no impurities are implanted into the well region 22, so the n-type impurity concentration in the well region 22 can be made as low as that in the drift region 24. That is, the n-type impurity concentration in the well region 22 can be made lower than in the conventional structure. This prevents malfunction of the parasitic npn bipolar transistor formed by the well region 22, isolation region 30, and drift region 24, improving voltage resistance. Furthermore, because the ion implantation step into the well region 22 can be omitted, the number of steps can be reduced compared to the conventional method, allowing the temperature sense diode 104 to be manufactured more efficiently.

[0031] In the above-described embodiment, the semiconductor substrate 10 is manufactured using a SiC substrate. Impurities are less susceptible to thermal diffusion in a SiC substrate. This allows the isolation region 30 to be formed with a narrow width, and the temperature sensing diode 104 can be made smaller.

[0032] In the above-described embodiment, the well region 22 and the drift region 24 are n-type regions. Also, the isolation region 30 is a p-type region. However, the well region 22 and the drift region 24 may be p-type regions. Also, the isolation region 30 may be an n-type region.

[0033] In the embodiment described above, bottom p-type region 32, annular p-type region 34, anode region 12, and cathode region 14 are formed in this order, but they may be formed in any order.

[0034] In the above-described embodiment, the annular p-type region 34 has a rectangular shape when viewed from above, but the shape of the annular p-type region 34 when viewed from above may be a polygon or a circle.

[0035] Although the embodiments have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. The technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings simultaneously achieves multiple objectives, and achieving one of these objectives itself has technical utility. [Explanation of symbols]

[0036] 10: Semiconductor substrate 12: Anode region 14: Cathode region 22: Well area 24: Drift region 30: Separation area 32: Bottom p-type region 34: Annular p-type region 50: insulating film 62: Anode electrode 64: Cathode electrode 66: Upper electrode 68: Lower electrode 100: Semiconductor device 101: Element area 102: Boundary area 104: Temperature sensing diode

Claims

1. A method for manufacturing a temperature sensing diode, comprising: A step of preparing a SiC substrate (10) having a specific region (20) of a first conductivity type in a range including a surface; forming a bottom second conductivity type region (32) extending along the surface at a position spaced from the surface by ion implanting a second conductivity type impurity into the specific region; forming a mask (42) having an annular opening (42a) on the surface, and ion-implanting second-conductivity-type impurities into the specific region through the mask to form an annular second-conductivity-type region (34) in a range including the surface; a step of forming a p-type anode region (12) in a range including the surface by ion-implanting p-type impurities into the specific region; forming an n-type cathode region (14) in a range including the surface by ion-implanting n-type impurities into the specific region; Equipped with In a state where the bottom second conductivity type region, the annular second conductivity type region, the anode region, and the cathode region are formed, the following structure is obtained: the bottom second conductivity type region and the annular second conductivity type region are connected to form an isolation region (30); The separation region separates the specific region into a well region (22) located within a partitioned range surrounded by the separation region and a drift region (24) located outside the partitioned range. The anode region and the cathode region are disposed within the partitioned area. the anode region is in contact with the cathode region; the anode region and the cathode region are separated from the isolation region by the well region; A manufacturing method that satisfies the above conditions.

2. 2. The manufacturing method according to claim 1, wherein a first conductivity type impurity concentration in said well region and a first conductivity type impurity concentration in said drift region are lower than a second conductivity type impurity concentration in said isolation region.

3. 3. The manufacturing method according to claim 1, wherein the first conductivity type impurity concentration is distributed at a substantially constant level in a region spanning the well region, the drift region, and the isolation region.

4. A temperature sensing diode having a SiC substrate (10), The SiC substrate is a p-type anode region (12) disposed within a range including the surface of the SiC substrate; an n-type cathode region (14) disposed in an area including the surface and in contact with the anode region; a well region (22) of a first conductivity type that is arranged to surround the anode region and the cathode region and has a first conductivity type impurity concentration lower than that of the cathode region; an isolation region (30) of a second conductivity type arranged to surround the well region and isolated from the anode region and the cathode region by the well region; a drift region (24) of a first conductivity type arranged to surround the isolation region and separated from the well region by the isolation region; Equipped with a first conductivity type impurity concentration of the well region and a first conductivity type impurity concentration of the drift region are lower than a second conductivity type impurity concentration of the isolation region; Temperature sensing diode.

5. 5. The temperature sensing diode according to claim 4, wherein the first conductivity type impurity concentration is distributed at a substantially constant level in a region spanning the well region, the drift region, and the isolation region.

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