Multilayer ceramic electronic component and its manufacturing method

Abstract

To provide a multilayer ceramic electronic component and a manufacturing method thereof that combines voltage resistance and temperature characteristics.SOLUTION: A multilayer ceramic electronic component includes a plurality of mutually opposing internal electrode layers 12, a first core portion 31a in contact with one of the plurality of internal electrode layers 12 and a first shell portion 32a located around its periphery, a first dielectric particle 30a with which the first core portion 31a is in contact with a grain boundary, a second core portion 31b and a second shell portion 32b located around its periphery, and a second dielectric particle 30b located between the first dielectric particle 30a and an internal electrode layer 12 with which the first dielectric particle 30a is in contact in the plurality of internal electrode layers 12, a dielectric layer 11 sandwiched between the plurality of internal electrode layers 12, and external electrodes 20a and 20b electrically connected to the internal electrode layer 12, and the presence rate of the first dielectric particles 30a is 50% or more among the dielectric particles in contact with the plurality of internal electrode layers 12.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same. [Background technology]

[0002] BACKGROUND ART In high frequency communication systems, such as mobile phones, multilayer ceramic electronic components such as multilayer ceramic capacitors (MLCCs) are used to remove noise (see, for example, Patent Documents 1 to 4). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-291634 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-319205 [Patent Document 3] Japanese Patent Application Laid-Open No. 2001-313225 [Patent Document 4] Japanese Patent Application Laid-Open No. 2002-080276 Summary of the Invention [Problem to be solved by the invention]

[0004] In recent years, the electric vehicle market has expanded due to stricter regulations in response to environmental concerns. Accordingly, the demand for in-vehicle multilayer ceramic electronic components has also increased. The characteristics required for in-vehicle multilayer ceramic electronic components include voltage resistance and temperature characteristics. However, there is often a trade-off between voltage resistance and temperature characteristics, and it is usually difficult to achieve both.

[0005] The present invention has been made in view of the above-mentioned problems, and has as its object to provide a multilayer ceramic electronic component that can achieve both voltage resistance and temperature characteristics, and a method for manufacturing the same. [Means for solving the problem]

[0006] The multilayer ceramic electronic component according to the present invention comprises a plurality of mutually opposing internal electrode layers, a first dielectric particle in contact with one of the plurality of internal electrode layers and having a first core portion and a first shell portion located on the periphery of the first core portion, the first core portion being in contact with a grain boundary, and a second core portion and a second shell portion located on the periphery of the second core portion, the first dielectric particle being sandwiched between an internal electrode layer of the plurality of internal electrode layers with which the first dielectric particle is in contact, a dielectric layer sandwiched between the plurality of internal electrode layers, and an external electrode electrically connected to the internal electrode layer, and the presence rate of the first dielectric particles among the dielectric particles in contact with the plurality of internal electrode layers is 50% or more.

[0007] In the above-described multilayer ceramic electronic component, the first shell portion may have a thickness greater than a thickness of the second shell portion.

[0008] In the above-mentioned multilayer ceramic electronic component, the thickness of the first shell portion may be an average value obtained by connecting a contact point between the grain boundary and the first core portion and a contact point between the plurality of internal electrode layers and the first shell portion with a line and measuring the length of the line on the first shell portion for 50 of the first dielectric particles.

[0009] In the above-described monolithic ceramic electronic component, the ratio of the thickness of the first shell portion to the thickness of the second shell portion may be 3 or more.

[0010] In the above-described multilayer ceramic electronic component, the first shell portion may have a thickness of 200 nm or more, and the second shell portion may have a thickness of 100 nm or less.

[0011] In the above-described multilayer ceramic electronic component, the first dielectric particles may have a higher concentration of at least one of carbon, titanium, and silicon than the second dielectric particles.

[0012] In the above-described multilayer ceramic electronic component, the dielectric layers may contain 1.8 at % or more of a rare earth element.

[0013] The multilayer ceramic electronic component may satisfy the X7R or X7S characteristics specified in the EIA standard.

[0014] The method for manufacturing a multilayer ceramic electronic component according to the present invention includes the steps of: disposing a grain growth promoter on a green sheet; forming an internal electrode pattern on the green sheet; laminating the green sheets to obtain a laminate; and subjecting the laminate to an oxygen partial pressure of 10 -9 The method includes a step of forming an element body having internal electrode layers by firing the element body at a temperature rising rate of 6000°C / h or more in an atmosphere of 1000 atm or more, and a step of forming external electrodes on the element body.

[0015] In the method for producing a multilayer ceramic electronic component, the grain growth promoter may be carbon, titanium, or silica.

[0016] In the method for manufacturing a multilayer ceramic electronic component, the step of disposing the grain growth promoter may be performed by atomic layer deposition or vapor deposition.

[0017] In the method for manufacturing a multilayer ceramic electronic component, the grain growth accelerator may be titanium, the green sheet may contain barium titanate and zirconium, and the ratio of barium to the sum of titanium and zirconium in the green sheet may be greater than 1. [Effects of the Invention]

[0018] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can achieve both excellent voltage resistance and temperature characteristics, and a method for manufacturing the same. [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 2 is a partial cross-sectional perspective view of a multilayer ceramic capacitor. [Figure 2]FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] FIG. 2 is a cross-sectional view taken along line BB in FIG. [Figure 4] (a) and (b) are enlarged views of the XZ cross section. [Figure 5] FIG. 2 is a schematic cross-sectional view of a dielectric particle having a core-shell structure. [Figure 6] FIG. 2 is a schematic cross-sectional view of a dielectric layer sandwiched between two internal electrode layers. [Figure 7] FIG. 2 is a schematic cross-sectional view of a dielectric layer sandwiched between two internal electrode layers. [Figure 8] FIG. 2 is a schematic cross-sectional view of a dielectric layer sandwiched between two internal electrode layers. [Figure 9] 1A to 1C are diagrams illustrating a flow of a method for manufacturing a multilayer ceramic capacitor. [Figure 10] 4(a) to 4(c) are diagrams illustrating an internal electrode forming step. [Figure 11] 10A and 10B are diagrams illustrating a method for determining whether a core is in contact with a grain boundary. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments will be described with reference to the drawings.

[0021] (Embodiment) FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1. FIG. 3 is a cross-sectional view taken along line BB in FIG. 1. As illustrated in FIGS. 1 to 3, the multilayer ceramic capacitor 100 comprises an element body 10 having a substantially rectangular parallelepiped shape, and external electrodes 20a, 20b provided on two opposing end faces of the element body 10. Of the four faces of the element body 10 other than the two end faces, the two faces other than the top and bottom faces in the stacking direction are referred to as side faces. The external electrodes 20a, 20b extend on the top, bottom and two side faces in the stacking direction of the element body 10. However, the external electrodes 20a, 20b are spaced apart from each other.

[0022] 1 to 3, the Z-axis direction (first direction) is the stacking direction, and is the direction in which the internal electrode layers face each other. The X-axis direction (second direction) is the length direction of the element body 10, and is the direction in which the two end faces of the element body 10 face each other, and in which the external electrodes 20a and 20b face each other. The Y-axis direction (third direction) is the width direction of the internal electrode layers, and is the direction in which the two side faces other than the two end faces of the four side faces of the element body 10 face each other. The X-axis direction, Y-axis direction, and Z-axis direction are perpendicular to each other.

[0023] The element body 10 has a configuration in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 are alternately stacked. The edges of each internal electrode layer 12 are alternately exposed to the end face of the element body 10 where the external electrode 20a is provided and the end face where the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately electrically connected to the external electrode 20a and the external electrode 20b. As a result, the multilayer ceramic capacitor 100 has a configuration in which multiple dielectric layers 11 are stacked with the internal electrode layers 12 interposed therebetween. In addition, in the laminate of the dielectric layers 11 and the internal electrode layers 12, the internal electrode layer 12 is arranged as the outermost layer in the stacking direction, and the upper and lower surfaces of the laminate are covered with cover layers 13. The cover layers 13 are primarily composed of a ceramic material. For example, the cover layers 13 may have the same or different composition as the dielectric layers 11. Note that the configuration is not limited to those shown in FIGS. 1 to 3, as long as the internal electrode layers 12 are exposed on two different surfaces and are electrically connected to different external electrodes.

[0024] The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes.

[0025] The internal electrode layers 12 are mainly composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn), or alloys containing these. The internal electrode layers 12 may also be made of precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these. The average thickness of each internal electrode layer 12 in the Z-axis direction is, for example, 1.0 μm or less, 0.5 μm or less, or 0.2 μm or less. The thickness of the internal electrode layers 12 can be measured by observing a cross section of the multilayer ceramic capacitor 100 with a scanning electron microscope (SEM), measuring the thickness at 10 points for each of 10 different internal electrode layers 12, and deriving the average value of all the measurement points.

[0026] The dielectric layer 11 is mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO3. 3-α For example, the ceramic material includes barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), Ba which forms a perovskite structure, 1-x-y Ca x Sr y Ti 1-z Zr z At least one of the following can be selected and used: O3 (0≦x≦1, 0≦y≦1, 0≦z≦1). 1-x-y Ca x Sr y Ti 1-z Zr zO3 is barium strontium titanate, barium calcium titanate, barium zirconate, barium titanate zirconate, calcium titanate zirconate, barium calcium titanate zirconate, etc. For example, the dielectric layer 11 contains 90 at% or more of the main component ceramic. The thickness of the dielectric layer 11 is, for example, 6.0 μm or less, 3.0 μm or less, or 1.0 μm or less. The thickness of the dielectric layer 11 can be measured by observing the cross section of the multilayer ceramic capacitor 100 with a scanning electron microscope (SEM), measuring the thickness at 10 points for each of 10 different dielectric layers 11, and deriving the average value of all the measurement points.

[0027] An additive may be added to the dielectric layer 11. Examples of additives to the dielectric layer 11 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0028] 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region where capacitance is generated in the multilayer ceramic capacitor 100. Therefore, this region where capacitance is generated is referred to as a capacitance portion 14. In other words, the capacitance portion 14 is a region where adjacent internal electrode layers 12 connected to different external electrodes face each other.

[0029] The region where the internal electrode layers 12 connected to the external electrode 20a face each other without an internal electrode layer 12 connected to the external electrode 20b interposed therebetween is called the end margin 15. The region where the internal electrode layers 12 connected to the external electrode 20b face each other without an internal electrode layer 12 connected to the external electrode 20a interposed therebetween is also the end margin 15. In other words, the end margin 15 is the region where the internal electrode layers 12 connected to the same external electrode face each other without an internal electrode layer 12 connected to a different external electrode interposed therebetween. The end margin 15 is a region where no capacitance is generated.

[0030] 3, in the element body 10, the side margins 16 are regions provided so as to cover the ends (ends in the Y-axis direction) of two side surfaces of the dielectric layers 11 and the internal electrode layers 12. In other words, the side margins 16 are regions provided outside the capacitive section 14 in the Y-axis direction. The side margins 16 are also regions that do not generate capacitance.

[0031] FIG. 4(a) is an enlarged cross-sectional view of the external electrode 20a and its vicinity. FIG. 4(b) is an enlarged cross-sectional view of the external electrode 20b and its vicinity. Hatching is omitted in FIGS. 4(a) and 4(b). As illustrated in FIGS. 4(a) and 4(b), the external electrodes 20a and 20b have a structure in which a plating layer 22 is provided on an underlayer 21. The underlayer 21 is primarily composed of nickel, copper, or the like. The underlayer 21 may contain ceramic particles or a glass component as an additional material. The plating layer 22 is primarily composed of a metal such as nickel, copper, aluminum, zinc, or tin, or an alloy of two or more of these metals. The plating layer 22 may be a plating layer of a single metal component, or multiple plating layers of different metal components. For example, the plating layer 22 has a structure in which a first plating layer 23, a second plating layer 24, and a third plating layer 25 are formed in this order from the underlayer 21 side. The first plating layer 23 is, for example, a copper plating layer. The second plating layer 24 is, for example, a nickel plating layer, and the third plating layer 25 is, for example, a tin plating layer.

[0032] In such a multilayer ceramic capacitor 100, when at least a portion of the dielectric particles contained in the dielectric layer 11 in the capacitive portion 14 have a core-shell structure, the dielectric layer 11 in the capacitive portion 14 has a high dielectric constant, excellent temperature characteristics, and a stable microstructure coexists.

[0033] Here, an overview of a dielectric particle having a core-shell structure will be described. FIG. 5 is a schematic cross-sectional view of a dielectric particle 30 having a core-shell structure. As illustrated in FIG. 5, the dielectric particle 30 having a core-shell structure includes a substantially spherical core portion 31 and a shell portion 32 that surrounds and covers the core portion 31. The core portion 31 is a crystalline portion in which the additive compound is not dissolved or in which the amount of the additive compound dissolved is small. The shell portion 32 is a crystalline portion in which the additive compound is dissolved and has a higher additive compound concentration than the additive compound concentration in the core portion 31. The additive compound concentration in the shell portion 32 is higher than the additive compound concentration in the core portion 31. Alternatively, the additive compound is diffused in the shell portion 32, but not in the core portion 31.

[0034] In the dielectric particles 30, adjusting the thickness of the core portion 31 and the shell portion 32 can improve the voltage resistance and temperature characteristics of the multilayer ceramic capacitor. For example, the voltage resistance can be improved by thickening the shell portion 32 by dissolving a large amount of additive in the dielectric of the dielectric layer. For example, as illustrated in FIG. 6, the shell portion 32 is formed thick in some of the multiple dielectric particles 30 having the core portion 31 and the shell portion 32. For example, the shell portion 32 of the dielectric particle 30 in contact with the internal electrode layer 12 is formed thick. As illustrated in FIG. 6, if an attempt is made to thicken the shell portion 32, it tends to be difficult to obtain a large-diameter core portion 31.

[0035] Next, the temperature characteristics can be improved by thickening the core portion 31. As illustrated in Fig. 7, in some of the plurality of dielectric particles 30 having a core portion 31 and a shell portion 32, the core portion 31 is formed to be thick. As illustrated in Fig. 7, when an attempt is made to increase the diameter of the core portion 31, a thick shell portion 32 tends not to be obtained.

[0036] As described above, since it is difficult to simultaneously increase the diameter of the core portion 31 and increase the thickness of the shell portion 32, there is often a trade-off between voltage resistance and temperature characteristics, and it is usually difficult to achieve both.

[0037] The multilayer ceramic electronic components disclosed in Patent Documents 1 and 2 improve the voltage resistance at the interface between the internal electrode layer and the dielectric layer by thickening the shell of the dielectric particles near the internal electrode layer. However, this configuration results in a smaller core, which degrades temperature characteristics. The multilayer ceramic electronic components disclosed in Patent Documents 3 and 4 describe a technology that ensures the thickness of the ceramic while maintaining capacitance by exposing the core from the shell. However, this configuration results in a thinner shell, which adversely affects voltage resistance.

[0038] Therefore, the multilayer ceramic capacitor 100 according to this embodiment has a configuration that can achieve both good voltage resistance and good temperature characteristics, as will be described in detail below.

[0039] FIG. 8 is a schematic cross-sectional view of a dielectric layer 11 sandwiched between two internal electrode layers 12. As illustrated in FIG. 8, the dielectric layer 11 has a configuration in which a plurality of dielectric particles made of a ceramic as a main component are sintered. Some of the plurality of dielectric particles are first dielectric particles 30a, and the other are second dielectric particles 30b. The first dielectric particles 30a are in contact with one of the two internal electrode layers 12. The first dielectric particles 30a have a first core portion 31a and a first shell portion 32a located on the periphery of the first core portion 31a. The first core portion 31a is in contact with the grain boundaries between the dielectric particles. For example, the first core portion 31a is in contact with the grain boundary between the first dielectric particle 30a and the second dielectric particle 30b. The second dielectric particle 30b is not in contact with either of the two internal electrode layers 12. The second dielectric particle 30b has a second core portion 31b and a second shell portion 32b located on the periphery of the second core portion 31b. The second dielectric particle 30b is located so as to sandwich the first dielectric particle 30a between itself and the internal electrode layer 12. For example, the second dielectric particle 30b is located so as to sandwich the first dielectric particle 30a between itself and the internal electrode layer 12 along the Z-axis direction. Moreover, of the dielectric particles in contact with the internal electrode layers 12, 50% or more of the dielectric particles are the first dielectric particles 30a.

[0040] With this configuration, the first shell portion 32a of the first dielectric particle 30a is thicker at the portion in contact with the internal electrode layer 12. This allows the first dielectric particle 30a to contain a large amount of additives at the portion in contact with the internal electrode layer 12, thereby reducing oxide ion defects and improving the voltage resistance at the interface between the internal electrode layer 12 and the dielectric layer 11.

[0041] Furthermore, because the first core portion 31a extends up to the grain boundary, the first core portion 31a has a large diameter, improving temperature characteristics. For example, in an MLCC for automotive use, it is important to suppress the capacitance loss at 125°C, and ensuring a large-diameter core can suppress this. 125°C is the Curie point of barium titanate, the temperature at which the relative dielectric constant of barium titanate becomes extremely high. If a large-diameter core can be secured, the capacitance loss at 125°C can be suppressed and temperature characteristics can be improved.

[0042] Furthermore, since 50% or more of the dielectric particles in contact with the internal electrode layers 12 are the first dielectric particles 30a, it is possible to sufficiently improve the voltage resistance and temperature characteristics. For example, the multilayer ceramic capacitor 100 according to this embodiment satisfies the X7R characteristics or X7S characteristics of the EIA standard as temperature characteristics.

[0043] Since the higher the ratio of the first dielectric particles 30a among the dielectric particles in contact with the internal electrode layers 12, the more the voltage resistance and temperature characteristics can be improved, it is preferable that 70% or more of the dielectric particles in contact with the internal electrode layers 12 are the first dielectric particles 30a, and more preferably 80% or more are the first dielectric particles 30a.

[0044] The thicker the first shell portion 32a of the first dielectric particle 30a is formed, the more improved the voltage resistance of the interface between the internal electrode layer 12 and the dielectric layer 11. Therefore, it is preferable that the thickness of the first shell portion 32a of the first dielectric particle 30a is greater than the thickness of the second shell portion 32b of the second dielectric particle 30b.

[0045] Here, the thickness of the first shell portion 32a will be explained. The thickness of the first shell portion 32a is determined by measuring the areas of 20 first dielectric particles 30a that are in contact with the internal electrode layers 12 and the grain boundaries in a cross section including the stacking direction using software, and calculating the average. The calculated average area is considered as a circle, and the diameter is calculated. This is called "D particle." Next, the areas of 20 first core portions 31a of the first dielectric particles 30a that are in contact with the internal electrode layers 12 and the grain boundaries are similarly measured, and the average is calculated. The calculated average area is considered as a circle, and the diameter is calculated. This is called "D core." "D particle" - "D core" is the thickness of the first shell portion 32a.

[0046] Next, the thickness of the second shell portion 32b will be described. The thickness of the second shell portion 32b is measured by taking a BSE image or transmission electron image of the chip cross section at 15,000x magnification in a cross section including the stacking direction, and drawing a 7 μm straight line parallel to the internal electrode layer 12 at the center of the dielectric layer 11 in the thickness direction. The lengths of the shell portions on this line are added together and divided by "the number of particles x 2", and this value is the thickness of the second shell portion 32b.

[0047] From the viewpoint that it is preferable that the thickness of first shell portion 32a be greater than the thickness of second shell portion 32b, the ratio of the thickness of first shell portion 32a to the thickness of second shell portion 32b is preferably 3 or more, more preferably 3.5 or more, and even more preferably 4.0 or more.

[0048] Since it is preferable that the thickness of first shell portion 32a is as large as possible, the thickness of first shell portion 32a is preferably 200 nm or more, more preferably 250 nm or more, and even more preferably 300 nm or more.

[0049] On the other hand, since it is preferable that the thickness of second shell portion 32b is as small as possible, the thickness of second shell portion 32b is preferably 100 nm or less, more preferably 70 nm or less, and even more preferably 50 nm or less.

[0050] From the viewpoint of thickening the first shell portion 32a of the first dielectric particle 30a, the first dielectric particle 30a preferably contains a larger amount of material that promotes grain growth than the second dielectric particle 30b. Examples of materials that promote grain growth include carbon, titanium, and silicon. For example, the first dielectric particle 30a preferably has a higher concentration of at least one of carbon, titanium, and silicon than the second dielectric particle 30b. The content of the material that promotes grain growth can be expressed, for example, in at% of the dielectric particle.

[0051] For example, when the A / B ratio in the entire dielectric layer 11 exceeds 1, it is considered that grain growth is facilitated in the region where titanium is added and the A / B ratio approaches 1, and the shell portion becomes thicker. In addition, it is considered that the presence of silica at the interface between the internal electrode layer 12 and the dielectric layer 11 causes barium and the like to dissolve into the silica, facilitating grain growth, and the shell portion in contact with the internal electrode layer 12 becomes thicker.

[0052] From the viewpoint of reliability, it is preferable that the rare earth elements added as additives to the dielectric layer 11 be contained in large amounts. Therefore, the total amount of rare earth elements added to the dielectric layer 11 is preferably 1.8 at% or more, more preferably 2.5 at% or more, and even more preferably 3.0 at% or more.

[0053] In addition, in a cross section including the stacking direction, the average grain diameter of each of the dielectric particles including the first dielectric particles 30a and the second dielectric particles 30b is approximately 200 nm or more and 400 nm or less.

[0054] Next, a description will be given of a method for manufacturing the multilayer ceramic capacitor 100. FIG.

[0055] (raw powder production process) First, a dielectric material for forming the dielectric layer 11 is prepared. The A-site elements and B-site elements contained in the dielectric layer 11 are typically contained in the dielectric layer 11 in the form of a sintered body of ABO3 particles. For example, barium titanate is a tetragonal compound with a perovskite structure and exhibits a high relative dielectric constant. This barium titanate can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been known for synthesizing the ceramic that is the main component of the dielectric layer 11, such as a solid-phase method, a sol-gel method, and a hydrothermal method. Any of these methods can be used in this embodiment.

[0056] To the obtained ceramic raw material powder, a predetermined additive compound is added depending on the purpose, such as an oxide of zirconium, hafnium, magnesium, manganese, molybdenum, vanadium, chromium, or a rare earth element (yttrium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, or ytterbium), or an oxide containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon, or a glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0057] For example, a ceramic material is prepared by wet-mixing a ceramic raw material powder with a compound containing an additive compound, followed by drying and pulverization. For example, the ceramic material obtained as described above may be pulverized to adjust the particle size, or may be combined with a classification process to adjust the particle size. The above process results in a dielectric material. In this embodiment, a large-diameter dielectric material of 250 nm or more is preferably used to create a structure in which the core portion is exposed on the side opposite the internal electrode layer and in contact with the grain boundary. Using a large-diameter dielectric material reduces the specific surface area, which reduces the driving force for liquid-phase sintering, thereby suppressing grain growth and solid dissolution of the additives, and expanding the core portion to the point where it contacts the grain boundary.

[0058] (Coating process) Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained dielectric material and wet-mixed. Using the obtained slurry, a dielectric green sheet 52 is coated on a substrate 51 by, for example, a die coater method or a doctor blade method, as shown in Figure 10(a), and then dried. The substrate 51 is, for example, a polyethylene terephthalate (PET) film.

[0059] (Lamination process) Next, as illustrated in FIG. 10(a), a material 53 containing powder of a material that promotes grain growth is deposited on a dielectric green sheet 52, a plurality of internal electrode patterns 54 are printed on the material 53, and the material 53 is deposited on the internal electrode patterns 54. FIG. 10(b) is a diagram illustrating the state after deposition and printing. As an example, five layers of internal electrode patterns 54 are printed at predetermined intervals on the dielectric green sheet 52. The dielectric green sheet 52 on which the internal electrode patterns 54 are printed is considered to be a lamination unit.

[0060] When titanium is used as the material that promotes grain growth, atomic layer deposition (ALD) or the like can be used as a method for depositing material 53. For example, material 53 having a thickness of 1 nm or more and 20 nm or less can be deposited. When silica is used as the material that promotes grain growth, atomic layer deposition (ALD), vapor deposition, or the like can be used as a method for depositing material 53. For example, material 53 having a thickness of 10 nm or more and 100 nm or less can be deposited.

[0061] Next, while peeling off the dielectric green sheet 52 from the substrate 51, the lamination units are laminated as shown in FIG. 10(c).

[0062] (Crimping process) Next, a predetermined number of cover sheets (e.g., 2 to 10 layers) are laminated on top and bottom of the laminate obtained by laminating the lamination units, and are thermocompression bonded, and then cut to predetermined chip dimensions (e.g., 1.0 mm x 0.5 mm). In the example of Figure 10(c), cutting is performed along the dotted lines. The cover sheets may have the same components as the dielectric green sheets 52, or may contain different additive compounds.

[0063] (Firing process) The ceramic laminate thus obtained was subjected to binder removal treatment in an N2 atmosphere, and then a metal paste that would become the underlayer 21 of the external electrodes 20a and 20b was applied by dipping. -9 The firing is carried out in an atmosphere of at least 1000 atm at a temperature rising rate of 6000°C / h or more. The temperature range maintained after the temperature rise is preferably, for example, 1150°C to 1250°C. The time for maintaining the temperature range is preferably 1 minute to 1 hour.

[0064] (Reoxidation treatment process) In order to return oxygen to the partially reduced main phase ceramic material of the dielectric layers 11 fired in a reducing atmosphere, the temperature may be raised to a range of 800°C to 1050°C in an N2 atmosphere to an extent that does not oxidize the internal electrode layers 12. This step is called a reoxidation treatment step.

[0065] (Plating process) Thereafter, a metal coating of copper, nickel, tin, or the like is applied by plating to the underlayer 21 to form the plating layer 22. Through the above steps, the multilayer ceramic capacitor 100 is completed.

[0066] According to the manufacturing method of this embodiment, a grain growth accelerator is deposited on a dielectric green sheet, and then an internal electrode pattern is formed to obtain a laminate unit. A plurality of laminate units are laminated to obtain a laminate, and the grain growth accelerator can be disposed in the area in contact with the internal electrode pattern. In this state, the laminate is heated under an oxygen partial pressure of 10 -9By forming an element body having internal electrode layers by firing in an atmosphere of at least 1000 atm at a temperature rising rate of at least 6000° C. / h, the structure described with reference to FIG. 8 can be obtained.

[0067] It is considered that when the A / B ratio in the entire dielectric layer 11 exceeds 1, grain growth is facilitated in the region where titanium is added and the A / B ratio approaches 1, resulting in a thicker shell. Therefore, when the dielectric green sheet 52 contains barium titanate and zirconium and the ratio of barium to the sum of titanium and zirconium in the dielectric green sheet 52 is greater than 1, it is preferable to add titanium as a grain growth promoter.

[0068] In the above embodiments, a multilayer ceramic capacitor has been described as an example of a multilayer ceramic electronic component, but the present invention is not limited to this. For example, other multilayer ceramic electronic components such as a varistor or a thermistor may also be used. [Example]

[0069] The multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were examined.

[0070] Examples 1 to 4 -Sample preparation method Barium titanate with an average particle size of 250 nm or more was weighed as the main raw material, and various additives, rare earth elements (1.8 at% or more), and an organic solvent were mixed in a predetermined ratio. The prepared dielectric raw material powder was wet-mixed with an organic solvent. A binder was added, and the resulting slurry was applied to a 4.0 μm-thick dielectric green sheet using the doctor blade method and dried. A desired amount of a material that promotes grain growth (carbon, titanium, or silica) was deposited on the dielectric green sheet, and a nickel-containing internal electrode pattern was screen-printed on top of that. A desired amount of a material that promotes grain growth (carbon, titanium, or silica) was then deposited on top of that. To fill the gap between the dielectric green sheet and the internal electrode pattern, a reverse pattern sheet with a pattern complementary to the internal electrode pattern was screen-printed on the dielectric green sheet. Ten laminate units were stacked, pressed, and cut. This resulted in a molded product measuring 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height. Ni paste was applied to both end faces where the internal electrode patterns were exposed.

[0071] Sample firing method The compact was debindered at 300°C in a N2 atmosphere. Then, it was fired at a temperature range of 1150°C to 1250°C. The temperature was raised at a rapid rate of 6000°C / h. The oxygen partial pressure was 10 -9 The atmosphere was strongly reducing at or above 1000 atm, and atmospheric control was important because it significantly affected the grain growth behavior. After cooling, the temperature was increased to a range of 800 to 1050°C in a N2 atmosphere and maintained at that temperature for reoxidation.

[0072] (Comparative Examples 1 and 2) In Comparative Examples 1 and 2, no material (carbon, titanium, or silica) that promotes grain growth was deposited on the dielectric green sheet. Other conditions were the same as in Examples 1 to 4.

[0073] (Comparative Example 3) In Comparative Example 3, no material (carbon, titanium, or silica) that promotes grain growth was deposited on the dielectric green sheet. MgO, Sm2O3, and BaSiO3 were added to the nickel-containing internal electrode pattern. Other conditions were the same as in Examples 1 to 4.

[0074] How to determine whether the core is in contact with the grain boundary A thin section sample was prepared by FIB processing near the electrode intersection of the sample cross section, and TEM-EDX analysis was performed. As shown in Figure 11, the boundary where the first core portion 31a and the grain boundary are adjacent and the first shell portion 32a were analyzed by point analysis. If the concentration of additives other than silicon, which are grain boundary elements, at the boundary was lower than that of the first shell portion 32a, it was defined that the first core portion 31a was in contact with the grain boundary.

[0075] ·Evaluation method for dielectric particles The sample was cut parallel to the end face where the external electrodes were formed, the cross section was polished, and the measurement was based on a cross-sectional photograph of the dielectric layer taken with a scanning electron microscope (SEM). If the core-shell cannot be observed, it can also be taken with a TEM.

[0076] Of the dielectric particles in contact with the internal electrode layer, the thickness of the shell of those whose cores are in contact with the grain boundaries was measured. A line was drawn connecting the contact points between the core and grain boundaries and the contact points between the shell and internal electrode layers, and the length of the line on the shell was measured. This was measured for 50 dielectric particles, and the average was taken as D out It was decided.

[0077] The thickness of the shell of the dielectric particles in the dielectric layer that were not in contact with the internal electrode layer was measured. Several parallel lines were drawn near the center of the dielectric layer on the photograph. The lengths of the lines that passed through the shell were added together, divided by the number of particles on the lines, and then divided by 2. 100 measurements were taken, and the average was calculated as D. in It was decided.

[0078] Pressure resistance test The breakdown voltage was measured at a temperature of 25°C when the voltage was increased by 1V every second from 1 to 200V. Samples with a breakdown voltage of over 100V had ensured voltage resistance and were judged as good (◯), those with a breakdown voltage of over 150V had adequately ensured voltage resistance and were judged as very good (◎), and samples with a breakdown voltage of less than 100V were judged as poor (×).

[0079] ·Temperature characteristics measurement method After the sample was heated back, the temperature was varied from -55 to 150°C after 24 hours, and the rate of change in capacitance was measured at each temperature with 25°C as the reference temperature. The measurements were made at 1 kHz and 1.0 Vrms.

[0080] Evaluation results Those whose pressure resistance test was poor (×) or whose temperature characteristics did not meet the EIA temperature standard X7S were judged as poor overall (×). Those whose pressure resistance test was good (〇) and whose temperature characteristics met the EIA temperature standard X7S were judged as good overall (〇). Furthermore, those whose pressure resistance test was very good (◎) or whose temperature characteristics met the EIA temperature standard X7R were judged as very good overall (◎). The results are shown in Table 1. [Table 1]

[0081] In Comparative Example 1, the temperature characteristics were X7R, but the withstand voltage was insufficient, so the overall evaluation was poor (×). This is thought to be because the shell was thin both near the internal electrode layer and in the center of the dielectric layer.

[0082] In Comparative Example 2, the withstand voltage was sufficient, but it did not even fall within the X7T standard, so the overall evaluation was poor (×). This is thought to be because the shell was thick both near the internal electrode layer and in the center of the dielectric layer.

[0083] In Comparative Example 3, although the withstand voltage was sufficient, the result was X7T, and therefore the overall evaluation was poor (×). This is thought to be because the shells of the dielectric particles near the internal electrode layers were thick, while the shells of the dielectric particles in the center of the dielectric layers were thin.

[0084] In Example 1, the shell in contact with the internal electrode layer was thick, with a thickness of approximately 200 nm. 50 to 80% of the dielectric particles had cores in contact with the grain boundaries. On the other hand, the shells of the dielectric particles near the center of the dielectric layer were thin, with a thickness of approximately 100 nm. 50% or more of the dielectric particles had thick shells only in contact with the internal electrode layer. From these facts, it is believed that the withstand voltage was ensured, X7S was satisfied, and the overall evaluation was good "Good".

[0085] In Example 2, the shell in contact with the internal electrode layer was sufficiently thick, with a thickness of approximately 300 nm. 50 to 80% of the dielectric particles had their cores in contact with the grain boundaries. On the other hand, the shells of the dielectric particles near the center of the dielectric layer were thin, with a thickness of approximately 100 nm. 50% or more of the dielectric particles had sufficiently thick shells only in contact with the internal electrode layer. From these facts, it is believed that the withstand voltage was sufficiently ensured, X7S was satisfied, and the overall evaluation was very good "◎".

[0086] In Example 3, the shell in contact with the internal electrode layer was thick, with a thickness of approximately 200 nm. More than 80% of the dielectric particles had cores in contact with the grain boundaries. On the other hand, the shells of the dielectric particles near the center of the dielectric layer were thin, with a thickness of approximately 100 nm. Since many of the dielectric particles had thick shells only in contact with the internal electrode layers, it is believed that the pressure resistance was ensured and the X7R standard was met, and the overall evaluation was very good, "◎".

[0087] In Example 4, the shell in contact with the internal electrode layer was sufficiently thick, with a thickness of approximately 300 nm. More than 80% of the dielectric particles had cores in contact with the grain boundaries. On the other hand, the shells of the dielectric particles near the center of the dielectric layer were thin, with a thickness of approximately 100 nm. Since many of the dielectric particles had sufficiently thick shells only in contact with the internal electrode layer, it is believed that the voltage resistance was sufficiently ensured and the X7R standard was met, and the overall evaluation was very good, "◎".

[0088] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as defined in the claims. [Explanation of symbols]

[0089] 10 Base 11 Dielectric layer 12 Internal electrode layer 13 Cover Layer 14 Capacity part 15 End Margin 16 Side Margin 20a,20b external electrode 30a First dielectric particle 30b Second dielectric particles 31a First Core 31b Second Core 32a First shell part 32b Second shell part 51 Base material 52 Dielectric green sheet 53 Material 54 Internal electrode pattern 55 Cover Sheet 100 Multilayer ceramic capacitors

Claims

1. A plurality of internal electrode layers facing each other; a dielectric layer provided between the plurality of internal electrode layers, the dielectric layer including: a first dielectric particle in contact with one of the plurality of internal electrode layers, the first dielectric particle having a first core portion and a first shell portion located on the periphery of the first core portion, the first core portion being in contact with a grain boundary; and a second dielectric particle having a second core portion and a second shell portion located on the periphery of the second core portion, the second dielectric particle being positioned between the first dielectric particle and an internal electrode layer in contact with the first dielectric particle among the plurality of internal electrode layers; external electrodes electrically connected to the internal electrode layers, a presence rate of the first dielectric particles among the dielectric particles in contact with the plurality of internal electrode layers is 50% or more;

2. The multilayer ceramic electronic component according to claim 1 , wherein the thickness of the first shell portion is greater than the thickness of the second shell portion.

3. 2. The multilayer ceramic electronic component according to claim 1, wherein the thickness of the first shell portion is an average value obtained by connecting a contact point between the grain boundary and the first core portion and a contact point between the plurality of internal electrode layers and the first shell portion with a line and measuring the length of the line on the first shell portion for 50 of the first dielectric particles.

4. 2. The multilayer ceramic electronic component according to claim 1, wherein a ratio of the thickness of said first shell portion to the thickness of said second shell portion is 3 or more.

5. The thickness of the first shell portion is 200 nm or more, 2. The multilayer ceramic electronic component according to claim 1, wherein the second shell portion has a thickness of 100 nm or less.

6. 2. The multilayer ceramic electronic component according to claim 1, wherein the first dielectric particles have a higher concentration of at least one of carbon, titanium, and silicon than the second dielectric particles.

7. 2. The multilayer ceramic electronic component according to claim 1, wherein the dielectric layers contain 1.8 at % or more of a rare earth element.

8. 2. The multilayer ceramic electronic component according to claim 1, which satisfies X7R or X7S characteristics in the EIA standard.

9. disposing a grain growth promoter on the green sheet; forming an internal electrode pattern on the green sheet; a step of laminating the green sheets to obtain a laminate; The laminate was placed under an oxygen partial pressure of 10 －９ a step of firing the resultant mixture at a temperature rising rate of 6000° C. / h or more in an atmosphere of 1000 atm or more to form an element body having internal electrode layers; and forming external electrodes on the element body.

10. 10. The method for producing a multilayer ceramic electronic component according to claim 9, wherein the grain growth promoter is carbon, titanium, or silica.

11. The method for producing a multilayer ceramic electronic component according to claim 9, wherein the step of disposing the grain growth promoter is performed by atomic layer deposition or vapor deposition.

12. the grain growth promoter is titanium; the green sheet contains barium titanate and zirconium; 10. The method for producing a multilayer ceramic electronic component according to claim 9, wherein a ratio of barium to the sum of titanium and zirconium in said green sheets is greater than 1.

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