Power semiconductor module
The power semiconductor module addresses dielectric breakdown issues through a design with insulating films and encapsulating resin layers, ensuring reliable spacing and integration of components, thus preventing dielectric breakdown and enabling compact construction.
Patent Information
- Application Number
- JP2024053278
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-28
- Publication Date
- 2025-10-09
AI Technical Summary
Existing power semiconductor modules with double-sided heat dissipation structures face challenges in preventing dielectric breakdown due to shorter wire distances and higher voltage applications, with filler insertion potentially forming bubbles and failing to reliably prevent breakdown.
A power semiconductor module design featuring two wiring boards with insulating films and encapsulating resin layers, including conductive portions with protrusions and recesses, to maintain spacing and prevent dielectric breakdown.
The design effectively prevents dielectric breakdown by maintaining adequate spacing and using insulating films to enhance reliability, allowing for compact module construction and integration of passive components.
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Figure 2025151720000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a power semiconductor module. [Background technology]
[0002] A power semiconductor element is a semiconductor element that handles a large voltage or current and has a switching function. As an example of a modularized power semiconductor element, Patent Document 1 discloses a power semiconductor module having a double-sided heat dissipation structure with heat sinks on both the upper and lower sides. Furthermore, as a power semiconductor element that can be suitably used in such a power semiconductor module, for example, Patent Document 2 discloses a power semiconductor element that includes a power semiconductor chip having a first electrode and a second electrode on a first surface side and a third electrode on a second surface side opposite to the first surface, the first electrode being provided in a main cell region, and a fourth electrode that is provided on the first surface side of the power semiconductor chip so as to be electrically connected to the first electrode and has a protruding portion that protrudes outward from the outer periphery of the power semiconductor chip. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-85631 [Patent Document 2] Japanese Patent Publication No. 2023-79124 Summary of the Invention [Problem to be solved by the invention]
[0004] However, it has been found that when a power semiconductor module having a double-sided heat dissipation structure is fabricated using a power semiconductor element such as that described in Patent Document 2, the following problem occurs. That is, there is a demand for a smaller (lower profile) power semiconductor module. In this case, the distance between the wires facing each other via the power semiconductor element becomes shorter. Furthermore, there is also a demand for an increase in battery voltage, and a higher voltage is applied to the wires facing each other, and it is necessary to reliably prevent dielectric breakdown in such cases. On the other hand, even if an attempt is made to fill the space between the wires with a filler or the like, bubbles are likely to form inside, and there is a possibility that dielectric breakdown cannot be sufficiently prevented.
[0005] An object of the present invention is to provide a power semiconductor module that can prevent dielectric breakdown. [Means for solving the problem]
[0006] According to the present invention, there is provided a power semiconductor module as follows. [1] Two wiring boards, each having a substrate and wiring; a power semiconductor element provided between the two wiring substrates so as to connect the wirings to each other, The power semiconductor element is a power semiconductor chip having a first electrode and a second electrode on a first surface thereof and a third electrode on a second surface thereof opposite to the first surface; a first connecting member including: a first conductive portion provided on the first surface of the power semiconductor chip so as to be electrically connected to the first electrode; a second conductive portion provided on the first surface of the power semiconductor chip so as to be electrically connected to the second electrode and having a portion that protrudes outward from an outer peripheral edge of the power semiconductor chip in a plan view; and a first insulating layer that encases the first conductive portion and the second conductive portion; an insulating film is provided on at least one of the wirings of the two wiring substrates; Power semiconductor module. [2] The power semiconductor module according to [1], The power semiconductor element is a second connection member including: a third conductive portion provided on the second surface of the power semiconductor chip so as to be electrically connected to the third electrode; and a second insulating layer enclosing the third conductive portion; Further comprising an encapsulating resin layer that encapsulates at least the power semiconductor chip. Power semiconductor module. [3] The power semiconductor module according to [1] or [2], At least one of the wirings of the two wiring substrates has a convex portion in which a part of the wiring is convex, The power semiconductor element is disposed on the protruding portion. Power semiconductor module. [4] The power semiconductor module according to [3], In a plan view, a peripheral portion of the power semiconductor element and the insulating film overlap each other. Power semiconductor module. [5] The power semiconductor module according to any one of [1] to [4], the power semiconductor module further includes a passive component on one of the wirings of the two wiring boards; the insulating film is provided on the other of the wirings of the two wiring substrates; Power semiconductor module. [6] The power semiconductor module according to [5], One of the wirings of the two wiring substrates has a recess in which a part of the wiring is recessed, The passive component is disposed in the recess. Power semiconductor module. [7] The power semiconductor module according to any one of [1] to [6], The insulating film is provided on both of the wirings of the two wiring substrates. Power semiconductor module. [Effects of the Invention]
[0007] According to one aspect of the present invention, it is possible to provide a power semiconductor module that can prevent dielectric breakdown. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a schematic diagram showing one aspect of a power semiconductor element used in an embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view showing the II-II cross section of FIG. [Figure 3] 1 is a cross-sectional view showing one aspect of a power semiconductor element used in an embodiment of the present invention. [Figure 4] 1 is a cross-sectional view showing a power semiconductor module according to a first embodiment of the present invention. [Figure 5] FIG. 4 is a cross-sectional view showing a power semiconductor module according to a second embodiment of the present invention. [Figure 6] FIG. 10 is a cross-sectional view showing a power semiconductor module according to a third embodiment of the present invention. [Figure 7] FIG. 10 is a cross-sectional view showing a power semiconductor module according to a fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0009] [First embodiment] The present invention will be described below by taking an embodiment as an example and referring to the drawings. The present invention is not limited to the content of the embodiment. Note that in the drawings, some parts are illustrated enlarged or reduced in size for ease of explanation.
[0010] (power semiconductor element) First, the power semiconductor element used in this embodiment will be described. The power semiconductor device 100 used in this embodiment includes a power semiconductor chip 1 and a first connecting member 2, as shown in FIGS. The power semiconductor device 100 may include one power semiconductor chip 1, or may include two or more power semiconductor chips 1. When the power semiconductor element 100 includes one power semiconductor chip 1, the size (planar area) of the power semiconductor element 100 is 10 mm 2 More than 1000mm 2 Preferably, it is less than 20 mm 2 Over 500mm 2 It is more preferable that it is 30 mm or less. 2 More than 150mm 2 More preferably, it is 40 mm or less. 2 Over 80mm 2 In addition, when the power semiconductor device 100 includes two power semiconductor chips 1, the size of the power semiconductor device 100 is preferably 20 mm or less. 2 More than 2000mm 2 Preferably, it is less than 40 mm 2 More than 1000mm 2 It is more preferable that it is 60 mm or less. 2 More than 300mm 2 More preferably, it is 80 mm or less. 2 More than 160mm 2 It is particularly preferable that the size is less than or equal to: Furthermore, when the power semiconductor element 100 includes three or more power semiconductor chips 1, the size of the power semiconductor element 100 can be set appropriately by referring to the example when the power semiconductor element 100 includes one power semiconductor chip 1. The thickness of the power semiconductor element 100 is preferably 100 μm or more and 300 μm or less, more preferably 120 μm or more and 250 μm or less, and particularly preferably 150 μm or more and 200 μm or less. As described above, the power semiconductor module 200 according to this embodiment is required to be compact, and therefore, the distance between the wires facing each other via the power semiconductor element 100 becomes shorter, which may cause dielectric breakdown. However, as will be described later, a structure such as the power semiconductor module 200 according to this embodiment can prevent dielectric breakdown.
[0011] The power semiconductor chip 1 has a first electrode 11 and a second electrode 12 on a first surface 1a, a third electrode 14 on a second surface 1b opposite to the first surface 1a, and a semiconductor chip body 13. Here, for example, the first electrode 11, the second electrode 12, and the third electrode 14 are a source electrode, a gate electrode, and a drain electrode, respectively. Here, the power semiconductor chip 1 may be either a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). In the case of a MOSFET, the first electrode 11, the second electrode 12, and the third electrode 14 correspond to a source electrode, a gate electrode, and a drain electrode, respectively. In the case of an IGBT, the first electrode 11, the second electrode 12, and the third electrode 14 correspond to an emitter electrode, a base electrode, and a collector electrode, respectively. Here, if the power semiconductor chip 1 is a MOSFET, it may be a trench type in which a gate insulating layer is provided in a trench groove and a part of the gate electrode is buried, or it may be a planar type in which a gate insulating layer and a gate electrode are stacked. The material of the semiconductor chip body 13 is not particularly limited, and known semiconductor materials can be used. Specific materials include Si, SiC, GaN, GaAs, and diamond. Among these, it is preferable to use a wide bandgap semiconductor from the viewpoint of dielectric breakdown strength and thermal conductivity. Examples of wide bandgap semiconductors include SiC, GaN, GaAs, and diamond.
[0012] The first connecting member 2 has a first conductive portion 21 provided on the first surface 1a of the power semiconductor chip 1 so as to be electrically conductive with the first electrode 11, a second conductive portion 22 provided so as to be electrically conductive with the second electrode 12, and a first insulating layer 23 that encases the first conductive portion 21 and the second conductive portion 22. 1 and 2, the second conductive portion 22 has a portion that protrudes outward from the outer periphery of the power semiconductor chip 1 in plan view. This allows a sufficient gap to be provided between the source electrode and the gate electrode in the power semiconductor element 100. This makes it possible to directly bond the power semiconductor element 100 onto the wiring of a wiring board.
[0013] The distance from the end of the first conductive portion 21 to the end of the second conductive portion 22 on the upper surface (the surface not in contact with the power semiconductor chip 1) of the first connecting member 2 (hereinafter also referred to as creepage distance X (see FIG. 1)) is preferably 0.1 mm to 4 mm, more preferably 0.2 mm to 3 mm, and particularly preferably 0.3 mm to 2 mm. If the creepage distance X is within the above range, a sufficient gap can be provided between the source electrode and the gate electrode. The thickness of the power semiconductor chip 1 is preferably 70 μm or more and 270 μm or less, more preferably 90 μm or more and 220 μm or less, and particularly preferably 100 μm or more and 200 μm or less.
[0014] Examples of materials for the first conductive portion 21 and the second conductive portion 22 include metals. Examples of metals include copper, aluminum, silver, gold, and alloys containing these. Among these, copper or aluminum is preferred. The first insulating layer 23 is a layer made of an insulating resin composition. Examples of resins used in the resin composition include polyimide, polyetherimide, polyamide, polyamideimide, polymethylpentene, polyester, polyetheretherketone, liquid crystal polymer, polyphenylene ether, polyphenylene sulfide, polyolefin, syndiotactic polystyrene, epoxy resin, maleimide resin, phenolic resin, and melamine resin. Among these, polyimide or polyetherimide is preferably used from the viewpoint of preventing dielectric breakdown. The resin composition may contain a filler, an additive, etc. Examples of the filler include silica, alumina, aluminum hydroxide, magnesium hydroxide, etc. Known additives can be used as appropriate.
[0015] The thickness of the first connecting member 2 is preferably 10 μm or more and 100 μm or less, more preferably 15 μm or more and 80 μm or less, and particularly preferably 20 μm or more and 50 μm or less. If the thickness is within this range, it is easy to design the first connecting member 2 while ensuring an appropriate creepage distance X.
[0016] In this embodiment, in addition to the power semiconductor element 100 described above, the following power semiconductor elements can be used. The power semiconductor element 100A used in this embodiment includes a power semiconductor chip 1, a first connecting member 2, a second connecting member 3, and a sealing resin layer 4, as shown in FIG. The power semiconductor chip 1 and the first connecting member 2 are as described above.
[0017] The second connecting member 3 has a third conductive portion 31 provided on the second surface 1b of the power semiconductor chip 1 so as to be electrically conductive with the third electrode 14, and a second insulating layer 32 that encases the third conductive portion 31. The material of the third conductive portion 31 may be the same as that of the first conductive portion 21 and the second conductive portion 22. However, the material of the third conductive portion 31 may be the same as or different from that of the first conductive portion 21 or the second conductive portion 22. The second insulating layer 32 is a layer made of an insulating resin composition. The resin of the resin composition can be the same as that used for the first insulating layer 23. However, the material of the second insulating layer 32 may be the same as or different from that of the first insulating layer 23.
[0018] The thickness of the second connecting member 3 is preferably 3 μm or more and 100 μm or less, more preferably 5 μm or more and 80 μm or less, and particularly preferably 7 μm or more and 50 μm or less.
[0019] The encapsulating resin layer 4 is a layer made of an insulating resin composition that encapsulates at least the power semiconductor chip 1. The encapsulating resin layer 4 may encapsulate not only the power semiconductor chip 1 but also the first connecting member 2 and the second connecting member 3. Resins used in the resin composition include polyimide, polyetherimide, polyamide, polyamideimide, polymethylpentene, polyester, polyetheretherketone, liquid crystal polymer, polyphenylene ether, polyphenylene sulfide, polyolefin, syndiotactic polystyrene, epoxy resin, maleimide resin, phenolic resin, and melamine resin. Among these, epoxy resin is preferred from the viewpoint of processability. Furthermore, the resin composition may contain fillers, additives, and the like, similar to the first insulating layer 23 or the second insulating layer 32. However, the material of the encapsulating resin layer 4 may be the same as or different from the material of the first insulating layer 23 or the second insulating layer 32.
[0020] (Power semiconductor module) 4, the power semiconductor module 200 according to this embodiment includes a first wiring substrate 5, a second wiring substrate 6, and the above-described power semiconductor element 100A provided between them so as to connect the first wiring 52 and the second wiring 62 to each other. The power semiconductor element 100A is bonded to the first wiring 52 and the second wiring 62 by a bonding material 7. An insulating film 8 is provided on the first wiring 52 of the first wiring substrate 5. It is sufficient that the insulating film 8 is provided on at least one of the first wiring 52 and the second wiring 62. In this embodiment, although the distance S between the opposing first wirings 52 and second wirings 62 is short, the insulating film 8 can prevent dielectric breakdown. This spacing S is preferably 100 μm or more and 2000 μm or less, more preferably 150 μm or more and 1000 μm or less, and particularly preferably 200 μm or more and 500 μm or less. If the spacing S is equal to or more than the lower limit, other electronic components can be mounted inside the power semiconductor module 200, depending on the type. If the spacing S is equal to or less than the upper limit, the power semiconductor module 200 can be made even more compact.
[0021] 4, the first wiring 52 preferably has a convex portion 521 in which a part of the first wiring 52 is convex. The power semiconductor element 100A is preferably disposed on the convex portion 521. With this configuration, the distance S between the opposing first wiring 52 and second wiring 62 can be increased by the height H of the convex portion 521 of the first wiring 52. The height H of the convex portion 521 is preferably 10 μm or more and 300 μm or less, more preferably 20 μm or more and 200 μm or less, and particularly preferably 30 μm or more and 150 μm or less.
[0022] In this embodiment, it is preferable that the peripheral edge of the power semiconductor element 100A and the insulating film 8 overlap in plan view. With this configuration, an insulating film 8 is present between the peripheral edge of the power semiconductor element 100A and the first wiring 52, making it possible to more reliably prevent dielectric breakdown between the peripheral edge of the power semiconductor element 100A and the first wiring 52.
[0023] First wiring board 5 includes first base material 51 and first wiring 52. Second wiring board 6 includes second base material 61 and second wiring 62. Known substrates can be used as the first substrate 51 and the second substrate 61. Specific examples include ceramic substrates. Examples of materials for the first wiring 52 and the second wiring 62 include metals. Examples of metals include copper, aluminum, silver, gold, and alloys containing these. Among these, copper or aluminum is preferred. The thickness of the first wiring 52 and the second wiring 62 is preferably 100 μm or more and 2000 μm or less, more preferably 150 μm or more and 1500 μm or less, and particularly preferably 200 μm or more and 1000 μm or less. Note that the first wiring 52 and the second wiring 62 may be provided with protrusions or recesses as described below, and the thickness may be changed partially. Examples of the bonding material 7 include solder, sintered metal, and conductive adhesive.
[0024] The insulating film 8 is a film made of an insulating resin composition, and may be a single-layer film or a multi-layer film. Examples of resins used in the resin composition include polyimide, polyetherimide, polyamide, polyamideimide, polymethylpentene, polyester, polyetheretherketone, liquid crystal polymer, polyphenylene ether, polyphenylene sulfide, polyolefin, syndiotactic polystyrene, epoxy resin, maleimide resin, phenolic resin, and melamine resin. Among these, polyimide or polyetherimide is preferably used from the viewpoint of preventing dielectric breakdown. The insulating film 8 is preferably a multilayer film. The dielectric breakdown strength of the resin constituting at least one layer is preferably 100 kV / mm or more, more preferably 150 kV / mm or more, and particularly preferably 200 kV / mm or more. For example, the multilayer film may include a layer having adhesive properties and a layer containing a resin whose dielectric breakdown strength is within the above range. With such a configuration, an insulating film 8 having excellent adhesive properties and a high effect of preventing dielectric breakdown can be formed. Similarly to the first insulating layer 23 or the second insulating layer 32, the resin composition may also contain fillers, additives, and the like. However, the material of the insulating film 8 may be the same as or different from that of the first insulating layer 23 or the second insulating layer 32.
[0025] The thickness of the insulating film 8 is preferably 10 μm or more and 300 μm or less, more preferably 15 μm or more and 200 μm or less, and particularly preferably 20 μm or more and 150 μm or less.
[0026] (Operation and effect of the first embodiment) According to this embodiment, the following effects can be achieved. (1) Although the distance S between the opposing first wirings 52 and second wirings 62 becomes shorter, the insulating film 8 can prevent dielectric breakdown. (2) The protrusions 521 of the first wiring 52 can increase the distance S between the opposing first wiring 52 and second wiring 62 by the height H of the protrusions 521 . (3) The insulating film 8 present between the periphery of the power semiconductor element 100A and the first wiring 52 can more reliably prevent dielectric breakdown between the periphery of the power semiconductor element 100A and the first wiring 52.
[0027] [Second embodiment] Next, a second embodiment of the present invention will be described with reference to the drawings. Note that a description of the same configuration as the first embodiment will be omitted. 5, a power semiconductor module 200A according to this embodiment includes a first wiring substrate 5, a second wiring substrate 6, and a power semiconductor element 100A provided between them so as to connect a first wiring 52 and a second wiring 62 to each other. The power semiconductor element 100A is bonded to the first wiring 52 and the second wiring 62 by a bonding material 7. Not only does the first wiring 52 have a protrusion 521, but the second wiring 62 also has a protrusion 621. An insulating film 8 is provided on both the first wiring 52 and the second wiring 62. By providing the insulating film 8 on both the first wiring 52 and the second wiring 62, dielectric breakdown between the first wiring 52 and the second wiring 62 can be prevented more reliably.
[0028] The power semiconductor module 200A further includes a passive component 9 on the first wiring 52. An insulating film 8 is provided on the second wiring 62. With this configuration, dielectric breakdown between the passive component 9 and the second wiring 62 can be prevented more reliably. The passive components 9 include resistors, capacitors, inductors, and the like.
[0029] 5, the first wiring 52 preferably has a recess 522 in which a portion of the first wiring 52 is recessed. In addition, the passive component 9 is preferably disposed in the recess 522. With this configuration, even large passive components 9 can be mounted inside the power semiconductor module 200A. The depth D of the recess 522 is preferably 10 μm or more and 2000 μm or less, more preferably 20 μm or more and 1000 μm or less, and particularly preferably 30 μm or more and 500 μm or less.
[0030] (Operation and effect of the second embodiment) According to this embodiment, it is possible to achieve the same effects as the effects (1) to (3) of the first embodiment, as well as the following effects (4) to (6). (4) By providing the insulating film 8 on both the first wiring 52 and the second wiring 62, dielectric breakdown between the first wiring 52 and the second wiring 62 can be prevented more reliably. (5) The insulating film 8 present between the passive components 9 and the second wiring 62 can more reliably prevent dielectric breakdown between the passive components 9 and the second wiring 62 . (6) Since the first wiring 52 has the recess 522, even a large passive component 9 can be mounted inside the power semiconductor module 200A.
[0031] [Third embodiment] Next, a third embodiment of the present invention will be described with reference to the drawings. Note that a description of the same configuration as the first embodiment will be omitted. 6, a power semiconductor module 200B according to this embodiment includes a first wiring substrate 5, a second wiring substrate 6, and a power semiconductor element 100A disposed between them so as to connect a first wiring 52 and a second wiring 62 to each other. The power semiconductor element 100A is bonded to the first wiring 52 and the second wiring 62 by a bonding material 7. Because the first wiring 52 does not have a protrusion 521, the distance S is shorter than the distance S in the first embodiment. An insulating film 8 is provided on both the first wiring 52 and the second wiring 62. By providing the insulating film 8 on both the first wiring 52 and the second wiring 62, dielectric breakdown between the first wiring 52 and the second wiring 62 can be prevented more reliably.
[0032] (Operation and effect of the third embodiment) According to this embodiment, it is possible to achieve the same effect as the effect (1) in the first embodiment, and the same effect as the effect (4) in the second embodiment.
[0033] [Fourth embodiment] Next, a fourth embodiment of the present invention will be described with reference to the drawings. Note that a description of the same configuration as in the first embodiment will be omitted. 7, a power semiconductor module 200C according to this embodiment includes a first wiring substrate 5, a second wiring substrate 6, and a power semiconductor element 100 provided between them so as to connect a first wiring 52 and a second wiring 62 to each other. The power semiconductor element 100 is bonded to the first wiring 52 and the second wiring 62 by a bonding material 7. Because the first wiring 52 does not have a protrusion 521, the interval S is shorter than the interval S in the first embodiment. An insulating film 8 is provided on both the first wiring 52 and the second wiring 62. By providing the insulating film 8 on both the first wiring 52 and the second wiring 62, dielectric breakdown between the first wiring 52 and the second wiring 62 can be prevented more reliably. In this embodiment, a power semiconductor element 100 is used instead of the power semiconductor element 100A used in the first embodiment. The power semiconductor element 100 has a step, and there is a portion where a part of the power semiconductor element 100 faces the second wiring 62. In addition, in a plan view, a part of the power semiconductor element 100 overlaps with the insulating film 8. With this configuration, the insulating film 8 is present between a portion of the power semiconductor element 100 and the second wiring 62, making it possible to more reliably prevent dielectric breakdown between the portion of the power semiconductor element 100 and the second wiring 62.
[0034] (Operation and effect of the fourth embodiment) According to this embodiment, it is possible to achieve the same effect as the effect (1) in the first embodiment, the same effect as the effect (4) in the second embodiment, and the following effect (7). (7) The insulating film 8 present between the part of the power semiconductor element 100 and the second wiring 62 can more reliably prevent dielectric breakdown between the part of the power semiconductor element 100 and the second wiring 62 .
[0035] [Modification of the embodiment] The present invention is not limited to the above-described embodiment, and includes modifications and improvements within the scope of achieving the object of the present invention. For example, in the first embodiment described above, the number of power semiconductor elements 100A mounted on the power semiconductor module 200 is one, but this is not limiting. The number of power semiconductor elements 100A may be two or more. In the second embodiment described above, the number of passive components 9 mounted on the power semiconductor module 200A is one, but this is not limiting. The number of passive components 9 may be two or more. In the second embodiment described above, the insulating film 8 is provided over almost the entire surface of the second wiring 62 except for the portion where the power semiconductor element 100A is disposed, but this is not limiting. A wiring pattern may be formed such that the second wiring 62 is not present in the portion facing the passive component 9 mounted on the power semiconductor module 200A. If the second wiring 62 is not present in such a portion, the problem of dielectric breakdown between the passive component 9 and the second wiring 62 will not occur even without the insulating film 8. Furthermore, a larger passive component 9 can be used by the amount corresponding to the absence of the second wiring 62. [Explanation of symbols]
[0036] 1...Power semiconductor chip 11...First electrode 12…Second electrode 13...Semiconductor chip body 14…Third electrode 2...First connecting member 21...First conduction part 22…Second conduction part 23...First insulating layer 3...Second connecting member 31…Third conduction part 32...Second insulating layer 4…Sealing resin layer 5...First wiring board 51...First base material 52…First wiring 521...Convex part 522...recess 6…Second wiring board 61...Second base material 62…Second wiring 621...Convex part 7...Joining material 8...Insulating film 9...Passive components 100,100A...Power semiconductor element 200, 200A, 200B, 200C...Power semiconductor modules
Claims
1. two wiring boards, each having a substrate and wiring; a power semiconductor element provided between the two wiring substrates so as to connect the wirings to each other, The power semiconductor element is a power semiconductor chip having a first electrode and a second electrode on a first surface thereof and a third electrode on a second surface thereof opposite to the first surface; a first connection member including: a first conductive portion provided on the first surface of the power semiconductor chip so as to be electrically connected to the first electrode; a second conductive portion provided on the first surface of the power semiconductor chip so as to be electrically connected to the second electrode and having a portion that protrudes outward from an outer peripheral edge of the power semiconductor chip in a plan view; and a first insulating layer that encases the first conductive portion and the second conductive portion; an insulating film is provided on at least one of the wirings of the two wiring substrates; Power semiconductor module.
2. 2. The power semiconductor module according to claim 1, The power semiconductor element is a second connection member including: a third conductive portion provided on the second surface of the power semiconductor chip so as to be electrically connected to the third electrode; and a second insulating layer enclosing the third conductive portion; Further comprising an encapsulating resin layer that encapsulates at least the power semiconductor chip. Power semiconductor module.
3. 3. The power semiconductor module according to claim 1, At least one of the wirings of the two wiring substrates has a convex portion in which a part of the wiring is convex, The power semiconductor element is disposed on the protruding portion. Power semiconductor module.
4. 4. The power semiconductor module according to claim 3, In a plan view, a peripheral portion of the power semiconductor element and the insulating film overlap each other. Power semiconductor module.
5. 3. The power semiconductor module according to claim 1, the power semiconductor module further includes a passive component on one of the wirings of the two wiring boards; the insulating film is provided on the other of the wirings of the two wiring substrates; Power semiconductor module.
6. 6. The power semiconductor module according to claim 5, One of the wirings of the two wiring substrates has a recess in which a part of the wiring is recessed, The passive component is disposed in the recess. Power semiconductor module.
7. 3. The power semiconductor module according to claim 1, the insulating film is provided on both of the wirings of the two wiring substrates; Power semiconductor module.
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