Multilayer ceramic electronic component and manufacturing method of the same
The multilayer ceramic capacitor addresses dielectric constant reduction and breakdown susceptibility by varying ceramic particle sizes and molar ratios, enhancing performance and lifespan.
Patent Information
- Application Number
- JP2024056414
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-29
- Publication Date
- 2025-10-10
AI Technical Summary
Existing multilayer ceramic capacitors face issues with decreased dielectric constant and susceptibility to dielectric breakdown, particularly when using small ceramic particles, leading to potential dielectric breakdown at biased voltage sides.
A multilayer ceramic electronic component design where ceramic particles are sized differently in alternating regions based on their proximity to internal electrodes, with smaller particles near one electrode and larger particles near the other, and controlled molar ratios of rare earth elements or magnesium to improve dielectric constant and resistance to breakdown.
The design effectively suppresses dielectric constant reduction and enhances resistance to dielectric breakdown, improving the capacitor's performance and lifespan.
Smart Images

Figure 2025153781000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same. [Background technology]
[0002] In multilayer ceramic electronic components such as multilayer ceramic capacitors in which internal electrodes and dielectric layers are stacked, it is known that, in order to improve resistance to dielectric breakdown, the particle size of the ceramic particles at both ends of the dielectric layer on the internal electrode side is made smaller than the particle size of the ceramic particles in the central part of the dielectric layer (for example, Patent Document 1). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-35384 Summary of the Invention [Problem to be solved by the invention]
[0004] However, when small ceramic particles are used, as in the technology of Patent Document 1, the dielectric constant decreases, and there is a risk that the desired capacitance will not be obtained. Furthermore, depending on the conditions of use, multilayer ceramic capacitors may experience dielectric breakdown starting from a position biased toward the high-voltage side or the low-voltage side.
[0005] The present invention has been made in view of the above-mentioned problems, and has an object to provide a multilayer ceramic electronic component that can suppress a decrease in dielectric constant and improve resistance to dielectric breakdown, and a method for manufacturing the same. [Means for solving the problem]
[0006] The present invention is a multilayer ceramic electronic component comprising: an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the plurality of internal electrodes being arranged alternately as first internal electrodes and second internal electrodes in the first direction; the element body having a first end face from which the first internal electrodes are exposed; and a second end face from which the second internal electrodes are exposed, the second end face facing the first end face in a second direction; and a pair of external electrodes in contact with the first internal electrodes and the second internal electrodes exposed from the first end face and the second end face, respectively; wherein when one dielectric layer in a capacity region in the center of the element body in the second direction, as viewed from the first direction, where the first internal electrodes and the second internal electrodes overlap, is virtually divided into two equally spaced regions, a first region in contact with the first internal electrode and a second region in contact with the second internal electrode, the first grain size of the ceramic particles in the first region being smaller than the second grain size of the ceramic particles in the second region.
[0007] In the above configuration, the first particle size may be 0.8 times or less the second particle size.
[0008] In the above configuration, the third particle size of the ceramic particles that are not adjacent to the first internal electrode and adjacent to the ceramic particles that are adjacent to the first internal electrode can be smaller than the fourth particle size of the ceramic particles that are not adjacent to the second internal electrode and adjacent to the ceramic particles that are adjacent to the second internal electrode.
[0009] In the above configuration, the third particle size may be 0.8 times or less the fourth particle size.
[0010] In the above configuration, the molar ratio of the rare earth element to the main component element of the ceramic in the first region may be higher than the molar ratio of the rare earth element to the main component element in the second region.
[0011] The present invention is a method for manufacturing a multilayer ceramic electronic component, including the steps of: forming a first laminate sheet by forming a metal pattern in contact with a first layer of a green sheet arranged in a first direction, the first layer including first ceramic particles having a first particle size and a second layer including second ceramic particles having a second particle size larger than the first particle size; forming a second laminate sheet by forming the metal pattern in contact with the second layer of the green sheet; forming a base body by alternately stacking the first laminate sheet and the second laminate sheet in the first direction; firing the base body to form first internal electrodes and second internal electrodes exposed from the metal pattern, respectively, at first end faces and second end faces facing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheets; and forming a pair of external electrodes in contact with the first internal electrodes and second internal electrodes exposed from the first end faces and second end faces, respectively.
[0012] The present invention is a method for manufacturing a multilayer ceramic electronic component, including the steps of: forming a first laminate sheet by forming a metal pattern in contact with a first layer of a green sheet in which a first layer and a second layer having a higher molar ratio of magnesium to a main component element of the ceramic than the first layer are arranged in a first direction; forming a second laminate sheet by forming the metal pattern in contact with the second layer of the green sheet; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in the first direction; firing the element body to form first internal electrodes and second internal electrodes exposed from the metal pattern, respectively, at first end faces and second end faces facing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheet; and forming a pair of external electrodes in contact with the first internal electrodes and second internal electrodes exposed from the first end faces and second end faces, respectively.
[0013] The present invention is a method for manufacturing a multilayer ceramic electronic component, including the steps of: forming a first laminate sheet by forming a first metal pattern on a green sheet; forming a second laminate sheet by forming a second metal pattern on the green sheet, the second metal pattern having a lower molar ratio of phosphorus to main component elements than the first metal pattern; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in a first direction; firing the element body to form first internal electrodes and second internal electrodes from the first metal pattern and the second metal pattern, respectively, exposed from a first end face and a second end face facing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheet; and forming a pair of external electrodes in contact with the first internal electrodes and the second internal electrodes exposed from the first end face and the second end face, respectively.
[0014] The present invention is a method for manufacturing a multilayer ceramic electronic component, including the steps of: forming a first laminate sheet by forming a first metal pattern on a green sheet; forming a second laminate sheet by forming a second metal pattern on the green sheet, the second metal pattern having a lower molar ratio of magnesium to main component elements than the first metal pattern; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in a first direction; firing the element body to form first internal electrodes and second internal electrodes from the first metal pattern and the second metal pattern, respectively, exposed from a first end face and a second end face facing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheet; and forming a pair of external electrodes in contact with the first internal electrodes and the second internal electrodes exposed from the first end face and the second end face, respectively.
[0015] In the above configuration, after firing the element body, when one dielectric layer in a capacitive region in the center of the element body in the second direction as viewed from the first direction, where the first internal electrode and the second internal electrode overlap, is virtually divided into two equal-spaced regions, a first region in contact with the first internal electrode and a second region in contact with the second internal electrode, the grain size of the ceramic particles in the first region can be smaller than the grain size of the ceramic particles in the second region. [Effects of the Invention]
[0016] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can suppress a decrease in dielectric constant and improve resistance to dielectric breakdown, and a method for manufacturing the same. [Brief explanation of the drawings]
[0017] [Figure 1] FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line BB in FIG. [Figure 4] FIG. 4 is a cross-sectional view taken along line CC in FIG. [Figure 5] FIG. 5 is an enlarged schematic view of the dielectric layers of the multilayer ceramic capacitor according to the first embodiment. [Figure 6] FIG. 6 is a flowchart showing a method 1 for manufacturing a multilayer ceramic capacitor. [Figure 7] 7(a) and 7(b) are cross-sectional views illustrating a method 1 for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 8] FIG. 8(a) is a plan view showing a method 1 for manufacturing a multilayer ceramic capacitor according to the first embodiment, and FIG. 8(b) and FIG. 8(c) are cross-sectional views taken along the line AA in FIG. 8(a). [Figure 9] FIG. 9 is a cross-sectional view illustrating a method 1 for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 10] 10(a) and 10(b) are cross-sectional views showing an example of a method 3 for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 11] FIG. 11 is a cross-sectional view illustrating a method 3 for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 12] FIG. 12 is a cross-sectional view of a multilayer ceramic capacitor fabricated by manufacturing method 3. As shown in FIG. [Figure 13] FIG. 13 is a schematic diagram showing the molar ratio of phosphorus relative to the position in the dielectric layer in the capacitance region. [Figure 14] FIG. 14 is a schematic diagram showing the average phosphorus molar ratio of each region in the dielectric. [Figure 15] 15(a) and 15(b) are diagrams showing a method for measuring particle diameter. DETAILED DESCRIPTION OF THE INVENTION
[0018] Hereinafter, with reference to the drawings, an embodiment will be described using a multilayer ceramic capacitor as an example of a multilayer ceramic electronic component.
[0019] (Embodiment) Fig. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to embodiment 1. Fig. 2 is a cross-sectional view taken along line AA in Fig. 1. Fig. 3 is a cross-sectional view taken along line BB in Fig. 1. Fig. 4 is a cross-sectional view taken along line CC in Fig. 1. Fig. 5 is a cross-sectional view taken along line DD in Fig. 1.
[0020] 1 to 5, the Z direction (first direction) is the stacking direction in which the dielectric layers 14 and the internal electrodes 12a and 12b are stacked, and is the direction in which the bottom surface 55 and top surface 56 of the element body 10 face each other. The X direction (second direction) is the length direction of the element body 10, and is the direction in which the pair of end surfaces 51 and 52 of the element body 10 face each other. The Y direction is the width direction of the internal electrodes 12a and 12b, and is the direction in which the pair of side surfaces 53 and 54 of the element body 10 face each other. The X direction, Y direction, and Z direction intersect or are perpendicular to each other.
[0021] The multilayer ceramic capacitor 100 includes an element body 10 having a substantially rectangular parallelepiped shape and external electrodes 20a and 20b. The element body 10 includes a plurality of dielectric layers 14, a plurality of internal electrodes 12a and 12b, and a cover dielectric layer 16. The plurality of internal electrodes 12a (first internal electrodes) and the plurality of internal electrodes 12b (second internal electrodes) are alternately stacked. One of the plurality of dielectric layers 14 is provided between one of the plurality of internal electrodes 12a and one of the plurality of internal electrodes 12b. The outermost layers in the stacking direction (Z direction) of the laminate in which the dielectric layer 14 and the internal electrodes 12a and 12b are stacked are the internal electrodes 12a and 12b, and the bottom and top surfaces of the laminate are covered with a cover dielectric layer 16.
[0022] The internal electrodes 12a and 12b are alternately exposed on the end faces 51 and 52. The internal electrode 12a is exposed from the end face 51 (first end face), but the internal electrode 12b is not exposed. The internal electrode 12b is exposed from the end face 52 (second end face), but the internal electrode 12a is not exposed. That is, the internal electrodes 12a and 12b are connected to different end faces 51 and 52.
[0023] The external electrode 20a contacts the internal electrode 12a exposed from the element body 10 at the end face 51. The external electrode 20b contacts the internal electrode 12b exposed from the element body 10 at the end face 51. The external electrode 20a covers the end faces in the -X direction of the side faces 53, 54, bottom face 55, and top face 56 in addition to the end face 51. The external electrode 20b contacts the internal electrode 12b at the end face 52. The external electrode 20b covers the end faces in the +X direction of the side faces 53, 54, bottom face 55, and top face 56 in addition to the end face 52.
[0024] 2 and 3 , the region of the element body 10 that is located at the center in the X direction when viewed from the Z direction and where the internal electrodes 12a and 12b overlap is a capacitance region 62. The region of the element body 10 that is located at the end in the X direction when viewed from the Z direction and where one of the internal electrodes 12a and 12b is not provided is an end margin region 64. As shown in FIGS. 3 and 4 , the region of the element body 10 that is located at the center in the Y direction and where the internal electrodes 12a and 12b face each other is a capacitance region 62. The region of the element body 10 that is located at the end in the Y direction and where the internal electrodes 12a and 12b are not provided is a side margin region 66.
[0025] The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length (length in the X direction), 0.125 mm in width (width in the Y direction), and 0.125 mm in height (height in the Z direction), or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes.
[0026] The thickness of the side margin region 66 is, for example, 10 μm to 30 μm. The length of the end margin region 64 in the X direction is, for example, 10 μm to 50 μm.
[0027] The internal electrodes 12a and 12b are primarily composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn). The internal electrodes 12a and 12b may also be made of precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these metals. The thickness of the internal electrodes 12a and 12b is, for example, 0.1 μm to 1 μm. The thickness of the internal electrodes 12a and 12b in the stacking direction may be the same or different across the entire layer.
[0028] The dielectric layer 14 has a main phase made of a ceramic material having a perovskite structure represented by the general formula ABO3. 3-α For example, the ceramic material includes barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and BaTiO3, which forms a perovskite structure. 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≦x≦1, 0≦y≦1, 0≦z≦1), etc. 1-x-y Ca x Sr y Ti 1-z Zr z O3 is barium strontium titanate, barium calcium titanate, barium zirconate, barium titanate zirconate, calcium titanate zirconate, barium calcium titanate zirconate, etc. For example, the dielectric layer 14 contains 90 at% or more of the main component ceramic. The thickness of the dielectric layer 14 is, for example, 0.3 μm or more and 2 μm or less.
[0029] An additive may be added to the dielectric layer 14. Examples of additives to the dielectric layer 14 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.
[0030] The composition of the main ceramic of the cover dielectric layer 16 may be the same as or different from the main ceramic of the dielectric layer 14 .
[0031] The external electrodes 20a and 20b are primarily composed of a metal such as copper, nickel, aluminum (Al), or zinc (Zn), or an alloy of two or more of these metals (e.g., an alloy of copper and nickel), and contain ceramics such as a glass component for densifying the external electrodes 20a and 20b and a co-material for controlling the sinterability of the external electrodes 20a and 20b. The glass component is an oxide of barium (Ba), strontium (Sr), calcium (Ca), zinc, aluminum, silicon, or boron. The co-material is, for example, a ceramic component primarily composed of the same material as the primary component of the dielectric layer 14. A plating film primarily composed of a base metal such as nickel, copper, or tin may be formed on the surfaces of the external electrodes 20a and 20b. Furthermore, a conductive resin film such as an epoxy resin or a urethane resin may be formed on the surface of the plating film.
[0032] Fig. 5 is an enlarged schematic view of the dielectric layers of the multilayer ceramic capacitor according to embodiment 1. Fig. 5 is an enlarged schematic view of the internal electrodes 12a, 12b and the dielectric layer 14 in the capacitance region 62. In reality, the shapes and particle sizes of the particles 40a and 40b vary, but in Fig. 5, the particles 40a and 40b are illustrated as being generally hexagonal, and the particles 40a in region 45 are illustrated as having the same particle size, while the particles 40b in region 46 are illustrated as having the same particle size.
[0033] As shown in FIG. 5, one dielectric layer 14 has regions 45 and 46 in the Z direction. In region 45, a plurality of ceramic-based particles 40a are spread out. The boundaries of the particles 40a are grain boundaries 42a. The points where three particles 40a contact, i.e., the points where three grain boundaries 42a intersect, are triple junctions 41a. In region 46, a plurality of ceramic-based particles 40b are spread out. The boundaries of the particles 40b are grain boundaries 42b, and the points where three particles 40b contact are triple junctions 41b. As the particle size increases, the density of triple junctions decreases. Region 45 contacts the internal electrode 12a in the Z direction. Region 46 contacts the internal electrode 12b in the Z direction. The particle size of the particles 40a in region 45 is smaller than the particle size of the particles 40b in region 46. If the particle size of the particles 40a or 40b in contact with the internal electrode 12a or 12b is large, dielectric breakdown is more likely to occur and the lifespan is shortened, whereas if the particle size of the particles 40a or 40b is small, the dielectric constant is reduced and the capacitor becomes larger.
[0034] When using the multilayer ceramic capacitor 100, polarity may occur between the internal electrodes 12a and 12b. In this case, the likelihood of dielectric breakdown differs between when a positive voltage is applied to the internal electrodes 12a and 12b and when a negative voltage is applied to the internal electrodes 12a and 12b, resulting in different lifetimes. Whether dielectric breakdown is more likely to occur when a positive voltage or a negative voltage is applied to the internal electrodes 12a and 12b depends on the composition of the internal electrodes 12a and 12b and the composition of the dielectric layer 14. For example, if the internal electrodes 12a and 12b are primarily composed of nickel and the dielectric layer 14 is primarily composed of barium titanate, dielectric breakdown is more likely to occur when a positive voltage is applied to the internal electrodes 12a and 12b. In this way, when dielectric breakdown has polarity, dielectric breakdown is more likely to occur near either the internal electrode 12a or the internal electrode 12b. Therefore, when dielectric breakdown is likely to occur near the internal electrode 12a, the grain size in the region 45 in contact with the internal electrode 12a is made smaller than the grain size in the region 46 in contact with the internal electrode 12b. This makes it possible to suppress dielectric breakdown with polarity and increase the dielectric constant.
[0035] The ratio of the thickness T1 of the region 45 in the Z direction to the thickness T2 of the region 46 in the Z direction can be determined appropriately. Regardless of the ratio of the thicknesses T1 and T2, one dielectric layer 14 is virtually divided into two equal-spaced regions: a first region A1 in contact with the internal electrode 12a (first internal electrode) and a second region A2 in contact with the internal electrode 12b (second internal electrode). In this case, the first particle size W1 of the ceramic particles 40a in the first region A1 is smaller than the second particle size W2 of the ceramic particles 40b in the second region A2. This makes it possible to suppress dielectric breakdown due to polarity and increase the dielectric constant.
[0036] The particle size W1 is preferably 0.9 times or less, more preferably 0.8 times or less, and even more preferably 0.6 times or less, of the particle size W2. More preferably, the particle size W1 is 0.3 times or less of the particle size W2. The particle size W1 is, for example, 50 nm to 300 nm. The particle size W2 is, for example, 80 nm to 1 μm.
[0037] To improve resistance to dielectric breakdown, the particle size of ceramic particles near the internal electrodes 12a and 12b is important. However, the particle size of particles 40f and 40e in contact with the internal electrodes 12a and 12b, respectively, may be difficult to measure depending on the appearance of the polished surface. Therefore, we focus on ceramic particles 40g and 40h, which are not adjacent to the internal electrodes 12a and 12b, respectively, but are adjacent to ceramic particles 40e and 40f, respectively. The third particle size W3 of ceramic particle 40g, defined in this way, is larger than the fourth particle size W4 of ceramic particle 40h.
[0038] The fourth particle size W4 is preferably 0.9 times or less, more preferably 0.8 times or less, and even more preferably 0.7 times or less, the third particle size W3.
[0039] Furthermore, the internal electrode 12a in contact with the small ceramic particles 40f may be an internal electrode containing a main component element such as nickel (Ni) and a secondary component such as gold (Au) or tin (Sn). By using the above internal electrode as the internal electrode 12a on the ceramic particle 40f side, it is possible to achieve the same resistance to dielectric breakdown as above even if the number of ceramic particles 40f is reduced.
[0040] (Manufacturing method of multilayer ceramic capacitor 1) A description will now be given of a method 1 for manufacturing the multilayer ceramic capacitor 100. Fig. 6 is a flowchart showing the method 1 for manufacturing the multilayer ceramic capacitor.
[0041] (Green sheet formation process) First, a green sheet 30 is formed (step S10). Figures 7(a) and 7(b) are cross-sectional views showing a method 1 for manufacturing the multilayer ceramic capacitor according to the first preferred embodiment.
[0042] In step S10, a dielectric material is prepared by adding various additive compounds (such as sintering aids) to ceramic powder, for example. A binder, an organic solvent such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material and wet-mixed to produce a slurry. The binder is, for example, polyvinyl butyral (PVB). Slurry A, which contains ceramic particles 38a with small particle sizes, and slurry B, which contains ceramic particles 38b with large particle sizes, are produced.
[0043] As shown in FIG. 7(a), the produced slurry B is used to coat a layer 36b on a substrate 37 using, for example, a die coater method or a doctor blade method. Then, a layer 36a is coated on the layer 36b using slurry A. This results in a green sheet 30a in which a layer 36a containing ceramic particles 38a is provided on a layer 36b containing ceramic particles 38b. The substrate 37 is, for example, a PET (polyethylene terephthalate) film.
[0044] As shown in FIG. 7(b), a layer 36a is coated on a substrate 37 using slurry A. Then, a layer 36b is coated on the layer 36a using slurry B. This results in a green sheet 30b in which a layer 36b having ceramic particles 38b is provided on a layer 36a containing ceramic particles 38a. The green sheets 30a and 30b are then dried. A green sheet 31 for the cover dielectric layer 16 is formed using slurry A.
[0045] As a result, the particle size of ceramic particles 38a in layers 36a of green sheets 30a and 30b and in green sheet 31 is smaller than the particle size of ceramic particles 38b in layers 36b of green sheets 30a and 30b.
[0046] (Pattern formation process) Next, a metal pattern 32 is formed on the green sheets 30a, 30b, and 31 (step S12). FIG. 8(a) is a plan view showing a manufacturing method 1 of a multilayer ceramic capacitor according to embodiment 1, and FIGS. 8(b) and 8(c) are cross-sectional views taken along line AA in FIG. 8(a). In step S12, first, a metal paste containing metal powder, an organic binder, and an organic solvent is prepared. The metal paste may contain ceramic particles as a co-material.
[0047] As shown in Figures 8(a) and 8(b), a metal paste is printed on a green sheet 30a using, for example, gravure printing, to form a metal pattern 32. As a result, a laminate sheet 34a is formed in which the metal pattern 32 is formed on the green sheet 30a. As shown in Figures 8(a) and 8(c), a metal paste is printed on a green sheet 30b to form a metal pattern 32. As a result, a laminate sheet 34b is formed in which the metal pattern 32 is formed on the green sheet 30b.
[0048] (Lamination process) Next, the green sheets are laminated (step S14). Fig. 9 is a cross-sectional view showing a manufacturing method 1 of the multilayer ceramic capacitor according to the first embodiment. In step S14, laminate sheets 34a and 34b are alternately laminated on laminate sheet 34c, and finally, green sheet 31 for cover dielectric layer 16 is laminated. This forms laminate sheet 35 in which laminate sheets 34a to 34c are laminated.
[0049] (Crimping process) Next, the laminated sheet 35 is pressure-bonded (step S16). In step S16, the laminated sheet 35 formed in step S14 is pressed to pressure-bond the plurality of laminated sheets 34a and 34b. As the pressure-bonding means, for example, a hydrostatic press is used.
[0050] (cutting process) Next, the laminated sheet 35 is cut (step S18). In step S18, a cutting blade is used to cut the laminated sheet in the stacking direction along predetermined cutting lines 36, thereby preparing a plurality of element bodies 10. After step S18, the element bodies 10 may be polished by a technique such as barrel polishing. This rounds the corners of the element bodies 10.
[0051] (External electrode formation process) Next, the external electrodes 20a and 20b are formed (step S20). In step S22, a conductive paste containing, for example, metal powder, glass frit, binder, and solvent is applied to the end faces 51 and 52. After the conductive paste is applied, it is baked to form a base metal layer of the external electrodes 20a and 20b. The binder and solvent evaporate during baking. The conductive paste is applied using, for example, a dipping method.
[0052] (Firing process) Next, element body 10 is fired (step S22). In step S22, element body 10 is subjected to a binder removal process in a nitrogen gas atmosphere at 250°C to 500°C, and then fired in a reducing atmosphere at 1300°C to 1400°C. This sinters the particles in element body 10. Region 45 in FIG. 5 is formed from layer 36a of green sheets 30a and 30b, and region 46 in FIG. 5 is formed from layer 36b of green sheets 30a and 30b. After step S22, a plated metal layer may be formed on the surface of the base metal layer of external electrodes 20a and 20b using a plating method.
[0053] The external electrodes 20a and 20b may be formed before the firing step, and then fired in the firing step. In addition, in the cutting step S18, the metal pattern 32 may be exposed from the side surface of the laminate in the Y direction, and side green sheets may be formed on the side surface of the laminate.
[0054] According to manufacturing method 1, as shown in FIGS. 7(a) and 7(b), green sheets 30a and 30b are provided with a first layer 36a containing first ceramic particles 38a having a first particle size R1 and a second layer 36b containing second ceramic particles 38b having a second particle size R2 larger than the first particle size R1, arranged in the thickness direction. As shown in FIG. 8(b), a first laminated sheet 34a is formed by forming a metal pattern 32 in contact with the first layer 36a of green sheet 30a. As shown in FIG. 8(c), a second laminated sheet 34b is formed by forming a metal pattern 32 in contact with the second layer 36b of green sheet 30b. As shown in FIG. 9, the laminated sheets 34a and 34b are alternately stacked to form the element body 10. As shown in step S22 of FIG. 6, the element body 10 is fired.
[0055] As a result, as shown in FIG. 5, the particle size W1 of the ceramic particles 40a in region 45 can be made smaller than the particle size W2 of the ceramic particles 40b in region 46. In embodiment 1, the particle size W1 of the ceramic particles 40a at the end on the internal electrode 12a side, which is more susceptible to insulation breakdown, is made smaller, and the particle size W2 of the ceramic particles 40b at the end on the internal electrode 12b side is made larger. Therefore, compared to Patent Document 1, in which the particle size of the ceramic particles at both ends of the internal electrodes 12a and 12b is made smaller, the region with larger particle sizes can be made larger. The dielectric constant of the region with larger particle sizes is higher than the dielectric constant of the region with smaller particle sizes. Therefore, in embodiment 1, the dielectric constant can be made larger than that of Patent Document 1.
[0056] The particle size R1 is preferably 0.9 times or less, more preferably 0.8 times or less, and even more preferably 0.7 times or less, the particle size R2.
[0057] The inclusion of a rare earth element in the dielectric layer 14 suppresses dielectric breakdown of the dielectric layer 14. Therefore, the molar ratio of rare earth elements to the main component metal elements (main component elements) of the ceramic in the layer 36a in FIGS. 7(a) and 7(b) is set higher than the molar ratio of rare earth elements to the main component metal elements in the layer 36b. As a result, the molar ratio of rare earth elements to the main component metal elements of the ceramic in the region A1 in FIG. 5 is higher than the molar ratio of rare earth elements to the main component metal elements in the ceramic in the region A2. This results in a longer lifespan. The molar ratio of rare earth elements to the main component metal elements of the ceramic in the region A1 is preferably 1.5 times or more, more preferably 2 times or more, of the ratio of rare earth elements to the main component metal elements in the region A2. For example, if the main component of the ceramic in the dielectric layer 14 is barium titanate, the main component metal element is titanium or barium. Therefore, the molar ratio of the rare earth element is defined by the molar ratio of the rare earth element to titanium or the molar ratio of the rare earth element to barium. The molar ratios of phosphorus and magnesium, which will be described later, are also defined by the molar ratio of phosphorus or magnesium to titanium or the molar ratio of phosphorus or magnesium to barium.
[0058] As rare earth elements, holmium (Ho), dysprosium (Dy), and gadolinium (Gd) have a particularly large effect on improving the lifespan. Therefore, it is preferable that region A1 contains holmium (Ho), dysprosium (Dy), and gadolinium (Gd). The molar ratio of the rare earth element to the main component metal element (e.g., titanium) in region A1 is preferably 0.3 to 5 at%.
[0059] (Manufacturing method of multilayer ceramic capacitors 2) A second manufacturing method of the multilayer ceramic capacitor 100 will now be described. The flowchart of the second manufacturing method of the multilayer ceramic capacitor is the same as that shown in FIG. 6. In step S10, the particle sizes of the ceramic particles 38a and 38b in the slurries A and B are set to be the same within the manufacturing tolerance range. The particle sizes of the particles 38a and 38b may be different from each other. No magnesium compound is added to the slurry B, but a magnesium compound is added to the slurry A. The magnesium compound is, for example, magnesium oxide. The molar ratio of magnesium to the main component metal element of the ceramic in the slurry A is, for example, 0.1 to 3 at % relative to the titanium element. The other steps are the same as those in the first manufacturing method of the multilayer ceramic capacitor.
[0060] The magnesium in the layer 36a of each of the green sheets 30a and 30b suppresses the growth of ceramic grains in the firing step S22, so that the grain size of the ceramic grains 40a in the region 45 formed from the layer 36a is smaller than the grain size of the ceramic grains 40b in the region 46.
[0061] Thus, according to manufacturing method 2, the green sheets 30a and 30b are provided in the thickness direction with a first layer 36a and a second layer 36b having a lower molar ratio of magnesium to the main component metal elements of the ceramic than the first layer 36a. The molar ratio of magnesium to the main component metal elements of the ceramic in the layer 36a is, for example, at least two times, and at least ten times, the molar ratio of magnesium to the main component metal elements of the ceramic in the layer 36b.
[0062] This allows the particle size W1 of the ceramic particles 40a in the region 45 to be smaller than the particle size W2 of the ceramic particles 40b in the region 46. This makes it possible to suppress dielectric breakdown due to polarity and increase the dielectric constant.
[0063] In the multilayer ceramic capacitor manufactured by manufacturing method 2, the molar ratio M3 of magnesium to the main component metal elements of the ceramic in the first region A1 is higher than the molar ratio M4 of magnesium to the main component metal elements in the second region A2. The molar ratio M4 is preferably 0.8 times or less, more preferably 0.6 times or less, of the molar ratio M3. The molar ratio M3 is, for example, 0.3 to 2 at%. The molar ratio M4 is, for example, 0 to 1 at%.
[0064] (Manufacturing method of multilayer ceramic capacitor 3) A description will now be given of a method 3 for manufacturing the multilayer ceramic capacitor 100. The flowchart of the method 3 for manufacturing the multilayer ceramic capacitor is the same as that shown in Fig. 6. In step S10, one type of slurry is used to form a green sheet 30 on a substrate.
[0065] (Pattern formation process) 10(a) and 10(b) are cross-sectional views illustrating a manufacturing method 3 of the multilayer ceramic capacitor according to the first embodiment. In step S12, a metal paste containing a metal powder, an organic binder, and an organic solvent is first prepared. The metal paste may contain ceramic particles as an additive. As the metal pastes, a metal paste C containing a phosphorus compound and a metal paste D not containing a phosphorus compound are prepared. The phosphorus compound is, for example, phosphoric acid.
[0066] As shown in FIG. 10(a), metal paste C is printed on green sheet 30 to form metal pattern 32a. As a result, laminate sheet 34a is formed in which metal pattern 32a is formed on green sheet 30. As shown in FIG. 10(a), metal paste D is printed on green sheet 30 to form metal pattern 32b. As a result, laminate sheet 34b is formed in which metal pattern 32b is formed on green sheet 30.
[0067] (Lamination process) Next, the green sheets are laminated (step S14). Fig. 11 is a cross-sectional view showing a manufacturing method 3 of the multilayer ceramic capacitor according to the first embodiment. In step S14, laminate sheets 34a and 34b are alternately laminated on laminate sheet 34c, and finally, green sheet 31 for cover dielectric layer 16 is laminated. This forms laminate sheet 35 in which laminate sheets 34a to 34c are laminated. Metal patterns 32a and 32b are alternately arranged in the Z direction. Thereafter, steps S16 to S22 of Fig. 6 are performed.
[0068] Fig. 12 is a cross-sectional schematic diagram of a multilayer ceramic capacitor fabricated by manufacturing method 3. As in Fig. 5, particles 40a and 40b are illustrated as schematic hexagons, with particles 40a in region 45 having the same particle size and particles 40b in region 46 having the same particle size.
[0069] During the binder treatment in the firing process, phosphorus in the metal pattern 32a diffuses into the green sheet 30 near the metal pattern 32a. Because the metal pattern 32b does not contain phosphorus, phosphorus does not diffuse into the green sheet 30 near the metal pattern 32b. Phosphorus raises the decomposition temperature of resins such as binders contained in the green sheet 30. Therefore, when the phosphorus concentration is high, carbon derived from the phosphorus and resin is present at the boundary of the ceramic powder. This inhibits sintering of the ceramic powder. Therefore, the particle size of the ceramic particles 40a becomes smaller in the region 45 in contact with the internal electrode 12a. On the other hand, because the metal pattern 32b does not contain phosphorus, the particle size of the ceramic particles 40b becomes larger in the region 46 in contact with the internal electrode 12b.
[0070] Thus, according to manufacturing method 3, as shown in Fig. 10(a), a first laminate sheet 34a is formed by forming a first metal pattern 32a on a green sheet 30. As shown in Fig. 10(b), a second laminate sheet 34b is formed by forming a second metal pattern 32b, which has a lower molar ratio of phosphorus to the main component metal element than the metal pattern 32a, on the green sheet 30. The element body 10 is formed by alternately stacking the first laminate sheet 34a and the second laminate sheet 34b.
[0071] 12, the particle size of ceramic particles 40a in region 45 can be made smaller than the particle size of ceramic particles 40b in region 46. This makes it possible to suppress dielectric breakdown due to polarity and increase the dielectric constant.
[0072] The locations where phosphorus is mainly distributed are near the position where the internal electrode 12a contacts the grain boundary, near the triple junction 41c of the particle 40c that contacts the internal electrode 12a, and near the triple junction 41d of the ceramic particle 40d that is adjacent to the ceramic particle 40c that is not in contact with the internal electrode 12a but is adjacent to the internal electrode 12a. For this reason, the particle diameters of the particles 40c and 40d are smaller than those of the other particles.
[0073] Fig. 13 is a schematic diagram showing the molar ratio of phosphorus versus position in the dielectric layer in the capacitance region of the multilayer ceramic capacitor manufactured by manufacturing method 3. The horizontal axis of Fig. 13 represents position Z in the Z direction. The vertical axis represents the molar ratio of phosphorus (P). As shown in Fig. 13, the molar ratio of phosphorus is high at the boundary between the internal electrode 12a and the dielectric layer 14. The molar ratio of phosphorus decreases with increasing distance from the internal electrode 12a.
[0074] Fig. 14 is a schematic diagram showing the average phosphorus molar ratio of each region in a dielectric. In Fig. 14, the dotted line indicates the phosphorus molar ratio in the dielectric layer 14 in Fig. 12. When one dielectric layer 14 is divided into two equal regions, a first region A1 and a second region A2, the average phosphorus molar ratio P1 in the first region A1 is higher than the phosphorus molar ratio P2 in the second region A2.
[0075] That is, the first molar ratio M1 of phosphorus to the main component metal elements of the ceramic in the first region A1 is higher than the second molar ratio M2 of phosphorus to the main component metal elements in the second region A2. The first molar ratio M1 is preferably 1.2 times or more, more preferably 1.5 times or more, of the second molar ratio M2.
[0076] As a result, the first particle size W1 of the ceramic particles 40a in the first region A1 of the dielectric layer 14 is smaller than the second particle size W2 of the ceramic particles 40b in the second region A2 of the dielectric layer 14. This makes it possible to suppress dielectric breakdown due to polarity and increase the dielectric constant.
[0077] Phosphorus is distributed near the internal electrode 12a. Therefore, as shown in Fig. 12, in the dielectric layer 14, the particle size of the ceramic particle 40d that is not adjacent to the internal electrode 12a but adjacent to the ceramic particle 40c that is adjacent to the internal electrode 12a is smaller than the particle size W2 of the ceramic particles in the second region A2. The particle size of the ceramic particle 40b is preferably 1.2 times or more, more preferably 1.5 times or more, the particle size of the ceramic particles in the second region A2.
[0078] 7(a) and 7(b), the molar ratio of phosphorus to the main component metal element in the metal pattern 32 is determined to an appropriate value so as to diffuse phosphorus into the dielectric layer 14. In addition, the firing temperature in the firing step S22 is preferably 1500° C. or lower.
[0079] The diffusion of phosphorus from the internal electrodes 12a and 12b to the dielectric layer 14 is a phenomenon that is likely to occur mainly when the ceramic of the dielectric layer 14 is mainly composed of barium titanate and the main component of the internal electrodes 12a and 12b is nickel.
[0080] (Manufacturing method of multilayer ceramic capacitor 4) Next, a fourth manufacturing method of the multilayer ceramic capacitor 100 will be described. The flowchart of the fourth manufacturing method of the multilayer ceramic capacitor is the same as that shown in FIG. 6. In step S12, a metal paste C containing a magnesium compound and a metal paste D not containing a magnesium compound are prepared as metal pastes. The magnesium compound is, for example, magnesium oxide. The subsequent steps are the same as those in the third manufacturing method of the multilayer ceramic capacitor.
[0081] During the binder treatment in the firing step, magnesium in the metal pattern 32a diffuses into the green sheet 30 near the metal pattern 32a. Because the metal pattern 32b does not contain magnesium, magnesium does not diffuse into the green sheet 30 near the metal pattern 32b. The magnesium in the green sheet 30 on which the metal pattern 32a is formed suppresses the growth of ceramic particles in the firing step S22. As a result, the particle size of the ceramic particles 40a in region 45 becomes smaller than the particle size of the ceramic particles 40b in region 46.
[0082] Thus, according to manufacturing method 4, a first laminate sheet 34a is formed by forming a first metal pattern 32a on a green sheet 30. A second laminate sheet 34b is formed on the green sheet 30 by forming a second metal pattern 32b, which has a lower molar ratio of magnesium to the main component metal elements than the metal pattern 32a.
[0083] 12, the particle size of ceramic particles 40a in region 45 can be made smaller than the particle size of ceramic particles 40b in region 46. This makes it possible to suppress dielectric breakdown due to polarity and increase the dielectric constant.
[0084] In the multilayer ceramic capacitor manufactured in this manner, the molar ratio M3 of magnesium to the main component metal elements of the ceramic in the first region A1 is higher than the molar ratio M4 of magnesium to the main component metal elements in the second region A2. The molar ratio M4 is preferably 0.8 times or less, more preferably 0.6 times or less, of the molar ratio M3.
[0085] Figures 15(a) and 15(b) are diagrams illustrating a method for measuring particle size. As shown in Figures 15(a) and 15(b), cross sections of the dielectric layer 14 and the cover dielectric layer 16 are observed using an electron microscope. The area S of the particle 40 is calculated. A circle 47 having an area of S is assumed, and the diameter 48 of the circle 47 is defined as the particle size W of the particle 40. In other words, if the area S of the particle 40 is the particle size W, then W = 2√(S / π).
[0086] The particle sizes W1 and W2 in regions A1 and A2 are defined as follows: As shown in FIG. 12, a line 44 extending in the Z direction is drawn in an electron microscope image. The particle sizes W of all particles 40a in region A1 that overlap line 44 but do not overlap region A2 are measured. The number of particles 40a whose particle sizes W are measured is set to 10 to 100. If the number of particles 40a whose particle sizes are measured is less than 10, another line 44 is drawn, and the particle sizes W of the particles 40a that overlap with the other line 44 are measured. The median of the particle sizes W of the measured particles 40a is defined as particle size W1. For particle size W2, an electron microscope image is also used to measure the particle sizes W of all particles 40b in region A2 that overlap line 44 but do not overlap region A1. As with particle size W1, the particle sizes W of 10 to 100 particles 40b are measured, and the median particle size W is defined as particle size W2.
[0087] 5, the particle size W3 of ceramic particle 40g is defined as the median value of the particle size W measured for 10 to 20 particles 40g that are the target of an electron microscope image, for example. The particle size W4 of ceramic particle 40h is defined as the median value of the particle size W measured for 10 to 20 particles 40h that are the target of an electron microscope image, for example.
[0088] 7(a) and 7(b), the particle size of particles 38a is defined as the median value of particle size W measured for 10 to 100 particles 38a. The particle size of particles 38b is defined as the median value of particle size W measured for 10 to 100 particles 38b.
[0089] Regarding the measurement of the molar ratios of rare earth elements, phosphorus, and magnesium to the main component metal elements of the ceramic, the molar ratios within regions A1 and A2 are determined by drawing a straight line (e.g., line 44 in Figure 12) that crosses regions A1 and A2 in the Z direction and averaging the molar ratios of the parts that overlap with the line in each region A1 and A2.
[0090] When a certain component contains a certain element as its main component, it is sufficient that the element is contained in the component to an extent that the effect of the embodiment is achieved, and the molar ratio of the element in the component is, for example, 50 mol % or more, 80 mol % or more, or 90 mol % or more.
[0091] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as described in the claims. [Explanation of symbols]
[0092] 10 Base 12a, 12b internal electrode 14 Dielectric layer 16 Cover dielectric layer 20a, 20b external electrode 30, 30a, 30b, 31 Green Sheet 32, 32a, 32b Metal pattern 34a, 34b, 34c, 35 laminated sheets 36a, 36b layer 40a, 40b particles 41a, 41b triple point 42a, 42b grain boundaries 51, 52 End face 53, 54 Side 55 Bottom side 56 Top 62 capacity area
Claims
1. an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the plurality of internal electrodes being arranged such that first internal electrodes and second internal electrodes are alternately provided in the first direction, the element body having a first end face from which the first internal electrodes are exposed, and a second end face from which the second internal electrodes are exposed, the second end face facing the first end face in a second direction; a pair of external electrodes in contact with the first internal electrode and the second internal electrode exposed from the first end surface and the second end surface, respectively; Equipped with a multilayer ceramic electronic component in which, when viewed from the first direction, one dielectric layer in a capacitive region in the center in the second direction of the element body where the first internal electrode and the second internal electrode overlap is virtually divided into two equal-spaced regions, a first region in contact with the first internal electrode and a second region in contact with the second internal electrode, a first grain size of ceramic particles in the first region being smaller than a second grain size of ceramic particles in the second region.
2. 2. The multilayer ceramic electronic component according to claim 1, wherein the first grain size is 0.8 times or less the second grain size.
3. 3. The multilayer ceramic electronic component according to claim 1, wherein a third particle size of ceramic particles that are not adjacent to the first internal electrode and adjacent to ceramic particles that are adjacent to the first internal electrode is smaller than a fourth particle size of ceramic particles that are not adjacent to the second internal electrode and adjacent to ceramic particles that are adjacent to the second internal electrode.
4. 4. The multilayer ceramic electronic component according to claim 3, wherein the third grain size is 0.8 times or less the fourth grain size.
5. 3. The multilayer ceramic electronic component according to claim 1, wherein a molar ratio of the rare earth element to the main component element of the ceramic in the first region is higher than a molar ratio of the rare earth element to the main component element in the second region.
6. forming a first laminated sheet by forming a metal pattern on a first layer of a green sheet in which a first layer includes first ceramic particles having a first particle size and a second layer includes second ceramic particles having a second particle size larger than the first particle size, the first layer being arranged in a first direction; forming the metal pattern on and in contact with the second layer of the green sheet to form a second laminate sheet; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in the first direction; firing the element body to form first internal electrodes and second internal electrodes exposed from a first end face and a second end face facing each other in a second direction from the metal patterns, and to form a plurality of dielectric layers from the green sheets; forming a pair of external electrodes in contact with the first internal electrode and the second internal electrode exposed from the first end surface and the second end surface, respectively; A method for manufacturing a multilayer ceramic electronic component comprising:
7. forming a first laminated sheet by forming a metal pattern in contact with a first layer of a green sheet in which a first layer and a second layer having a lower molar ratio of magnesium to a main component element of the ceramic than the first layer are arranged in a first direction; forming the metal pattern on and in contact with the second layer of the green sheet to form a second laminate sheet; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in the first direction; firing the element body to form first internal electrodes and second internal electrodes exposed from a first end face and a second end face facing each other in a second direction from the metal patterns, and to form a plurality of dielectric layers from the green sheets; forming a pair of external electrodes in contact with the first internal electrode and the second internal electrode exposed from the first end surface and the second end surface, respectively; A method for manufacturing a multilayer ceramic electronic component comprising:
8. forming a first metal pattern on a green sheet to form a first laminate sheet; forming a second laminated sheet by forming a second metal pattern on the green sheet, the second metal pattern having a lower molar ratio of phosphorus to main component elements than the first metal pattern; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in a first direction; a step of firing the element body to form first internal electrodes and second internal electrodes exposed from the first end face and the second end face facing each other in a second direction from the first metal pattern and the second metal pattern, respectively, and to form a plurality of dielectric layers from the green sheet; forming a pair of external electrodes in contact with the first internal electrode and the second internal electrode exposed from the first end surface and the second end surface, respectively; A method for manufacturing a multilayer ceramic electronic component comprising:
9. forming a first metal pattern on a green sheet to form a first laminate sheet; forming a second laminated sheet by forming a second metal pattern on the green sheet, the second metal pattern having a lower molar ratio of magnesium to main component elements than the first metal pattern; forming an element body by alternately stacking the first laminate sheet and the second laminate sheet in a first direction; a step of firing the element body to form first internal electrodes and second internal electrodes exposed from the first end face and the second end face facing each other in a second direction from the first metal pattern and the second metal pattern, respectively, and to form a plurality of dielectric layers from the green sheet; forming a pair of external electrodes in contact with the first internal electrode and the second internal electrode exposed from the first end surface and the second end surface, respectively; A method for manufacturing a multilayer ceramic electronic component comprising:
10. After firing the element body, 10. The method for manufacturing a multilayer ceramic electronic component according to claim 6, wherein when one of the dielectric layers in a capacitive region in which the first internal electrode and the second internal electrode overlap at a center in the second direction of the element body as viewed from the first direction is virtually divided into two equal-spaced regions, a first region in contact with the first internal electrode and a second region in contact with the second internal electrode, the grain size of the ceramic particles in the first region is smaller than the grain size of the ceramic particles in the second region.
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Display controller, display control method, and program
JP2014035384A