Etching method

Abstract

To provide a method of dry etching for forming a rounded corner in a GaN trench.SOLUTION: There is provided a method of plasma etching a substrate including at least one GaN or GaN alloy layer to form a feature. The method includes the steps of: (a) providing a substrate with a mask formed thereon, the mask having an opening, the substrate including at least one GaN or GaN layer; and (b) performing a plasma etch step using an inductively coupled plasma (ICP) etch apparatus to anisotropically etch the at least one GaN or GaN alloy layer through the opening to produce a feature having one or more side walls and a bottom surface, the ICP etch apparatus including an ICP coil and an RF power supply which supplies an RF electrical signal to the ICP coil.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method of etching a substrate, and more particularly to plasma etching a substrate comprising at least one GaN or GaN alloy layer to form features. The present invention also relates to an associated apparatus for plasma etching a substrate, and to a substrate comprising at least one GaN or GaN alloy layer having features formed thereon. [Background technology]

[0002] Gallium nitride (GaN), with its wide bandgap, high charge mobility, and relatively low dielectric constant, is increasingly being used as a material for power semiconductor devices, particularly as gate trenches in MOSFET devices. These properties can be utilized in a wide range of devices and applications, including high-speed, low-loss transistors and high-power-density power converters. Other applications include fast-charging electric vehicles (EVs) with compact on-board chargers and HV DC-DC converters with twice the power density of alternative materials; highly efficient and versatile LED applications; improved efficiency in always-on, energy-intensive data centers; high-power-density converters for photovoltaic harvesting and storage; and high-power-density consumer electronics, such as next-generation chargers and DC-DC converters for PCs. Dry-etched GaN trenches with typical widths of 1–5 μm and typical depths of 1–3 μm are well suited for these applications.

[0003] In a typical GaN power device, such as a MOSFET device, the gate trench controls the width of the depletion region and therefore the conductivity of the source-drain channel. The precise shape of the gate etch itself is important for a number of reasons related to device operation (such as penetration depth deep enough into the drift region and sufficient sidewall profile angle to allow good dielectric deposition coverage) and, important for the purposes of this application, to minimize charge leakage. Such leakage occurs as a result of charge accumulation, often at the corners of the etched trench, creating a large electric field gradient across the channel-dielectric-metal interface. Charge leakage occurs when the resulting potential difference is greater than the metal-insulator-semiconductor Schottky barrier height at that interface. This reduces the breakdown voltage and limits the maximum rectified power of the device. While first-generation GaN devices with breakdown voltages of approximately 100 V are already established and commercially available, the 600 / 650 V platform is currently the focus of industrial attention. Yet, with the increasing global demand for devices exceeding 1200 V, many of these devices have vertical architectures and suffer additional charge losses, making minimizing charge leakage more important than ever. Therefore, trenching is expected to play an ever-important role in realizing high breakdown voltage GaN transistors. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-105265 Summary of the Invention [Problem to be solved by the invention]

[0005] Currently, industry focus is on reducing charge leakage through the reduction of micro-trenching at trench corners. Micro-trenching is a well-known phenomenon in which concerns about ion energy and wafer-level current density, along with ion deflection, subtle differences in etching mechanisms, and species transport and consumption at the etch front, result in higher etch rates at trench corners compared to the trench center, inducing triangular-shaped spots. These spots act as sources of significant charge storage and leakage. While it is becoming possible to successfully create flat-base trenches, the discontinuous nature of flat trench corners still limits breakdown voltage. Therefore, there has been an increasing demand and literature from industry for dry etching strategies to create rounded corners in GaN trenches. [Means for solving the problem]

[0006] The present invention, in at least some of its embodiments, addresses the problems, needs, and desires described above. In particular, the present invention, in at least some of its embodiments, proposes an industrially scalable dry plasma etching strategy for GaN that allows flat-bottom features, such as trenches, to be achieved in situ by dry etching, thereby reducing microtrenching. The present invention is also applicable to etching GaN alloys, such as AlGaN and InGaN.

[0007] According to a first aspect of the present invention, there is provided a method of plasma etching a substrate comprising at least one GaN or GaN alloy layer to form features, comprising the steps of: (a) providing a substrate having a mask formed thereon, the mask having an opening, the substrate comprising at least one GaN or GaN alloy layer; (b) performing a plasma etching process using an inductively coupled plasma (ICP) etcher to anisotropically etch the at least one GaN or GaN alloy layer through the opening to create a feature having one or more sidewalls and a bottom surface, the ICP etcher comprising an ICP coil and an RF power supply providing an RF electrical signal to the ICP coil; wherein the plasma etching step uses an etching recipe consisting essentially of Cl2 and argon, and the RF electrical signal has an associated RF power in the range of 100-300 W.

[0008] The plasma etching process can produce features with a substantially planar bottom surface. Creating a substantially planar bottom surface is desirable. This can reduce or even prevent microtrenching at the trench corners. Thus, the etching process of the present invention can be used as a gate etching method in the production of devices, such as vertical or semi-vertical MOSFET devices, to achieve significant off-state leakage reduction.

[0009] Cl2 and argon can be introduced into the ICP etcher at relative flow rates in sccm. The argon to Cl2 flow ratio can be within a range of 1.25:1 to 2.75:1. The argon to Cl2 flow ratio can be within a range of 1.75:1 to 2.25:1. The argon to Cl2 flow ratio can be approximately 2.0:1. The flow rate of Cl2 can be set within the range of 30 to 75 sccm. The flow rate of argon can be set within the range of 75 to 150 sccm. In the plasma etching process, an etching recipe consisting of Cl2 and argon can be used.

[0010] The ICP etching apparatus can further include a substrate support and a power supply that supplies a bias electrical signal to the substrate support having an associated bias power, which can be in the range of 300-475 W for a 200 mm diameter substrate, or 675-1070 W for a 300 mm diameter substrate.

[0011] The plasma etching process may be carried out with an etching recipe having an associated pressure in the range of 1-5 mTorr.

[0012] The feature may be a trench. The feature may be a via.

[0013] A feature may be substantially free of microtrenches or may have relatively shallow microtrenches. Each microtrench in a feature may have a depth of 2% or less of the depth of the feature and / or a depth of less than 30 nm. A microtrench is understood to be a point-like etch subfeature at the corner of a feature that has a depth greater than the depth of the central region of the bottom surface of the feature. Typically, a microtrench has a substantially triangular cross-sectional appearance.

[0014] The central region of the bottom surface of the entire feature can be substantially flat, and the edge regions can form rounded corners between the sidewalls of the entire feature and the central region of the bottom surface.

[0015] The plasma etching step listed above may be the single significant plasma etching step employed, in which case the plasma etching step may create all of the formed features.

[0016] Alternatively, the plasma etching step may produce a partially formed feature. One or more further etching steps may be employed to produce a fully formed feature. The one or more further etching steps may be plasma etching steps. Thus, the method may further comprise the step (c) of producing a fully etched feature by performing a second plasma etching step. The second plasma etching step may be performed to produce a fully etched feature having a bottom surface that curves upward and meets one or more sidewalls. The partially formed feature produced by performing the plasma etching step may have a depth that is 60-80% of the depth of the fully formed feature. In principle, the one or more further etching steps could include a wet etching step, but this is less desirable than a process in which only a dry etching step is used.

[0017] The mask can be of any suitable type. The mask can be a photoresist mask. The mask can be a hard mask, for example a SiO2 hard mask.

[0018] The total feature depth can be in the range of 1.0 to 3.0 microns (1 micron = 1 μm). The total feature depth can be in the range of 1.0 to 5.0 microns.

[0019] The method may further comprise selectively removing the mask from the substrate after the plasma etching step has been performed. Any suitable removal technique may be used.

[0020] The GaN or GaN alloy can be present as a single layer or as multiple layers, e.g., in the form of a stack of layers. The various GaN or GaN alloy layers can be provided with different doping levels.

[0021] The substrate may include additional layers. For example, the substrate may include one or more dielectric layers. The dielectric layer may be directly under the mask. The dielectric layer may be silicon dioxide. The substrate may include a support layer below the GaN or GaN alloy layer. The support layer may be made of a material that supports the epitaxial growth of GaN or GaN alloy, such as AlN. In practice, it is common to epitaxially deposit a GaN layer on a Si base layer and support the epiGaN growth with a transition layer, such as AlN. However, alternative base layers, such as sapphire, SiC, or GaN, may also be used.

[0022] According to a second aspect of the present invention, there is provided a substrate comprising at least one GaN or GaN alloy layer having a feature formed using a method according to the first aspect of the present invention. The feature may have a bottom surface that curves upwardly and meets one or more sidewalls. Alternatively, the feature may have a substantially flat bottom surface.

[0023] The feature may be a trench. The feature may be a via.

[0024] According to a third aspect of the present invention, there is provided an inductively coupled plasma (ICP) etching apparatus for plasma etching a substrate comprising at least one GaN or GaN alloy layer to form features using a method according to the first aspect of the present invention, comprising: a chamber; a substrate support disposed within the chamber and configured to support a substrate thereon; at least one gas inlet for introducing an etching recipe into the chamber consisting essentially of Cl and argon; an ICP plasma generator including an ICP coil and an RF power supply that supplies an RF electrical signal to the ICP coil, and that maintains plasma within the chamber; a power supply that supplies a bias electrical signal having an associated bias power to the substrate support; a controller configured to control the RF power supply such that an RF electrical signal having an associated RF power in a range of 100-300 W is supplied to the ICP coil during plasma etching of the substrate; An apparatus is provided comprising:

[0025] Although references to "comprises" or "includes" and similar terms are made throughout this application, the invention is understood to also include more restrictive terms such as "consisting of" and "consisting essentially of."

[0026] The invention has been described above and extends to any and all inventive combinations of the features set out above or hereinafter in the description, drawings or claims. Any feature disclosed in connection with one of the first, second and third aspects of the invention may be combined, where appropriate, with any feature disclosed in connection with any other aspect of the invention.

[0027] Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings in which: [Brief explanation of the drawings]

[0028] [Figure 1] FIG. 1 shows cross-sectional semi-schematic views of stages in a GaN trench etching process: (a) before the start of the etching process, (b) after a first plasma etching step to create a trench with a flat base, and (c) after an optional second plasma etching step. [Figure 2] 1 is a cross-sectional schematic view of a plasma etching apparatus suitable for carrying out the present invention; [Figure 3] FIG. 10 shows micro-trenching as a function of source power. [Figure 4] FIG. 10 shows micro-trenching as a function of bias power. [Figure 5]FIG. 10 shows micro-trenching as a function of Ar:Cl gas ratio. DETAILED DESCRIPTION OF THE INVENTION

[0029] The present invention provides a plasma etching process for etching GaN or GaN alloys to create etched features. The present invention includes an anisotropic plasma etching step using an etching recipe consisting essentially of Cl and argon. This etching step is a "bulk" or "main" etch that etches most or all of the depth of the feature. The plasma etching step is performed using an inductively coupled plasma (ICP) etcher to anisotropically etch at least one GaN or GaN alloy layer through openings in a mask, thereby creating a feature having one or more sidewalls and a bottom. The ICP etcher includes an ICP coil and an RF power supply that provides an RF electrical signal to the ICP coil with an associated RF power in the range of 100-300 W. Optionally, one or more additional etching steps can be performed to create a fully formed feature with desired characteristics, such as rounded bottom corners.

[0030] FIG. 1 shows the general process flow steps for etching a substrate 10. Figure 1(a) shows the substrate before the etching process begins. The substrate 10 includes one or more GaN device layers 13 and, optionally, an additional thin dielectric layer 2, e.g., SiO2, overlying the GaN layer 13. A mask 11 is formed on the top surface of the substrate 10. Multiple layers of GaN may be present instead of a single layer. The substrate 10 may also include one or more additional base layers 14, e.g., AlN layers, underlying the epitaxial GaN layer. The additional layers 14 aid in the epitaxial growth process. A main anisotropic plasma etch of the GaN layer 13 is performed to etch a trench with a flat base, as shown in FIG. 1(b). If layer 12 is present in the substrate 10, the plasma etch step may be preceded by one or more initial etch steps to open layer 12. Optionally, a second etching step can be performed to create rounded or otherwise curved corners that also extend slightly deeper into the feature. Figure 1(c) shows the fully formed trench after a second plasma etching step and a plasma stripping process to remove passivation material deposited during the second plasma etching step. Rounded corners 17 can be seen. An example of a suitable second etching step is described in the applicant's pending UK patent application entitled "Method and Apparatus for Plasma Etching a Substrate," filed on the same date as the present application.

[0031] FIG. 2 shows a schematic representation of a plasma etching apparatus 20 suitable for practicing the present invention. Plasma etching of a substrate is typically performed using a plasma etching apparatus. The plasma etching apparatus may be an inductively coupled plasma (ICP) apparatus, such as an OmegaSynapse™ tool available from SPTS Technologies Limited, Newport, UK. However, etching may also be performed using other dry etching systems, such as helicon, RIE, or microwave-type apparatus. Plasma generation within such plasma etching apparatus is well known in the art and will not be described herein except as necessary for an understanding of the present invention.

[0032] The plasma etching apparatus 20 shown in FIG. 2 is an ICP apparatus, typically including a substrate support (or platen) 22 disposed within a chamber 23 that supports a substrate 25. Bias power may be supplied to the substrate by an RF power supply 250 through an impedance match network 252. The chamber may include chamber walls having a dielectric portion 24. Cl and argon process gases may be introduced into the chamber through one or more gas inlets 26. An ICP plasma generator 28 may be used to generate and maintain a plasma within the chamber 23 as known in the art (e.g., using an RF power supply 280 and an impedance match network 282). The gases may be removed from the chamber 23 through a pumping port 29.

[0033] The plasma etching process will now be described in more detail. The present invention utilizes conditions designed to maintain a flat etch front with minimal microtrenching. Achieving such an etch front requires compensation for etch rate variations across the trench base through careful balancing of implanted ion current density, average ion bombardment energy, and appropriate concentrations and ratios of etchant species and ions at a given pressure. In other words, achieving a flat etch front is not trivial. GaN etching is a strong function of bias, which can significantly alter etch rate, rather than a function of plasma density, which has a more limited effect on etch rate. The present invention utilizes minimal source power. Without being bound by any specific theory or conjecture, it is believed that the observed contribution to microtrenching is due to the etching occurring in an enhanced RIE (reactive ion etching) mode rather than ICP characteristics. Experiments were performed to investigate the optimal conditions for achieving a flat etch front. Representative results and conclusions are discussed below in conjunction with Figures 3-5. The microtrench dimensions were confirmed by SEM cross-section measurement.

[0034] Figure 3 shows the microtrenching of etched 2-micron trenches 30 and 4-micron trenches 32 as a function of source power for the ICP coil. The optimum source power apparently tends to zero. The results were obtained using a pressure of 3 mTorr, a platen power of 450 W, 100:50 sccm (Ar:Cl), and a platen temperature of 20°C. Figure 4 shows the microtrenching of etched 2-micron trenches 40 and 4-micron trenches 42 as a function of platen power. The results were obtained using a pressure of 3 mTorr, a source power of 200 W, 100:50 sccm (Ar:Cl), and a platen temperature of 20°C. At a given optimized source power (which is linked to the implant ion current density), an optimum platen power (which is linked to the average ion bombardment energy) appears, and was determined to be 450 W at a source power of 200 W, as shown in Figure 4. Additionally, there are optimum gas flow rates as well as optimum ratios. Presumably, an optimal etchant-to-ion ratio is required to compensate for etch rate variations across the etch front. If the total flow rate is too high for a given set of conditions, microtrenching will increase; if it is too low, the etch rate will suffer and there will be insufficient activated species density to remove sidewall striations. A realistic flow rate range suitable for etching features was considered, resulting in 30-75 sccm Cl2 and 75-150 sccm Ar. Figure 5 shows the microtrenching as a function of Ar:Cl2 gas flow ratio (gas flow in sccm) when etching a 2-micron trench 50 and a 4-micron trench 52. The results were obtained using a pressure of 3 mTorr, a source power of 600 W, a platen power of 450 W, and a platen temperature of 20°C. The optimal gas flow ratio was found to be approximately 2:1 (Ar:Cl2).

[0035] The result of such optimization is a process that iteratively minimizes microtrenching to 10 nm on each side of a 2 μm trench when etching GaN. It should be noted that some variation of the process parameters away from their fully optimized values ​​can still achieve excellent reductions in the amount of microtrenching. In other words, the present invention provides parameter ranges that continue to produce desirable results. Additionally, the optimal values ​​of the process parameters will depend, to some extent, on the specifics of the etching scenario. For example, if the material opening area exposed by the mask is large, it is expected that some increase in the total gas flow may be necessary to address the increased species consumption rate at the wafer level. In this case, it is expected that the optimal parameter values ​​for microtrenching minimization will vary somewhat, but not significantly. The ranges provided by the present invention accommodate such variations.

[0036] [example] Experimental work was performed on epitaxial GaN layers on 200 mm silicon wafers with a photoresist mask (3 μm) and a CD of 2–4 μm. The trench depth was nominally approximately 1.5–2 μm. An OmegaSynapse™ ICP etching tool (SPTS Technologies Limited, Newport, UK) was used to perform the first and second plasma etching steps. A flat-base trench, as shown schematically in Figure 1(b), was achieved using the first plasma etching step with the conditions listed in Table 1. [Table 1] In this example, a passivation material stripping step was performed after the second plasma etching step. The resulting trench was found to have an excellent profile, with a flat center region and rounded edge regions with no discontinuities between them. As can be appreciated, this process could alternatively use only the first plasma etch to create a flat-based trench.

Claims

1. 1. A method for forming features by plasma etching a substrate comprising at least one GaN or GaN alloy layer, comprising: (a) providing a substrate having a mask formed thereon, the mask having an opening, the substrate comprising at least one GaN or GaN alloy layer; (b) performing a plasma etching process using an inductively coupled plasma (ICP) etcher to anisotropically etch the at least one GaN or GaN alloy layer through the opening to create a feature having one or more sidewalls and a bottom surface, the ICP etcher comprising an ICP coil and an RF power source supplying an RF electrical signal to the ICP coil; and in the plasma etching step, the ２ and argon, and wherein the RF electrical signal has an associated RF power in the range of 100-300 W.

2. 2. The method of claim 1, wherein Cl ２ and argon are introduced into the ICP etching system at the relative flow rates in sccm, and the argon to Cl ２ The method wherein the flow ratio is in the range of 1.25:1 to 2.75:

1.

3. 3. The method of claim 2, wherein the argon to Cl ２ A process in which the flow ratio is in the range of 1.75:1 to 2.25:1, preferably about 2.0:

1.

4. 4. The method of claim 1, wherein the ICP etching apparatus further comprises a substrate support and a power supply that supplies a bias electrical signal having an associated bias power to the substrate support, the bias power being in the range of 300-475 W for a 200 mm diameter substrate or in the range of 675-1070 W for a 300 mm diameter substrate.

5. 5. The method according to any one of claims 1 to 4, wherein the plasma etching step is carried out with an etching recipe having an associated pressure in the range of 1 to 5 mTorr.

6. The method according to any one of claims 1 to 5, wherein the Cl ２ is introduced into said ICP etching apparatus at an associated flow rate in the range of 30-75 sccm.

7. The method according to any one of claims 1 to 6, wherein the Ar is introduced into the ICP etching apparatus with an associated flow rate in the range of 75 to 150 sccm.

8. The method of any one of claims 1 to 7, wherein the feature is a trench.

9. 9. The method of any one of claims 1 to 8, wherein the features comprise microtrenches, each of which has a depth of 2% or less of the depth of the feature and / or a depth of less than 30 nm.

10. The method of any one of claims 1 to 9, wherein the bottom surface of the feature created by the plasma etching process is substantially flat.

11. The method of any one of claims 1 to 10, further comprising the step (c) of performing a second plasma etching step to create the entire etched feature.

12. 12. The method of claim 11, wherein performing the second plasma etching step creates a full etched feature having a bottom surface that bows upward and meets one or more sidewalls.

13. The method according to any one of claims 1 to 12, wherein the mask is a photoresist mask or a hard mask.

14. 10. A substrate comprising at least one GaN or GaN alloy layer having features at least partially fabricated using the method of claim 1.

15. 10. An inductively coupled plasma (ICP) etching apparatus for plasma etching a substrate comprising at least one GaN or GaN alloy layer to form features using the method of claim 1, comprising: a chamber; a substrate support disposed within the chamber for supporting a substrate thereon; Substantially Cl ２ and argon; and at least one gas inlet for introducing an etching recipe into the chamber, the etching recipe consisting of: an ICP plasma generator including an ICP coil and an RF power supply that supplies an RF electrical signal to the ICP coil, and that maintains plasma within the chamber; a power supply that supplies a bias electrical signal having an associated bias power to the substrate support; a controller configured to control the RF power source such that an RF electrical signal having an associated RF power in a range of 100-300 W is supplied to the ICP coil during the plasma etching of the substrate; and An apparatus comprising:

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