Multilayer ceramic electronic component
The multilayer ceramic component addresses moisture resistance issues by using an organosilicon compound in the side margin portions to maintain electrical integrity and prevent oxidation, ensuring effective moisture resistance and insulation.
Patent Information
- Application Number
- JP2024221132
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-28
- Filing Date
- 2024-12-17
- Publication Date
- 2025-10-14
AI Technical Summary
Multilayer ceramic capacitors with thin side margins face reduced moisture resistance, which can lead to oxidation and insulation defects.
The multilayer ceramic component features a laminate structure with side margin portions containing an organosilicon compound as a sintering aid, resulting in a discontinuous increase in Si concentration at the boundaries between the capacitance forming portion and the side margin portions, enhancing moisture resistance and preventing crack propagation.
The solution improves moisture resistance and prevents oxidation of internal electrodes, maintaining designed electrical characteristics and preventing insulation defects, even with thin side margins.
Smart Images

Figure 2025155778000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a multilayer ceramic electronic component. [Background technology]
[0002] A technique for adding side margins later during the manufacturing process of a multilayer ceramic capacitor is known (see, for example, Patent Document 1). This technique is advantageous for miniaturizing and increasing the capacitance of multilayer ceramic capacitors because it can reliably cover both side edges of multiple internal electrodes even with thin side margins.
[0003] For example, in the method for manufacturing a multilayer ceramic capacitor described in Patent Document 1, a laminate sheet made by stacking ceramic sheets on which internal electrodes are printed is cut to produce multiple laminates with the cut surfaces where the internal electrodes are exposed as side surfaces.Then, the ceramic sheets are punched out at the side surfaces of the laminate to form side margins on both sides of the laminate. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-209539 Summary of the Invention [Problem to be solved by the invention]
[0005] However, in a multilayer ceramic capacitor in which the side margins are formed thin, there is a risk that the moisture resistance may be reduced.
[0006] An object of the present disclosure is to provide a multilayer ceramic electronic component that can improve moisture resistance. [Means for solving the problem]
[0007] According to one aspect of the present disclosure, a multilayer ceramic electronic component includes a laminate having a plurality of ceramic layers stacked in a first axial direction, a plurality of internal electrodes located between the plurality of ceramic layers, a pair of side surfaces perpendicular to a second axis orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axial direction are located, and a pair of side margin portions covering the pair of side surfaces, wherein the Si concentration increases discontinuously from the laminate to the pair of side margin portions in at least a portion of the boundary between the laminate and the pair of side margin portions.
[0008] According to another aspect of the present disclosure, a multilayer ceramic electronic component includes a laminate having a plurality of ceramic layers stacked in a first axial direction, a plurality of internal electrodes located between the plurality of ceramic layers, and a pair of side surfaces perpendicular to a second axis orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axial direction are located, the laminate having a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers located between the plurality of internal electrodes, and a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers sandwiching the capacitance forming portion therebetween, and at the boundary between the capacitance forming portion and the pair of cover portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of cover portions. [Effects of the Invention]
[0009] According to the present disclosure, moisture resistance can be improved. [Brief explanation of the drawings]
[0010] [Figure 1] 1 is a perspective view showing a multilayer ceramic capacitor in accordance with a first embodiment. [Figure 2] 1 is a cross-sectional view (part 1) showing the multilayer ceramic capacitor in accordance with the first embodiment. [Figure 3] FIG. 2 is a cross-sectional view (part 2) showing the multilayer ceramic capacitor in accordance with the first embodiment. [Figure 4]FIG. 4 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the side margin portion in the first embodiment. [Figure 5] 5 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the cover portion and the side margin portion in the first embodiment. FIG. [Figure 6] 3 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor in accordance with the first embodiment. [Figure 7] FIG. 2 is a perspective view showing an unfired laminate prepared in step S01 of the manufacturing method. [Figure 8] FIG. 2 is a perspective view showing an unfired ceramic body obtained in step S02 of the manufacturing method. [Figure 9] FIG. 3 is a partial cross-sectional view schematically showing the microstructure of a side margin portion in the first embodiment. [Figure 10] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the side margin portion in the comparative example. [Figure 11] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the cover portion and the side margin portion in the comparative example. [Figure 12] FIG. 10 is a partial cross-sectional view schematically showing the microstructure of a side margin portion in a comparative example. [Figure 13] FIG. 3 is a partial cross-sectional view schematically showing the distribution of glass particles in a side margin portion of the first embodiment. [Figure 14] FIG. 3 is a diagram schematically illustrating the distribution of glass particles in a side margin portion of the first embodiment. [Figure 15] FIG. 10 is a cross-sectional view showing a partially oxidized internal electrode. [Figure 16] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the side margin portion in the second embodiment. [Figure 17] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the cover portion and the side margin portion in the second embodiment. [Figure 18] FIG. 11 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the cover portion in the third embodiment. [Figure 19] FIG. 11 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the cover portion and the side margin portion in the third embodiment. [Figure 20] FIG. 11 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the side margin portion in the third embodiment. [Figure 21] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the cover portion in the fourth embodiment. [Figure 22] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the cover portion and the side margin portion in the fourth embodiment. [Figure 23] FIG. 10 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the side margin portion in the fourth embodiment. [Figure 24] FIG. 13 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the cover portion in the fifth embodiment. [Figure 25] FIG. 13 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the cover portion and the side margin portion in the fifth embodiment. [Figure 26] FIG. 13 is a diagram showing the distribution of Si concentration in the vicinity of the boundary between the capacitance forming portion and the side margin portion in the fifth embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0011] Hereinafter, embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto. In this specification and drawings, components having substantially the same functional configurations may be designated by the same reference numerals to avoid redundant description. Furthermore, the drawings appropriately show mutually orthogonal X-, Y-, and Z-axes. The X-, Y-, and Z-axes define a fixed coordinate system fixed with respect to the multilayer ceramic capacitor.
[0012] (First embodiment) First, a first embodiment will be described. The first embodiment relates to a multilayer ceramic capacitor.
[0013] [Structure of multilayer ceramic capacitors] Fig. 1 is a perspective view showing the multilayer ceramic capacitor in accordance with the first embodiment. Figs. 2 and 3 are cross-sectional views showing the multilayer ceramic capacitor in accordance with the first embodiment. Fig. 2 is a cross-sectional view taken along line A-A' in Fig. 1. Fig. 3 is a cross-sectional view taken along line B-B' in Fig. 1.
[0014] The multilayer ceramic capacitor 10 according to the first embodiment includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The ceramic body 11 is configured as a hexahedron having a pair of end faces perpendicular to the X-axis, a pair of side faces perpendicular to the Y-axis, and a pair of main faces perpendicular to the Z-axis. The first external electrode 14 and the second external electrode 15 cover the pair of end faces of the ceramic body 11.
[0015] The pair of end faces, the pair of side faces, and the pair of main faces of the ceramic body 11 are all configured as flat surfaces. In this embodiment, the flat surfaces do not have to be strictly planar as long as they are recognized as flat when viewed overall, and include, for example, surfaces with minute irregularities or gently curved shapes within a predetermined range.
[0016] The first external electrode 14 and the second external electrode 15 face each other in the X-axis direction with the ceramic body 11 in between. The first external electrode 14 and the second external electrode 15 extend from each end face of the ceramic body 11 to the main surface and side surface, respectively. As a result, the first external electrode 14 and the second external electrode 15 have a U-shape in both a cross section parallel to the XZ plane and a cross section parallel to the XY plane.
[0017] The shapes of the first external electrode 14 and the second external electrode 15 are not limited to those shown in Fig. 1. For example, the first external electrode 14 and the second external electrode 15 may extend from both end faces of the ceramic body 11 to only one of the main surfaces, and may have an L-shaped cross section parallel to the XZ plane. Furthermore, the first external electrode 14 and the second external electrode 15 do not have to extend to any of the main surfaces or side surfaces.
[0018] The first external electrode 14 and the second external electrode 15 are made of a good electrical conductor. Examples of good electrical conductors that form the first external electrode 14 and the second external electrode 15 include metals or alloys containing copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or the like as a main component. In this embodiment, the term "main component" refers to the component with the highest content.
[0019] The ceramic body 11 has a laminate 16 and a pair of side margins 17. The laminate 16 forms a pair of main surfaces and a pair of end faces of the ceramic body 11, and has a pair of side surfaces F perpendicular to the Y axis. The pair of side margins 17 respectively cover the pair of side surfaces F of the laminate 16 and form a pair of side surfaces of the ceramic body 11.
[0020] The laminate 16 has a configuration in which multiple flat ceramic layers extending along the XY plane are stacked in the Z-axis direction. The laminate 16 has a capacitance forming portion 18 and a pair of cover portions 19. The pair of cover portions 19 cover the capacitance forming portion 18 from above and below in the Z-axis direction and constitute a pair of main surfaces of the ceramic body 11. The multiple ceramic layers include multiple inter-electrode ceramic layers 21 included in the capacitance forming portion 18 and a pair of outermost ceramic layers 22 included in the pair of cover portions 19. The pair of outermost ceramic layers sandwich the capacitance forming portion 18 between them in the Z-axis direction.
[0021] The capacitance forming portion 18 has a plurality of sheet-like first internal electrodes 12 and second internal electrodes 13 extending along the XY plane. The first internal electrodes 12 and second internal electrodes 13 are arranged between a plurality of ceramic layers. The first internal electrodes 12 and second internal electrodes 13 are arranged alternately along the Z-axis direction. That is, in the capacitance forming portion 18, the first internal electrodes 12 and second internal electrodes 13 face each other in the Z-axis direction with the ceramic layer sandwiched between them.
[0022] The first internal electrode 12 is drawn out to an end surface covered with the first external electrode 14. On the other hand, the second internal electrode 13 is drawn out to an end surface covered with the second external electrode 15. As a result, the first internal electrode 12 is connected only to the first external electrode 14, and the second internal electrode 13 is connected only to the second external electrode 15.
[0023] The first internal electrodes 12 and the second internal electrodes 13 are formed across the entire width of the capacitance forming portion 18 in the Y-axis direction, and both end portions in the Y-axis direction are located on both side surfaces F of the laminate 16. As a result, in the ceramic body 11, the positions of the end portions in the Y-axis direction of the plurality of first internal electrodes 12 and second internal electrodes 13 are aligned within a range of 0.5 μm in the Y-axis direction on both side surfaces F of the laminate 16.
[0024] The first internal electrode 12 and the second internal electrode 13 are made of a good electrical conductor. Typical examples of the good electrical conductor that forms the first internal electrode 12 and the second internal electrode 13 include nickel (Ni), as well as metals or alloys containing copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or the like as a main component.
[0025] With this configuration, when a voltage is applied between the first external electrode 14 and the second external electrode 15 in the multilayer ceramic capacitor 10, the voltage is applied to the multiple interelectrode ceramic layers 21 between the first internal electrode 12 and the second internal electrode 13. As a result, a charge corresponding to the voltage between the first external electrode 14 and the second external electrode 15 is stored in the multilayer ceramic capacitor 10.
[0026] In the ceramic body 11 of the multilayer ceramic capacitor 10, the multiple ceramic layers (inter-electrode ceramic layers 21) that make up the capacitance forming portion 18, the pair of cover portions 19, and the pair of side margin portions 17 are all primarily composed of polycrystalline dielectric ceramic.
[0027] A dielectric ceramic with a high dielectric constant is used in the ceramic body 11 to increase the capacitance of each ceramic layer of the capacitance forming portion 18. Examples of dielectric ceramic with a high dielectric constant include materials with a perovskite structure containing barium (Ba) and titanium (Ti), such as barium titanate (BaTiO).
[0028] The ceramic layer may be composed of a composition such as strontium titanate (SrTiO3), calcium titanate (CaTiO3), magnesium titanate (MgTiO3), calcium zirconate (CaZrO3), calcium titanate zirconate (Ca(Zr,Ti)O3), barium zirconate (BaZrO3), or titanium oxide (TiO2).
[0029] In this embodiment, at the boundary between the laminate 16 and the pair of side margin portions 17, the Si concentration increases discontinuously from the laminate 16 to the pair of side margin portions 17. Fig. 4 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion 18 and the side margin portions 17 in the first embodiment. Fig. 5 is a diagram showing the distribution of Si concentration near the boundary between the cover portion 19 and the side margin portions 17 in the first embodiment.
[0030] In this embodiment, as will be described in detail later, an organosilicon compound is used as a sintering aid to form the side margin portions 17, and the side margin portions 17 contain Si. The side margin portions 17 may contain glass particles primarily composed of Si. On the other hand, an organosilicon compound is not used to form the inter-electrode ceramic layer 21 included in the capacitance forming portion 18 and the outermost ceramic layer 22 included in the cover portion 19, and the Si concentration in the inter-electrode ceramic layer 21 and the outermost ceramic layer 22 is lower than the Si concentration in the side margin portions 17. The inter-electrode ceramic layer 21 and the outermost ceramic layer 22 may be substantially free of Si. As shown in FIG. 4 , at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of side margin portions 17. Furthermore, as shown in FIG. 5 , at the boundary between the cover portion 19 and the pair of side margin portions 17, the Si concentration increases discontinuously from the cover portion 19 to the pair of side margin portions 17. The difference in Si concentration at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17 is preferably 4 at% or more, and more preferably 5 at% or more. The difference in Si concentration at the boundary between the cover portion 19 and the pair of side margin portions 17 may be 4 at% or more, or may be 5 at% or more. In the present disclosure, when measurements are taken in a region extending from the boundary to 3 μm toward the side margin portion 17 and a region extending from the boundary to 3 μm toward the cover portion 19 or capacitance forming portion 18, if the difference in Si concentration between one side and the other side of the boundary is 4 at% or more, this corresponds to "the Si concentration increases discontinuously."
[0031] The Si concentration ratio between the capacitance forming portion 18 and the side margin portion 17 is 6 to 9 when the capacitance forming portion 18 is 1, and the Si concentration ratio between the cover portion 19 and the side margin portion 17 is 2 to 6 when the cover portion 19 is 1.
[0032] [Manufacturing method for multilayer ceramic capacitors] Next, a method for manufacturing the multilayer ceramic capacitor 10 will be described. Fig. 6 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor 10 according to the first embodiment. Figs. 7 and 8 are views showing the manufacturing process of the multilayer ceramic capacitor 10. The method for manufacturing the multilayer ceramic capacitor 10 will be described below along Fig. 6, with appropriate reference to Figs. 7 and 8.
[0033] (Step S01: Prepare laminate) 7 is prepared. The green laminate 16 can be produced using a laminate sheet in which a plurality of large ceramic sheets are stacked in the Z-axis direction. A conductive paste for forming the first internal electrode 12 and the second internal electrode 13 is patterned on the ceramic sheet corresponding to the capacitance forming portion 18.
[0034] The unsintered laminate 16 is obtained by cutting the laminate sheet along the XZ plane and the YZ plane. For example, a cutting device equipped with a press blade or a rotary blade can be used to cut the laminate sheet. As a result, a pair of side surfaces F are obtained as cut surfaces on the laminate 16, where both end portions of the first internal electrode 12 and the second internal electrode 13 in the Y-axis direction are aligned.
[0035] (Step S02: Forming side margins) In step S02, a pair of unsintered side margin portions 17 are provided on each of a pair of side surfaces F of the unsintered laminate 16 produced in step S01. This results in an unsintered ceramic body 11 having a pair of side surfaces defined by the unsintered side margin portions 17, as shown in FIG.
[0036] For the unfired side margin portion 17, a ceramic slurry containing an organosilicon compound as a sintering aid is used. Examples of organosilicon compounds that can be used include silicone resin and silicon oligomer. The ceramic slurry can be prepared as follows: First, a dispersion liquid containing an organosilicon compound and a binder is prepared. Polyvinyl butyral (PVB) can be used as the binder. Next, a slurry of the dielectric ceramic that constitutes the side margin portion 17, such as barium titanate, and the dispersion liquid are dispersed and then emulsified. In this way, a ceramic slurry for the side margin portion 17 in which the organosilicon compound is uniformly dispersed can be prepared.
[0037] The side margin portion 17 can be formed by any method. For example, the side margin portion 17 can be formed using a ceramic sheet formed by molding a ceramic slurry into a sheet. In this case, the ceramic sheet can be punched out along the side surface F of the laminate 16, or can be pre-cut and attached to the side surface F of the laminate 16.
[0038] Furthermore, instead of using a ceramic sheet that has been formed into a sheet shape in advance, an unformed ceramic slurry can also be used to form the side margin portion 17. In this case, the ceramic slurry can be applied to the side surface F of the laminate 16, for example, by immersing the side surface F of the laminate 16 in the ceramic slurry.
[0039] (Step S03: Firing) In step S03, ceramic body 11 obtained in step S02 is fired to produce ceramic body 11 of multilayer ceramic capacitor 10 shown in FIGS.
[0040] (Step S04: Forming external electrodes) In step S04, first external electrodes 14 and second external electrodes 15 are formed on both ends in the X-axis direction of the ceramic body 11 fired in step S03, thereby producing the multilayer ceramic capacitor 10 shown in Figures 1 to 3. The method for forming the first external electrodes 14 and second external electrodes 15 in step S04 can be selected from known methods. Note that the first external electrodes 14 and second external electrodes 15 may be formed on the body and then fired simultaneously.
[0041] 1 to 3 is completed. In this manufacturing method, side margin portions 17 are formed on the side surfaces F of the laminate 16 where the first internal electrodes 12 and second internal electrodes 13 are exposed, so that the positions of the ends in the Y-axis direction of the plurality of first internal electrodes 12 and second internal electrodes 13 in the ceramic body 11 are aligned within a range of 0.5 μm in the Y-axis direction.
[0042] In the multilayer ceramic capacitor 10 according to the first embodiment, an organosilicon compound is used as a sintering aid for the side margin portions 17. This allows the side margin portions 17 to have high density and excellent moisture resistance. Therefore, even if the side margin portions 17 are thin, it is possible to prevent moisture from penetrating into the side margin portions 17 from the outside, and to prevent oxidation of the first internal electrode 12 and the second internal electrode 13.
[0043] In addition, excellent moisture resistance is achieved, particularly near the interface between the cover portion 19 and the side margin portion 17, so that even if slight peeling occurs between the cover portion 19 and the side margin portion 17, oxidation of the first internal electrode 12 and the second internal electrode 13 can be suppressed.
[0044] It is also possible to use SiO2 as a sintering aid in the side margins to improve densification. However, when SiO2 is used, the difference in Si concentration between the laminate and the side margins causes Si ions to diffuse from the side margins into the laminate during firing. As a result, the crystal grain size of the inter-electrode ceramic layer deviates from the designed value, and the designed electrical characteristics, such as capacitance, cannot be obtained.
[0045] On the other hand, when an organosilicon compound is used, Si ions generated from the organosilicon compound bond with constituent elements of the dielectric ceramic, such as barium in barium titanate, during firing to form glass particles such as BaSi glass. This reaction takes precedence over the generation of SiO2 and the diffusion of Si ions into the laminate 16 in terms of reaction energy, etc. Therefore, in this embodiment, diffusion of Si ions from the side margin portions 17 to the laminate 16 is prevented. As a result, at the boundary between the capacitance-forming portion 18 and the pair of side margin portions 17, the Si concentration increases discontinuously from the capacitance-forming portion 18 to the pair of side margin portions 17. Furthermore, at the boundary between the cover portion 19 and the pair of side margin portions 17, the Si concentration increases discontinuously from the cover portion 19 to the pair of side margin portions 17. This suppresses changes in the crystal grain size of the inter-electrode ceramic layer 21 from the designed value due to Si ion diffusion, thereby achieving the designed electrical characteristics, such as capacitance.
[0046] The size of the glass particles depends on the size of the siloxane bond in the organosilicon compound and tends to be equal to or larger than the size of the crystalline particles of the ceramic such as barium titanate. Therefore, the Si contained in the glass particles is unlikely to diffuse beyond the grain boundaries of the crystalline particles of the ceramic, which also suppresses the diffusion of Si into the laminate 16.
[0047] Figure 9 is a partial cross-sectional view schematically illustrating the microstructure of the side margin 17. In Figure 9, the multiple crystal grains C that make up the polycrystalline body are shown as a low-density dot pattern, and the glass grains G are shown as a high-density dot pattern. The side margin 17 has a characteristic microstructure in which the glass grains G are equal to or larger than the crystal grains C in size.
[0048] Figure 9 shows a state in which a crack that has occurred in side margin portion 17 is trying to propagate in the direction indicated by the thick arrow. Glass particles G exist in the propagation path of the crack shown in Figure 9. Therefore, in the state shown in Figure 9, energy that acts as a driving force for crack propagation is applied to glass particles G.
[0049] The highly viscous glass particles G have the ability to absorb the energy applied from cracks. In particular, in the side margin portion 17, the glass particles G are large and can sufficiently absorb the energy applied from cracks. Therefore, in the side margin portion 17, the crack loses its propulsion force in the glass particles G, and the crack stops progressing.
[0050] Here, as a comparative example, the characteristics of a multilayer ceramic capacitor in which SiO2 is used as a sintering aid to form the side margin portion will be described. Fig. 10 shows the distribution of Si concentration near the boundary between the capacitance forming portion and the side margin portion in the comparative example. Fig. 11 shows the distribution of Si concentration near the boundary between the cover portion and the side margin portion in the comparative example.
[0051] When SiO2 is used as a sintering aid, diffusion of Si ions occurs during firing, as described above. Therefore, as shown in Fig. 10, at the boundary between the capacitance forming portion 18x and the pair of side margin portions 17x, the Si concentration continuously increases from the capacitance forming portion 18x to the pair of side margin portions 17x. Also, as shown in Fig. 11, at the boundary between the cover portion 19x and the pair of side margin portions 17x, the Si concentration continuously increases from the cover portion 19x to the pair of side margin portions 17x.
[0052] 12 is a partial cross-sectional view schematically illustrating the microstructure of a side margin portion 17x in a comparative example. In the side margin portion 17x, unlike the side margin portion 17 in the first embodiment, the glass particles G are significantly smaller than the crystal particles C, and the glass particles G are present at the grain boundaries or triple junctions of the crystal particles C.
[0053] In the side margin portion 17x, the small glass particles G are unable to sufficiently absorb the energy applied from the cracks, and the energy is applied to the surrounding crystal particles C and grain boundaries via the glass particles G. As a result, in the side margin portion 17x, the propagation of the crack does not stop at the glass particles G, and the crack tends to propagate beyond the glass particles G.
[0054] In this manner, in this embodiment, the glass particles G in the side margin portion 17 have a size equal to or larger than that of the crystal particles C, and therefore, unlike the comparative example, the effect of stopping the propagation of cracks by the glass particles G is effectively obtained. As a result, the occurrence of large cracks can be suppressed in the side margin portion 17.
[0055] In the side margin portion 17, it is preferable that the median diameter of the glass particles G is 0.20 μm or more and is 90% or more of the median diameter of the crystal particles C that make up the polycrystalline body. This allows the glass particles G in the side margin portion 17 to fully absorb the energy of cracks.
[0056] The median diameter is defined as the median value of the particle diameters of particles present within a predetermined field of view on the cross section, and can be determined, for example, within a rectangular field of view of 30 μm × 40 μm on the cross section of the side margin portion 17. The particle diameter of each particle can be obtained as the equivalent circle diameter, which is calculated as the diameter of a circle whose area is equal to the cross section of the particle.
[0057] In the side margin portion 17, if the glass particles G are too large, the flexibility will be too high, which will cause the flatness of the outer surface to be lost during the manufacturing process, making it difficult to maintain a normal shape. For this reason, it is preferable to keep the median diameter of the glass particles G in the side margin portion 17 at 0.80 μm or less.
[0058] Furthermore, in the side margin portion 17, by uniformly dispersing a sufficient amount of glass particles G in the polycrystalline body, the probability that glass particles G will be present in the crack propagation path can be significantly increased. As a result, the glass particles G can more reliably block the propagation of cracks that have occurred in the side margin portion 17.
[0059] In particular, the side margin portions 17 can prevent cracks that occur on the outer surface from penetrating in the Y-axis direction and reaching the side surfaces F of the laminate 16. This makes it possible to prevent the occurrence of insulation defects in the multilayer ceramic capacitor 10 due to moisture penetrating into the side surfaces F of the laminate 16 through cracks in the side margin portions 17.
[0060] In the multilayer ceramic capacitor 10, cracks penetrating in the Y-axis direction are more likely to occur in the side margin portions 17 with smaller dimensions in the Y-axis direction. Therefore, in the multilayer ceramic capacitor 10, when the dimension in the Y-axis direction of the side margin portions 17 is 20 μm or less, the effect of preventing the occurrence of insulation defects can be more effectively achieved.
[0061] Specifically, in the side margin portion 17, the ratio (total volume ratio) of the total volume of the portion where the glass particles G are present to the total volume of the portion where the polycrystalline body is present is preferably 1% or more, which can sufficiently increase the probability that the glass particles G are present in the crack propagation path in the side margin portion 17.
[0062] The total volume ratio of glass particles G to the polycrystalline body in the side margin portion 17 can be estimated from the particle size of the glass particles G present within a specified field of view in the cross section of the side margin portion 17, and can be determined, for example, from a photograph of the cross section of the side margin portion 17 taken with an SEM (scanning electron microscope) in a rectangular field of view of 30 μm x 40 μm.
[0063] Specifically, the diameter of each glass particle G is calculated as a circle-equivalent diameter using the area measured for each glass particle G with a maximum diameter of 0.05 μm or more from a cross-sectional photograph of the side margin portion 17, and the sphere-equivalent volume of each glass particle G is calculated from the obtained diameter. This gives the average volume of the glass particles G. Next, 2The number of glass particles G in the entire side margin portion 17 can be roughly estimated from the number of glass particles G in the square region. The total volume can then be calculated by multiplying the average volume and the number of glass particles G. The total volume fraction of glass particles G can then be calculated as the ratio of the total volume of glass particles G to the volume of the polycrystalline body, which is obtained by subtracting the total volume of glass particles G from the entire volume of side margin portion 17.
[0064] In the side margin portion 17, if the total volume ratio of the glass particles G to the polycrystalline body is too large, the flexibility will be too high, which will cause the flatness of the outer surface to be lost during the manufacturing process, making it difficult to maintain a normal shape. For this reason, it is preferable that the total volume ratio of the glass particles G to the polycrystalline body in the side margin portion 17 be kept to 20% or less.
[0065] 13 and 14 are diagrams for explaining a method for evaluating the frequency of glass particles G in the side margin portion 17. FIG. 13 is a partial cross-sectional view showing a schematic representation of the distribution of glass particles in the side margin portion 17. FIG. 14 is a diagram showing a schematic representation of the distribution of glass particles in the side margin portion 17. FIG. 13 shows a plurality of square regions R partitioned in a lattice pattern on the cross section of the side margin portion 17. The area of each region R is 1 μm 2 The multiple regions R can be arranged in, for example, 4 rows and 7 columns.
[0066] 14 shows the number of glass particles G observed in each region R in the same field of view as in FIG. 13. Note that in each region R, even if only a portion of a glass particle G is observed, it is counted as one particle. In this embodiment, the frequency of glass particles G present in side margin portion 17 is evaluated as the average number of glass particles G in multiple regions R.
[0067] Specifically, in the side margin portion 17 of this embodiment, the average number of glass particles G in all the arranged regions R is 1 μm 2In the side margin portion 17, the number of glass particles G arranged in all the regions R is preferably 0.5 or more and 2 or less per 1 μm 2 It is preferable that the standard deviation of the number of particles per unit area is 0.30 or less.
[0068] This allows the side margin portion 17 to have a high degree of dispersion of the glass particles G in the polycrystalline body made up of the crystal particles C, resulting in an appropriate frequency of the glass particles G. Therefore, the side margin portion 17 can sufficiently increase the probability that the glass particles G will be present in the crack propagation path while suppressing an increase in flexibility due to the glass particles G.
[0069] When white light is irradiated onto the cross section of the multilayer ceramic capacitor 10, the side margin portion 17 appears whiter than the laminate 16 due to reflection from the glass particles G. Furthermore, if the cover portion 19 does not contain Si, the cover portion 19 appears particularly black. However, the pair of cover portions 19 may be made of the same material as the pair of side margin portions 17, in which case the side margin portion 17 and the cover portion 19 appear whiter than the capacitance forming portion 18.
[0070] Here, the white appearance is due to the high Si concentration. Compared with the comparative example showing the distribution of Si concentration in Figures 10 and 11, this embodiment contains Si with a large molecular weight, which indicates that a large amount of Si remains in the side margin portion 17 without diffusing into the capacitance forming portion 18.
[0071] 3, when the side margin portion 17 is viewed in the Y direction from the side surface toward the capacitance forming portion 18, the side surface side appears whiter, and the side margin portion 17 on the capacitance forming portion 18 side appears lighter in color than the side surface side. This is because Si is slightly diffused into the capacitance forming portion 18.
[0072] 10 and 11, the SiO2 added to the side margin portion 17x diffuses considerably into the capacitance-forming portion 18x, resulting in a large difference in whiteness between the side surface side and the capacitance-forming portion 18x. This is because less Si remains in the side margin portion 17x.
[0073] Therefore, the side margin 17 of this embodiment can maintain whiteness throughout the Y direction more than the side margin 17x of the comparative example.
[0074] Furthermore, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of cover portions 19 (outermost ceramic layers 22), thereby achieving better moisture resistance. In this case, the difference in Si concentration at the boundary between the capacitance forming portion 18 and the pair of cover portions 19 is preferably 4 at % or more, and more preferably 5 at % or more.
[0075] The ends of the first internal electrode 12 and the second internal electrode 13 that come into contact with the side margin portion 17 may be slightly oxidized. Fig. 15 is a cross-sectional view showing a partially oxidized internal electrode. However, it is preferable that the dimension W in the Y-axis direction of the oxidized region 40 formed at the ends of the first internal electrode 12 and the second internal electrode 13 is 1 µm or less on average. The dimension W of the oxidized region can be measured using, for example, a cross-sectional scanning electron microscope (SEM).
[0076] Furthermore, when the pair of side margin portions 17 includes polycrystalline bodies with a perovskite structure containing barium at the A site and titanium at the B site, the atomic ratio of Si to titanium at the B site is preferably 9 at% or less in the pair of side margin portions 17. This is because if the atomic ratio of Si to titanium at the B site is greater than 9 at%, the organosilicon compound used to form the side margin portions 17 will be excessive, which may result in a decrease in sinterability. Furthermore, from the viewpoint of the effect of improving densification, the atomic ratio of Si to titanium at the B site is preferably 1 at% or more, more preferably 3 at% or more.
[0077] Quantitative analysis of each element can be performed, for example, by laser ablation inductively coupled plasma mass spectrometry (LA-ICP-MS).
[0078] (Second embodiment) Next, a second embodiment will be described. The second embodiment differs from the first embodiment mainly in the method of forming and the configuration of the side margin portion. Fig. 16 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the side margin portion in the second embodiment. Fig. 17 is a diagram showing the distribution of Si concentration near the boundary between the cover portion and the side margin portion in the second embodiment.
[0079] The multilayer ceramic capacitor according to the second embodiment has a pair of side margin portions 17b instead of the pair of side margin portions 17 in the first embodiment. Each of the pair of side margin portions 17b has a main portion 31 and a covering portion 32. The covering portion 32 covers the surface of the main portion 31 facing the laminate 16 and is located between the laminate 16 and the main portion 31. For example, the main portion 31 is made of the same material as the interelectrode ceramic layer 21, and the covering portion 32, like the side margin portion 17, contains a higher Si concentration than the laminate 16. Therefore, as shown in FIG. 16 , at the boundary between the capacitance forming portion 18 and the pair of covering portions 32, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of covering portions 32. Furthermore, as shown in FIG. 17 , at the boundary between the cover portion 19 and the pair of covering portions 32, the Si concentration increases discontinuously from the cover portion 19 to the pair of covering portions 32.
[0080] Other configurations of the second embodiment are similar to those of the first embodiment.
[0081] When manufacturing the multilayer ceramic capacitor according to the second embodiment, first, in step S01, the multilayer body 16 is prepared, as in the first embodiment.
[0082] Next, in step S02, an unsintered main portion 31 is prepared in place of the unsintered side margin portion 17. A dispersion liquid containing an organosilicon compound, a binder, and a barium-containing compound is spray-coated onto the surface of the unsintered main portion 31 facing the laminate 16. Here, the barium-containing compound is, for example, barium carbonate. Then, in step S02, the unsintered main portions 31 coated with the dispersion liquid are provided on each of a pair of side surfaces F of the unsintered laminate 16.
[0083] Thereafter, similarly to the first embodiment, firing is performed in step S03, and in step S04, the first external electrode 14 and the second external electrode 15 are formed. As a result of firing, a covering portion 32 is formed in the portion where the dispersion liquid was applied.
[0084] In this manner, the multilayer ceramic capacitor in accordance with the second embodiment can be manufactured.
[0085] According to the second embodiment, similarly to the first embodiment, the side margin portion 17b has high density and excellent moisture resistance. Therefore, even if the side margin portion 17b is thin, it is possible to prevent moisture from penetrating into the side margin portion 17b from the outside and to prevent oxidation of the first internal electrode 12 and the second internal electrode 13.
[0086] Furthermore, since excellent moisture resistance is achieved particularly near the interface between the cover portion 19 and the side margin portion 17b, oxidation of the first internal electrode 12 and the second internal electrode 13 can be suppressed even if slight peeling occurs between the cover portion 19 and the side margin portion 17b.
[0087] The main portion 31 may be made of the same material as the side margin portion 17 of the first embodiment, in which case better moisture resistance can be obtained.
[0088] It is not necessary for the Si concentration to increase discontinuously from the laminate 16 to the pair of side margin portions 17 or 17b over the entire boundary between the laminate 16 and the pair of side margin portions 17 or 17b. As long as the Si concentration increases discontinuously from the laminate 16 to the pair of side margin portions 17 or 17b over at least a portion of the boundary between the laminate 16 and the pair of side margin portions 17 or 17b, it is possible to obtain moisture resistance superior to that of conventional multilayer ceramic capacitors.
[0089] For example, when the Si concentration increases discontinuously from the cover portion 19 to the pair of side margin portions 17 or 17b at the boundary between the cover portion 19 and the pair of side margin portions 17 or 17b, the Si concentration does not have to increase discontinuously from the capacitance forming portion 18 to the pair of side margin portions 17 or 17b at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17 or 17b. In this case, excellent moisture resistance is obtained near the interface between the cover portion 19 and the side margin portions 17 or 17b, and therefore oxidation of the first internal electrode 12 and the second internal electrode 13 can be suppressed even if slight peeling occurs between the cover portion 19 and the side margin portions 17 or 17b.
[0090] Conversely, when the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of side margin portions 17 or 17b at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17 or 17b, the Si concentration does not have to increase discontinuously from the cover portion 19 to the pair of side margin portions 17 or 17b at the boundary between the cover portion 19 and the pair of side margin portions 17 or 17b. In this case, excellent moisture resistance is obtained near the interface between the capacitance forming portion 18 and the side margin portions 17 or 17b, and oxidation of the first internal electrode 12 and the second internal electrode 13 included in the capacitance forming portion 18 can be suppressed.
[0091] (Third embodiment) Next, a third embodiment will be described. The third embodiment differs from the first embodiment mainly in the configuration of the cover portion. Fig. 18 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the cover portion in the third embodiment. Fig. 19 is a diagram showing the distribution of Si concentration near the boundary between the cover portion and the side margin portion in the third embodiment. Fig. 20 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the side margin portion in the third embodiment.
[0092] In this embodiment, an organosilicon compound is used as a sintering aid not only in forming the side margin portion 17 but also in forming the outermost ceramic layer 22 included in the cover portion 19, and Si is contained in the side margin portion 17 and the outermost ceramic layer 22. The side margin portion 17 and the outermost ceramic layer 22 may contain glass particles mainly composed of Si. On the other hand, an organosilicon compound is not used in forming the inter-electrode ceramic layer 21 included in the capacitance forming portion 18, and the Si concentration in the inter-electrode ceramic layer 21 is lower than the Si concentration in the side margin portion 17 and the outermost ceramic layer. The inter-electrode ceramic layer 21 may be substantially free of Si. As shown in FIG. 18 , at the boundary between the capacitance forming portion 18 and the pair of cover portions 19, the Si concentration discontinuously increases from the capacitance forming portion 18 to the pair of cover portions 19. Furthermore, as shown in FIG. 19 , the Si concentration is equal between the pair of cover portions 19 and the pair of side margin portions 17. 20 , at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of side margin portions 17. At the boundary between the capacitance forming portion 18 and the pair of cover portions 19, the difference in Si concentration is preferably 4 at% or more, and more preferably 5 at% or more. In the present disclosure, when measurements are taken in a region extending from the boundary to 3 μm toward the cover portion 19 and a region extending from the boundary to 3 μm toward the capacitance forming portion 18, if the difference in Si concentration between one side of the boundary and the other side is 4 at% or more, this corresponds to "the Si concentration increases discontinuously."
[0093] Other configurations of the third embodiment are similar to those of the first embodiment.
[0094] In the multilayer ceramic capacitor according to the third embodiment, an organosilicon compound is used as a sintering aid for the cover portions 19, and the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of cover portions 19 at the boundary between the capacitance forming portion 18 and the pair of cover portions 19. This provides the cover portions 19 with high density and excellent moisture resistance. This prevents moisture from penetrating inside the cover portions 19, and prevents oxidation of the first internal electrode 12 and the second internal electrode 13.
[0095] (Fourth embodiment) Next, a fourth embodiment will be described. The fourth embodiment differs from the third embodiment mainly in the configuration of the cover portion and the side margin portion. Fig. 21 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the cover portion in the fourth embodiment. Fig. 22 is a diagram showing the distribution of Si concentration near the boundary between the cover portion and the side margin portion in the fourth embodiment. Fig. 23 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the side margin portion in the fourth embodiment.
[0096] In this embodiment, an organosilicon compound is used as a sintering aid not only in forming the side margin portion 17 but also in forming the outermost ceramic layer 22 included in the cover portion 19, and Si is contained in the side margin portion 17 and the outermost ceramic layer 22. On the other hand, an organosilicon compound is not used in forming the inter-electrode ceramic layer 21 included in the capacitance forming portion 18, and the Si concentration in the inter-electrode ceramic layer 21 is lower than the Si concentration in the side margin portion 17 and the outermost ceramic layer. The inter-electrode ceramic layer 21 may be substantially free of Si. Furthermore, the Si concentration in the outermost ceramic layer 22 is higher than the Si concentration in the side margin portion 17. As shown in FIG. 21 , at the boundary between the capacitance forming portion 18 and the pair of cover portions 19, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of cover portions 19. Furthermore, as shown in FIG. 22 , at the boundary between the pair of cover portions 19 and the pair of side margin portions 17, the Si concentration increases discontinuously from the pair of side margin portions 17 to the pair of cover portions 19. Furthermore, as shown in FIG. 23, at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of side margin portions 17.
[0097] Other configurations of the fourth embodiment are similar to those of the third embodiment.
[0098] In the multilayer ceramic capacitor according to the fourth embodiment, an organosilicon compound is also used as a sintering aid for the cover portions 19, and the Si concentration increases discontinuously at the boundary between the capacitance forming portion 18 and the pair of cover portions 19 from the capacitance forming portion 18 to the pair of cover portions 19. Therefore, the fourth embodiment can also achieve the same effects as the third embodiment.
[0099] (Fifth embodiment) Next, a fifth embodiment will be described. The fifth embodiment differs from the third embodiment mainly in the configuration of the cover portion and the side margin portion. Fig. 24 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the cover portion in the fifth embodiment. Fig. 25 is a diagram showing the distribution of Si concentration near the boundary between the cover portion and the side margin portion in the fifth embodiment. Fig. 26 is a diagram showing the distribution of Si concentration near the boundary between the capacitance forming portion and the side margin portion in the fifth embodiment.
[0100] In this embodiment, an organosilicon compound is used as a sintering aid not only in the formation of the side margin portion 17 but also in the formation of the outermost ceramic layer 22 included in the cover portion 19, and Si is contained in the side margin portion 17 and the outermost ceramic layer 22. On the other hand, an organosilicon compound is not used in the formation of the inter-electrode ceramic layer 21 included in the capacitance forming portion 18, and the Si concentration in the inter-electrode ceramic layer 21 is lower than the Si concentration in the side margin portion 17 and the outermost ceramic layer. The inter-electrode ceramic layer 21 may be substantially free of Si. Furthermore, the Si concentration in the side margin portion 17 is higher than the Si concentration in the outermost ceramic layer 22. As shown in FIG. 24 , at the boundary between the capacitance forming portion 18 and the pair of cover portions 19, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of cover portions 19. Furthermore, as shown in FIG. 25 , at the boundary between the pair of cover portions 19 and the pair of side margin portions 17, the Si concentration increases discontinuously from the pair of cover portions 19 to the pair of side margin portions 17. Furthermore, as shown in FIG. 26, at the boundary between the capacitance forming portion 18 and the pair of side margin portions 17, the Si concentration increases discontinuously from the capacitance forming portion 18 to the pair of side margin portions 17.
[0101] Other configurations of the fifth embodiment are similar to those of the third embodiment.
[0102] In the multilayer ceramic capacitor according to the fifth embodiment, an organosilicon compound is also used as a sintering aid for the cover portions 19, and the Si concentration increases discontinuously at the boundary between the capacitance forming portion 18 and the pair of cover portions 19 from the capacitance forming portion 18 to the pair of cover portions 19. Therefore, the fifth embodiment can also achieve the same effects as the third embodiment.
[0103] [Examples and Comparative Examples] As examples and comparative examples of the above-described embodiment, samples of multilayer ceramic capacitors with different configurations of the side margin (SM) portion and the cover portion were fabricated. The size of the samples for Comparative Examples 1 and 2 and Examples 3 to 25 was all 0603 size, with the dimension in the X-axis direction being 0.6 mm, the dimension in the Y-axis direction being 0.3 mm, and the dimension in the Z-axis direction being 0.3 mm. The main component of the side margin portion and the cover portion was barium titanate.
[0104] In Comparative Examples 1 and 2, the thickness of the side margin sheet (SM sheet) used to form the side margin portion was 10 μm or 20 μm, and SiO2 was used as the Si source contained in the sintering aid. In Examples 3 to 25, the thickness of the side margin sheet used to form the side margin portion was 5 μm, 10 μm, 20 μm, or 30 μm, and an organosilicon compound was used as the Si source contained in the sintering aid.
[0105] The Si concentration in the side margin sheets was the same among Comparative Examples 1 and 2 and Examples 3, 4, 7 to 9, 13, and 20, but was lower in Example 17, and lower in Examples 5, 10, 14, and 21 than Example 17. Furthermore, the Si concentration in Examples 6, 11, 18, 22, and 24 was lower than Examples 5, 10, 14, and 21, and lower in Examples 12, 15 to 16, 19, 23, and 25 than Examples 6, 11, 18, 22, and 24.
[0106] The Si concentration in the cover portion was the same among Comparative Examples 1 and 2 and Examples 1 to 8, but was higher in Example 25, higher in Examples 23 and 24 than Example 25, and higher in Examples 12 and 22 than Examples 23 and 24. The Si concentration in Examples 11, 19, and 21 was higher than Examples 12 and 22, higher in Examples 10 and 18 than Examples 11, 19, and 21, and higher in Example 20 than Examples 10 and 18. The Si concentration in Examples 9 and 17 was higher than Example 20, higher in Examples 13 to 15 than Examples 9 and 17, and higher in Example 16 than Examples 13 to 15.
[0107] The samples prepared in Comparative Examples 1 and 2 and Examples 3 to 25 were examined for the following various properties, and an overall evaluation was made based on these results.
[0108] The Si concentration in the laminate and side margins was measured by laser ablation inductively coupled plasma mass spectrometry. The Si distribution patterns in the laminate and side margins were then investigated, and the difference in Si concentration at the boundary between the laminate and the side margins was calculated. Regarding the Si distribution, distributions similar to those shown in Figures 4 and 5 were evaluated as "A," while those similar to those shown in Figures 10 and 11 were evaluated as "B." Distributions similar to those shown in Figures 18 to 20 were evaluated as "C," those similar to those shown in Figures 21 to 23 were evaluated as "D," and those similar to those shown in Figures 24 to 26 were evaluated as "E." The difference in Si concentration X1 is the difference between the concentration at the measurement point closest to the capacitance-forming portion in the side margin and the concentration at the measurement point closest to the side margin in the capacitance-forming portion. The difference in Si concentration X2 is the difference between the concentration at the measurement point closest to the cover portion in the side margin and the concentration at the measurement point closest to the side margin in the cover. The difference X3 in Si concentration is the difference between the concentration at the measurement point closest to the cover part in the capacitance forming part and the concentration at the measurement point closest to the capacitance forming part in the cover part.
[0109] The dimension W of the oxidized region in the Y-axis direction at the end of the internal electrode was measured, and a three-level evaluation was performed based on the average value. The dimension W of the oxidized region was measured using a cross-sectional SEM. 100 samples were measured for each example and comparative example, and the average value was calculated. Samples with an average value of 0 μm or more and 1 μm or less were evaluated as "A," samples with an average value of more than 1 μm and 3 μm or less were evaluated as "B," and samples with an average value of more than 3 μm were evaluated as "C."
[0110] The capacitance was measured using an LCR meter to determine the electrical characteristics, and a drop in capacitance from the design value of 0% to 5% was rated as "A," a drop of 5% to 10% was rated as "B," and a drop of 10% or more was rated as "C."
[0111] The moisture resistance was evaluated. In the evaluation of moisture resistance, 100 samples for each example and comparative example were kept in an environment of 85°C temperature and 85% humidity for 100 hours, and the capacitance was measured after the keeping. Samples in which the decrease in capacitance from the design value was 0% to 5% and no cracks occurred were judged as good products, and other samples were judged as defective products. Samples in which the rate of defective products was 0% to 5% were rated as "A", those in which the rate of defective products was more than 5% but not more than 10% were rated as "B", and those in which the rate of defective products was 10% or more were rated as "C".
[0112] The overall rating was "A" for samples where the dimension W of the oxidized region was rated "A" or "B," the electrical properties were rated "A," and the moisture resistance was rated "A." The overall rating was "C" for samples where at least one of the dimensions W of the oxidized region, the electrical properties, and the moisture resistance was rated "C." The overall rating was "B" for samples where the overall rating was not "A" or "C." These results are shown in Table 1.
[0113] [Table 1]
[0114] As shown in Table 1, in all of Examples 3 to 8, the Si distribution type was "A" and the overall evaluation was "A" or "B." That is, in Examples 3 to 8, an organosilicon compound was used as the Si source for the side margin portion, and at the boundary between the laminate and the pair of side margin portions, the Si concentration increased discontinuously from the laminate to the pair of side margin portions, resulting in excellent moisture resistance and electrical properties. Furthermore, when Example 3 is compared with Examples 4, 7, and 8, Examples 4, 7, and 8, which had thick side margin sheets, exhibited better moisture resistance and electrical properties than Example 3. Furthermore, among Examples 4 to 6, which had the same thickness of the side margin sheet, Examples 4 and 5, which had a high Si concentration in the side margin sheet, had a smaller dimension W of the oxidized region than Example 6.
[0115] Furthermore, when Examples 3 to 11, 13, 14, 17, 18, 20 to 22, and 24 are compared with Examples 12, 15, 16, 19, 23, and 25, the dimension W of the oxidized region was smaller in Examples 3 to 11, 13, 14, 17, 18, 20 to 22, and 24, where the difference X1 in Si concentration was greater than 3 at.%, than in Examples 12, 15, 16, 19, 23, and 25.
[0116] On the other hand, in Comparative Examples 1 and 2, the Si distribution form was "B" and the overall evaluation was "C." That is, in Comparative Example 1, SiO2 was used as the Si source, and at the boundary between the laminate and the pair of side margins, the Si concentration continuously increased from the laminate to the pair of side margins, resulting in poor moisture resistance and electrical properties. Furthermore, in Comparative Example 2, the moisture resistance was evaluated as "B" because the side margin sheet was thick, but the electrical properties were poor because Si diffused from the side margins to the laminate.
[0117] [Other embodiments] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims.
[0118] For example, although the above embodiment describes a multilayer ceramic capacitor as an example of a multilayer ceramic electronic component, the present disclosure is applicable to multilayer ceramic electronic components in general, such as chip varistors, chip thermistors, and multilayer inductors.
[0119] Aspects of the present disclosure are, for example, as follows.
[0120] <1> a laminate including a plurality of ceramic layers stacked in a first axis direction, a plurality of internal electrodes positioned between the plurality of ceramic layers, and a pair of side surfaces perpendicular to a second axis orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are positioned; and a pair of side margin portions covering the pair of side surfaces, In at least a part of the boundary between the stack and the pair of side margin portions, the Si concentration increases discontinuously from the stack to the pair of side margin portions. Multilayer ceramic electronic components.
[0121] <2> The laminate is a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers, the inter-electrode ceramic layers being positioned between the plurality of internal electrodes; a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers, the outermost ceramic layers sandwiching the capacitance forming portion therebetween; and At least at the boundary between the capacitance forming portion and the pair of side margin portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of side margin portions. <1> The multilayer ceramic electronic component according to claim 1.
[0122] <3> At a boundary between the capacitance forming portion and the pair of side margin portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of side margin portions, The Si concentration increases discontinuously from the capacitance forming portion to the pair of cover portions. <2> The multilayer ceramic electronic component according to claim 1.
[0123] <4> The laminate is a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers, the inter-electrode ceramic layers being positioned between the plurality of internal electrodes; a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers, the outermost ceramic layers sandwiching the capacitance forming portion therebetween; and At least at the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of cover portions to the pair of side margin portions. <1> The multilayer ceramic electronic component according to claim 1.
[0124] <5> Only at the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of cover portions to the pair of side margin portions. <4> The multilayer ceramic electronic component according to claim 1.
[0125] <6> a laminate including a plurality of ceramic layers stacked in a first axis direction, a plurality of internal electrodes positioned between the plurality of ceramic layers, and a pair of side surfaces perpendicular to a second axis orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are positioned; The laminate is a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers, the inter-electrode ceramic layers being positioned between the plurality of internal electrodes; a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers, the outermost ceramic layers sandwiching the capacitance forming portion therebetween; and At the boundary between the capacitance forming portion and the pair of cover portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of cover portions. Multilayer ceramic electronic components.
[0126] <7> the laminate has a pair of side surfaces that are perpendicular to a second axis that is orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are located, a pair of side margin portions covering the pair of side surfaces; The Si concentration is equal between the pair of cover portions and the pair of side margin portions. <6> The multilayer ceramic electronic component according to claim 1.
[0127] <8> the laminate has a pair of side surfaces that are perpendicular to a second axis that is orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are located, a pair of side margin portions covering the pair of side surfaces; At the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of side margin portions to the pair of cover portions. <6> The multilayer ceramic electronic component according to claim 1.
[0128] <9> the laminate has a pair of side surfaces that are perpendicular to a second axis that is orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are located, a pair of side margin portions covering the pair of side surfaces; At the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of cover portions to the pair of side margin portions. <6> The multilayer ceramic electronic component according to claim 1.
[0129] <10> The oxidized regions formed at the ends of the plurality of internal electrodes have an average dimension in the second axis direction of 1 μm or less. <1> ~ <9> 10. The multilayer ceramic electronic component according to claim 9, wherein
[0130] <11> the pair of side margin portions each contain a ceramic polycrystalline body as a main component, a plurality of glass particles dispersed in the polycrystalline body, the total volume ratio of which is 1% or more and 20% or less relative to the polycrystalline body, the median diameter of the plurality of glass particles is 0.20 μm or more and 0.80 μm or less, and is 90% or more of the median diameter of the plurality of crystal particles constituting the polycrystalline body; In the cross section of the pair of side margins, 1 μm 2 The average number of glass particles observed in each of the multiple regions is 0.5 to 2. <1> ~ <10> 10. The multilayer ceramic electronic component according to claim 9, wherein
[0131] <12> the pair of side margin portions include polycrystalline bodies with a perovskite structure containing barium at the A site and titanium at the B site, In the pair of side margin portions, the atomic ratio of Si to titanium in the B site is 9 at % or less. <1> ~ <11> 10. The multilayer ceramic electronic component according to claim 9, wherein [Explanation of symbols]
[0132] 10 Multilayer ceramic capacitors 11 Ceramic body 12 1st internal electrode 13 Second internal electrode 14 1st external electrode 15 2nd external electrode 16 Laminate 17, 17b Side margin 18 Capacity forming part 19 Cover part 21 Ceramic layer between electrodes 22 outermost ceramic layer 31 Main Section 32 Covering part C crystal particles F side G Glass particles
Claims
1. a laminate including a plurality of ceramic layers stacked in a first axial direction, a plurality of internal electrodes positioned between the plurality of ceramic layers, and a pair of side surfaces perpendicular to a second axis orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axial direction are positioned; and a pair of side margin portions covering the pair of side surfaces, In at least a portion of the boundary between the stack and the pair of side margin portions, the Si concentration increases discontinuously from the stack to the pair of side margin portions. Multilayer ceramic electronic components.
2. The laminate is a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers, the inter-electrode ceramic layers being positioned between the plurality of internal electrodes; a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers, the outermost ceramic layers sandwiching the capacitance forming portion therebetween; and At least at the boundary between the capacitance forming portion and the pair of side margin portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of side margin portions. The multilayer ceramic electronic component according to claim 1 .
3. At a boundary between the capacitance forming portion and the pair of side margin portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of side margin portions, The Si concentration increases discontinuously from the capacitance forming portion to the pair of cover portions. The multilayer ceramic electronic component according to claim 2 .
4. The laminate is a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers, the inter-electrode ceramic layers being positioned between the plurality of internal electrodes; a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers, the outermost ceramic layers sandwiching the capacitance forming portion therebetween; and At least at the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of cover portions to the pair of side margin portions. The multilayer ceramic electronic component according to claim 1 .
5. Only at the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of cover portions to the pair of side margin portions. The multilayer ceramic electronic component according to claim 4.
6. a laminate including a plurality of ceramic layers stacked in a first axial direction, a plurality of internal electrodes positioned between the plurality of ceramic layers, and a pair of side surfaces perpendicular to a second axis orthogonal to the first axis, on which end portions of the plurality of internal electrodes in the second axial direction are positioned; The laminate is a capacitance forming portion including the plurality of internal electrodes and a plurality of inter-electrode ceramic layers among the plurality of ceramic layers, the inter-electrode ceramic layers being positioned between the plurality of internal electrodes; a cover portion having a pair of outermost ceramic layers among the plurality of ceramic layers, the outermost ceramic layers sandwiching the capacitance forming portion therebetween; and At the boundary between the capacitance forming portion and the pair of cover portions, the Si concentration increases discontinuously from the capacitance forming portion to the pair of cover portions. Multilayer ceramic electronic components.
7. the laminate has a pair of side surfaces that are perpendicular to a second axis that is orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are located, a pair of side margin portions covering the pair of side surfaces; The Si concentration is equal between the pair of cover portions and the pair of side margin portions. The multilayer ceramic electronic component according to claim 6.
8. the laminate has a pair of side surfaces that are perpendicular to a second axis that is orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are located, a pair of side margin portions covering the pair of side surfaces; At the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of side margin portions to the pair of cover portions. The multilayer ceramic electronic component according to claim 6.
9. the laminate has a pair of side surfaces that are perpendicular to a second axis that is orthogonal to the first axis and on which end portions of the plurality of internal electrodes in the second axis direction are located, a pair of side margin portions covering the pair of side surfaces; At the boundaries between the pair of cover portions and the pair of side margin portions, the Si concentration increases discontinuously from the pair of cover portions to the pair of side margin portions. The multilayer ceramic electronic component according to claim 6.
10. The oxidized regions formed at the ends of the plurality of internal electrodes each have an average dimension in the second axis direction of 1 μm or less. The multilayer ceramic electronic component according to any one of claims 1 to 9.
11. the pair of side margin portions each contain a ceramic polycrystalline body as a main component, a plurality of glass particles dispersed in the polycrystalline body, the total volume ratio of which is 1% or more and 20% or less relative to the polycrystalline body, the median diameter of the plurality of glass particles is 0.20 μm or more and 0.80 μm or less, and is 90% or more of the median diameter of the plurality of crystal grains constituting the polycrystalline body; In the cross section of the pair of side margin portions, 1 μm 2 The average number of glass particles observed in each of the plurality of regions is 0.5 or more and 2 or less. The multilayer ceramic electronic component according to any one of claims 1 to 9.
12. the pair of side margin portions include polycrystalline bodies with a perovskite structure containing barium at the A site and titanium at the B site, In the pair of side margin portions, the atomic ratio of Si to titanium in the B site is 9 at % or less. The multilayer ceramic electronic component according to any one of claims 1 to 9.
Citation Information
Patent Citations
Manufacturing method of laminated ceramic electronic component
JP2012209539A