Control circuit and electronic device

Abstract

To provide a control circuit and an electronic device that can easily identify a detected current value corresponding to a voltage vector without increasing calculation load on a processor.SOLUTION: A control circuit 1 includes: an AD converter 13 having an analog-to-digital conversion circuit that converts a detected current value indicating a value of a current flowing to a current unit of a converter circuit 303 or an inverter circuit 3 to digital data; and a storage unit 11 having a plurality of registers storing digital data indicating the detected current value detected during a period corresponding to the voltage vector, which corresponds to a plurality of voltage vectors, each of which combination of conductive states of a plurality of switching elements that the converter circuit 303 or the inverter circuit 3 has is different.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to a control circuit for controlling a converter circuit or an inverter circuit, and an electronic device having the control circuit. [Background technology]

[0002] BACKGROUND ART There is known a circuit that controls a motor by detecting a current flowing through the motor and outputting a PWM signal based on the result of analog-to-digital conversion of the detected current value (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2017-139882 Summary of the Invention [Problem to be solved by the invention]

[0004] In conventional technology, analog-to-digital converted data is stored in multiple registers in chronological order of the analog-to-digital conversion. In a system that detects the DC link current of a converter circuit or an inverter circuit and controls the converter circuit or the inverter circuit, the phase (e.g., U phase, V phase, W phase) and polarity corresponding to the detected current change successively. Therefore, in order to control the current output by the converter circuit or the inverter circuit based on the current value indicated by the analog-to-digital converted data, a process is required to determine the phase and polarity of the current corresponding to the data stored in the register, and there is a demand for reducing the processing load.

[0005] Therefore, the present disclosure has been made in consideration of these points, and aims to make it possible to easily identify a detected current value corresponding to a voltage vector without increasing the computational load on a processor in a control circuit of a converter circuit or an inverter circuit. [Means for solving the problem]

[0006] A first aspect of the present disclosure provides a control circuit for controlling a converter circuit that converts three-phase AC power to DC power or an inverter circuit that converts DC power to three-phase AC power. The control circuit includes an analog-to-digital converter that converts a detected current value, which indicates the value of a current flowing through a DC section of the converter circuit or the inverter circuit, into digital data, and a memory unit that includes a plurality of registers that store the digital data indicating the detected current value detected during a period corresponding to a plurality of voltage vectors, each of which corresponds to a different combination of the conduction states of a plurality of switching elements of the converter circuit or the inverter circuit. This makes it possible to easily identify the detected current value corresponding to a voltage vector without increasing the computational load on a processor. Being able to easily identify the detected current value also makes it possible to check the status and protect the inverter circuit and a load connected to the inverter with a small computational load.

[0007] The control data output unit may further include a control data output unit that outputs, to the converter circuit or the inverter circuit, control data indicating one of the plurality of voltage vectors, for a time length determined based on the plurality of detected current values ​​corresponding to the plurality of voltage vectors identified based on the digital data stored in the plurality of registers, thereby making it easier for a circuit or processor that generates the control data to control the converter circuit or the inverter circuit using data indicating an appropriate current value.

[0008] The control circuit may further include a storage processing unit that selects a register from the plurality of registers that corresponds to the changed voltage vector in synchronization with a timing at which the control data output unit changes the voltage vector of the control data, and inputs the digital data to the selected register, thereby storing the digital data corresponding to the voltage vector in the register that corresponds to the voltage vector.

[0009] The control circuit may further include a signal generating unit that generates a first trigger signal indicating a first timing at which the analog-to-digital converter converts the detected current value to the digital data, the first timing being any timing between a plurality of timings at which the control data output unit changes the voltage vector, and a second trigger signal indicating a second timing at which the digital data is stored in one of the plurality of registers, the second timing being any timing between the plurality of first timings, wherein the analog-to-digital converter converts the detected current value to digital data based on the first trigger signal, the storage processing unit selects a register from the plurality of registers to store the digital data based on the control data, inputs the digital data to the selected register, and the register selected by the storage processing unit stores the digital data based on the second trigger signal. This allows the detected current value to be converted to digital data when the detected current value is stable, and the digital data to be stored in the register when the digital data output by the analog-to-digital converter is not changing, thereby preventing erroneous digital data from being stored in the register.

[0010] The control data output unit may periodically switch the voltage vector indicated by the control data in a predetermined pattern, and the storage processing unit may periodically switch the register that stores the digital data in a pattern corresponding to the predetermined pattern based on the control data, thereby making it easier for the storage processing unit to switch the register that stores the digital data.

[0011] The signal generating unit may generate the first trigger signal based on a timing of change in the control data, which is determined based on a magnitude relationship between a value indicated by a PWM-modulated carrier wave and a command voltage value determined based on the digital data. This allows the analog-to-digital converting unit to convert the detected current value into digital data in synchronization with a timing of change in the current flowing through a DC unit (hereinafter referred to as a "DC link unit") of a converter circuit or an inverter circuit.

[0012] The signal generator may generate the first trigger signal when a timer counter value that generates a PWM-modulated carrier wave reaches a predetermined value indicating a timing at which the control data does not change, thereby reducing the size of a circuit that generates the first trigger signal.

[0013] The storage processing unit may store a value obtained by subtracting a value indicated by the digital data of a zero vector among the plurality of voltage vectors from a value indicated by the digital data corresponding to the voltage vector other than the zero vector among the plurality of voltage vectors, in a register among the plurality of registers that corresponds to the voltage vector corresponding to the digital data output from the analog-to-digital conversion unit, thereby reducing software processing for subtracting the offset value.

[0014] The storage processing unit may store a value obtained by subtracting an average value of the digital data of the zero vector among the plurality of voltage vectors from a value indicated by the digital data corresponding to the voltage vector other than the zero vector among the plurality of voltage vectors, in a register among the plurality of registers corresponding to the voltage vector corresponding to the digital data output from the analog-to-digital conversion unit. This makes it possible to subtract the offset value without increasing the load on software processing even when the detected current value of the zero vector fluctuates.

[0015] The storage unit may further store information indicating which of the plurality of registers has updated the digital data, thereby facilitating the process of generating control data by the control data output unit, since the control data output unit only needs to access the register whose update flag indicates that the digital data has been updated.

[0016] The storage unit may have a first phase register for storing the digital data corresponding to a first of the three phases, a second phase register for storing the digital data corresponding to a second of the three phases, and a third phase register for storing the digital data corresponding to a third of the three phases, which makes it easier for the control data output unit to identify the detected current value of each phase.

[0017] The present invention may further include a storage processing unit that generates data corresponding to the third-phase current value calculated based on the detected current value of the first phase and the detected current value of the second phase specified in periods corresponding to two adjacent voltage vectors, and stores the generated data in the third-phase register. This allows the current value of a phase that cannot be detected within a period of the PWM carrier wave to be stored in the register, making it easier for the control data output unit to control the converter circuit or the inverter circuit.

[0018] The storage unit may have, for one of the voltage vectors, a first register corresponding to a first period and a second register corresponding to a second period. This prevents new digital data from being stored in the register before the control data output unit reads out the digital data stored in the register, thereby lengthening the allowable time until the control data output unit reads out the digital data.

[0019] The analog-to-digital conversion unit may include a plurality of analog-to-digital conversion circuits, and the storage unit may have a plurality of registers corresponding to the plurality of analog-to-digital conversion circuits, respectively. This allows the control data output unit to control the converter circuit or the inverter circuit using a plurality of types of data while the converter circuit or the inverter circuit is operating at each voltage vector, thereby improving control accuracy.

[0020] An electronic device according to a second aspect of the present disclosure is a control circuit for controlling a converter circuit that converts three-phase AC power into DC power, or an inverter circuit that converts DC power into three-phase AC power, the control circuit including: a control circuit that outputs control data indicating the conduction states of a plurality of switching elements included in the converter circuit or the inverter circuit; and a processor that controls the control circuit, wherein the control circuit includes an analog-to-digital conversion unit having an analog-to-digital conversion circuit that converts a detected current value indicating the value of a current flowing through a DC part of the converter circuit or the inverter circuit into digital data; a memory unit having a plurality of registers that store the digital data indicating the detected current value detected during a period corresponding to a plurality of voltage vectors, the combinations of the conduction states of the plurality of switching elements corresponding to the plurality of voltage vectors being different from each other; and a control data output unit that determines a time length corresponding to the voltage vector indicated by the identification information based on a command voltage value input from a processor and identification information of the voltage vector, and outputs control data indicating the voltage vector to the converter circuit or the inverter circuit for the time length, wherein the processor determines a command voltage value, which is a voltage value to be output from the converter circuit or the inverter circuit, based on a DC voltage value to be output from the converter circuit or the speed at which the inverter circuit rotates a motor to which the three-phase AC power is supplied, and the detected current value identified by reading the digital data stored in two or more of the plurality of registers, and inputs the determined command voltage value to the control circuit in association with the identification information corresponding to the two or more registers. This reduces the load on the processor that controls the converter circuit or the inverter circuit in the electronic device. [Brief explanation of the drawings]

[0021] [Figure 1] 1 is a diagram showing a configuration of an electronic device 100. FIG. [Figure 2] FIG. 10 is a diagram for explaining voltage vectors. [Figure 3] 10 is a diagram showing the relationship between a PWM carrier wave, a voltage vector, and a detected current value. FIG. [Figure 4] FIG. 10 is a diagram illustrating the relationship between a PWM carrier wave, control data, a voltage vector, and a DC link current. [Figure 5] 3 is a diagram for explaining operation modes of the inverter circuit 3. FIG. [Figure 6] FIG. 2 is a diagram showing the configuration of a control circuit 1. [Figure 7] 2 is a diagram illustrating an example of a plurality of registers included in a storage unit 11. FIG. [Figure 8] FIG. 4 is a diagram for explaining a first trigger signal and a second trigger signal. [Figure 9] 3 is a flowchart showing the flow of processing in the control circuit 1. [Figure 10] FIG. 10 is a diagram showing a first modified example of a register in which a detected current value is stored. [Figure 11] FIG. 10 is a diagram showing a second modified example of a register in which detected current values ​​are stored. [Figure 12] FIG. 10 is a diagram showing a third modified example of a register in which detected current values ​​are stored. [Figure 13] FIG. 10 is a diagram showing the configuration of an electronic device 200 that is a modified example of the electronic device 100. [Figure 14] 1 is a diagram showing the configuration of an electronic device 300. FIG. [Figure 15] FIG. 10 is a diagram for explaining voltage vectors. [Figure 16] 10 is a diagram showing the relationship between a PWM carrier wave, a voltage vector, and a detected current value. FIG. [Figure 17] 10 is a diagram for explaining operation modes of the converter circuit 303. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0022] [Overview of Electronic Device 100] 1 is a diagram showing the configuration of an electronic device 100. The electronic device 100 is a home appliance, office equipment, industrial equipment, or in-vehicle equipment having a motor controlled by an inverter, such as an air conditioner, refrigerator, or washing machine. The electronic device 100 has a control circuit 1, a motor 2, an inverter circuit 3, a DC power supply 4, and a current detection circuit 5.

[0023] The control circuit 1 controls the inverter circuit 3 by outputting control data indicating the conduction state of each of a plurality of switching elements included in the inverter circuit 3, which supplies AC power to the three-phase coils of the motor 2. The control circuit 1 is included in, for example, a semiconductor device or a hybrid IC. The control circuit 1 has a processor that executes programs to perform various processes, and a hardware logic circuit. The control circuit 1 may execute all processes using the processor, or may execute all processes using the hardware logic circuit.

[0024] The inverter circuit 3 converts DC power into three-phase AC power, thereby supplying AC power to three-phase coils of the motor 2. The inverter circuit 3 generates a PWM (Pulse Width Modulation) signal under the control of the control circuit 1, and rotates the motor 2 at a speed corresponding to the generated PWM signal. The inverter circuit 3 has two switching elements for each of the U, V, and W phases. The switching elements are, for example, IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). In the following description, the switching elements may be referred to as transistors. The inverter circuit 3 may also supply AC power to a three-phase load other than the motor 2 (for example, an RL load, a resistive load, or a power supply system).

[0025] The inverter circuit 3 has transistors SWu and SWx corresponding to the U phase, transistors SWv and SWy corresponding to the V phase, and transistors SWw and SWz corresponding to the W phase. A free wheel diode is provided in parallel with each transistor.

[0026] The DC power supply 4 supplies a DC voltage to the inverter circuit 3. When the electronic device 100 is, for example, a home appliance, the DC power supply 4 generates a DC voltage by rectifying an AC voltage supplied from a commercial power source.

[0027] The current detection circuit 5 detects the magnitude of the DC link current idc flowing through the DC link section of the inverter circuit 3. The current detection circuit 5 has a shunt resistor 51 and an amplifier circuit 52. The voltage across the shunt resistor 51 varies depending on the magnitude of the DC link current idc. The amplifier circuit 52 amplifies the voltage across the shunt resistor 51. The current detection circuit 5 inputs a detection signal indicating the amplified voltage to the control circuit 1. The amplified voltage is equal to the value obtained by multiplying the DC link current idc by the resistance value of the shunt resistor 51 and the amplification factor of the amplifier circuit 52, so the detection signal indicating the voltage across the shunt resistor 51 indicates a detected current value, which is the magnitude of the DC link current idc.

[0028] The control circuit 1 determines a command voltage value, which is a voltage value to be output from the inverter circuit 3 in the next cycle of a PWM modulated carrier wave (hereinafter referred to as a "PWM carrier wave"), based on a current value required to rotate the motor 2 at a desired speed and a detected current value indicated by the detection signal. The control circuit 1 determines the command voltage value based on, for example, two-phase detected current values. The PWM carrier wave is, for example, a triangular wave. The desired speed is determined, for example, according to the operating state of the electronic device 100, and may be determined by the control circuit 1 or may be notified by a circuit or device different from the control circuit 1. The control circuit 1 may also determine the command voltage value based on data input from a sensor that monitors the state of the motor 2.

[0029] The control circuit 1 generates control data indicating the conduction states of the six transistors of the inverter circuit 3 based on the result of comparing the value of the PWM carrier wave with the command voltage value. The control data includes, for example, 6-bit data in which the conduction states of the six transistors are indicated by 1 or 0. The control circuit 1 sets three of the six transistors in a conducting state (hereinafter referred to as the "ON state") and the other three transistors in a non-conducting state (hereinafter referred to as the "OFF state"). If the six transistors are in different conducting states, the phase of the voltage applied to the motor 2 will be different, and the DC link current idc detected by the current detection circuit 5 will also be different.

[0030] The control circuit 1 generates eight types of control data, each of which represents a different combination of the conduction states of the six transistors. Since the phase and polarity of the voltage output by the inverter circuit 3 differ depending on the value of the control data, the value indicated by the control data is referred to as a voltage vector in this specification. The control data corresponds to one of voltage vectors V0 to V7.

[0031] 2 to 5 are diagrams for explaining an overview of the operation of the inverter circuit 3. FIG. 2 is a diagram for explaining voltage vectors. FIG. 2(a) shows combinations of the conduction states of six transistors. As shown in FIG. 2(a), the inverter circuit 3 has eight states corresponding to voltage vectors V0 to V7. FIG. 2(b) shows the current flow corresponding to voltage vector V4 as an example. The thick line in FIG. 2(b) indicates the current flow when the inverter circuit 3 operates with voltage vector V4.

[0032] At voltage vector V0, transistors SWx, SWy, and SWz are turned on, and the other transistors are turned off. In this state, current idc does not flow. At voltage vector V1, transistors SWw, SWx, and SWy are turned on, and current iw flows in the DC link section. At voltage vector V2, transistors SWv, SWx, and SWz are turned on, and current iv flows in the DC link section.

[0033] At voltage vector V3, transistors SWv, SWw, and SWx are turned on, and a current -iu flows in the DC link section. At voltage vector V4, transistors SWu, SWy, and SWz are turned on, and a current iu flows in the DC link section. At voltage vector V5, transistors SWu, SWw, and SWy are turned on, and a current -iv flows in the DC link section. At voltage vector V6, transistors SWu, SWv, and SWz are turned on, and a current -iw flows in the DC link section. At voltage vector V7, transistors SWu, SWv, and SWw are turned on, and no current flows.

[0034] 3 is a diagram showing the relationship between a PWM carrier wave, a voltage vector, and a detected current value. The PWM carrier wave is generated by, for example, a PWM timer counter. Dotted lines C1 to C6 shown superimposed on the PWM carrier wave indicate the positions where the value of the PWM timer counter corresponds to the command voltage value.

[0035] The voltage vector at the lowest point of the PWM carrier wave is V0, the voltage vector in the first half of the upslope of the PWM carrier wave is V4, and the voltage vector in the second half of the upslope is V6. The voltage vector at the highest point of the PWM carrier wave is V7, the voltage vector in the first half of the downslope of the PWM carrier wave is V6, and the voltage vector in the second half of the downslope is V4. In the example shown in Figure 3, an offset is added to the detected current value. This is suitable for an AD converter that operates with a single power supply.

[0036] The detected current value changes in accordance with the change in the voltage vector. The control circuit 1 acquires the detected current value at timings (trg_V0, trg_V4, trg_V6, etc.) different from the timings at which the voltage vector changes. The control circuit 1 stores digital data based on the acquired detected current value in different registers for each voltage vector. Since the phase and polarity of the DC link current idc differ for each voltage vector, the digital data is stored in different registers for each combination of the phase and polarity of the DC link current idc. The registers are included in the storage unit 11, for example, but may also be included in the AD converter 13. Details of the registers will be described later.

[0037] 4 is a diagram showing the relationship between the PWM carrier, control data, voltage vector, and DC link current idc. Control data corresponding to different voltage vectors is generated for each of the period including the lowest point of the PWM carrier, the first half of the upslope, the second half of the upslope, the period including the highest point of the PWM carrier, the first half of the downslope, and the second half of the downslope. As the control data changes, the voltage vector and DC link current idc also change.

[0038] 5A and 5B are diagrams illustrating the operation modes of the inverter circuit 3. FIG. 5A shows the voltage vector and DC link current idc on the upslope and downslope of the PWM carrier wave. The voltage vector switches between the first half and second half of the upslope of the PWM carrier wave, and the voltage vector switches between the first half and second half of the downslope of the PWM carrier wave. The voltage vector switching also changes the phase and polarity of the current.

[0039] In this specification, the operating state of the inverter circuit 3 during one cycle including the upslope and downslope of the PWM carrier wave is referred to as a mode. The control circuit 1 periodically cycles through modes 0 to 5, for example, but the control circuit 1 can arbitrarily set the inverter circuit 3 to any mode. Figure 5(b) shows the relationship between voltage vectors and modes. During one cycle of the PWM carrier wave, the inverter circuit 3 operates in one or two of these six modes.

[0040] [Configuration of control circuit 1] 6 is a diagram showing the configuration of the control circuit 1. The control circuit 1 has a storage unit 11, a control data output unit 12, an AD converter (analog-to-digital conversion unit) 13, a storage processing unit 14, and a signal generation unit 15.

[0041] The storage unit 11 has a plurality of registers corresponding to a plurality of voltage vectors each having a different combination of the conduction states of a plurality of switching elements. Each register stores digital data indicating a detected current value detected during a period when the inverter circuit 3 operates with the voltage vector corresponding to the register. The storage unit 11 stores the digital data in the register by writing the digital data output by the AD converter 13 to a register corresponding to an address output by the storage processing unit 14. Of the plurality of registers included in the storage unit 11, a register selected by the storage processing unit 14 stores the digital data based on a second trigger signal T2, which will be described later.

[0042] 7 is a diagram showing an example of multiple registers included in the storage unit 11. Multiple registers D_t0 to D_t7 correspond to voltage vectors V0 to V7, with addresses ranging from 000 to 111, respectively. Register D_t0 stores digital data of the detected current value i0 corresponding to the voltage vector V0. Register D_t1 stores digital data of the detected current value i0+iw corresponding to the voltage vector V1. Register D_t2 stores digital data of the detected current value i0+iv corresponding to the voltage vector V2. Register D_t3 stores digital data of the detected current value i0-iu corresponding to the voltage vector V3.

[0043] Register D_t4 stores digital data of the detected current value i0+iu corresponding to voltage vector V4. Register D_t5 stores digital data of the detected current value i0-iv corresponding to voltage vector V5. Register D_t6 stores digital data of the detected current value i0-iw corresponding to voltage vector V6. Register D_t7 stores digital data of the detected current value i0 corresponding to voltage vector V7.

[0044] The control data output unit 12 outputs control data indicating one of a plurality of voltage vectors to the inverter circuit 3. The control data is also input to the storage processing unit 14 and the signal generation unit 15.

[0045] The control data output unit 12 periodically switches the voltage vector indicated by the control data in a predetermined pattern. The control data output unit 12 identifies a plurality of detected current values ​​corresponding to the plurality of voltage vectors based on the digital data stored in the plurality of registers D_t0 to D_t7. The control data output unit 12 outputs to the inverter circuit 3 control data indicating one of the plurality of voltage vectors for a time length determined based on the identified plurality of detected current values.

[0046] The control data output unit 12 determines a command voltage value, which is a voltage value to be output to the inverter circuit 3, based on, for example, the speed at which the motor is rotated and a detected current value identified by reading digital data stored in two or more of the multiple registers. The control data output unit 12 determines the command voltage value by performing control calculations based on the digital data stored in the two or more registers. The control data output unit 12 determines the type of voltage vector that operates the inverter circuit 3 and the time length of control data corresponding to the voltage vector, depending on the determined command voltage value. The control data output unit 12 may determine the time length of the control data for the voltage vector corresponding to the register from which the digital data was read, to be the time length corresponding to the command voltage value.

[0047] As an example, the control data output unit 12 refers to data indicating the relationship between the speed at which the motor 2 rotates and the current to be passed through the motor 2, and determines whether the detected current value is insufficient. If the control data output unit 12 determines that the detected current value is insufficient, it determines the type of voltage vector and the command voltage value so that the necessary current can be passed through the motor 2, and makes the time length of the control data longer than the time length of past control data corresponding to the determined type of voltage vector. Note that this control method is merely an example, and the control data output unit 12 may determine the time length of the control data corresponding to the voltage vector using other methods, such as V / f control or vector control, based on digital data stored in two or more registers.

[0048] 7, since registers corresponding to each of the multiple voltage vectors are provided, when determining control data corresponding to the next cycle of the PWM carrier wave, the control data output unit 12 can easily identify the detected current value for the voltage vector by referring to the register corresponding to the voltage vector in the cycle to be determined, which makes it easier for the control data output unit 12 to generate control data.

[0049] The AD converter 13 has an analog-to-digital conversion circuit that converts analog data into digital data, and converts the detected current value flowing through the inverter circuit 3, which is analog data and detected by the current detection circuit 5, into digital data. The AD converter 13 converts the detected current value into digital data based on a first trigger signal T1 input from the signal generation unit 15. The AD converter 13 converts the detected current value into digital data at the timing indicated by the first trigger signal T1 input from the signal generation unit 15, and inputs the digital data to the storage processing unit 14.

[0050] The AD converter 13 may have multiple analog-to-digital conversion circuits. In this case, the AD converter 13 may convert the detected current value corresponding to the upslope of the PWM carrier wave into digital data using a first analog-to-digital conversion circuit, and convert the detected current value corresponding to the downslope of the PWM carrier wave into digital data using a second analog-to-digital conversion circuit. The AD converter 13 may convert a measurement value other than the DC link current idc (for example, a DC link voltage) into digital data.

[0051] The storage processing unit 14 selects a register from the plurality of registers included in the memory unit 11 that corresponds to the changed voltage vector in synchronization with the timing at which the control data output unit 12 changes the voltage vector of the control data. The storage processing unit 14 inputs the digital data to the selected register, thereby storing the digital data in the register. For example, the storage processing unit 14 selects a register from the plurality of registers that stores the digital data based on the control data output by the control data output unit 12, and inputs the digital data to the selected register. When the control data changes periodically according to a predetermined pattern, the storage processing unit 14 periodically switches the register that stores the digital data according to the predetermined pattern by changing the address data based on the same predetermined pattern.

[0052] Specifically, the storage processing unit 14 converts the control data input from the control data output unit 12 into a register address and inputs address data indicating the converted address into the memory unit 11, thereby selecting a register corresponding to the voltage vector indicated by the control data. The storage processing unit may latch the control data using a first trigger signal T1, which causes the AD converter 13 to convert the detected current value into digital data, and generate address data that changes with a timing delayed from the timing of change in the control data. This ensures that the period during which the AD converter 13 outputs digital data coincides with the period during which address data of the register for the voltage vector corresponding to the digital data is output. This ensures that the digital data is reliably stored in the register for the voltage vector corresponding to the digital data.

[0053] In addition, if each of the multiple registers is configured to be able to write digital data when an enable signal is input, the storage processing unit 14 may decode the control data to generate an enable signal to make the register corresponding to the voltage vector indicated by the control data writable.

[0054] The signal generating unit 15 generates a trigger signal used to store digital data in a register. The signal generating unit 15 generates a first trigger signal T1 that indicates a first timing at which the AD converting unit 13 converts the detected current value into digital data. The first timing is any timing in a period between multiple timings at which the control data output unit 12 changes the voltage vector. The signal generating unit 15 inputs the first trigger signal T1 to the AD converting unit 13.

[0055] The signal generating unit 15 sets the first timing to a timing corresponding to a PWM timer counter value determined for each of the first half period of the upslope, the second half period of the upslope, the first half period of the downslope, and the second half period of the downslope of the PWM carrier wave. The signal generating unit 15 generates the first trigger signal when the value of a timer counter that generates a PWM-modulated carrier wave reaches a predetermined value indicating a timing at which control data does not change. This allows the signal generating unit 15 to generate the first trigger signal by comparing the timer counter value with the predetermined value, thereby reducing the circuit size.

[0056] The signal generating unit 15 may generate the first trigger signal T11 based on the timing of a change in control data, which is determined based on the magnitude relationship between the value indicated by the PWM carrier wave and a command voltage value determined based on digital data read from a register. For example, the signal generating unit 15 determines as the first timing the timing at which the PWM timer counter value for generating the PWM carrier wave corresponds to a value that is a predetermined value greater than the command voltage value. The predetermined value is, for example, a value determined based on the time required for the detected current value to stabilize after the control data changes.

[0057] The signal generating unit 15 may detect the timing at which the control data input from the control data output unit 12 changes, and may determine as the first timing a timing within the minimum time from the detected timing until the next change in the control data. Specifically, the signal generating unit 15 determines as the first timing a timing after a time required for the DC link current idc, which has changed as a result of the control data output unit 12 changing the control data, to stabilize. By generating the first trigger signal T1 in this manner, the signal generating unit 15 stores digital data based on the DC link current idc in a stable state in a register.

[0058] The signal generating unit 15 generates a second trigger signal T2 indicating a second timing at which the digital data is stored in one of the plurality of registers. The second timing is any timing between the plurality of first timings. The signal generating unit 15 inputs the second trigger signal T2 to the storage unit 11.

[0059] Fig. 8 is a diagram for explaining the first trigger signal and the second trigger signal, in which the PWM carrier wave, the voltage vector, the detected current value, the first trigger signal, the digital data, the address data, the second trigger signal, and the data stored in the register are shown on the same time axis.

[0060] 8, the first trigger signal is generated after a time period that is shorter than the time from when the voltage vector changes to when the next voltage vector changes. At the timing when the first trigger signal is generated, the values ​​of the digital data and address data output from the AD converter 13 change. The second trigger signal is generated after a time period that is shorter than the time from when the next first trigger signal is generated to when the digital data and address data change. As a result, at the timing when the second trigger signal is generated, the digital data corresponding to the voltage vector is stored in the register corresponding to the address data corresponding to the voltage vector.

[0061] [Processing flow in control circuit 1] Fig. 9 is a flowchart showing the flow of processing in the control circuit 1. The processing shown in Fig. 9 is executed intermittently while the power of the electronic device 100 is on. The processing shown in Fig. 9 may be executed by a circuit, or may be executed by a processor that executes a program. The processing may be executed by the circuit and the processor working together.

[0062] The control data output unit 12 determines a voltage vector for which control data is to be output (S11). Based on data indicating a pattern for changing a voltage vector, for example, the control data output unit 12 determines the voltage vector next to the voltage vector for which control data was previously output as the voltage vector for which control data is to be output. The control data output unit 12 also determines whether the time point at which the control data is to be output is during the upslope or downslope of the PWM carrier wave (S12).

[0063] Next, the control data output unit 12 accesses two or more registers corresponding to the determined voltage vector (S13) and reads out the digital data stored in the two or more registers. The control data output unit 12 identifies the detected current value corresponding to the digital data by, for example, referring to a conversion table in which the digital data and the detected current value are associated with each other (S14).

[0064] The control data output unit 12 acquires a command current value from the outside (S15). The control data output unit 12 acquires a command current value according to the torque required by the motor 2, for example, from a processor that executes speed control of the motor 2, but the control data output unit 12 may generate the command current value.

[0065] The control data output unit 12 compares the detected current value with the command current value (S16), and if the detected current value is smaller than the command current value (YES in S16), increases the next command voltage value from the previous command voltage value (S17). The previous command voltage value is the command voltage value when the control data corresponding to the voltage vector determined in S11 was previously output at the slope determined in S12. The control data output unit 12 outputs control data of a time length corresponding to the increased command voltage value (S18).

[0066] If the detected current value is greater than the command current value (YES in S19), the control data output unit 12 decreases the next command voltage value from the previous command value (S20).If the detected current value is equal to the command current value (NO in S19), the control data output unit 12 maintains the next command voltage value at the same value as the previous command voltage value (S21).

[0067] The control data output unit 12 repeats the processes from S11 to S22 until it receives a stop command (NO in S22). When it receives a stop command (YES in S22), the control data output unit 12 ends the process.

[0068] [First Modification of Register] Fig. 10 is a diagram showing a first modified example of a register in which a detected current value is stored. The registers shown in Fig. 10 differ from the registers shown in Fig. 7 in that each register is associated with an update flag indicating that the detected current value has been updated. The update flag is set to 1 when new digital data is stored based on the second trigger signal, and is set to 0 when the control data output unit 12 reads out the digital data, for example.

[0069] In this way, since the memory unit 11 further stores information indicating which of the multiple current value registers has updated digital data, the control data output unit 12 only needs to access the register whose update flag indicates that it has been updated, making it even easier for the control data output unit 12 to generate control data.

[0070] [Second Modification of Register] FIG. 11 is a diagram showing a second modified example of a register in which detected current values ​​are stored. The example shown in FIG. 11 differs from the register shown in FIG. 7 in that a different register is provided for each combination of the upslope of the PWM carrier wave and the voltage vector. In the example shown in FIG. 11, the storage unit 11 has, for one voltage vector, a first register corresponding to a first period and a second register corresponding to a second period. The first period is, for example, a period corresponding to the upslope of the PWM carrier wave. The second period is, for example, a period corresponding to the downslope of the PWM carrier wave.

[0071] 8, the voltage vector in the second half of the upslope of the PWM carrier wave coincides with the voltage vector in the first half of the downslope of the PWM carrier wave. Therefore, if there is only one register corresponding to the voltage vector, the control data output unit 12 needs to read out the digital data based on the detected current value in the second half of the upslope of the PWM carrier wave by the first half of the downslope of the PWM carrier wave.

[0072] 11, it is possible to prevent new digital data output by the AD converter 13 from being stored in the register before the digital data stored in the register is read by the control data output unit 12. As a result, the allowable time until the control data output unit 12 reads the digital data is extended, which further simplifies the process of generating control data by the control data output unit 12.

[0073] [Third Modification of Register] 12 is a diagram showing a third modified example of a register for storing detected current values. The storage processing unit 14 may have a plurality of analog-to-digital conversion circuits, and the memory unit 11 may have a plurality of registers associated with voltage vectors, each corresponding to one of the analog-to-digital conversion circuits.

[0074] In the example shown in Fig. 12, it is assumed that a first analog-digital conversion circuit converts the value of the DC link current idc into digital data, and a second analog-digital conversion circuit converts the value of the voltage of the DC link section into digital data. In this case, the storage unit 11 has a plurality of current value registers (Fig. 12(a)) that store digital data corresponding to detected current values, and a plurality of voltage value registers (Fig. 12(b)) that store digital data corresponding to detected voltage values. A unique address is assigned to each of the plurality of current value registers and the plurality of voltage value registers. This allows the control data output unit 12 to control the inverter circuit 3 using the detected current values ​​and detected voltage values ​​corresponding to each voltage vector, thereby improving control accuracy.

[0075] [Fourth variation of register] In the above description, the storage unit 11 has a plurality of registers for storing digital data corresponding to the detected current values, but the AD converter 13 may have a plurality of registers. In this case, the AD converter 13 also has a storage processing unit 14, which converts the detected current values ​​corresponding to the voltage vectors into digital data based on the first trigger signal T1 and the second trigger signal T2 from the signal generating unit 15, and stores the digital data in the registers.

[0076] [First Modification of Storage Processing Unit 14] In the above description, the digital data output by the AD converter 13 is stored in the register as is, but the storage processing unit 14 may modify the digital data before storing it in the register. For example, the storage processing unit 14 calculates a value by subtracting a value indicated by the digital data of a zero vector among the plurality of voltage vectors from a value indicated by the digital data corresponding to a voltage vector other than the zero vector among the plurality of voltage vectors output from the AD converter 13. The storage processing unit 14 stores digital data indicating the calculated value in one of the plurality of registers for the voltage vector corresponding to the digital data output from the AD converter 13. The zero vector is a voltage vector whose detected current value should be 0 A, and is the voltage vector V0 or the voltage vector V7. The voltage vectors other than the zero vector are the voltage vectors V1 to V6. By subtracting the detected current value corresponding to the voltage vector V0 or the voltage vector V7, the software processing for subtracting the offset value can be reduced.

[0077] The storage processing unit 14 may calculate a value by subtracting an average value of the plurality of digital data of the zero vector among the plurality of voltage vectors from a value indicated by the digital data corresponding to the voltage vector other than the zero vector among the plurality of voltage vectors output from the AD converter 13. The storage processing unit 14 stores the calculated value in a register for the voltage vector corresponding to the digital data output from the AD converter 13 among the plurality of registers.

[0078] The average value of the plurality of digital data of the zero vector is the average value of the plurality of digital data corresponding to the voltage vector V0 and the voltage vector V7 during a predetermined period in the past. The predetermined period in the past is, for example, the period since the electronic device 100 entered the current operating mode. By operating the storage processing unit 14 in this manner, even if the detected current value corresponding to the voltage vector V0 or the voltage vector V7 fluctuates, the offset value can be subtracted without increasing the load on software processing.

[0079] [Second Modification of Storage Processing Unit 14] The storage unit 11 may have a plurality of registers for storing digital data of detected current values ​​corresponding to the three phases, respectively. Specifically, the storage unit 11 may have a first phase register for storing digital data corresponding to a first phase of the three phases, a second phase register for storing digital data corresponding to a second phase of the three phases, and a third phase register for storing digital data corresponding to a third phase of the three phases.

[0080] In this case, the storage processing unit 14 stores, for example, the digital data output by the AD converter 13 at the timings of the voltage vector V1 and the voltage vector V6 in a register corresponding to the W phase. The storage processing unit 14 stores the digital data output by the AD converter 13 at the timings of the voltage vector V2 and the voltage vector V5 in a register corresponding to the V phase. The storage processing unit 14 stores the digital data output by the AD converter 13 at the timings of the voltage vector V3 and the voltage vector V4 in a register corresponding to the U phase. Because the relationship between the voltage vectors and the phases of the DC link current idc detected in the periods corresponding to each voltage vector is constant, providing a register for each phase is equivalent to providing a register for each voltage vector.

[0081] 5, currents of two of the three phases can be detected during one cycle of the PWM carrier wave. Because the sum of the currents of the three phases is zero, the storage processing unit 14 can calculate the current value of the remaining phase based on the detected current values ​​of two of the three phases. Therefore, the storage processing unit 14 may generate data corresponding to the current value of the third phase calculated based on the detected current values ​​of the first phase and the second phase specified in the periods corresponding to two adjacent voltage vectors, and store the generated data in a third phase register.

[0082] Specifically, the storage processing unit 14 generates data indicating a W-phase current value based on the digital data of the detected current values ​​of the U and V phases. The storage processing unit 14 generates data indicating a U-phase current value based on the digital data of the detected current values ​​of the V and W phases. The storage processing unit 14 generates data indicating a V-phase current value based on the digital data of the detected current values ​​of the W and U phases. This allows current values ​​of phases that cannot be detected within the period of the PWM carrier wave to be stored in a register, making it easier for the control data output unit 12 to control the inverter circuit 3.

[0083] [First Modification of Electronic Device 100] 13 is a diagram showing the configuration of electronic device 200, which is a modified example of electronic device 100. Electronic device 200 differs from electronic device 100 shown in FIG. 1 in that electronic device 200 has a processor 6 outside control circuit 1, but is the same in other respects.

[0084] The processor 6 executes a program to perform some of the functions of the control circuit 1 in the electronic device 100. The processor 6 determines a command voltage value, which is a voltage value to be output from the inverter circuit 3, based on, for example, the speed at which the motor is rotated and a detected current value identified by reading digital data stored in two or more of the multiple registers included in the control circuit 1. The processor 6 inputs the determined command voltage value to the control circuit 1 in association with identification information of voltage vectors corresponding to the two or more registers. The identification information of the voltage vectors is text information for identifying voltage vectors V0 to V7, and is, for example, 001 to 007.

[0085] The processor 6 may determine the speed at which to rotate the motor based on the operating state of the electronic device 200 and the state of the motor 2, such as the torque or speed of the motor 2 detected by a sensor, or may receive instructions on the speed at which to rotate the motor from another device.

[0086] The control data output unit 12 of the control circuit 1 determines the time length corresponding to the voltage vector indicated by the identification information, based on the command voltage value and the voltage vector identification information input from the processor 6. The control data output unit 12 outputs the control data indicating the voltage vector to the inverter circuit 3 for the determined time length.

[0087] [Effect of control circuit 1] As described above, the control circuit 1 has a plurality of registers that store digital data corresponding to detected current values ​​detected during periods corresponding to the voltage vectors, in association with the plurality of voltage vectors. The control data output unit 12 then determines the time length of the control data based on the plurality of detected current values ​​corresponding to the plurality of voltage vectors identified based on the digital data stored in the plurality of registers. The control data output unit 12 outputs control data indicating the voltage vectors of the determined time length to the inverter circuit 3. This configuration of the control circuit 1 allows the control data output unit 12 to easily identify the detected current values ​​used to generate the control data, thereby reducing the circuit size of the control circuit 1 and the processing load on the processor.

[0088] [Second Modification of Electronic Device 100] 14 is a diagram showing the configuration of an electronic device 300 that is a modification of the electronic device 100. While the electronic device 100 has an inverter circuit 3, the electronic device 300 has a converter circuit 303 that converts three-phase AC power into DC power.

[0089] Electronic device 300 includes control circuit 301, AC power supply 302, converter circuit 303, current detection circuit 304, and smoothing capacitor 305. Converter circuit 303 includes two switching elements for each of R phase, S phase, and T phase. Converter circuit 303 operates in three-phase PWM mode under the control of control circuit 301.

[0090] The converter circuit 303 has transistors SWrH and SWrL corresponding to the R phase, transistors SWsH and SWsL corresponding to the S phase, and transistors SWtH and SWtL corresponding to the T phase. A free wheel diode is connected in parallel to each transistor.

[0091] The current detection circuit 304, like the current detection circuit 5 in the electronic device 100, has a shunt resistor and an amplifier circuit, and detects the magnitude of the DC link current idc flowing through the DC link part of the converter circuit 303. The current detection circuit 304 inputs a detection signal indicating the voltage obtained after amplifying the voltage across the shunt resistor to the control circuit 301.

[0092] The smoothing capacitor 305 smoothes the three-phase PWM signal output by the converter circuit 303, and outputs DC power.

[0093] The control circuit 301 operates in the same manner as the control circuit 1 in the electronic device 100. That is, the control circuit 301 generates control data indicating the conduction states of the six transistors in the converter circuit 303 based on the result of comparing the value of the detection signal corresponding to the DC link current idc with the command voltage value. The control circuit 1 turns three of the six transistors on and turns the other three transistors off.

[0094] The control circuit 301 generates eight types of control data, each of which represents a different combination of the conduction states of the six transistors, based on a command voltage value input from, for example, an external processor, so that the electronic device 300 outputs a DC voltage corresponding to the command voltage value. Since the voltage output by the converter circuit 303 varies depending on the value of the control data, the value indicated by the control data is referred to as a voltage vector in this specification. The control data corresponds to one of voltage vectors V0 to V7.

[0095] FIG. 15 is a diagram for explaining voltage vectors and corresponds to FIG. 2. FIG. 15(a) shows combinations of the conduction states of six transistors. As shown in FIG. 15(a), the converter circuit 303 has eight states corresponding to voltage vectors V0 to V7. FIG. 15(b) shows the current flow corresponding to voltage vector V6 as an example. The thick line in FIG. 15(b) indicates the current flow when the converter circuit 303 operates with voltage vector V6.

[0096] Fig. 16 is a diagram showing the relationship between the PWM carrier wave, the voltage vector, and the detected current value, and corresponds to Fig. 4. The dotted lines C1 to C6 shown superimposed on the PWM carrier wave indicate the positions where the value of the PWM timer counter corresponds to the command voltage value.

[0097] FIG. 17 is a diagram for explaining the operation mode of the converter circuit 303 and corresponds to FIG. 5. FIG. 17 shows the voltage vector and DC link current idc on the upslope and downslope of the PWM carrier wave. The voltage vector switches between the first half and second half of the upslope of the PWM carrier wave, and the voltage vector switches between the first half and second half of the downslope of the PWM carrier wave. The voltage vector switching also changes the phase and polarity of the current.

[0098] The control circuit 301 has the same configuration as the control circuit 1 shown in Fig. 6, and the storage unit 11 has a plurality of registers corresponding to a plurality of voltage vectors, each of which has a different combination of the conduction states of a plurality of switching elements. Each register stores digital data indicating a detected current value detected during the period when the converter circuit 303 operates with the voltage vector corresponding to the register. The operation of the control circuit 301 to generate control data using the data stored in the plurality of registers is similar to that of the electronic device 100. For example, the control data output unit 12 determines a time length corresponding to the voltage vector indicated by the identification information based on the command voltage value and the voltage vector identification information input from the processor, and outputs control data indicating the voltage vector to the converter circuit 303 for that time length.

[0099] The present disclosure has been described above using embodiments, but the technical scope of the present disclosure is not limited to the scope described in the above embodiments, and various modifications and changes are possible within the scope of the gist thereof. For example, all or part of the device can be configured by functionally or physically distributing or integrating in any unit. Furthermore, new embodiments resulting from any combination of multiple embodiments are also included in the embodiments of the present disclosure. The effects of the new embodiments resulting from the combination also have the effects of the original embodiments. [Explanation of symbols]

[0100] 1 Control circuit 2 motors 3. Inverter circuit 4 DC power supply 5 Current detection circuit 6 processors 11 Storage section 12 Control data output section 13 AD converter 14 Storage processing unit 15 Signal generation unit 51 Shunt resistor 52 Amplification circuit 100 Electronic equipment 200 Electronic equipment 300 Electronic equipment 301 Control circuit 302 AC power supply 303 Converter Circuit 304 Current detection circuit 305 Smoothing capacitor

Claims

1. A control circuit for controlling a converter circuit that converts three-phase AC power into DC power, or an inverter circuit that converts DC power into three-phase AC power, an analog-to-digital conversion unit having an analog-to-digital conversion circuit that converts a detected current value indicating the value of a current flowing through a DC part of the converter circuit or the inverter circuit into digital data; a storage unit including a plurality of registers for storing the digital data indicating the detected current value detected during a period corresponding to a plurality of voltage vectors, the voltage vectors corresponding to different combinations of conduction states of a plurality of switching elements included in the converter circuit or the inverter circuit; A control circuit having:

2. a control data output unit that outputs, to the converter circuit or the inverter circuit, control data indicating one of the plurality of voltage vectors, the voltage vector having a time length determined based on the plurality of detected current values ​​corresponding to the plurality of voltage vectors identified based on the digital data stored in the plurality of registers; The control circuit of claim 1 .

3. a storage processing unit that selects a register from the plurality of registers corresponding to a voltage vector after the change in the control data in synchronization with a timing at which the control data output unit changes the voltage vector of the control data, and inputs the digital data to the selected register; 3. The control circuit of claim 2.

4. the control data output unit changes the voltage vector at a time when the analog-to-digital converter converts the detected current value into digital data; the control data output unit changes the voltage vector at a time when the analog-to-digital converter converts the detected current value into digital data; and the control data output unit changes the voltage vector at a time when the analog-to-digital converter converts the detected current value into digital data. The ... the analog-to-digital converter converts the detected current value into digital data based on the first trigger signal; the storage processing unit selects a register from the plurality of registers to store the digital data based on the control data, and inputs the digital data into the selected register; a register selected by the storage processing unit stores the digital data in response to the second trigger signal; 4. The control circuit of claim 3.

5. the control data output unit periodically switches the voltage vector indicated by the control data in a predetermined pattern; the storage processing unit periodically switches the register for storing the digital data in accordance with the control data in a pattern corresponding to the predetermined pattern.

5. The control circuit of claim 4.

6. the signal generating unit generates the first trigger signal based on a change timing of the control data, which is determined based on a magnitude relationship between a value indicated by a PWM-modulated carrier wave and a command voltage value determined based on the digital data.

5. The control circuit of claim 4.

7. the signal generating unit generates the first trigger signal in response to a value of a timer counter that generates a PWM-modulated carrier wave reaching a predetermined value indicating a timing at which the control data does not change; 5. The control circuit of claim 4.

8. the storage processing unit stores a value obtained by subtracting a value indicated by the digital data of a zero vector among the plurality of voltage vectors from a value indicated by the digital data corresponding to the voltage vector other than a zero vector among the plurality of voltage vectors, which is the digital data output from the analog-to-digital conversion unit, in a register among the plurality of registers that corresponds to the voltage vector corresponding to the digital data output from the analog-to-digital conversion unit.

8. A control circuit according to any one of claims 3 to 7.

9. the storage processing unit stores a value obtained by subtracting an average value of the plurality of digital data of the zero vector among the plurality of voltage vectors from a value indicated by the digital data corresponding to the voltage vector other than the zero vector among the plurality of voltage vectors, which is the digital data output from the analog-to-digital conversion unit, in a register among the plurality of registers that corresponds to the voltage vector corresponding to the digital data output from the analog-to-digital conversion unit.

8. A control circuit according to any one of claims 3 to 7.

10. the storage unit further stores information indicating a register in which the digital data has been updated among the plurality of registers; 8. A control circuit according to any one of claims 1 to 7.

11. The storage unit a first phase register in which the digital data corresponding to a first phase of the three phases is stored; a second phase register in which the digital data corresponding to a second phase of the three phases is stored; a third-phase register in which the digital data corresponding to a third phase of the three phases is stored; having The control circuit of claim 1 .

12. a storage processing unit that generates data corresponding to the third-phase current value calculated based on the detected current value of the first phase and the detected current value of the second phase specified in periods corresponding to two adjacent voltage vectors, and stores the generated data in the third-phase register.

12. The control circuit of claim 11.

13. the storage unit has, for one of the voltage vectors, a first register corresponding to a first period and a second register corresponding to a second period; 8. A control circuit according to any one of claims 1 to 7.

14. the analog-to-digital conversion unit includes a plurality of analog-to-digital conversion circuits; the storage unit includes the plurality of registers corresponding to the plurality of analog-to-digital conversion circuits, respectively; 8. A control circuit according to any one of claims 1 to 7.

15. A control circuit for controlling a converter circuit that converts three-phase AC power into DC power, or an inverter circuit that converts DC power into three-phase AC power, the control circuit outputting control data indicating the conduction states of a plurality of switching elements included in the converter circuit or the inverter circuit, and a processor that controls the control circuit; The control circuit an analog-to-digital conversion unit having an analog-to-digital conversion circuit that converts a detected current value indicating the value of a current flowing through a DC part of the converter circuit or the inverter circuit into digital data; a storage unit including a plurality of registers for storing the digital data indicating the detected current value detected during a period corresponding to a plurality of voltage vectors, the voltage vectors corresponding to which have different combinations of conduction states of the plurality of switching elements; a control data output unit that determines a time length corresponding to the voltage vector indicated by the identification information based on a command voltage value and identification information of the voltage vector input from the processor, and outputs control data indicating the voltage vector to the converter circuit or the inverter circuit over the time length; and The processor: a command voltage value, which is a voltage value to be output from the inverter circuit, is determined based on the DC voltage value to be output from the converter circuit or the speed at which the inverter circuit rotates the motor to which the three-phase AC power is supplied, and the detected current value identified by reading out the digital data stored in two or more of the plurality of registers, and the determined command voltage value is input to the control circuit in association with the identification information corresponding to the two or more registers; electronic equipment.

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