Integrated antenna array with beamformer IC chip having multiple surface boundaries

Abstract

To provide a compact antenna device that integrates an RFIC chip and an antenna array, and a method for manufacturing the antenna device.SOLUTION: An antenna device 100 includes an antenna substrate 110 having opposing first and second surfaces and at least one antenna element 125_i arranged on the first surface, at least one RFIC chip 150_j having a bottom surface attached to the second surface of the antenna substrate and having an RF contact 157 coupled to the at least one antenna element through the antenna substrate, the RFIC chip includes an RF signal conductor 151_s on its top surface and beam forming circuits 130_i, 153 coupled between the RF contact and the RF signal conductor, and a transmission line section 180 having a bottom surface attached to the second surface of the antenna substrate and a top surface on which a transmission line conductor 181_s is arranged and electrically connected to the RF signal conductor of the RFIC chip through a top surface wiring 141.SELECTED DRAWING: Figure 3-1

Description

[Technical Field]

[0001] The present disclosure relates generally to distributed beamformer integrated circuit (IC) chip-integrated antenna arrays. [Background technology]

[0002] Antenna arrays are widely used today for a variety of applications at microwave and millimeter-wave frequencies, such as in aircraft, satellites, vehicles, ships, and general-purpose ground-based communications base stations. Such antenna arrays typically comprise microstrip radiating elements driven by phase-shifting beamforming circuits to produce a phased array for beam steering. It is typically desirable for the entire antenna system, including the antenna array and beamforming circuitry, to be low profile and occupy a minimum amount of space.

[0003] An integrated antenna array may be defined as an antenna array composed of antenna elements integrated with a radio frequency (RF) integrated circuit (RFIC) chip (also called a "beamformer IC" (BFIC)) in a compact structure. An integrated antenna array may have a sandwich-type configuration in which the antenna elements are disposed on an exterior component layer and the RFIC is distributed across the effective antenna aperture in an adjacent parallel component layer behind the antenna element layer. The RFIC may include a transmit RF power amplifier (PA), a receive low-noise amplifier (LNA), and / or a beam-steering phase shifter. Distributing the PA / LNA in this manner can achieve higher efficiency in transmit and / or improved noise performance in receive, as well as higher reliability compared to non-distributed IC designs. Summary of the Invention

[0004] In one embodiment of the present disclosure, an antenna apparatus includes an antenna substrate having opposing first and second surfaces. At least one antenna element is disposed on the first surface of the antenna substrate. At least one radio frequency integrated circuit (RFIC) chip has a bottom surface attached to the second surface of the antenna substrate and has RF contacts coupled to the at least one antenna element through the antenna substrate. The at least one RFIC chip has RF signal conductors on its top surface and a beamforming circuit coupled between the RF contacts and the RF signal conductors. A transmission line section has a bottom surface attached to the second surface of the antenna substrate and has a top surface where the transmission line conductors are disposed and connected to the RF signal conductors of the RFIC chip through top surface wiring, such as wire bonds, ribbon bonds, or edge contact pairs.

[0005] This allows at least one RFIC chip in the integrated antenna structure to have multiple surface boundaries, which may provide performance and manufacturing advantages for the antenna device.

[0006] An embodiment of the phased array antenna includes a plurality of antenna elements disposed on a first surface of an antenna substrate, and a plurality of RFIC chips having bottom surfaces attached to a second surface of the antenna substrate and RF contacts, each RFIC chip having an RF signal conductor on its top surface and a beam forming circuit for beam steering coupled between each RF contact and the RF signal conductor. At least one transmission line section is disposed between the RFIC chips and has a plurality of branch arm conductors of a beam forming network (BFN) on its top surface, each branch arm conductor connected to the RF signal conductor of each RFIC chip through top surface wiring. [Brief explanation of the drawings]

[0007] The above and other aspects and features of the disclosed technology will become more apparent from the following detailed description, taken in conjunction with the accompanying drawings in which like reference characters indicate like elements or features. Various elements of the same or similar type may be distinguished by appending a reference label with an underscore / dash and a second label that distinguishes among the same / similar elements (e.g., _1, _2), or by appending the reference label directly with the second label. However, if a given description uses only a first reference label, this label is applicable to any one of the same / similar elements having the same first reference label, regardless of the second label. Elements and features may not be drawn to scale in the drawings.

[0008] [Figure 1] FIG. 1 is a plan view of an exemplary antenna apparatus according to one embodiment. [Figure 2] FIG. 2 is a front side view of the antenna device of FIG. [Figure 3] Figure 3A is a partial cross-sectional view of the antenna device taken along line 3A-3A of Figure 1, illustrating an exemplary wiring structure suitable for between the CPW RFIC chip and the CPW transmission line section. Figure 3B is a cross-sectional view of an exemplary wiring structure within the antenna device taken along a plane orthogonal to the plane shown in Figure 3A. [Figure 4] Figure 4A is a partial cross-sectional view of an antenna device in one embodiment using a microstrip chip and a microstrip transmission line section, taken along line 3A-3A of Figure 1. Figure 4B is a cross-sectional view of an exemplary wiring structure within the antenna device of Figure 4A, taken along a plane orthogonal to the plane shown in Figure 4A. [Figure 5] Figure 5A is a plan view of another embodiment of an antenna device using a microstrip RFIC chip and a CPW transmission line section, Figure 5B is a plan view of a portion of the RFIC chip of the antenna device of Figure 5A, and Figure 5C is a cross-sectional view of an exemplary wiring structure taken along line 5C-5C of Figure 5A. [Figure 6]Figure 6A is a plan view of a portion of a microstrip RFIC chip in another embodiment of an antenna device, with the active die side of the RFIC chip facing the antenna substrate, and Figure 6B is a plan view of a portion of a CPW chip in another embodiment of an antenna device, with the active die side of the RFIC chip facing the antenna substrate. [Figure 7] 7A-C are schematic diagrams of each active circuit unit (ACU) in an exemplary antenna apparatus. [Figure 8] FIG. 8 is a schematic diagram illustrating an exemplary beamforming circuit with multiple ACUs in an RFIC chip. [Figure 9] FIG. 9 is a schematic diagram showing a beam forming network in an antenna device. [Figure 10] FIG. 10 is a flow diagram of an exemplary method for manufacturing an antenna device. DETAILED DESCRIPTION OF THE INVENTION

[0009] For purposes of explanation, the following description is provided with reference to the accompanying drawings to assist in a comprehensive understanding of certain exemplary embodiments of the technology disclosed herein. Although the description includes various specific details to help those skilled in the art understand the technology, these details should be considered merely exemplary. For purposes of simplicity and clarity, descriptions of well-known functions and structures may be omitted if their inclusion may obscure the understanding of the technology by those skilled in the art.

[0010] FIG. 1 is a plan view of an exemplary antenna apparatus 100 according to one embodiment, and FIG. 2 is a front side view of the antenna apparatus 100. Referring to FIGS. 1 and 2 together, the antenna apparatus 100 (hereinafter referred to as "antenna 100") includes an antenna substrate 110 having a top surface 111 on which a plurality of radio frequency integrated circuit (RFIC) chips 150_1 through 150_K are mounted. (Note that the RFIC chips 150 are also referred to as beamformer IC (BFIC) chips.) N antenna elements 125_1 through 125_N forming a planar array 122 may be disposed on a bottom surface 113 of the antenna substrate 110. Each antenna element 125_i is coupled to an RFIC chip 150_j (i, j = any integer) through a via 155 (forming a probe feed) and an RF contact 157 on the bottom surface of the RFIC chip 150_j. Each RF contact 157 is then coupled to an RF signal conductor 151_s on the top surface of RFIC chip 150_j through a beamforming circuit including one or more active circuit units (ACUs), such as 130_1, 130_2, etc. The values ​​of integers K and N may vary from embodiment to embodiment depending on the application. In the following discussion (and as shown in FIGS. 1-2), for ease of understanding, an example of a "small array" where K=4 and N=8 will be discussed.

[0011] The antenna substrate 110 may include a dielectric layer 190, a ground plane 210 for reflecting signal energy from the antenna elements 125, and a layer region 220 ("redistribution layer (RDL)") containing conductive traces for DC and / or control signals supplied to the RFIC chip 150. At least one transmission line ("TL") section 180 has a bottom surface attached to the top surface 111 of the antenna substrate 110. The TL section 180 has a top surface on which transmission line signal conductors 181_s are disposed and coupled to RF signal conductors 151_s at K-positions through respective top surface interconnects (USINs) 141. (Each K-position of the signal conductors 181_s may be referred to as a branch arm of a combiner / divider.) The USINs 141 are traces created directly between the conductors on the top surface of the RFIC chip 150 and the TL section 180. Thus, USIN 141 does not include vias on either RFIC chip 150 or TL portion 180 to interconnect conductors 151, 181 on the top surface through conductive elements in antenna substrate 110. Some examples of USIN 141 include wire bonds, ribbon bonds, and edge contact pairs (edge ​​contacts on TL portion 180 and edge contacts on RFIC chip 150 fused together).

[0012] The TL section 180 may include 2:1 RF couplers 118_1, 118_2, and 118_3, such as Wilkinson or hybrid couplers, that form an overall K:1 combiner / divider. In the illustrated embodiment, the transmission line media of the TL section 180 and the RFIC chip 150 are both coplanar waveguides (CPW). In the CPW media, a pair of ground conductors 181_g1 and 181_g2 are disposed on opposite sides of the signal conductor 181_s, and a pair of ground conductors 151_g1 and 151_g2 are disposed on opposite sides of the signal conductor 151_s. Each of the ground conductors 151_g1 and 151_g2 is interconnected with adjacent portions of the ground conductors 181_g1 and 181_g2, respectively, through the USIN 141. Alternatively, the transmission line media of the RFIC chip 150 and the TL section 180 are microstrips, in which case the ground conductors 151 and 181 are omitted. Herein, an RFIC chip 150 with a CPW beamforming circuit will be referred to as a CPW chip, and an RFIC chip 150 with a microstrip beamforming circuit will be referred to as a microstrip chip 150. Similar terminology may also be used for the TL section 180. In another embodiment illustrated in FIG. 1 , the microstrip chip 150 may be interconnected with the CPW TL section 180 through a hybrid transition within the microstrip chip 150. This embodiment will be described later in conjunction with FIGS. 5A-6. In either case, an example material for the dielectric substrate 185 of the TL section 180 is alumina. In medium- or large-element arrays, the antenna 100 may include multiple TL sections 180 to facilitate fabrication, particularly the handling of the fragile alumina substrate. Multiple TL sections 180 may be interconnected, if necessary, using wire bonds or the like.

[0013] The top of the RFIC chip 150, along with the interconnect structure and layout of the antenna 100, is the active die side (active area) of the chip, where the beamforming circuitry, including amplifiers and / or phase shifters, is located. For example, the doping regions and metal interconnects for the beamforming circuitry transistors, as well as the combiner / divider 153 conductors, are located in the active area. By interconnecting the top-side conductors using top-side interconnects 141 between the RFIC 150 and the transmission line section 180, an extra transmission line layer in the antenna substrate 110 to form the RF connection between the RFIC 150 and the TL section 180 can be avoided. Therefore, eliminating the step of forming a separate transmission line layer can facilitate fabrication of the antenna substrate 110. Therefore, the antenna substrate 110 may be formed with a single layer of dielectric 190 and is referred to herein as a “single RF layer” substrate. Meanwhile, the polymer layer of layer region 220 may form the top surface 111 of the antenna substrate 110. In another embodiment illustrated in FIG. 2, the RFIC 150 may be flipped over so that the active die side faces the antenna substrate. This creates a lossy interface due to the proximity of the polymer layers, and may result in the application of underfill surrounding the connection joint. When the active die is facing up, as shown in Figure 2, it is relatively far away from the antenna ground plane 210. This reduces the chance of vibration due to reflections between the ground plane 210 and the active die side.

[0014] Each ACU 130 includes an amplifier and / or a phase shifter to condition the transmit and / or receive signals to / from the antenna elements 125. RFIC chips 150 are distributed across the effective aperture of the antenna 100, each coupled to one or more antenna elements 125, such that the antenna 100 may be considered an active antenna array. In embodiments where the ACUs 130 include phase shifters for dynamic phase shifting of signals, the antenna 100 functions as a phased array. In such phased array embodiments, the beams formed by the antenna 100 are steered to a desired beam direction angle set primarily according to the phase shifts of the phase shifters. Additional amplitude adjustment capabilities within the RFIC 150 may also be included to adjust the antenna pattern. In any case, the antenna 100 may be configured as a transmit antenna system, a receive antenna system, or both a transmit and receive antenna system.

[0015] Connector 170 may be side-mounted or surface-mounted and may connect to signal conductor 181_s. In the transmit direction, an input RF transmit signal is applied to connector 170 and split by coupler 118 into K split transmit signals, which are applied to RFIC chips 150_1 through 150_K, respectively. (A schematic diagram of the signal flow is shown in FIG. 9 and described below.) If RFIC 150_j includes multiple ACUs 130, M, RFIC 150_j further includes M:1 combiner / divider 153 that splits the split transmit signal into M further split signals, each applied to one of ACUs 130. Once conditioned by ACUs 130, the conditioned signals become "element signals," which are each applied to one of antenna elements 125.

[0016] In the receive direction, the opposite signal flow occurs: element signals are received from antenna elements 125 by ACU 130 and conditioned (and typically filtered) by receive amplifiers and / or phase shifters. The conditioned receive signals are sent through combiners / dividers 153 and 118 to generate a composite receive signal at connector 170. Here, a beam-forming network (BFN) may be considered to include all signal paths between signal connector 170 and antenna elements 125_1 through 125_N. In the BFN, a single input transmit signal is split into N element signals and / or the N element signals received from antenna elements 125 are combined into a single composite receive signal.

[0017] 2 also illustrates that the antenna 100 may include a cover 107 (not shown in FIG. 1) that protects at least the upper side from external elements. Because the USIN 141 may be fragile, it should be protected from dust, moisture, etc., and the cover 107 is appropriately attached to the rest of the assembly to provide such protection. In another example, a printed wiring assembly (PWA) may be attached to the upper side of the antenna 100 instead of the cover 107 to provide the desired protection from external elements. A radome may also be provided on the underside to protect the antenna element 125.

[0018] 1 and 2 , two antenna elements 125 are shown coupled to each RFIC 150 as an example. In other examples, each RFIC chip 150 is coupled to a single antenna element 125 or three or more antenna elements 125. The antenna 100 is also shown to include additional chips 160_1 and 160_2, such as serial peripheral interface (SPI) chips. The chips 160 may function to provide DC signals and / or control signals to the RFIC 150 through signal lines 304_1, 308_1, etc., formed in layer region 220 of the antenna substrate 110. The DC signals may bias amplifiers and / or control the switching state of switches in the ACU 130. The control signals may control the phase shift of phase shifters in the ACU 130.

[0019] Each of the antenna elements 125 may be a microstrip patch antenna element printed on the antenna substrate 190. Other types of antenna elements, such as dipoles or monopoles, may be substituted. When embodied as microstrip patches, the antenna elements 125 may have any suitable shape, such as circular (as illustrated in FIG. 1 ), square, rectangular, or elliptical, and may be fed and configured in a manner sufficient to achieve a desired polarization, e.g., circular, linear, or elliptical. The number, type, size, shape, inter-element spacing, and feeding mechanism of the antenna elements 125 may vary from embodiment to embodiment depending on the performance goals of the application. While an example of the antenna 100 is shown with eight antenna elements 125, a typical embodiment to achieve a narrow antenna beam may include hundreds or thousands of antenna elements 125. In the embodiment described below, each antenna element 125 is a microstrip patch fed with a single probe feed. The probe feed may be implemented as a via 155 that electrically connects to an RF contact 157, also referred to as an input / output (I / O) pad, on the RFIC 150. The I / O pads are interfaces that allow signals to enter or exit the RFIC 150. In another example, each antenna element 125 is fed by two offset vias 155 using different circularly polarized feed methods. In another example, an electromagnetic feed mechanism is used instead of the vias 155, and each antenna element 125 is excited from its respective feed point with near field energy.

[0020] In one example, the antenna 100 is configured to operate over the millimeter (mm) wave frequency band, generally defined as the band between 30 GHz and 300 GHz. In another example, the antenna 100 operates in the microwave range of approximately 1 GHz to 30 GHz, or in the sub-microwave range below 1 GHz. Here, radio frequency (RF) signals refer to signals with frequencies between less than 1 GHz and approximately 300 GHz. Note that RFICs configured to operate at microwave or millimeter wave frequencies are often referred to as monolithic microwave integrated circuits (MMICs) and are typically constructed from III-V semiconductor materials such as indium phosphate (InP) or gallium arsenide (GaAs), or other materials such as silicon-germanium (SiGe).

[0021] 3A is a partial cross-sectional view of the antenna apparatus taken along line 3A-3A of FIG. 1 and shows an exemplary wiring structure suitable for one embodiment having a CPW chip 150 and a CPW transmission line section 180. Antenna element 125_i is coupled to the beamforming circuit of ACU 130_i formed in the active die side 340 of RFIC chip 150_j (i, j = any integer). Such coupling may be made through first via 155, catch pad 369, conductive joint 363, RF contact 157, second via 355, and conductor 342. (As shown in FIG. 3B and discussed below, one or more ground vias may also be included to form a GS or GSG connection set with second via 355 for noise mitigation.) First via 155 may form at least a portion of the probe feed for antenna element 125_i. A first via 155 is formed in the dielectric 190 and electrically connects the antenna element 125_i to a catch pad 369 formed on the top surface 111 of the antenna substrate 110. The first via 155 passes through an opening 371 formed in the ground plane 210 to prevent shorting to the ground plane. The opening 371 may be surrounded by an insulating material 373, such as a polymer, at a depth level of the ground plane 210. The insulating material 373 may be composed of the same material as the material in the insulating layer of the layer region 220.

[0022] The layer region 220 may include, in order from the top surface 111, the ground plane 210, the first insulating layer 302, the first conductive layer 304, the second insulating layer 306, the second conductive layer 308, and the third insulating layer 310. The first and second conductive layers 304, 308 may be patterned to form signal lines, such as 304_1 and 308_1, used to transmit DC and / or control signals from the SPI chips 160_1, 160_2 to the RFIC chip 150. The conductive layers 304 and 308 may be composed of metal or other conductive material. Openings may be formed in the conductive layers 304, 308, for example, by not depositing conductive material in the area of ​​the openings during the formation of each layer. The openings may be surrounded by insulating material to prevent the first via 155 from crossing the openings and shorting to the conductive layers 304, 308. It should be noted that each layer 302, 304, etc. within layer region 220 may be at least an order of magnitude thinner than dielectric 190. For example, each of these layers may have a thickness (z-direction) on the order of 2-10 μm, while dielectric 190 may be on the order of 250 μm thick. First and second conductive layers 304 and 308 may each form signal / ground traces in the x-y plane having widths on the order of 12 μm and spaced apart from one another by spacings on the order of 12 μm. Each of layers 304 and 308 may be etched or otherwise patterned to form tens, hundreds, or thousands of signal and ground traces in a typical embodiment of antenna 100. However, in other embodiments, layer region 220 may be omitted, in which case bias voltages and signals are delivered to RFIC 150 through other means.

[0023] The contact pads 369 are electrically connected to the RF contacts 157 through conductive joints 363, such as solder balls, gold bumps, copper pillars, or the like, with solder caps, thermocompression adhesive, or conductive epoxy. The RF contacts 157 are then connected to the conductors 342 through second vias 355 formed in the RFIC chip 150_j through a chip material 345, such as InP or GaAs. The conductors 342 may directly connect to or form part of metal wiring of a transistor terminal or other circuit element of a beam-forming circuit. The conductors 342 may be metal wiring printed on the top surface 341 of the RFIC chip 150_j, in which case the second vias 355 may be formed as through-substrate vias (TSVs) that extend completely through the chip material 345. Alternatively, the conductors 342 may be disposed below the top surface 341, with the second vias 355 formed as blind vias that connect at their top ends to the conductors 342 in the chip material 345. Conductor 342 corresponds to circuit point p of the beam forming circuit, which may be an input node of ACU 130. The output of ACU 130 corresponds to circuit point w, which may be connected to a branch arm port (output port) of combiner / divider 153 (if any).

[0024] The input port of combiner / divider 153 electrically connects to conductor 151_s at circuit point "q." USIN 141 connects conductor 151_s to conductor 181_s of TL section 180. If USIN 141 is a wire bond, it may have a cylindrical or circular cross section. If USIN 141 is a ribbon bond, it may have an elliptical or rectangular cross section. Conductor 181_s may be a metal trace printed on the top surface of dielectric 185 of TL section 180. If TL section 180 is a coplanar waveguide, the bottom surface of dielectric 185 may be glued to the top surface 111 of antenna substrate 110 (top surface of polymer layer 302) using non-conductive or conductive epoxy 333.

[0025] In a typical embodiment, RFIC chip 150_j may have tens or even hundreds of electrical contacts, such as 357 and 367, on its underside. These contacts may receive bias voltages and / or control signals from signal lines formed in first and second conductive layers 304 and 308 through wiring with conductive joints 363. For example, to connect signal lines formed in first conductive layer 304 to electrical contacts 357 of RFIC chip 150_j, openings may be created in first insulating layer 302 to expose the signal lines in first conductive layer 304, and conductive wells 387 may be formed in the openings. The openings in first insulating layer 302 may be created by placing a resist material on layer 304 at the location of the openings, and then depositing insulating material of insulating layer 302 in areas not containing the resist material. Contact pads 379 may be formed on wells 387, and conductive joints 363 formed by a heating / cooling process may connect contact pads 379 to contacts 357. Also, contact pad 379 is omitted and conductive joint 363 is conductively bonded to well 387 .

[0026] Similarly, openings may be formed in each of the first insulating layer 302, the first conductive layer 304, and the second insulating layer 306 to connect signal lines formed in the second conductive layer 308 to electrical contacts 367 of the RFIC chip 150_j. The process of forming the openings may similarly include depositing resist material one layer at a time at the location of the next opening while the corresponding layer of material is being deposited. An additional insulating material 391 (e.g., the same material as the insulating layers 302 and 306) may be deposited in an annular region around the openings in the first conductive layer 304. This material prevents shorting to the next conductive well 377 formed by deposition or the like within the cavity created by the series of openings. A contact pad 379 may be formed on the conductive well 377. A conductive joint 363 connects the electrical contact 367 to the contact pad 359, or directly to the conductive well 377 if the contact pad 359 is omitted.

[0027] It may be desirable to form a direct electrical connection between the electrical contacts of the RFIC 150 and the antenna ground plane 210. For example, the electrical contact 347 is electrically connected to the ground plane 210 through the connection joint 363, the contact pad 399, and the conductive well 372 (if the contact pad 399 is omitted, the connection joint 363 may be directly connected to the conductive well 372). A ground plane 338 may be present on the underside of the RFIC chip 150 and may be conductively bonded to the contact 347. The ground plane 338 may be a DC ground and / or a transmission line ground (e.g., a microstrip, CPW, or stripline ground conductor). Note that different types of transmission line media may be present on a single RFIC chip 150. The conductive well 372 may be formed in a similar manner to the conductive well 377, with an additional opening formed through the second conductive layer 308 and the third insulating layer 310 to expose the surface of the ground plane 210. Additional insulating material 392 may be deposited in the annular region surrounding the opening in the second conductive layer 308 to prevent shorting to the subsequently formed conductive well 372 .

[0028] Underfill material 364 may surround at least some of connection joints 363 and provide mechanical support to the connection joints, thereby improving their reliability. Typically, underfill material 364 may be a composite material composed primarily of amorphous fused silica.

[0029] Figure 3B is a cross-sectional view of an exemplary wiring structure within antenna 100 taken along a plane orthogonal to the plane shown in Figure 3A. Figure 3B (y-z plane view) shows a ground-signal-ground (GSG) transition from ground plane 210 to the coplanar waveguide on the top surface of RFIC chip 150_j, across first via 155 and second via 355 (both shown in the x-z plane of Figure 3A). The GSG transition can prevent radiation from second via 355 from affecting the performance of the beamforming circuitry.

[0030] The coplanar waveguide on the top surface of the RFIC chip 150_j includes a signal conductor 342 and first and second ground conductors 344_1 and 344_2 on opposite sides thereof. The first ground via 356_1 has an upper end connected to the first ground conductor 344_1 and defines a first ground point g1 (schematically discussed below). The first ground via 356_1 may connect at its lower end to a catch pad 327_1 on the bottom surface of the RFIC chip 150_j. The wiring between the catch pad 327_1 and the connection point of the ground plane 210 on one side of the first via 155 may include a conductive joint 363, a catch pad 369_1, and a conductive well 374_1. Similarly, the second ground via 356_2 has an upper end connected to the second ground conductor 344_2 and defines a second ground point g2. The second ground via 356_2 may be connected at its bottom end to the catch pad 327_2. The wiring between the catch pad 327_2 and the connection point of the ground plane 210 on the opposite side of the first via 155 may include the conductive joint 363, the catch pad 369_2, and the conductive well 374_2.

[0031] The insulating material 373 annularly surrounds the area between the first via 155 and the first and second conductive wells 374_1, 374_2, preventing the first via 155 from shorting to ground. It can be appreciated that this configuration allows the probe feed to originate at the height (in the z-direction) of the ground plane 210, minimizing unwanted radiation between the ground plane 210 and the top surface of the RFIC chip 150_j. It should be noted that other configurations may use only one ground via 356 forming a ground-to-signal (GS) transition, or three or more ground vias 356 surrounding the second via 355 (which is also considered a GS transition). Yet another configuration uses slotline transitions in place of the second via 355 and the first and second ground vias 356_1, 356_2.

[0032] FIG. 4A is a partial cross-sectional view of antenna 100 taken along line 3A-3A in FIG. 1 in one embodiment using a microstrip chip and a microstrip transmission line section. In this example, ground conductors 151_g1, 151_g2, 181_g1, and 181_2 are omitted, and signal conductors 151_s and 181_s are assumed to be microstrip signal conductors. A microstrip ground plane 438 may be present on the underside of RFIC chip 150_j. The microstrip ground plane 438 may be a microstrip medium having signal conductors such as 151_s and other signal conductors of the beamforming circuitry of ACU 130, and a ground plane for combiner / divider 153 in active region 340. The microstrip ground plane 438 may be electrically connected to antenna ground plane 210 through contact pad 347, conductive joint 363, contact pad 399, and conductive well 373, as described above. 4A includes a microstrip inner conductor 181_s on its top surface and a ground plane 433 on its bottom surface, which may in turn be connected to antenna ground plane 210 through conductive joint 363, contact pad 397, and conductive well 473 similar to conductive well 373.

[0033] Figure 4B is a cross-sectional view of an exemplary wiring structure within antenna 100 configured with the microstrip of Figure 4A taken along a plane orthogonal to the plane shown in Figure 4A. Figure 4B shows a GSG transition across first via 155 and second via 355 from ground plane 210 to the microstrip medium formed by microstrip ground plane 438, signal conductors such as 342 of beam forming circuitry in active die side 340, and chip material 345 separating the signal conductors and microstrip ground plane 438. The wiring between microstrip ground plane 438 and the connection point of ground plane 210 on one side of first via 155 may include catch pad 327_1, conductive joint 363, catch pad 369_1, and conductive well 374_1. A trace of the same configuration connecting the two ground planes 438, 210 may be created on the other side of the first via 155, with catch pad 327_2, another connection joint 363, catch pad 369_2, and conductive well 374_2. As with the CPW of Figure 3B, the GSG transition of Figure 4B may prevent radiation from the second via 355 from affecting the performance of the beamforming circuitry. Other aspects and operations of the antenna structure of Figures 4A and 4B may be the same as those described above with reference to Figures 1-3B.

[0034] FIG. 5A is a plan view of an antenna apparatus 100′ according to another embodiment. FIG. 5B is a plan view showing a portion of the RFIC chip of the antenna apparatus 100′, and FIG. 6 is a cross-sectional view of an exemplary wiring structure taken along line 6-6 in FIG. 5A. Referring to FIGS. 5A, 5B, and 6 together, the antenna 100′ differs from the antenna 100 shown in FIG. 1 above by configuring the RFIC chips 150_1 to 150_K as microstrip chips rather than CPW chips. The microstrip RFIC chip 150 may include a microstrip combiner / divider 553, a microstrip ACU 130, and a microstrip-to-CPW transition (hereinafter referred to as a “hybrid transition”). The combiner / divider 553 may include a microstrip signal conductor 551_s at an input port and an output branch connected to each ACU 130. The hybrid transition may be formed by an input portion of the signal conductor 551_s at an end of the RFIC chip 150, first and second ground pads 551_g1 and 551_g2 on the opposite side of the signal conductor 551_s, and first and second ground vias 655_1 and 655_2.

[0035] First and second vias 655_1 and 655_2 connect ground pads 551_g1 and 551_g2, respectively, to microstrip ground plane 438. FIG. 6 is a cross-sectional view partially through first ground pad 551_g1 of RFIC chip 150_j (tip structure omitted for clarity), showing ground via 655_1 electrically connecting first ground pad 551_g1 to microstrip ground plane 438. Second ground via 655_2 may have the same or a similar structure. Also, the same or similar wiring may be formed between ground plane 438 and antenna ground plane 210 as described above. This wiring may include contact / catch pads 347 and 399, conductive joint 363 therebetween, and conductive well 373. The top surface wiring 141 may be provided to connect the signal conductor 551_s to the signal conductor 181_s, the first ground pad 551_g1 to the ground conductor 181_g1, and the second ground pad 551_g2 to the second ground conductor 181_g2, respectively. Other aspects of the antenna 100′ may be the same as those described above for the antenna 100.

[0036] 6A is a plan view of a portion of a microstrip RFIC chip 150_j of another embodiment of the antenna 100, with the active die side of the RFIC chip 150 facing the antenna substrate 110. That is, compared to the above-described embodiment, the RFIC 150 may be flipped over so that the outer surface of the active die side 340 is considered the bottom surface of the RFIC 150. In this case, the top surface interconnect (USIN) 141 is further utilized to connect the beamforming circuitry in the active die side (through vias in the RFIC 150) to the top surface conductors of the TL section 180. A microstrip ground plane 438 may be present on the top surface of the RFIC chip 150_j, and the signal conductor 651_s may be in the form of an isolated "island" from the ground plane 438 within an annular opening in the ground plane 438 that exposes the chip material 345. A via 655 may be formed between the active region 340 on the bottom surface and the signal conductor 651_s on the top surface. The USINs 141 may be wirebonds or ribbonbonds, and if the TL section 180 is CPW, the first USIN 141 connects the conductor 651_s to the conductor 181_s, and the second and third USINs 141 connect points on the ground plane 438 opposite the conductor 651_s to the respective ground conductors 181_g1 and 181_g2. If the TL section 180 is microstrip, the second and third USINs 141 connected to the ground plane 438 may be omitted.

[0037] FIG. 6B is a plan view of a portion of a CPW RFIC chip 150_j of another embodiment of antenna 100, with the active die side of RFIC chip 150 facing antenna substrate 110. As in the embodiment of FIG. 6A, RFIC 150 may be flipped over compared to the previous embodiment, such that the outer surface of active die side 340 is considered the bottom surface of RFIC 150. The top surface of RFIC chip 150_j may have ground pads 551_g1 and 551_g2, similar to that shown in FIG. 5B, but may also have pad-shaped signal conductor 651_s. In this case, a first via 655_s may be provided to connect the CPW signal conductor in active region 340 to signal conductor 651_s, and second and third vias 655_g1 and 655_g2 may be provided to connect the first and second ground conductors in active region 340 to ground pads 551_g1 and 551_g2, respectively. First, the second and third USINs 141 may be provided to connect to the TL section 180 in the same manner as discussed in Figure 5B if the TL section 180 is CPW. If the TL section 180 is microstrip, the ground pads 551_g1, 551_g2 and vias 655_g1, 655_g2 may be omitted.

[0038] FIG. 7A shows an exemplary beamforming circuit of an active circuit unit (ACU) 130_i configured for the receive path (antenna receive direction) of the RFIC chip 150. The ACU 130_i may include a front-end receive circuit between an input point p (shown in FIGS. 3A-6 ) and an output point w. This front-end receive circuit may include a serially connected low-noise amplifier (LNA) 502, a receive path phase shifter 504, and a bandpass filter 506. In the case of the CPW chip of FIGS. 3A-3B , the first and second ground points g1 and g2 may be coplanar waveguide ground points of the LNA 502, and the circuit point p may be the input point of the signal conductor of the LNA 502. The phase shifter 504 and the filter 506 may also be designed as CPW components. In an embodiment having a microstrip chip, the microstrip ground plane 438 (see FIGS. 4A and 6 ) may be the ground plane for all components of the ACU 130_i. The LNA 502 and the phase shifter 504 may receive bias / control voltages from vias / signal lines (not shown) in the RFIC chip 150 that extend from electrical contacts such as 357, 367 (see Figures 3A, 4A and 6).

[0039] FIG. 7B shows an exemplary beamforming circuit for an active circuit unit (ACU) 130_i configured for the transmit path (antenna transmit direction) of the RFIC chip 150. Here, the front-end circuit in the ACU 130_i may include a power amplifier (PA) 512, a transmit path phase shifter 514, and a bandpass filter 516 connected in series. In the case of the CPW chip of FIGS. 3A-3B, the first and second ground points g1 and g2 may be coplanar ground points of the PA 512, and the circuit point p may be the output point of the signal conductor of the PA 512. The phase shifter 514 and the filter 516 may also be designed as CPW components. In a microstrip chip embodiment, the microstrip ground plane 438 may be the ground plane for all components of the ACU 130_i. The PA 512 and the phase shifter 514 may receive bias / control voltages from vias / signal lines (not shown) in the RFIC chip 150 extending from electrical contacts such as 357 and 367.

[0040] 7C shows an exemplary beamforming circuit of an active circuit unit (ACU) 130_i configured for both the receive path and the transmit path of the RFIC chip 150. In this case, the (ACU) 130_i includes a first transmit / receive (T / R) circuit 532 having an input port connected to an input point p and a second T / R circuit 534 having an input port connected to an output point w. The receive path, including the LNA 502 and the phase shifter 504, may be connected between first output ports of the T / R circuits 532 and 534. The transmit path, including the phase shifter 514 and the PA 512, may be connected between second output ports of the T / R circuits 532 and 534. The T / R circuits 532 and 534 may each include bandpass filters and / or switches to enable both transmission and reception of path signals passing from the input port through their respective output ports. In some examples, different frequency bands are used for the transmit and receive signals, and bandpass filtering can be sufficient to provide isolation between the paths. Time division multiplexed switching may provide additional or alternative isolation between paths. In a CPW embodiment, the first and second ground points g1 and g2 may be the ground points of the T / R circuit 532.

[0041] FIG. 8 is a schematic diagram illustrating an exemplary beamforming circuit including multiple ACUs within an RFIC chip. RFIC 150_j may include multiple ACUs 130_1 through 130_M, each having input ports at circuit points p_1 through p_M, respectively, and output ports at circuit points w_1 through w_M, respectively. The integer M may vary from embodiment to embodiment, from as low as 2 (see the example shown in FIG. 1) to any suitable number of ACUs 130 that can be implemented within a single RFIC chip 150_j. Circuit points p_1 through p_M may be coupled to antenna elements 125_1 through 125_M through feeds 601_1 through 601_M, each feed 601 including a second via 355, a first via 155, and a wiring structure therebetween, as described above with reference to FIGS. 3A through 6 in connection with circuit point p. For example, in a CPW chip embodiment, each ACU 130_i may include first and second ground conductors fixed to first and second ground points g1_i and g2_i. The M:1 combiner 540 combines receive signals output from the ADCs 130 at points w_1 through w_M into a combined receive signal at point q during receive path operation and / or splits a transmit signal applied at point q into M split transmit signals applied to the ACUs 130_1 through 130_M at points w_1 through w_M.

[0042] FIG. 9 is a schematic diagram illustrating an exemplary beam-forming network (BFN) 700 within antenna 100. BFN 700 may include a K:1 combiner / divider 780 formed within transmission line section 180 and K RFIC chips 150_1 through 150_K, each having the configuration of RFIC 150_j of FIG. 8. K:1 combiner / divider 780 has an input port connected to connector 170 at circuit point t and K output ports connected to RFIC chips 150_1 through 150_K at circuit points q_1 through q_K. Each RFIC chip 150 may be coupled to M antenna elements, such as 125_1 through 125_M, through M RF contacts 157, respectively. Thus, there are N antenna elements 125_1 through 125_N, where N=M×K. As previously mentioned, for a typical antenna 100 forming a narrow antenna beam, the number N may be in the hundreds or thousands. In the example shown in FIG. 1, K=4, M=2, and N=8.

[0043] 10 is a flow chart of an exemplary method 800 for fabricating the antenna 100. The order of the depicted operations may be changed as desired. In the method 800, the antenna substrate 110 may be formed from a wafer, and first vias 155 may be formed therein by drilling holes and filling the holes with a conductive material by electroplating or a similar process (S802). The antenna elements 125 and ground plane 210 may then be printed on the bottom and top surfaces of the antenna substrate, respectively (S804). The RDL region 220 may then be formed on the antenna substrate 110 above the ground plane (S806).

[0044] The RFIC chip 150 is separately fabricated with other electrical contacts, such as the beam forming circuits 130, 153, the second via 355, the ground via 356 (in the case of a CPW embodiment), and the RF contacts 157, 357, 367 (S808). The transmission-line (TL) section 180 may be separately formed with a BFN combiner / divider 780 (S810). The conductive joint 363 may first be bonded to the RF contacts 157 and other electrical contacts of the RFIC chip 150 and / or to the catch pads 369 / other contacts on the top surface of the antenna substrate 110 (S812). The RFIC chip 150, the other IC chips 160, and the TL section 180 may be disposed on the antenna substrate 110 (S814). A heating / cooling cycle may be performed to melt and cool the solder or other conductive material in the conductive joints 363, conductively bonding the RFIC chip, other IC chip, and TL section to the antenna substrate (S816). Top surface wiring 141, such as wire bonds or ribbon bonds, may then be attached to the RFIC chip conductors 151 or 551 and the TL section 180 conductors (branch arms) on opposite ends to interconnect them (S818). A connector 170 may be attached to the TL section 180, and a cover 107 or PWA may be attached to the resulting assembly (S820).

[0045] The above embodiments have been described in the context of antenna device 100. Other implementations of the techniques disclosed herein may be applied to non-antenna applications or to wiring structures in other parts of antenna systems. For example, in another exemplary configuration, antenna element 125 is replaced with at least one other type of circuit component, such as a second IC chip, such as a modem. RFIC chip 150 may be coupled to the second IC chip using the same or similar wiring structure as described above (e.g., using first via 155, second via 355, etc.). In such an embodiment, transmission line portion 180 may support circuitry other than the combiner / divider of the beam-forming network, but RFIC chip 150 may be interconnected from the active die side to transmission line portion 180 in the same manner as disclosed herein. In another example, the transmission line portion may be replaced with another RF circuit component, such as another RFIC chip configured to perform a different function than that of RFIC chip 150. The resulting structure / electronic device is formed of a compact three-dimensional laminated structure that has similar advantages to those described for antenna 100, such as reduced loss, reduced / eliminated vibration, and / or ease of manufacturing.

[0046] While the technology described herein has been particularly shown and described with reference to exemplary embodiments thereof, those skilled in the art will recognize that various changes in form and details can be made therein without departing from the spirit and scope of the claimed subject matter as defined by the following claims and their equivalents.

Claims

1. An antenna device (100, 100') comprising: an antenna substrate (110) having opposing first (113) and second (111) faces; at least one antenna element (125) disposed on the first surface (113) of the antenna substrate; at least one radio frequency integrated circuit (RFIC) chip (150_j) having a lower surface attached to the second surface of the antenna substrate and having RF contacts (157) coupled to the at least one antenna element through the antenna substrate, the at least one radio frequency integrated circuit (RFIC) chip (150_j) having RF signal conductors (151_s, 551_s) on its upper surface (341) and having beam forming circuitry (130_i, 153) coupled between the RF contacts and the RF signal conductors; an antenna device (100, 100') comprising: a transmission line section (180) having a lower surface attached to the second surface of the antenna substrate and an upper surface on which a transmission line conductor (181_s) is disposed and electrically connected to the RF signal conductor of the RFIC chip through upper surface wiring (141).

2. the antenna substrate includes an antenna ground plane (210) adjacent to or forming at least a portion of the second surface, the antenna ground plane being electrically connected to a ground contact (347) of the RFIC chip; The antenna arrangement (100, 100') of claim 1, wherein the RF contacts of the RFIC chip are coupled to the at least one antenna element through an opening (371) in the antenna ground plane.

3. 3. The antenna device (100, 100') of claim 2, wherein the antenna substrate further comprises a redistribution layer (220) between the antenna ground plane and the second plane for providing DC voltage and / or control signals to the RFIC chip.

4. The antenna device (100, 100') according to any one of claims 1 to 3, wherein the top surface of the RFIC chip is an active die side (340) of the RFIC chip.

5. The antenna device (100, 100') of claim 4, wherein the RFIC chip comprises vias (355) connecting the RF contacts to the active die side.

6. The antenna device (100, 100') of any one of claims 1 to 5, wherein the antenna substrate includes a via (155) formed in the substrate, the via electrically or electromagnetically coupling the RF contact (157) to the at least one antenna element (125_i).

7. 7. The antenna device (100, 100') of claim 6, wherein the bottom surface of the RFIC chip is attached to the second surface of the antenna substrate through a plurality of electrical connection joints (363), one of the electrical connection joints coupling the RF contact to the via.

8. The antenna apparatus (100, 100') of claim 7, wherein the plurality of electrical connection joints (363) comprise solder bumps, copper pillars, gold bumps, conductive epoxy joints, or thermocompression joints.

9. 9. The antenna device (100, 100') of claim 7 or 8, further comprising an underfill material (364) in a space surrounding the electrical connection joint between the second surface of the antenna substrate and the lower surface of the RFIC chip.

10. The antenna device (100, 100') according to any one of claims 1 to 9, wherein the top surface wiring (141) is a wire bond, a ribbon bond or an edge contact pair.

11. The antenna device (100, 100') according to any one of claims 1 to 10, wherein the beam forming circuit (130_i, 153) comprises at least one of a transmit amplifier (512), a receive amplifier (502), and a phase shifter (504, 514) for adjusting signals communicated between the RFIC chip and the at least one antenna element.

12. The antenna device (100, 100') according to any one of claims 1 to 11, wherein the transmission line section (180) comprises at least a part of a beam forming network (BFN) (700) that splits an input transmit signal into a plurality of split transmit signals each of which is provided to one of a plurality of RFIC chips (150_1, 150_K) attached to the antenna substrate, and / or that receives a plurality of receive signals from the plurality of RFIC chips respectively and combines the receive signals to form an output signal.

13. The antenna device (100, 100') according to any one of claims 1 to 12, wherein the transmission line portion (180) comprises an alumina substrate attached to the second surface of the antenna substrate.

14. the transmission line conductor of the transmission line section is a signal conductor (181_s) of a coplanar transmission line, the coplanar transmission line having first and second ground conductors (181_g1, 181_g2) on opposite sides of the signal conductor; The antenna device (100, 100') according to any one of claims 1 to 13, wherein the third (151_g1, 551_g1) and fourth (151_g2, 551_g2) ground conductors of the RFIC chip on the top surface of the RFIC chip are interconnected with the first and second ground conductors of the coplanar transmission line through respective top surface wirings (141).

15. the beamforming circuitry of the RFIC chip is configured in a microstrip medium including a microstrip ground plane (438) on the underside of the RFIC chip; The antenna device (100') according to any one of claims 1 to 14, wherein the RFIC chip further comprises first (655_g1) and second (655_g2) ground vias connecting the third and fourth ground conductors to the microstrip ground plane, respectively.

16. The antenna device (100) of any one of claims 1 to 13, wherein the transmission line portion is a microstrip transmission line including: a dielectric substrate (185); the transmission line conductor on an upper surface of the dielectric substrate; and a microstrip ground plane (433) on a lower surface of the dielectric substrate.

17. Antenna arrangement (100, 100') according to any one of the preceding claims, wherein said at least one antenna element is a microstrip patch element.

18. The at least one antenna element includes a plurality of N antenna elements (125_1 to 125_N); 18. The antenna device according to claim 1, wherein the RFIC chip includes N beam forming circuits (130_1 to 130_M) each including at least one of an amplifier and a phase shifter, and the N beam forming circuits are coupled to the N antenna elements through N vias (155) formed in the antenna substrate, respectively.

19. A phased array antenna (100, 100'), an antenna substrate (110) having opposing first (113) and second (111) faces; a plurality of antenna elements (125_1 to 125_N) disposed on the first surface of the antenna substrate; a plurality of radio frequency integrated circuit (RFIC) chips (150), each having a lower surface attached to the second surface of the antenna substrate and having RF contacts (157) coupled to the at least one antenna element through the antenna substrate, each having RF signal conductors (151_s, 551_s) on its upper surface (341), and having beam forming circuits (130_i, 153) for beam steering coupled between each of the RF contacts and the RF signal conductor; and at least one transmission line section (180) disposed between the RFIC chips and including a lower surface attached to the second surface of the antenna substrate and an upper surface on which a portion of a beam forming network (BFN) (700) including a plurality of branch arm conductors (181_s) is disposed, each branch arm conductor being interconnected to a respective RF signal conductor of one of the RFIC chips through a top surface wiring (141).

20. The BFN further comprises a plurality of amplifiers (502, 512) and a plurality of phase shifters (504, 514), and the beam forming circuit of each of the RFIC chips comprises at least one of the amplifiers and at least one of the phase shifters; The antenna substrate further comprises an antenna ground plane and layer region (220) including a plurality of conductive traces (304, 306) between the antenna ground plane (210) and the second plane for transmitting DC voltages to the amplifiers and control signals to the phase shifters to control their respective phases and perform beam steering; 20. The phased array antenna (100, 100') of claim 19, further comprising a plurality of integrated circuit (IC) chips (160) attached to the second surface of the antenna substrate and coupled to the layer region for providing at least one of the control signals.

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