Semiconductor element and manufacturing method thereof

Abstract

To obtain a semiconductor element that operates over a wide frequency band and with high luminous efficiency.SOLUTION: A semiconductor element 500 according to the present disclosure includes a semiconductor substrate 101, a mesa structure 150 having a striped laminated semiconductor layer formed on the semiconductor substrate 101 and including a first semiconductor layer 102 of a first conductivity type, an active layer 103, and a semiconductor layer 104 of a second conductivity type, buried layers 105 and 106 buried on both side surfaces of the mesa structure 150, a second semiconductor layer 109 of the first conductivity type formed on the buried layers 105 and 106, and an insulating film 110 formed in contact with the second semiconductor layer 109 of the first conductivity type.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices and methods for manufacturing semiconductor devices. [Background technology]

[0002] In order to accommodate the increasing volume of communication, InP-based semiconductor lasers used in optical communications require a broader modulation frequency bandwidth for each element. Furthermore, to reduce the power consumption of the entire optical communications system, it is necessary to improve the light-emitting efficiency of each element. The resistance of the semiconductor element has a significant effect on both the frequency band and light-emitting efficiency. However, between electrons and holes, holes have a lower mobility, and the resistance of the p-type semiconductor layer accounts for a large proportion of the overall resistance of the semiconductor layer.

[0003] Considering the above circumstances, InP-based semiconductor lasers for optical communications generally use an n-type semiconductor substrate in order to apply a low-resistance n-type semiconductor layer to the long portion of the current path. In other words, the n-type semiconductor substrate is located on the back side of the device, and the p-type semiconductor layer is located on the front side of the device. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] J Chevallier, A Jalil, B Theys, JC Pesant, M Aucouturier, B Rose and A Mircea, “Hydrogen passivation of shallow acceptors in p-type InP”, Semicond. Sci. Technol. 4 (1989) pp.87-90 [Non-patent document 2] Hiroshi Ito, Shoji Yamahata, Naoteru Shigekawa and Kenji Kurishima, “Heavily Carbon Doped Base InP / InGaAs Heterojunction Bipolar Transistors Grown by Two-Step Metalorganic Chemical Vapor Deposition”, Jpn. J. Appl. Phys., vol.35 (1996) pp.6139-6144 Summary of the Invention [Problem to be solved by the invention]

[0005] As mentioned above, InP-based semiconductor lasers for optical communications generally have a configuration in which a p-type semiconductor layer is formed on the surface side of the element. An insulating film is formed on the surface side of the element to protect the semiconductor layer. Required properties of the insulating film include good step coverage on the semiconductor surface and dense film quality. Plasma CVD (Plasma Chemical Vapor Deposition) is generally used as an insulating film deposition technique that meets these requirements.

[0006] However, when plasma CVD is used to form an insulating film for the purpose of protecting the surface of a semiconductor layer, hydrogen radicals generated during the formation of the insulating film can cause hydrogen to enter the insulating film. The hydrogen trapped in the insulating film can diffuse into the p-type semiconductor layer during processes such as annealing in the manufacturing process after film formation. Furthermore, hydrogen can also diffuse into the p-type semiconductor layer depending on the storage, operation, and usage environment of the semiconductor device after completion.

[0007] Non-Patent Document 1 points out that hydrogen in the p-type semiconductor layer causes a decrease in carrier concentration. A decrease in carrier concentration in the p-type semiconductor layer directly leads to an increase in the device resistance of the semiconductor element, which could lead to variations in device characteristics due to variations in conditions such as process, storage, operation, and usage environment. Furthermore, hydrogen in the semiconductor layer is known to move relatively easily, which could, in the worst case, affect the long-term reliability of the semiconductor element. Meanwhile, Non-Patent Document 2 describes that providing an n-type semiconductor layer on the surface of the semiconductor layer can suppress the diffusion of hydrogen from the insulating film into the p-type semiconductor layer.

[0008] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor element that can operate with a wide frequency band and high light emission efficiency by suppressing the diffusion of hydrogen from the insulating film into the p-type semiconductor layer and preventing an increase in the element resistance of the semiconductor element. [Means for solving the problem]

[0009] The semiconductor device according to the present disclosure comprises: a semiconductor substrate; a mesa structure in which a laminated semiconductor layer including a first semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type is formed in a stripe shape on the semiconductor substrate; a buried layer buried in both side surfaces of the mesa structure; a second semiconductor layer of the first conductivity type formed on the buried layer; an insulating film formed in contact with the second semiconductor layer of the first conductivity type.

[0010] A method for manufacturing a semiconductor device according to the present disclosure includes: a first crystal growth step of forming a laminated semiconductor layer by sequentially growing a first semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type on a semiconductor substrate; a mesa structure forming step of processing the laminated semiconductor layer into a striped mesa structure; a second crystal growth step of growing buried layers on both side surfaces of the mesa structure; a third crystal growth step of growing a semiconductor layer including a second semiconductor layer of the first conductivity type on the buried layer; an insulating film forming step of forming an insulating film on the second semiconductor layer of the first conductivity type by a plasma CVD method; and forming an opening in a portion of the insulating film facing the top surface of the mesa structure. [Effects of the Invention]

[0011] According to the semiconductor element of the present disclosure, an n-type semiconductor layer is provided directly below the insulating film provided on the outermost surface of each semiconductor layer, and the n-type semiconductor layer prevents the diffusion of hydrogen contained in the insulating film, thereby achieving the effect of obtaining a semiconductor element that has a wide frequency band and can operate with high light-emitting efficiency.

[0012] According to the method for manufacturing a semiconductor device according to the present disclosure, an n-type semiconductor layer is crystal-grown on the outermost surface of each semiconductor layer, and an insulating film in contact with the n-type semiconductor layer is formed by plasma CVD. This allows the n-type semiconductor layer to prevent diffusion of hydrogen contained in the insulating film, thereby providing the effect of easily manufacturing a semiconductor device that has a wide frequency band and can operate with high light-emitting efficiency. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a cross-sectional view showing a configuration of a semiconductor element according to a first embodiment. [Figure 2] 1 is a cross-sectional view showing the configuration of a buried semiconductor laser to which the semiconductor element structure according to the first embodiment is applied. [Figure 3] FIG. 1 is a cross-sectional view showing a configuration of a semiconductor element according to a first modification of the first embodiment. [Figure 4] FIG. 10 is a cross-sectional view showing the configuration of a buried semiconductor laser to which a semiconductor element structure according to a first modification of the first embodiment is applied. [Figure 5] FIG. 10 is a cross-sectional view showing the configuration of a semiconductor element according to a second modification of the first embodiment. [Figure 6] FIG. 10 is a cross-sectional view showing another configuration of the semiconductor element according to the second modification of the first embodiment. [Figure 7] FIG. 10 is a cross-sectional view showing the configuration of a buried semiconductor laser to which the semiconductor element structure according to the second embodiment is applied. [Figure 8] FIG. 10 is a cross-sectional view showing an example of the configuration of a semiconductor element to which the semiconductor element structure according to the third embodiment is applied. [Figure 9] FIG. 11 is a cross-sectional view showing an example of the configuration of a ridge-type semiconductor laser to which a semiconductor element structure according to a first modification of the third embodiment is applied. [Figure 10] FIG. 11 is a cross-sectional view showing an example of the configuration of a buried semiconductor laser to which a semiconductor element structure according to Modification 2 of Embodiment 3 is applied. [Figure 11] FIG. 10 is a cross-sectional view showing the configuration of a semiconductor element according to a fourth embodiment. [Figure 12] FIG. 10 is a cross-sectional view showing the configuration of a buried semiconductor laser to which a semiconductor element structure according to a fourth embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION

[0014] Embodiment 1 Fig. 1 is a cross-sectional view showing the configuration of a semiconductor device 500 according to embodiment 1. Fig. 1 shows a buried semiconductor laser using an n-type InP (indium phosphide) substrate 101 and having an AlGaInAs active layer 103 as an example of the semiconductor device 500 according to embodiment 1.

[0015] <Configuration of Semiconductor Element According to First Embodiment> The semiconductor device 500 includes a mesa structure 150 formed in a stripe shape on an S-doped n-type InP substrate 101 having a (100) surface, the mesa structure 150 being formed of laminated semiconductor layers, which are sequentially stacked on the substrate 101, the S-doped n-type InP cladding layer (first semiconductor layer of a first conductivity type) 102, the undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the top and bottom, and the Zn-doped p-type InP first cladding layer (semiconductor layer of a second conductivity type) 104, and the Fe-doped semi-insulating InP buried layers formed on both sides of the stripe-shaped mesa structure 150. the top surface of the striped mesa structure 150 and the surface of the S-doped n-type InP burying layer 106; a Zn-doped p-type InP second cladding layer (cladding layer of the second conductivity type) 107 formed to cover the top surface of the striped mesa structure 150 and the surface of the S-doped n-type InP burying layer 106; a Zn-doped p-type InGaAs contact layer (contact layer of the second conductivity type) 108; and an S-doped n-type InP barrier layer (second semiconductor layer of the first conductivity type) 109; and an SiO2 insulating film 110 formed on the S-doped n-type InP barrier layer 109.

[0016] The semiconductor layers consisting of the first semiconductor layer of the first conductivity type, the active layer, and the semiconductor layer of the second conductivity type are also called laminated semiconductor layers.

[0017] Each layer that makes up semiconductor device 500 will be described below. The doping concentration of the S-doped n-type InP substrate 101 is 5.0×10 18 cm -3 The thickness of the S-doped n-type InP cladding layer 102 is 1.0 μm, and the doping concentration is 1.0×10 18 cm -3 The undoped AlGaInAs active layer 103 has a thickness of 0.3 μm, the Zn-doped p-type InP first cladding layer 104 has a thickness of 0.3 μm, and the doping concentration is 1.0×10 18 cm -3 The height of the striped mesa structure 150 is 2.0 μm. Although an active layer made of undoped AlGaInAs has been given as an example of the active layer, any active layer made of a semiconductor layer containing Ga (gallium) and As (arsenic) may be used, and an n-type or p-type semiconductor layer other than undoped may also be used.

[0018] The thickness of the Fe-doped semi-insulating InP buried layer 105 is 1.8 μm, and the doping concentration is 5.0×10 16 cm -3 The thickness of the S-doped n-type InP buried layer 106 is 0.2 μm, and the doping concentration is 5.0×10 18 cm -3 is.

[0019] The Zn-doped p-type InP second cladding layer 107 has a thickness of 2.0 μm and a doping concentration of 1.0×10 18 cm -3 The Zn-doped p-type InGaAs contact layer 108 has a thickness of 0.3 μm and a doping concentration of 1.0×10 19 cm -3 The thickness of the S-doped n-type InP barrier layer 109 is 0.5 μm, and the doping concentration is 1.0×10 18 cm -3 is.

[0020] <Method of Manufacturing Semiconductor Element According to First Embodiment> A method for manufacturing the semiconductor device 500 according to the first embodiment will be described below. On a (100) S-doped n-type InP substrate 101, a stacked semiconductor layer consisting of an S-doped n-type InP cladding layer 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the top and bottom, and a Zn-doped p-type InP first cladding layer 104 are sequentially grown by crystal growth methods such as metal organic chemical vapor deposition (MOCVD) (first crystal growth step).

[0021] After the crystal growth of each of the above layers, the surface of the Zn-doped p-type InP first cladding layer 104 is subjected to photolithography and etching techniques. <011> A stripe-shaped SiO2 mask having a width of 1.5 μm in the direction is formed.

[0022] Using the striped SiO2 mask as an etching mask, dry etching is performed from the Zn-doped p-type InP first cladding layer 104 to the S-doped n-type InP substrate 101 to form a striped mesa structure 150 with a height of 2.0 μm from the bottom surface (mesa structure formation process).

[0023] After forming the striped mesa structure 150, an Fe-doped semi-insulating InP burying layer 105 and an S-doped n-type InP burying layer 106 are sequentially crystal-grown by MOCVD on both side surfaces of the striped mesa structure 150 (second crystal growth step). The Fe-doped semi-insulating InP burying layer 105 and the S-doped n-type InP burying layer 106 function as current blocking layers when the semiconductor device 500 is operated. After forming each burying layer, the SiO2 mask is removed by wet etching using hydrofluoric acid as an etchant.

[0024] Next, the Zn-doped p-type InP second cladding layer 107, the Zn-doped p-type InGaAs contact layer 108, and the S-doped n-type InP barrier layer 109 are sequentially grown by MOCVD on the top surface of the striped mesa structure 150 and the surface of the S-doped n-type InP buried layer 106 (third crystal growth step).

[0025] Next, an SiO2 insulating film 110 is formed on the entire surface using a plasma CVD method (insulating film forming step), thereby completing the semiconductor element 500 shown in Fig. 1. The SiO2 insulating film 110 formed using the plasma CVD method is also called a plasma CVD insulating film.

[0026] <Effect 1 of First Embodiment> According to the semiconductor device of the first embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a semiconductor device that has a wide frequency band and can operate with high light emission efficiency.

[0027] <Configuration of buried semiconductor laser according to first embodiment> Fig. 2 is a cross-sectional view showing the configuration of a buried semiconductor laser 550 to which the semiconductor element 500 shown in Fig. 1 is applied. The element structure of the buried semiconductor laser 550 is based on the semiconductor element 500. The buried semiconductor laser 550 has an element structure in which an opening 110a is formed in the SiO2 insulating film 110 of the semiconductor element 500, a front electrode 111 is provided on the SiO2 insulating film 110 including the opening 110a, and a back electrode 112 is provided on the back side of the n-type InP substrate 101.

[0028] <Method for manufacturing buried semiconductor laser according to first embodiment> The method for manufacturing the buried semiconductor laser 550 according to the first embodiment is the same as the method for manufacturing the semiconductor element 500 up to the step of forming the SiO2 insulating film 110 using the plasma CVD method, so the subsequent steps will be explained below.

[0029] After the SiO2 insulating film 110 is formed, an opening 110a having an opening width of 3 μm is formed in the SiO2 insulating film 110 at a portion facing the top surface of the striped mesa structure 150 using photolithography and dry etching (opening forming step).

[0030] A front surface electrode 111 is formed on the SiO2 insulating film 110 including the opening 110a. After the front surface electrode 111 is formed, the back surface is polished, and a back surface electrode 112 is formed on the back surface side of the n-type InP substrate 101 (electrode formation process), thereby completing the device structure as a buried semiconductor laser 550 as shown in FIG.

[0031] The InP layer and the InGaAs layer have n-type conductivity when doped with S, and p-type conductivity when doped with Zn. In the device structure of the semiconductor device 500 and the buried semiconductor laser 550, the S-doped n-type InP barrier layer 109 is present between the SiO2 insulating film 110 and the Zn-doped p-type InGaAs contact layer 108, and the S-doped n-type InP barrier layer 109 can prevent hydrogen contained in the SiO2 insulating film 110 from diffusing into each semiconductor layer.

[0032] Although the above description has been given as an example of a buried type semiconductor laser 550, the same effect can be obtained with a ridge type semiconductor laser, which will be described later.

[0033] In the above example, sulfur (S) and zinc (Zn) were used as dopants for the semiconductor layer, but the same effect can be obtained by using any dopant that exhibits n-type and p-type properties, respectively.

[0034] In the above embodiment, the current blocking layer is formed using the Fe-doped semi-insulating InP buried layer 105 and the S-doped n-type InP buried layer 106, but other buried structures such as a thyristor type may also be used.

[0035] <Effect 2 of First Embodiment> According to the buried semiconductor laser of the first embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a buried semiconductor laser that has a wide frequency band and can operate with high light emission efficiency.

[0036] Variation 1 of Embodiment 1 Fig. 3 is a cross-sectional view showing the configuration of a semiconductor device 600 according to a first modification of the first embodiment. Fig. 4 is a cross-sectional view showing the configuration of a buried semiconductor laser 650 to which the semiconductor device structure according to the first modification of the first embodiment is applied.

[0037] <Configuration of Semiconductor Element According to Modification 1 of First Embodiment> As shown in the cross-sectional view of FIG. 3, a semiconductor device 600 according to a first modification of the first embodiment has the same configuration as the semiconductor device 500 according to the first embodiment, except that an opening 110b is provided in a portion of the n-type InP barrier layer (second semiconductor layer of the first conductivity type) 109 and the SiO2 insulating film 110 that faces the top surface of the striped mesa structure 150.

[0038] The opening 110b has a width of 3 μm, and the p-type InGaAs contact layer 108 is exposed at the bottom of the opening 110b.

[0039] <Method for manufacturing semiconductor element according to first modification of first embodiment> The method for manufacturing the semiconductor device 600 according to the first modification of the first embodiment is the same as the method for manufacturing the buried semiconductor laser 550 up to the formation of the opening in the SiO2 insulating film 110, so the subsequent manufacturing steps will be described below.

[0040] After forming an opening in the SiO2 insulating film 110 on the device surface, the S-doped n-type InP barrier layer 109 is etched using a chemical solution that has etching selectivity to InGaAs until it reaches the Zn-doped p-type InGaAs contact layer 108, thereby forming the opening 110b shown in Fig. 3. Because a chemical solution with etching selectivity is used, etching progresses within the S-doped n-type InP barrier layer 109 but stops at the surface of the Zn-doped p-type InGaAs contact layer 108. Therefore, the Zn-doped p-type InGaAs contact layer 108 is exposed at the bottom of the opening 110b.

[0041] <Effect 1 of Modification 1 of Embodiment 1> According to the semiconductor device of the first modification of the first embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a semiconductor device that has a wide frequency band and can operate with high light emission efficiency.

[0042] <Configuration of Buried Semiconductor Laser According to Modification 1 of Embodiment 1> 4 is a cross-sectional view showing the configuration of a buried semiconductor laser 650 to which the semiconductor device structure according to Modification 1 of Embodiment 1 is applied. The buried semiconductor laser 650 has a device structure in which an opening 110b is formed in the SiO2 insulating film 110 and the n-type InP barrier layer (first conductivity type second semiconductor layer) 109 of the semiconductor device 500, a front surface electrode 111 is provided on the SiO2 insulating film 110 including the opening 110b, and a back surface electrode 112 is provided on the back surface side.

[0043] In the buried semiconductor laser 650, the n-type InP barrier layer 109 is inserted over the entire surface between the p-type InGaAs contact layer 108 and the SiO2 insulating film 110, and the n-type InP barrier layer 109 can prevent hydrogen contained in the SiO2 insulating film 110 from diffusing into each semiconductor layer.

[0044] Furthermore, in the buried semiconductor laser 650, the n-type InP barrier layer 109 is removed between the surface electrode 111 and the p-type InGaAs contact layer 108 at the opening 110b of the SiO2 insulating film 110, which also has the effect of reducing the contact resistance between the surface electrode 111 and the semiconductor layer.

[0045] <Effect 2 of Modification 1 of Embodiment 1> According to the buried semiconductor laser of the first modification of the first embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and therefore the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a buried semiconductor laser that has a wide frequency band and can operate with high light emission efficiency.

[0046] Variation 2 of Embodiment 1 Fig. 5 is a cross-sectional view showing a configuration of a semiconductor element according to Modification 2 of Embodiment 1. Fig. 6 is a cross-sectional view showing another configuration of a semiconductor element according to Modification 2 of Embodiment 1.

[0047] <Configuration of Semiconductor Element According to Modification 2 of First Embodiment> As shown in the cross-sectional view of FIG. 5, the semiconductor device 700 according to the second modification of the first embodiment is configured as follows: an S-doped n-type InP cladding layer (first semiconductor layer of a first conductivity type) 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the upper and lower surfaces thereof, a Zn-doped p-type InP cladding layer (semiconductor layer of a second conductivity type) 104a, a Zn-doped p-type InGaAs contact layer 108, and an S-doped n-type InP barrier layer (second semiconductor layer of a first conductivity type) 109, which are sequentially stacked on a (100) S-doped n-type InP substrate 101; and an SiO insulating film 110 formed on the S-doped n-type InP barrier layer 109 and having an opening 110c. Although an active layer made of undoped AlGaInAs has been given as an example of the active layer, any active layer made of a semiconductor layer containing Ga (gallium) and As (arsenic) may be used, and an n-type or p-type semiconductor layer other than undoped may also be used.

[0048] <Another Configuration of Semiconductor Element According to Modification 2 of First Embodiment> The semiconductor device 750 according to the second modification of the first embodiment has a device structure in which, in addition to the SiO2 insulating film 110 of the semiconductor device 700, an opening 110d is provided that reaches the n-type InP barrier layer (second semiconductor layer of the first conductivity type) 109.

[0049] <Effects of Modification 2 of Embodiment 1> According to the semiconductor device of the second modification of the first embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a semiconductor device that has a wide frequency band and can operate with high light emission efficiency.

[0050] Embodiment 2 Fig. 7 is a cross-sectional view showing the configuration of a semiconductor device 800 according to embodiment 2. Fig. 7 shows, as an example of semiconductor device 800 according to embodiment 2, a buried semiconductor laser using an n-type InP substrate 101 and having an AlGaInAs active layer 103, similar to embodiment 1.

[0051] <Configuration of Semiconductor Element According to Second Embodiment> The semiconductor device 800 includes a mesa structure 160 in which laminated semiconductor layers are formed in a stripe pattern on a (100) S-doped n-type InP substrate 101, the mesa structure 160 being made up of an S-doped n-type InP cladding layer (first semiconductor layer of a first conductivity type) 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the top and bottom, a Zn-doped p-type InP cladding layer (semiconductor layer of a second conductivity type) 104a, and a Zn-doped p-type InGaAs contact layer 108. The semiconductor device is composed of semiconductor layers, each consisting of an Fe-doped semi-insulating InP buried layer 105 and an S-doped n-type InP buried barrier layer (first conductivity type second semiconductor layer) 109a, which are formed on both side surfaces of a mesa structure 160; an SiO2 insulating film 110 formed on the S-doped n-type InP buried barrier layer 109a and having an opening 110e; a front electrode 111 provided on the SiO2 insulating film 110 including the opening 110e; and a back electrode 112 provided on the back side of the S-doped n-type InP substrate 101.

[0052] Each layer that makes up semiconductor device 800 will be described below. The doping concentration of the S-doped n-type InP substrate 101 is 5.0×10 18 cm -3 The thickness of the S-doped n-type InP cladding layer 102 is 1.0 μm, and the doping concentration is 1.0×10 18 cm -3 The undoped AlGaInAs active layer 103 has a thickness of 0.3 μm, the Zn-doped p-type InP cladding layer 104 a has a thickness of 2.3 μm, and the doping concentration is 1.0×10 18 cm -3 The Zn-doped p-type InGaAs contact layer 108 has a thickness of 0.3 μm and a doping concentration of 1.0×10 19 cm -3 Although an active layer made of undoped AlGaInAs has been given as an example of the active layer, any active layer made of a semiconductor layer containing Ga (gallium) and As (arsenic) may be used, and an n-type or p-type semiconductor layer other than the undoped one may also be used.

[0053] The thickness of the Fe-doped semi-insulating InP buried layer 105 is 4.0 μm, and the doping concentration is 5.0×10 16 cm -3 The thickness of the S-doped n-type InP buried barrier layer 109a is 0.5 μm, and the doping concentration is 5.0×10 18 cm -3 The height of the striped mesa structure 160 is 4.5 μm.

[0054] <Method of manufacturing a semiconductor device according to the second embodiment> A method for manufacturing the semiconductor device 800 according to the second embodiment will be described below. On a (100) S-doped n-type InP substrate 101, a stacked semiconductor layer consisting of an S-doped n-type InP cladding layer 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the top and bottom, a Zn-doped p-type InP cladding layer 104a, and a Zn-doped p-type InGaAs contact layer 108 is sequentially grown by crystal growth method such as MOCVD (first crystal growth step).

[0055] After the crystal growth of each of the above layers, the surface of the Zn-doped p-type InGaAs contact layer 108 is subjected to photolithography and etching. <011> A stripe-shaped SiO2 mask having a width of 1.5 μm in the direction is formed.

[0056] Using the striped SiO2 mask as an etching mask, dry etching is performed from the Zn-doped p-type InGaAs contact layer 108 to the S-doped n-type InP substrate 101 to form a striped mesa structure 160 with a height of 4.5 μm from the bottom surface (mesa structure formation process).

[0057] After forming the striped mesa structure 160, an Fe-doped semi-insulating InP burying layer 105 and an S-doped n-type InP burying barrier layer 109a are sequentially grown by MOCVD on both side surfaces of the striped mesa structure 160 (second crystal growth step). The Fe-doped semi-insulating InP burying layer 105 and the S-doped n-type InP burying barrier layer 109a function as current blocking layers when the semiconductor device 800 is operated.

[0058] After forming each buried layer, the SiO2 mask is removed by wet etching using hydrofluoric acid as an etchant. Next, an SiO2 insulating film 110 is formed on the entire surface by using a plasma CVD method (insulating film forming step).

[0059] After the SiO2 insulating film 110 is formed, an opening 110e having an opening width of 3 μm is formed in the SiO2 insulating film 110 at a portion facing the top surface of the striped mesa structure 160 using photolithography and dry etching (opening forming step).

[0060] A front surface electrode 111 is formed on the SiO2 insulating film 110 including the opening 110a. After the front surface electrode 111 is formed, the back surface is polished, and a back surface electrode 112 is formed on the back surface side of the n-type InP substrate 101 (electrode formation process), thereby completing the device structure as a buried semiconductor laser as shown in FIG.

[0061] In the element structure of the semiconductor element 800, the n-type InP buried barrier layer 109a is present between the SiO2 insulating film 110 and the semi-insulating InP buried layer 105, and the n-type InP buried barrier layer 109a can prevent hydrogen contained in the SiO2 insulating film 110 from diffusing into each semiconductor layer.

[0062] <Advantages of the Second Embodiment> According to the semiconductor device of the second embodiment, the n-type InP buried barrier layer 109a is provided directly under the SiO2 insulating film 110, and the n-type InP buried barrier layer 109a prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a semiconductor device that has a wide frequency band and can operate with high light-emitting efficiency.

[0063] Embodiment 3 Fig. 8 is a cross-sectional view showing the configuration of a semiconductor device 850 according to embodiment 3. Fig. 8 shows, as an example of semiconductor device 850 according to embodiment 2, a ridge-type semiconductor laser that uses an n-type InP substrate 101 and has an AlGaInAs active layer 103, similar to embodiment 1.

[0064] <Configuration of Semiconductor Element According to Third Embodiment> The semiconductor device 850 is configured such that a laminated semiconductor layer consisting of an S-doped n-type InP cladding layer (first semiconductor layer of first conductivity type) 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the upper and lower surfaces, a Zn-doped p-type InP cladding layer (semiconductor layer of second conductivity type) 104a, and a Zn-doped p-type InGaAs contact layer 108 is formed in a stripe pattern on a (100) S-doped n-type InP substrate 101. The ridge structure 170 is made up of an S-doped n-type InP barrier layer (first conductivity type second semiconductor layer) 109 formed on both side surfaces of the striped ridge structure 170, an SiO2 insulating film 110 formed on the S-doped n-type InP barrier layer 109 and having an opening 110f formed in the top surface portion of the ridge structure 170, a front electrode 111 provided on the SiO2 insulating film 110 including the opening 110f, and a back electrode 112 provided on the back surface side of the S-doped n-type InP substrate 101.

[0065] Each layer that makes up semiconductor device 850 will be described below. The doping concentration of the S-doped n-type InP substrate 101 is 5.0×10 18 cm -3 The thickness of the S-doped n-type InP cladding layer 102 is 1.0 μm, and the doping concentration is 1.0×10 18 cm -3 The undoped AlGaInAs active layer 103 has a thickness of 0.3 μm, the Zn-doped p-type InP cladding layer 104 a has a thickness of 2.3 μm, and the doping concentration is 1.0×10 18 cm -3 The Zn-doped p-type InGaAs contact layer 108 has a thickness of 0.3 μm and a doping concentration of 1.0×10 19 cm -3 Although an active layer made of undoped AlGaInAs has been given as an example of the active layer, any active layer made of a semiconductor layer containing Ga (gallium) and As (arsenic) may be used, and an n-type or p-type semiconductor layer other than the undoped one may also be used.

[0066] The S-doped n-type InP barrier layer 109 has a thickness of 0.5 μm and a doping concentration of 1.0×10 18 cm -3 The height of the stripe-shaped ridge structure 170 is 2.6 μm.

[0067] <Method of Manufacturing a Semiconductor Element According to Third Embodiment> A method for manufacturing the semiconductor device 850 according to the third embodiment will be described below. On a (100) S-doped n-type InP substrate 101, a stacked semiconductor layer consisting of an S-doped n-type InP cladding layer 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the top and bottom, a Zn-doped p-type InP cladding layer 104a, and a Zn-doped p-type InGaAs contact layer 108 is sequentially grown by crystal growth using a crystal growth method such as MOCVD (first crystal growth step).

[0068] After the crystal growth of each of the above layers, the surface of the Zn-doped p-type InGaAs contact layer 108 is subjected to photolithography and etching. <011> A stripe-shaped SiO2 mask having a width of 1.5 μm in the direction is formed.

[0069] Using the striped SiO2 mask as an etching mask, the Zn-doped p-type InGaAs contact layer 108 and the Zn-doped p-type InP cladding layer 104a are dry-etched to form a ridge shape, thereby forming a striped ridge structure 170 with a height of 2.6 μm from the bottom surface (ridge structure formation process).

[0070] After the striped ridge structure 170 is formed, the S-doped n-type InP barrier layer 109 is grown on the striped ridge structure 170 by MOCVD (second crystal growth step).

[0071] After forming each buried layer, the SiO2 mask is removed by wet etching using hydrofluoric acid as an etchant. Next, an SiO2 insulating film 110 is formed on the entire surface by plasma CVD (insulating film forming step).

[0072] After the SiO2 insulating film 110 is formed, an opening 110f having an opening width of 3 μm is formed in the SiO2 insulating film 110 on the top surface of the striped ridge structure 170 using photolithography and dry etching (opening forming step).

[0073] A front surface electrode 111 is formed on the SiO2 insulating film 110 including the opening 110f. After the front surface electrode 111 is formed, the back surface is polished, and a back surface electrode 112 is formed on the back surface side of the S-doped n-type InP substrate 101 (electrode formation process), thereby completing the device structure as a ridge-type semiconductor laser as shown in FIG.

[0074] In the semiconductor element 850, the n-type InP barrier layer 109 is inserted over the entire surface between the undoped AlGaInAs active layer 103 and the SiO2 insulating film 110, and the n-type InP barrier layer 109 can prevent hydrogen contained in the SiO2 insulating film 110 from diffusing into each semiconductor layer.

[0075] <Advantages of the Third Embodiment> According to the semiconductor device of the third embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, thereby achieving the effect of obtaining a semiconductor device that has a wide frequency band and can operate with high light emission efficiency.

[0076] Variation 1 of embodiment 3 9 is a cross-sectional view showing the configuration of a ridge-type semiconductor laser 900 to which the semiconductor device structure of Embodiment 3 is applied. The ridge-type semiconductor laser 900 has a device structure in which an opening 110g is formed in a portion of the SiO2 insulating film 110 and the n-type InP barrier layer 109 on the top surface of the ridge structure 170 of the semiconductor device 850, a front electrode 111 is provided on the SiO2 insulating film 110 including the opening 110g, and a back electrode 112 is provided on the back side of the n-type InP substrate 101.

[0077] In the ridge-type semiconductor laser 900, the n-type InP barrier layer 109 is inserted between the SiO2 insulating film 110 and a part of each of the undoped AlGaInAs active layer 103, the p-type InGaAs contact layer 108, and the Zn-doped p-type InP cladding layer 104a. Therefore, the n-type InP barrier layer 109 can prevent hydrogen contained in the SiO2 insulating film 110 from diffusing into each semiconductor layer.

[0078] Furthermore, in the ridge-type semiconductor laser 900, the n-type InP barrier layer 109 is removed between the surface electrode 111 and the p-type InGaAs contact layer 108, which also has the effect of reducing the contact resistance between the surface electrode 111 and the semiconductor layer.

[0079] <Effects of Modification 1 of Embodiment 3> In the semiconductor laser according to the first modification of the third embodiment, the n-type InP barrier layer 109 is provided directly below the SiO2 insulating film 110, and therefore the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, and furthermore, the contact resistance between the surface electrode 111 and the semiconductor layer can be reduced, thereby achieving the effect of obtaining a ridge-type semiconductor laser that has a wider frequency band and can operate with high light emission efficiency.

[0080] Variation 2 of embodiment 3 10 is a cross-sectional view showing the configuration of a buried semiconductor laser 950 to which the semiconductor element structure of embodiment 3 is applied. The buried semiconductor laser 950 has a configuration in which the mesa structure 150 of the buried semiconductor laser 550 according to embodiment 1 is further processed into a mesa-shaped structure 180.

[0081] The buried semiconductor laser 950 has an element structure in which an opening 110h is provided in the SiO2 insulating film 110 and the n-type InP barrier layer 109 on the top surface of the mesa-shaped structure 180, a front electrode 111 is provided on the SiO2 insulating film 110 including the opening 110h, and a back electrode 112 is provided on the back side.

[0082] In the buried semiconductor laser 950, an n-type InP barrier layer (first conductivity type second semiconductor layer) 109 is inserted between a portion of each of the semi-insulating InP buried layer 105, the n-type InP buried layer 106, the p-type InP second cladding layer 107, and the p-type InGaAs contact layer 108 and the SiO2 insulating film 110, so that the n-type InP barrier layer 109 can prevent hydrogen contained in the SiO2 insulating film 110 from diffusing into each semiconductor layer.

[0083] Furthermore, in the buried semiconductor laser 950, the n-type InP barrier layer 109 is removed between the surface electrode 111 and the p-type InGaAs contact layer 108, which also has the effect of reducing the contact resistance between the surface electrode 111 and the semiconductor layer.

[0084] <Effects of Modification 2 of Embodiment 3> According to the buried semiconductor laser of the second modification of the third embodiment, the n-type InP barrier layer 109 is provided directly under the SiO2 insulating film 110, and therefore the n-type InP barrier layer 109 prevents the diffusion of hydrogen contained in the SiO2 insulating film 110, and furthermore, the contact resistance between the surface electrode 111 and the semiconductor layer can be reduced, thereby achieving the effect of obtaining a buried semiconductor laser that has a wide frequency band and can operate with high light emission efficiency.

[0085] Embodiment 4 Fig. 11 is a cross-sectional view showing the configuration of a semiconductor device 1000 according to embodiment 4. Fig. 11 shows a buried semiconductor laser using an n-type InP substrate 101 and having an AlGaInAs active layer 103 as an example of the semiconductor device 1000 according to embodiment 1.

[0086] <Configuration of Semiconductor Element According to Fourth Embodiment> The semiconductor device 1000 includes a mesa structure 150 formed in a stripe shape on an S-doped n-type InP substrate 101 having a (100) plane, the mesa structure 150 being made up of laminated semiconductor layers, which are sequentially stacked on the substrate 101, an S-doped n-type InP cladding layer (first semiconductor layer of a first conductivity type) 102, an undoped AlGaInAs active layer 103 sandwiched between AlGaInAs optical confinement layers on the top and bottom, and a Zn-doped p-type InP first cladding layer (semiconductor layer of a second conductivity type) 104, and an Fe-doped semi-insulating InP buried layer 105 and an S-doped n-type InP buried layer 106 formed on both sides of the stripe-shaped mesa structure 150. The semiconductor layer is made up of a buried layer 106, a Zn-doped p-type InP second cladding layer (second conductivity type cladding layer) 107 formed so as to cover the top surface of the striped mesa structure 150 and the surface of the S-doped n-type InP buried layer 106, a Zn-doped p-type InGaAs contact layer (second conductivity type contact layer) 108, and an S-doped n-type InP barrier layer (first conductivity type second semiconductor layer) 109, and an SiO2 insulating film made up of two layers, an SiO2 first insulating film 115a and an SiO2 second insulating film 115b, formed on the S-doped n-type InP barrier layer 109.

[0087] Each layer that makes up semiconductor device 1000 will be described below. The doping concentration of the S-doped n-type InP substrate 101 is 5.0×10 18 cm -3 The thickness of the S-doped n-type InP cladding layer 102 is 1.0 μm, and the doping concentration is 1.0×10 18 cm -3 The undoped AlGaInAs active layer 103 has a thickness of 0.3 μm, the Zn-doped p-type InP first cladding layer 104 has a thickness of 0.3 μm, and the doping concentration is 1.0×10 18 cm -3 The height of the striped mesa structure 150 is 2.0 μm. Although an active layer made of undoped AlGaInAs has been given as an example of the active layer, any active layer made of a semiconductor layer containing Ga (gallium) and As (arsenic) may be used, and an n-type or p-type semiconductor layer other than undoped may also be used.

[0088] The thickness of the Fe-doped semi-insulating InP buried layer 105 is 1.8 μm, and the doping concentration is 5.0×10 16 cm -3 The thickness of the S-doped n-type InP buried layer 106 is 0.2 μm, and the doping concentration is 5.0×10 18 cm -3 is.

[0089] The Zn-doped p-type InP second cladding layer 107 has a thickness of 2.0 μm and a doping concentration of 1.0×10 18 cm -3 The Zn-doped p-type InGaAs contact layer 108 has a thickness of 0.3 μm and a doping concentration of 1.0×10 19 cm -3 The thickness of the S-doped n-type InP barrier layer 109 is 0.2 μm, and the doping concentration is 1.0×10 18 cm -3 is.

[0090] <Method of Manufacturing a Semiconductor Element According to Fourth Embodiment> The only difference between the manufacturing method of a semiconductor element according to embodiment 4 and the manufacturing method of a semiconductor element according to embodiment 1 is the process of forming an SiO2 insulating film consisting of two layers, an SiO2 first insulating film 115a and an SiO2 second insulating film 115b. Therefore, the formation of the SiO2 insulating film will be described below.

[0091] A first SiO2 insulating film 115a is formed on the entire surface of the S-doped n-type InP barrier layer 109 using a sputtering method, and a second SiO2 insulating film 115b is further formed on the first SiO2 insulating film 115a using a plasma CVD method (insulating film formation process), thereby completing the structure of the semiconductor element 1000 shown in Figure 11.

[0092] Since the SiO2 first insulating film 115a formed by sputtering is free of hydrogen, the influence of hydrogen diffusion from the SiO2 second insulating film 115b formed by plasma CVD into each semiconductor layer can be suppressed. Therefore, the thickness of the n-type InP barrier layer 109 on the semiconductor surface can be made thin. Note that Non-Patent Document 2 points out that if the n-type InP layer is thin, the effect of preventing hydrogen diffusion is small.

[0093] <Effects of the semiconductor device according to the fourth embodiment> According to the semiconductor device of the fourth embodiment, the SiO2 insulating film is composed of two layers, the SiO2 first insulating film 115a and the SiO2 second insulating film 115b, and therefore it is possible to reduce the thickness of the n-type InP barrier layer 109 directly below the SiO2 insulating film, thereby achieving the effect of obtaining a semiconductor device that has a wide frequency band and can operate with high light emission efficiency.

[0094] <Configuration of buried semiconductor laser according to the fourth embodiment> 12 is a cross-sectional view showing the configuration of a buried semiconductor laser 1100 to which the semiconductor device structure of Embodiment 4 is applied. The buried semiconductor laser 1100 has a device structure in which an opening 110i is formed in a portion of the SiO2 first insulating film 115a and the SiO2 second insulating film 115b and the n-type InP barrier layer 109 that faces the top surface of the mesa structure 150 of the semiconductor device 1000, a front electrode 111 is provided on the SiO2 second insulating film 115b including the opening 110i, and a back electrode 112 is provided on the back surface of the n-type InP substrate 101.

[0095] The opening 110i of the buried semiconductor laser 1100 is formed by first forming a 3 μm wide opening in the SiO2 first insulating film 115a and the SiO2 second insulating film 115b facing the top surface of the mesa structure 150 using photolithography and dry etching techniques, and then etching the n-type InP barrier layer 109 with a chemical solution that has etching selectivity for InGaAs.

[0096] Since the SiO2 first insulating film 115a formed by sputtering does not contain hydrogen, the influence of hydrogen diffusion from the SiO2 second insulating film 115b formed by plasma CVD into each semiconductor layer can be suppressed, and the thickness of the n-type InP barrier layer 109 on the semiconductor surface can be made thin.

[0097] <Effects of the buried semiconductor laser according to the fourth embodiment> According to the buried semiconductor laser of the fourth embodiment, the SiO2 insulating film is composed of two layers, the SiO2 first insulating film 115a and the SiO2 second insulating film 115b, so that it is possible to reduce the thickness of the n-type InP barrier layer 109 directly below the SiO2 insulating film, thereby achieving the effect of obtaining a buried semiconductor laser that has a wide frequency band and can operate with high light emission efficiency.

[0098] In the fourth embodiment, the SiO2 insulating film is described as being composed of two layers, the SiO2 first insulating film 115a and the SiO2 second insulating film 115b. However, such an SiO2 insulating film consisting of two layers may be applied to the semiconductor elements or semiconductor lasers according to the first to third embodiments.

[0099] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0100] Therefore, countless variations not illustrated are conceivable within the scope of the technology disclosed in the present specification, including, for example, cases where at least one component is modified, added, or omitted, and cases where at least one component is extracted and combined with components of another embodiment. [Explanation of symbols]

[0101] 101 n-type InP substrate, 102 n-type InP cladding layer, 103 undoped AlGaInAs active layer, 104 p-type InP first cladding layer, 104a p-type InP cladding layer, 105 semi-insulating InP buried layer, 106 n-type InP buried layer, 107 p-type InP second cladding layer, 108 p-type InGaAs contact layer, 109 n-type InP barrier layer, 109a n-type InP buried barrier layer, 110 SiO2 insulating film, 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110i opening, 115a SiO2 first insulating film, 115b SiO2 second insulating film, 150, 160 mesa structure, 170 ridge structure, 180 Mesa-shaped structure, 500, 600, 700, 750, 800, 850, 1000 Semiconductor element, 550, 650, 950, 1100 Buried type semiconductor laser, 900 Ridge type semiconductor laser

Claims

1. a semiconductor substrate; a mesa structure in which a laminated semiconductor layer including a first semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type is formed in a stripe shape on the semiconductor substrate; a buried layer buried in both side surfaces of the mesa structure; a second semiconductor layer of the first conductivity type formed on the buried layer; an insulating film formed in contact with the second semiconductor layer of the first conductivity type; A semiconductor element comprising:

2. 2. The semiconductor device according to claim 1, further comprising a second semiconductor layer of the first conductivity type formed on an upper surface of the mesa structure.

3. 3. The semiconductor device according to claim 2, wherein an opening is provided in the insulating film facing the top surface of the mesa structure, and the second semiconductor layer of the first conductivity type is exposed at the bottom of the opening.

4. 3. The semiconductor device according to claim 2, wherein an opening is provided in a portion of the insulating film and the second semiconductor layer of the first conductivity type that faces the top surface of the mesa structure.

5. 5. The semiconductor device according to claim 4, wherein the region including the mesa structure and the buried layer further has a mesa shape.

6. 5. The semiconductor element according to claim 1, further comprising a second conductivity type clad layer and a second conductivity type contact layer formed between the second conductivity type semiconductor layer and the first conductivity type second semiconductor layer.

7. a semiconductor substrate; a first semiconductor layer and an active layer of a first conductivity type sequentially formed on the semiconductor substrate, and a ridge structure in which at least a semiconductor layer of a second conductivity type formed on the active layer is formed in a stripe shape; a second semiconductor layer of the first conductivity type formed so as to cover the ridge structure; an insulating film formed in contact with the second semiconductor layer of the first conductivity type; A semiconductor element comprising:

8. 8. The semiconductor device according to claim 7, wherein an opening is provided in a portion of the insulating film on the upper surface side of the ridge structure.

9. 8. The semiconductor device according to claim 7, wherein an opening is provided in the insulating film and the second semiconductor layer of the first conductivity type on the upper surface side of the ridge structure.

10. 10. The semiconductor device according to claim 1, wherein the insulating film comprises a first insulating film and a second insulating film, and the first insulating film comprises a plasma CVD insulating film.

11. 10. The semiconductor device according to claim 1, wherein the semiconductor substrate, the first semiconductor layer of the first conductivity type, and the semiconductor layer of the second conductivity type are made of indium phosphide, and the active layer is made of a semiconductor layer containing gallium and arsenic.

12. 10. The semiconductor device according to claim 1, wherein the first conductivity type is n-type and the second conductivity type is p-type.

13. a first crystal growth step of forming a laminated semiconductor layer by sequentially growing a first semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type on a semiconductor substrate; a mesa structure forming step of processing the laminated semiconductor layer into a striped mesa structure; a second crystal growth step of growing burying layers on both side surfaces of the mesa structure; a third crystal growth step of growing a semiconductor layer including a second semiconductor layer of the first conductivity type on the buried layer; an insulating film forming step of forming an insulating film on the second semiconductor layer of the first conductivity type by a plasma CVD method; an opening forming step of forming an opening in a portion of the insulating film facing a top surface of the mesa structure; A method for manufacturing a semiconductor device, comprising:

14. 14. The method for manufacturing a semiconductor device according to claim 13, wherein the opening forming step forms the opening in a portion of the insulating film and the second semiconductor layer of the first conductivity type that faces a top surface of the mesa structure.

15. the insulating film is composed of two layers: a first insulating film in contact with the second semiconductor layer of the first conductivity type and a second insulating film on the first insulating film; 15. The method for manufacturing a semiconductor device according to claim 13, wherein in the insulating film forming step, the first insulating film is formed by a sputtering method, and the second insulating film is formed by a plasma CVD method.

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