Embedded type multilayer ceramic capacitor

Abstract

To provide an embedded type multilayer ceramic capacitor.SOLUTION: An embedded type multilayer ceramic capacitor includes a multilayer tile, a first terminal electrode, and a second terminal electrode. The multilayer tile includes a ceramic body, a first internal electrode, and a second internal electrode. The ceramic body includes an upper surface, a lower surface, and a first side surface and a second side surface that face each other, and the first side surface and the second side surface exist between the upper surface and the lower surface. The first internal electrode and the second internal electrode are engaged with each other alternately with a space therebetween in the ceramic body. The first internal electrode and the second internal electrode include a first part extending between the first side surface and the second side surface and separated from the first side surface, the second side surface, the upper surface, and the lower surface, and a second part extending from a part of a top surface of the first part to the upper surface of the ceramic body. The second part of the first internal electrode and the second part of the second internal electrode face each other. The first terminal electrode covers a top surface of the second part of the first internal electrode. The second terminal electrode covers a top surface of the second part of the second internal electrode.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to capacitor manufacturing techniques, and more particularly to embedded multilayer ceramic capacitors (MLCCs). [Background technology]

[0002] Multilayer ceramic capacitors are a type of ceramic capacitor, and their capacitance is primarily proportional to the surface area of ​​the product and the number of ceramic film layers. Multilayer ceramic capacitors can be directly bonded using surface mount technology (SMT), and they are also easy to fabricate into chips and have a small volume, making them the mainstream product in the capacitor industry today and used in a variety of electronic devices.

[0003] Embedded packaging technology integrates passive components, such as capacitors and resistors, into the multilayer structure of a circuit board or package carrier, reducing the area of ​​the passive components that appear on the surface of the circuit board or package carrier, leaving more surface space for the integrated circuit. This packaging technology can therefore improve the efficiency of using the circuit board or package carrier. Furthermore, by embedding a multilayer ceramic capacitor in a circuit board or package carrier, the multilayer ceramic capacitor can have low acoustic noise, better bending resistance, and a small equivalent series inductance (ESL).

[0004] Typically, when embedding a multilayer ceramic capacitor in a circuit board, a groove capable of accommodating the multilayer ceramic capacitor is first formed in the circuit board, and the multilayer ceramic capacitor is then mounted in the groove. Next, an insulating layer is applied to the circuit board and the multilayer ceramic capacitor, and via holes are formed in the insulating layer to expose the two terminal electrodes of the multilayer ceramic capacitor. After that, a conductive material is filled into the via holes to form vias, and wiring is formed on the circuit board and the vias, allowing the multilayer ceramic capacitor to be electrically connected to external elements through the vias and wiring. Summary of the Invention [Problem to be solved by the invention]

[0005] However, this embedding method involves steps such as installing an insulating layer, drilling holes in the insulating layer, and filling the via holes with conductive material, making the process too complicated. Furthermore, terminal electrodes are usually manufactured by first depositing molten metal on both end surfaces of a laminate tile to form a first metal layer, and then plating another metal layer that is favorable for welding. However, terminal electrodes formed using this manufacturing method have high surface roughness and poor thickness uniformity. When a multilayer ceramic capacitor is embedded in a circuit board, the high surface roughness and poor thickness uniformity of the terminal electrodes reduce the joint reliability between the terminal electrodes and the vias of the lines connecting the terminal electrodes to other components in the package structure, further affecting package yield.

[0006] An object of the present disclosure is to provide an embedded multilayer ceramic capacitor that can solve the problems that known multilayer ceramic capacitors face when applied to an embedded package structure. [Means for solving the problem]

[0007] According to the above-mentioned object of the present disclosure, an embedded multilayer ceramic capacitor including a laminate tile, a first terminal electrode, and a second terminal electrode is proposed. The laminate tile includes a ceramic body, a plurality of first internal electrodes, and a plurality of second internal electrodes. The ceramic body has an upper surface, a lower surface, and a first side surface and a second side surface facing each other, the first side surface and the second side surface being located between the upper surface and the lower surface. The plurality of first internal electrodes and the plurality of second internal electrodes are embedded in the ceramic body, alternately and physically spaced apart from each other. Each of the first internal electrodes and each of the second internal electrodes includes a first portion extending between the first side surface and the second side surface and spaced apart from the first side surface, the second side surface, the upper surface, and the lower surface, and a second portion extending from a part of the top surface of the first portion to the upper surface of the ceramic body and having a top surface exposed at the upper surface, where the second portion of the first internal electrode and the second portion of the second internal electrode face each other. The first terminal electrode extends to cover the top surface of the second portion of the first internal electrode. The second terminal electrode extends to cover the top surface of the second portion of the second internal electrode.

[0008] According to one embodiment of the present disclosure, the first and second internal electrodes are substantially perpendicular to the upper and lower surfaces.

[0009] According to one embodiment of the present disclosure, the shape of each of the first internal electrodes resembles an inverted L-shape, and the shape of each of the second internal electrodes resembles an L-shape.

[0010] According to an embodiment of the present disclosure, the first terminal electrode and the second terminal electrode both have an electrolytic copper plating structure.

[0011] According to an embodiment of the present disclosure, the first terminal electrode and the second terminal electrode each include an electroplated copper layer, an electroplated nickel layer, and an electroplated tin layer that are stacked in sequence.

[0012] According to one embodiment of the present disclosure, the first internal electrode, the second internal electrode, the portion of the ceramic body sandwiched between the first internal electrode and the second internal electrode, the first terminal electrode, and the second terminal electrode constitute a first capacitor unit, and the embedded multilayer ceramic capacitor further includes at least one second capacitor unit located within the multilayer tile.

[0013] According to one embodiment of the present disclosure, the architecture of the second capacitor units is the same as the architecture of the first capacitor units, and each second capacitor unit includes first and second internal electrodes that are the same in number as the first and second internal electrodes of the first capacitor units.

[0014] According to one embodiment of the present disclosure, the architecture of the second capacitor units is the same as the architecture of the first capacitor units, and each of the second capacitor units includes a plurality of first internal electrodes and a plurality of second internal electrodes that are different in number from the first internal electrodes and second internal electrodes of the first capacitor unit.

[0015] According to one embodiment of the present disclosure, the architecture of the second capacitor unit is the same as the architecture of the first capacitor unit, and the number of second capacitor units is multiple, each second capacitor unit includes multiple first internal electrodes and multiple second internal electrodes, and the number of first internal electrodes and second internal electrodes between the multiple second capacitor units is different.

[0016] According to one embodiment of the present disclosure, the architecture of the second capacitor unit is the same as the architecture of the first capacitor unit, and the number of second capacitor units is multiple, each second capacitor unit includes multiple first internal electrodes and multiple second internal electrodes, the multiple second capacitor units are divided into multiple groups, and the number of first internal electrodes and second internal electrodes between the second capacitor units in each group is the same. (Effects of the Invention)

[0017] As can be seen from the above embodiment, the second portions of the first and second internal electrodes of the embedded multilayer ceramic capacitor are protruding from the top surface of the first portion, and the top surfaces of the second portions are exposed on the upper surface of the ceramic body. Therefore, using an electroplating process, two terminal electrodes of required height and high quality can be grown in two opposing regions on the upper surface of the ceramic body based on the exposed portions of the first and second internal electrodes. In addition, the height of the embedded multilayer ceramic capacitor can be adjusted according to the thickness of the package carrier, allowing the terminal electrodes of the embedded multilayer ceramic capacitor to protrude from the top of the package carrier. Therefore, wiring connecting the embedded multilayer ceramic capacitor to the outside can be directly formed on the upper surface of the ceramic body and the surface of the package carrier. Therefore, the application of this embedded multilayer ceramic capacitor can significantly reduce the complexity of the packaging process and improve the yield of the packaging process. [Effects of the Invention]

[0018] Furthermore, since both terminal electrodes are located on the upper surface of the ceramic body, the anti-oxidation treatment of the terminal electrodes can be concentrated on the upper surface area of ​​the ceramic body, simplifying the anti-oxidation treatment and reducing the risk of oxidation of the terminal electrodes. [Brief explanation of the drawings]

[0019] Aspects of the present disclosure can be better understood from the following detailed description taken in conjunction with the drawings. It should be noted that, in accordance with standard industry practice, features are not drawn to scale. In fact, the dimensions of any feature may be arbitrarily increased or decreased for clarity of discussion. [Figure 1] 1 is a schematic perspective view of an embedded multilayer ceramic capacitor according to a first embodiment of the present disclosure. [Figure 2] 1 is a perspective schematic view of a laminate tile of an embedded multilayer ceramic capacitor according to a first embodiment of the present disclosure. [Figure 3]FIG. 4 is a schematic perspective view of an embedded multilayer ceramic capacitor according to a second embodiment of the present disclosure. [Figure 4] FIG. 10 is a perspective schematic view of a multilayer tile of an embedded multilayer ceramic capacitor according to a second embodiment of the present disclosure. [Figure 5] FIG. 10 is a schematic perspective view of an embedded multilayer ceramic capacitor according to a third embodiment of the present disclosure. [Figure 6] FIG. 10 is a perspective schematic view of a multilayer tile of an embedded multilayer ceramic capacitor according to a third embodiment of the present disclosure. [Figure 7] FIG. 10 is a schematic perspective view of an embedded multilayer ceramic capacitor according to a fourth embodiment of the present disclosure. [Figure 8A] ~ [Figure 9B] 8A and 9A are schematic perspective views, and FIGS. 8B and 9B are schematic cross-sectional views, showing a flow chart for packaging an embedded multilayer ceramic capacitor according to an embodiment of the present disclosure in a package carrier. DETAILED DESCRIPTION OF THE INVENTION

[0020] The following detailed description of the embodiments of the present disclosure will be given. However, as will be understood, the embodiments provide many applicable concepts that can be implemented in a variety of specific contexts. The discussed and disclosed embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although all embodiments of the present disclosure disclose multiple different features, these features may be implemented individually or in combination as needed.

[0021] Additionally, the terms "first," "second," etc., as used in this specification do not refer to a particular order or sequence, but are merely used to distinguish between elements or operations described with the same technical terminology.

[0022] The spatial relationship between two elements described in this disclosure applies not only to the orientation shown in the drawings but also to orientations not shown in the drawings, such as the opposite orientation. Furthermore, the term "connection," "electrical connection," or similar terms between two members described in this disclosure is not limited to direct connection or electrical connection between the two, but can also include indirect connection or electrical connection as needed.

[0023] Please refer to Figures 1 and 2, which respectively show a perspective schematic view of an embedded multilayer ceramic capacitor 100 according to a first embodiment of the present disclosure and a perspective schematic view of a laminate tile 200 of the embedded multilayer ceramic capacitor 100. The embedded multilayer ceramic capacitor 100 is applied to an embedded package structure. However, the embedded multilayer ceramic capacitor 100 can also be applied to other package structures, and the present disclosure is not limited thereto. The embedded multilayer ceramic capacitor 100 may mainly include a laminate tile 200, a first terminal electrode 300, and a second terminal electrode 400.

[0024] The shape of the laminate tile 200 can be designed according to product needs. For example, the laminate tile 200 may be a rectangular parallelepiped or a cube. The laminate tile 200 may mainly include a ceramic body 210, a plurality of first internal electrodes 220, and a plurality of second internal electrodes 230. When manufacturing the laminate tile 200, first, a plurality of ceramic green sheets, the first internal electrodes 220, and the second internal electrodes 230 are alternately stacked to form a laminate structure, and then this laminate structure can be sintered. The ceramic body 210 is formed after sintering these ceramic green sheets.

[0025] 1 , ceramic body 210 is a rectangular parallelepiped. Ceramic body 210 can have an upper surface 212 and a lower surface 214, and a first side surface 216 and a second side surface 218 opposite each other. First side surface 216 and second side surface 218 are both located between upper surface 212 and lower surface 214. In some embodiments, upper surface 212 and lower surface 214 are parallel to each other, and first side surface 216 and second side surface 218 are parallel to each other and substantially perpendicular to upper surface 212 and lower surface 214.

[0026] 2, the first internal electrode 220 and the second internal electrode 230 have a sheet-like structure. These first internal electrodes 220 and second internal electrodes 230 are embedded in the ceramic body 210 while being physically spaced apart from each other. These first internal electrodes 220 and second internal electrodes 230 are arranged alternately with each other.

[0027] Each first internal electrode 220 includes a first portion 222 and a second portion 224 joined to each other. The first portion 222 extends between the first side surface 216 and the second side surface 218 of the ceramic body 210. The first portion 222 is spaced apart from the first side surface 216, the second side surface 218, the top surface 212, and the bottom surface 214. That is, the first portion 222 is located entirely within the ceramic body 210 without being exposed. Specifically, the first portion 222 stands above the bottom surface 214 and is interposed between the bottom surface 214 and the top surface 212. The first portion 222 may have a square or rectangular sheet-like structure. The first portion 222 has a top surface 222a facing the top surface 212 of the ceramic body 210.

[0028] The second portion 224 of the first internal electrode 220 is bonded to the top surface 222a of the first portion 222 and extends from the top surface 222a to the upper surface 212 of the ceramic body 210. Therefore, the top surface 224a of the second portion 224 is exposed to the upper surface 212. The second portion 224 may have a square or rectangular sheet-like structure. Because the second portion 224 is shorter than the first portion 222, the second portion 224 is located only on a portion of the top surface 222a of the first portion 222. For example, as shown in FIG. 2, the second portion 224 may be located at one end of the top surface 222a of the first portion 222, so that the shape of the first internal electrode 220 resembles an inverted L-shape.

[0029] Similarly, each second internal electrode 230 includes a first portion 232 and a second portion 234 joined to each other. The first portion 232 extends between the first side surface 216 and the second side surface 218 of the ceramic body 210. The first portion 232 is spaced apart from the first side surface 216, the second side surface 218, the upper surface 212, and the lower surface 214. Thus, the first portion 232 is located entirely within the ceramic body 210 without being exposed. Specifically, the first portion 232 stands between the lower surface 214 and the upper surface 212. The first portion 232 may have a square or rectangular sheet-like structure. The first portion 232 has a top surface 232a facing the upper surface 212.

[0030] The second portion 234 of the second internal electrode 230 is bonded to the top surface 232a of the first portion 232 and extends from the top surface 232a to the upper surface 212 of the ceramic body 210. Therefore, the top surface 234a of the second portion 234 is exposed to the upper surface 212. The second portion 234 may have a square or rectangular sheet-like structure. The second portion 234 is shorter than the first portion 232 and is therefore located only on a portion of the top surface 232a of the first portion 232. The second portion 234 of the second internal electrode 230 and the second portion 224 of the first internal electrode 220 face each other. For example, the second portion 234 may be located at one end of the top surface 232a, so that the shape of the second internal electrode 230 resembles an L-shape.

[0031] In some embodiments, the first internal electrode 220 and the second internal electrode 230 have a mirror-symmetric structure, i.e., the second internal electrode 230 can completely overlap the first internal electrode 220 after being flipped 180 degrees. However, the first internal electrode 220 and the second internal electrode 230 may have an asymmetric structure, and the present disclosure is not limited thereto. In some embodiments, the first internal electrode 220 and the second internal electrode 230 are substantially perpendicular to the upper surface 212 and the lower surface 214. For example, the material of the first internal electrode 220 and the second internal electrode 230 may be copper, silver, or nickel.

[0032] The first terminal electrode 300 is located on the upper surface 212 of the ceramic body 210 and extends to cover the exposed top surfaces 224a of the second portions 224 of all of the first internal electrodes 220. The first terminal electrode 300 is located only on the upper surface 212 and does not extend to other surfaces of the ceramic body 210. The first terminal electrode 300 may have a single-layer structure. For example, the first terminal electrode 300 may have a single-layer electroplated copper structure. In some embodiments, the first terminal electrode 300 has a multi-layer stacked structure. For example, the first terminal electrode 300 may include an electroplated copper layer, an electroplated nickel layer, and an electroplated tin layer stacked in sequence on the upper surface 212, which facilitates the application of other packaging methods.

[0033] The second terminal electrode 400 is located on the upper surface 212 of the ceramic body 210 and extends to cover the exposed top surfaces 234a of the second portions 234 of all of the second internal electrodes 230. The second terminal electrode 400 is similarly located only on the upper surface 212 and does not extend to other surfaces of the ceramic body 210. The second terminal electrode 400 may have a single-layer structure or a multi-layer stacked structure. For example, the second terminal electrode 400 may be a single-layer electroplated copper structure, or the second terminal electrode 400 may include an electroplated copper layer, an electroplated nickel layer, and an electroplated tin layer stacked in sequence on the upper surface 212.

[0034] Because the top surface 224a of the second portion 224 of the first internal electrode 220 and the top surface 234a of the second portion 234 of the second internal electrode 230 are exposed on the upper surface 212 of the ceramic body 210, the first terminal electrode 300 and the second terminal electrode 400 can be grown, respectively, on two local regions of the upper surface 212 of the ceramic body 210 based on the exposed portions of the first internal electrode 220 and the second internal electrode 230 using electroplating. Because the first terminal electrode 300 and the second terminal electrode 400 are manufactured using electroplating, the first terminal electrode 300 and the second terminal electrode 400 have low surface roughness and uniform thickness.

[0035] Because the first terminal electrode 300 and the second terminal electrode 400 are both located on the upper surface 212 of the ceramic body 210, when the embedded multilayer ceramic capacitor 100 is packaged in a package carrier, it is possible to directly form lines connecting the first terminal electrode 300 and the second terminal electrode 400. This eliminates steps such as providing an insulating layer, drilling holes in the insulating layer, and filling the holes in the insulating layer with a conductive material, thereby reducing the complexity of the embedding process of the embedded multilayer ceramic capacitor 100 and further improving the packaging yield.

[0036] The embedded multilayer ceramic capacitor of the present disclosure can integrate multiple multilayer ceramic capacitor units into a multilayer tile according to the needs of various applications, and these multilayer ceramic capacitor units can have the same capacitance value or different capacitance values, or some of the multilayer ceramic capacitor units can have the same capacitance value and other multilayer ceramic capacitor units can have different capacitance values.

[0037] Please refer to Figures 3 and 4, which respectively show a perspective schematic view of an embedded multilayer ceramic capacitor 100a according to a second embodiment of the present disclosure and a transparent schematic view of a laminate tile 200a of the embedded multilayer ceramic capacitor 100a. In the embedded multilayer ceramic capacitor 100a, the laminate tile 200a includes a first capacitor unit CA1 and a plurality of second capacitor units CA2a. There may be only one second capacitor unit CA2a, and the present disclosure is not limited thereto.

[0038] Similar to the embedded multilayer ceramic capacitor 100, the first capacitor unit CA1 includes the first internal electrode 220, the second internal electrode 230 of the above embodiment, a portion of the ceramic body 210 sandwiched between the first internal electrode 220 and the second internal electrode 230, a first terminal electrode 300, and a second terminal electrode 400.

[0039] The architecture of each second capacitor unit CA2a is the same as that of the first capacitor unit CA1. That is, each second capacitor unit CA2a includes a plurality of first internal electrodes 220, a plurality of second internal electrodes 230, a ceramic body 210 sandwiched between the first internal electrodes 220 and the second internal electrodes 230, and two terminal electrodes, and the arrangement of the first internal electrodes 220 and the second internal electrodes 230 is the same as that of the first capacitor unit CA1. In this embodiment, the number of first internal electrodes 220 and second internal electrodes 230 in each second capacitor unit CA2a is the same as that of the first capacitor unit CA1. Therefore, each second capacitor unit CA2a includes the same first terminal electrodes 300 and second terminal electrodes 400 as those in the first capacitor unit CA1. Therefore, the capacitance value of each second capacitor unit CA2a can be substantially the same as that of the first capacitor unit CA1.

[0040] 5 and 6, which respectively show a schematic perspective view of an embedded multilayer ceramic capacitor 100b according to a third embodiment of the present disclosure and a schematic perspective view of a multilayer tile 200b of the embedded multilayer ceramic capacitor 100b. In the embedded multilayer ceramic capacitor 100b, the multilayer tile 200b includes a first capacitor unit CA1 and one second capacitor unit CA2b.

[0041] The architecture of the second capacitor unit CA2b is the same as that of the first capacitor unit CA1. That is, the second capacitor unit CA2b includes a plurality of first internal electrodes 220, a plurality of second internal electrodes 230, a ceramic body 210 sandwiched between the first internal electrodes 220 and the second internal electrodes 230, and two terminal electrodes, and the arrangement of the first internal electrodes 220 and the second internal electrodes 230 is the same as that of the first capacitor unit CA1. In this embodiment, the number of first internal electrodes 220 and second internal electrodes 230 in the second capacitor unit CA2b is different from the number of first internal electrodes 220 and second internal electrodes 230 in the first capacitor unit CA1. In the example shown in FIG. 4, the second capacitor unit CA2b has more first internal electrodes 220 and second internal electrodes 230 than the first capacitor unit CA1. The second capacitor unit CA2b has more first internal electrodes 220 and second internal electrodes 230, so that the first terminal electrode 500 and the second terminal electrode 600 of the second capacitor unit CA2b are larger than the first terminal electrode 300 and the second terminal electrode 400 of the first capacitor unit CA1, respectively. The capacitance value of the second capacitor unit CA2b is larger than the capacitance value of the first capacitor unit CA1.

[0042] Please refer to Figure 7, which shows a schematic perspective view of an embedded multilayer ceramic capacitor 100c according to a fourth embodiment of the present disclosure. In the embedded multilayer ceramic capacitor 100c, a laminate tile 200c includes a first capacitor unit CA1 and a plurality of second capacitor units CA2c and CA2d.

[0043] The architecture of each of the second capacitor units CA2c and CA2d is the same as the architecture of the first capacitor unit CA1. Referring also to Figure 2, like the first capacitor unit CA1, each of the second capacitor units CA2c and CA2d includes a plurality of first internal electrodes 220, a plurality of second internal electrodes 230, a ceramic body 210 sandwiched between the first internal electrodes 220 and the second internal electrodes 230, and two terminal electrodes, and the arrangement of the first internal electrodes 220 and the second internal electrodes 230 is the same as that of the first capacitor unit CA1.

[0044] The number of first internal electrodes 220 and second internal electrodes 230 in each second capacitor unit CA2c is different from the number of first internal electrodes 220 and second internal electrodes 230 in each second capacitor unit CA2d. Therefore, the dimensions of the first terminal electrodes 500a and second terminal electrodes 600a in each second capacitor unit CA2c are different from the dimensions of the first terminal electrodes 500b and second terminal electrodes 600b in each second capacitor unit CA2d.

[0045] In this embodiment, the second capacitor units CA2c and CA2d are divided into a group of four second capacitor units CA2c and a group of three second capacitor units CA2d. In the group of second capacitor units CA2c, the number of first internal electrodes 220 and the number of second internal electrodes 230 between the four second capacitor units CA2c are the same. In the group of second capacitor units CA2d, the number of first internal electrodes 220 and the number of second internal electrodes 230 between the three second capacitor units CA2d are the same. Therefore, the second capacitor units CA2c have substantially the same capacitance value, and the second capacitor units CA2d have substantially the same capacitance value.

[0046] The present disclosure is not limited to the above embodiment, and similarly to the above embodiment, multiple first capacitor units CA1 can be integrated with multiple other capacitor units, such as second capacitor units CA2b, CA2c, and CA2d, where the numbers of first internal electrodes 220 and second internal electrodes 230 among the second capacitor units CA2b, CA2c, and CA2d are different.

[0047] Please refer to FIGS. 8A to 9B, which show a flowchart of packaging an embedded multilayer ceramic capacitor 100 according to one embodiment of the present disclosure in a package carrier 700, where FIGS. 8A and 9A are perspective views and FIGS. 8B and 9B are cross-sectional views. The package carrier 700 may be, for example, a circuit board. The package carrier 700 has a groove 710. The shape of the groove 710 corresponds to the shape of the embedded multilayer ceramic capacitor 100, but the dimensions may be slightly larger than that of the embedded multilayer ceramic capacitor 100 to facilitate placement of the embedded multilayer ceramic capacitor 100. As shown in FIGS. 8A and 8B, when packaging, the embedded multilayer ceramic capacitor 100 is first placed in the groove 710, and then an adhesive layer 720 can be used to fix the embedded multilayer ceramic capacitor 100 in the groove 710.

[0048] 8B, the first terminal electrode 300 and the second terminal electrode 400 of the embedded multilayer ceramic capacitor 100 are higher than the upper surface 702 of the package carrier 700. In other embodiments, by adjusting the height of the embedded multilayer ceramic capacitor 100, the upper surfaces 302 of the first terminal electrode 300 and the second terminal electrode 400 can be made substantially flush with the upper surface 702 of the package carrier 700.

[0049] 9A and 9B, the lines 800 and 900 can be directly formed, for example, by printing or deposition. The line 800 covers the first terminal electrode 300 of the embedded multilayer ceramic capacitor 100 and is electrically connected to the first terminal electrode 300. The line 900 covers the second terminal electrode 400 of the embedded multilayer ceramic capacitor 100 and is electrically connected to the second terminal electrode 400. The lines 800 and 900 can electrically connect the embedded multilayer ceramic capacitor 100 to other elements. For example, two terminal electrodes of another capacitor can be attached to the lines 800 and 900, respectively, and the embedded multilayer ceramic capacitor 100 can be electrically connected to this capacitor through the lines 800 and 900. The material of the lines 800 and 900 can be copper.

[0050] The first terminal electrode 300 and the second terminal electrode 400 of the embedded multilayer ceramic capacitor 100 are both located on the upper side of the embedded multilayer ceramic capacitor 100, and by adjusting the height of the embedded multilayer ceramic capacitor 100, the first terminal electrode 300 and the second terminal electrode 400 of the embedded multilayer ceramic capacitor 100 can be made to protrude from the upper surface 702 of the package carrier 700. This makes it possible to omit the steps of providing an insulating layer, drilling holes in the insulating layer, and filling with a conductive material, thereby simplifying the packaging process and further improving the yield of the packaging process.

[0051] As can be seen from the above embodiment, the second portions of the first and second internal electrodes of the embedded multilayer ceramic capacitor of the present disclosure are protruding from the top surfaces of the first portions, and the top surfaces of the second portions are exposed on the upper surface of the ceramic body. Therefore, using an electroplating process, two terminal electrodes of required height and high quality can be grown in two opposing regions on the upper surface of the ceramic body based on the exposed portions of the first and second internal electrodes. Furthermore, the height of the embedded multilayer ceramic capacitor can be adjusted according to the thickness of the package carrier, allowing the terminal electrodes of the embedded multilayer ceramic capacitor to protrude from the top of the package carrier. Therefore, wiring connecting the embedded multilayer ceramic capacitor to the outside can be directly formed on the upper surface of the ceramic body and the surface of the package carrier. Therefore, application of this embedded multilayer ceramic capacitor can significantly reduce the complexity of the packaging process and improve the yield of the packaging process.

[0052] Furthermore, since both terminal electrodes are located on the upper surface of the ceramic body, the anti-oxidation treatment of the terminal electrodes can be concentrated on the upper surface area of ​​the ceramic body, simplifying the anti-oxidation treatment and reducing the risk of oxidation of the terminal electrodes.

[0053] The present disclosure has been disclosed in the examples as described above. The above The examples are not intended to limit the present disclosure, and any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure, so the scope of protection of the present disclosure should be limited by the scope of the patent application to be attached later. [Explanation of symbols]

[0054] 100: Embedded multilayer ceramic capacitor 100a: Embedded multilayer ceramic capacitor 100b: Embedded multilayer ceramic capacitor 100c: Embedded multilayer ceramic capacitor 200: Laminated tiles 200a: Laminated tile 200b: Laminated tiles 200c: laminated tile 210: Ceramic body 212:Top surface 214: Bottom surface 216:1st side 218:Second side 220: 1st internal electrode 222: Part 1 222a:Top surface 224:Second part 224a:Top surface 230:Second internal electrode 232: Part 1 232a:Top surface 234:Second part 234a:Top surface 300: 1st terminal electrode 302:Top surface 400: 2nd terminal electrode 402:Top surface 500: 1st terminal electrode 500a: First terminal electrode 500b: 1st terminal electrode 600: 2nd terminal electrode 600a: second terminal electrode 600b: 2nd terminal electrode 700: Package carrier 702:Top surface 710: Groove 720: Adhesive layer 800: Railway 900: Railway CA1: 1st capacitor unit CA2a: Second capacitor unit CA2b: Second capacitor unit CA2c: Second capacitor unit CA2d: Second capacitor unit

Claims

1. An embedded multilayer ceramic capacitor, a ceramic body having an upper surface, a lower surface, and a first side surface and a second side surface facing each other, the first side surface and the second side surface being located between the upper surface and the lower surface; a plurality of first internal electrodes and a plurality of second internal electrodes that are alternately and physically spaced apart from each other and are embedded in the ceramic body; a first portion extending between the first side and the second side and spaced apart from the first side, the second side, the top surface, and the bottom surface; a second portion extending from a part of a top surface of the first portion to the upper surface of the ceramic body and having a top surface exposed on the upper surface, wherein the second portions of the first internal electrodes and the second portions of the second internal electrodes face each other; a plurality of first internal electrodes and a plurality of second internal electrodes, a laminated tile including: a first terminal electrode extending to cover the top surfaces of the second portions of the first internal electrodes; a second terminal electrode extending to cover the top surfaces of the second portions of the second internal electrodes; An embedded multilayer ceramic capacitor comprising:

2. The embedded multilayer ceramic capacitor according to claim 1 , wherein the plurality of first internal electrodes and the plurality of second internal electrodes are substantially perpendicular to the upper surface and the lower surface.

3. 2. The embedded multilayer ceramic capacitor according to claim 1, wherein each of the plurality of first internal electrodes has a shape similar to an inverted L-shape, and each of the plurality of second internal electrodes has a shape similar to an L-shape.

4. 2. The embedded multilayer ceramic capacitor according to claim 1, wherein the first terminal electrode and the second terminal electrode are both electroplated copper electrodes.

5. 2. The embedded multilayer ceramic capacitor according to claim 1, wherein the first terminal electrode and the second terminal electrode each include an electroplated copper layer, an electroplated nickel layer, and an electroplated tin layer stacked in sequence.

6. 2. The embedded multilayer ceramic capacitor according to claim 1, wherein the plurality of first internal electrodes, the plurality of second internal electrodes, a portion of the ceramic body sandwiched between the plurality of first internal electrodes and the plurality of second internal electrodes, the first terminal electrode, and the second terminal electrode form a first capacitor unit, and the embedded multilayer ceramic capacitor further comprises at least one second capacitor unit located within the multilayer tile.

7. 7. The embedded multilayer ceramic capacitor of claim 6, wherein the architecture of the at least one second capacitor unit is the same as the architecture of the first capacitor unit, and each of the at least one second capacitor unit includes a plurality of first internal electrodes and a plurality of second internal electrodes that are the same in number as the plurality of first internal electrodes and the plurality of second internal electrodes of the first capacitor unit.

8. 7. The embedded multilayer ceramic capacitor of claim 6, wherein the architecture of the at least one second capacitor unit is the same as the architecture of the first capacitor unit, and each of the at least one second capacitor unit includes a plurality of first internal electrodes and a plurality of second internal electrodes that are different in number from the plurality of first internal electrodes and the plurality of second internal electrodes of the first capacitor unit.

9. 7. The embedded multilayer ceramic capacitor according to claim 6, wherein the architecture of the at least one second capacitor unit is the same as the architecture of the first capacitor unit, and the number of the at least one second capacitor unit is plural, each of the second capacitor units includes a plurality of first internal electrodes and a plurality of second internal electrodes, and the number of the first internal electrodes and the number of the second internal electrodes between the second capacitor units is different.

10. 7. The embedded multilayer ceramic capacitor according to claim 6, wherein the architecture of the at least one second capacitor unit is the same as the architecture of the first capacitor unit, and the number of the at least one second capacitor unit is plural, each of the second capacitor units includes a plurality of first internal electrodes and a plurality of second internal electrodes, the second capacitor units are divided into a plurality of groups, and the number of the first internal electrodes and the second internal electrodes between the second capacitor units in each of the groups is the same.

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