Light receiving element and method of manufacturing the same

Abstract

To provide a light receiving element and a method of manufacturing the same that can separate an element from the outside and reduce leakage current.SOLUTION: A light receiving element having a first region and a second region neighboring each other in a plane includes: a first semiconductor layer having a first conductivity type; a light receiving layer; and a second semiconductor layer having a second conductivity type. The second region is located outside the first region. The first semiconductor layer, the light receiving layer and the second semiconductor layer are stacked in this order in the first region and the second region. Ions have been injected into a portion of the second semiconductor layer that is included in the second region.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a light-receiving element and a method for manufacturing the same. [Background technology]

[0002] Photodetectors using III-V compound semiconductors have been developed (Patent Documents 1 to 4). Photodetectors have sensitivity in the near-infrared region, for example, and are used in communications, imaging devices, sensors, and the like. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-211155 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-101032 [Patent Document 3] Japanese Patent Application Laid-Open No. 2010-239166 [Patent Document 4] Japanese Patent Application Laid-Open No. 2006-295216 Summary of the Invention [Problem to be solved by the invention]

[0004] There is a need to isolate a photodetector from the outside. For example, in an array sensor in which multiple photodetectors are arranged one-dimensionally or two-dimensionally, crosstalk and other issues can be reduced by isolating the multiple photodetectors. Isolation is possible by making the photodetector mesa-shaped. However, leakage paths occur on the side surfaces of the mesa, increasing the leakage current. Therefore, the objective is to provide a photodetector that can be isolated from the outside and reduce the leakage current, and a method for manufacturing the same. [Means for solving the problem]

[0005] The light-receiving element according to the present disclosure is a light-receiving element having a first region and a second region adjacent to each other in a plane, and includes a first semiconductor layer having a first conductivity type, a light-receiving layer, and a second semiconductor layer having a second conductivity type, the second region being located outside the first region, the first semiconductor layer, the light-receiving layer, and the second semiconductor layer being stacked in that order in the first region and the second region, and ions being implanted into the portion of the second semiconductor layer that is included in the second region. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to provide a light-receiving element that can be isolated from the outside and that can reduce leakage current, and a method for manufacturing the same. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view illustrating the light-receiving element according to the first embodiment. [Figure 2] FIG. 2 is a schematic diagram illustrating the concentration of protons. [Figure 3] FIG. 3 is a schematic diagram illustrating the concentration of protons. [Figure 4] FIG. 4 is a schematic diagram illustrating the calculation results of the band structure of a light-receiving element. [Figure 5A] FIG. 5A is a cross-sectional view illustrating a method for manufacturing a light-receiving element. [Figure 5B] FIG. 5B is a cross-sectional view illustrating a method for manufacturing the light-receiving element. [Figure 6A] FIG. 6A is a cross-sectional view illustrating a method for manufacturing a light-receiving element. [Figure 6B] FIG. 6B is a cross-sectional view illustrating a method for manufacturing the light-receiving element. [Figure 7] FIG. 7 is a plan view illustrating the light receiving element according to the second embodiment. [Figure 8] FIG. 8 is a cross-sectional view illustrating an example of a light receiving element. [Figure 9] FIG. 9 is a cross-sectional view illustrating an example of a photodetector. [Figure 10]10A to 10C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 11] 11A to 11C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 12] 12A to 12C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 13] 13A to 13C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 14] 14A to 14C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 15] 15A to 15C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 16] 16A to 16C are cross-sectional views illustrating a method for manufacturing a light-receiving element. [Figure 17] FIG. 17 is a cross-sectional view illustrating a light-receiving element according to the third embodiment. [Figure 18] FIG. 18 is a schematic diagram illustrating the calculation results of the band structure of a light-receiving element. [Figure 19A] FIG. 19A is a cross-sectional view illustrating a method for manufacturing a light-receiving element. [Figure 19B] FIG. 19B is a cross-sectional view illustrating a method for manufacturing the light-receiving element. DETAILED DESCRIPTION OF THE INVENTION

[0008] [Description of the embodiments of the present disclosure] First, the contents of the embodiments of the present disclosure will be listed and described.

[0009] One aspect of the present disclosure provides: (1) a light-receiving element having a first region and a second region adjacent to each other in a plane, the light-receiving element comprising: a first semiconductor layer having a first conductivity type, a light-receiving layer, and a second semiconductor layer having a second conductivity type; the second region is located outside the first region; the first semiconductor layer, the light-receiving layer, and the second semiconductor layer are stacked in this order in the first and second regions; and ions are implanted into a portion of the second semiconductor layer included in the second region. The ion implantation compensates for carriers in a portion of the second semiconductor layer included in the second region. The second region can isolate the first region from the outside. Because the second region is located outside the first region, the pn junction of the first region is not exposed. This makes it difficult for a leak path to be formed, thereby reducing leakage current. (2) In the above (1), the device may have a plurality of the first regions arranged in a grid pattern, and the second region may be provided between two adjacent first regions. In an array-type element, the plurality of first regions can be separated, and leakage current can be reduced. (3) In the above (1) or (2), a third semiconductor layer having the first conductivity type may be provided between the second semiconductor layer and the absorption layer. In the first region, a pn junction is formed between the second semiconductor layer and the third semiconductor layer. Because the second region is located outside the first region, the pn junction in the first region is not exposed. Leak paths are less likely to be formed, and leakage current can be reduced. (4) In the above (3), a fourth semiconductor layer having the second conductivity type may be provided between the third semiconductor layer and the light-receiving layer, and the ions may be implanted into a portion of the fourth semiconductor layer included in the second region. Carriers are compensated in a portion of the fourth semiconductor layer included in the second region. The second region can isolate the first region from the outside. The pn junction of the first region is not exposed. Leak paths are unlikely to be formed, and leakage current can be reduced. The provision of the fourth semiconductor layer improves the sensitivity of the light-receiving element. (5) In the above (4), the carrier concentration of the second semiconductor layer may be higher than the carrier concentration of the fourth semiconductor layer, and the concentration of the ions implanted into the portion of the second semiconductor layer included in the second region may be higher than the concentration of the ions implanted into the portion of the fourth semiconductor layer included in the second region. By implanting the ions, carriers are compensated in the portion of the second semiconductor layer included in the second region. Carriers are compensated in the portion of the fourth semiconductor layer included in the second region. (6) In the above (4) or (5), the width of the portion of the second semiconductor layer into which the ions are implanted may be larger than the width of the portion of the fourth semiconductor layer into which the ions are implanted. This makes it difficult for a depletion layer to reach the second region. This reduces dark current. (7) In the above (3), a fifth semiconductor layer having a superlattice structure may be provided between the third semiconductor layer and the light-receiving layer. Ions may be implanted into the second semiconductor layer. Since the ion implantation process only requires one time, the process is simplified. The provision of the fifth semiconductor layer improves the sensitivity of the light-receiving element. (8) In any one of the above (1) to (7), the absorption layer has a multiple quantum well structure, and the concentration of the ions in the absorption layer in the second region is 1×10 17 cm -3 The multiple quantum well structure of the absorption layer is less likely to be destroyed. (9) A method for manufacturing a light-receiving element having a first region and a second region adjacent to each other in a plane, the method comprising the steps of: stacking a light-receiving layer and a second semiconductor layer having a second conductivity type in order on a first semiconductor layer having a first conductivity type in the first and second regions; and implanting ions into a portion of the second semiconductor layer that is included in the second region. The ion implantation compensates for carriers in the portion of the second semiconductor layer that is included in the second region. The second region can isolate the first region from the outside. Because the second region is located outside the first region, the pn junction of the first region is not exposed. Leak paths are less likely to be formed, and leakage current can be reduced.

[0010] [Details of the embodiments of the present disclosure] Specific examples of light-receiving elements and methods for manufacturing the same according to embodiments of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0011] First Embodiment FIG. 1 is a cross-sectional view illustrating a light receiving element 100 according to the first embodiment. The light receiving element 100 absorbs light and outputs an electrical signal. The light receiving element 100 is sensitive to, for example, near-infrared light having a wavelength of 0.8 μm to 2.5 μm. The light receiving element 100 is a top-illuminated element and detects light incident from above in FIG. 1. The light receiving element 100 does not have a mesa and is, for example, planar. The Z axis represents the direction in which the semiconductor layers of the light receiving element 100 are stacked. The XY plane is parallel to the major surfaces of the semiconductor layers. The X-axis direction, Y-axis direction, and Z-axis direction are mutually orthogonal.

[0012] As shown in Fig. 1, the light-receiving element 100 has a substrate 20, a buffer layer 22, a light-receiving layer 24, a semiconductor layer 26 (fourth semiconductor layer), a semiconductor layer 28 (third semiconductor layer), and a contact layer 30 (second semiconductor layer). The buffer layer 22, the light-receiving layer 24, the semiconductor layer 26, the semiconductor layer 28, and the contact layer 30 are stacked in this order on the substrate 20. The substrate 20 and the buffer layer 22 correspond to the first semiconductor layer. In the example of Fig. 1, the n-type corresponds to the first conductivity type. The p-type corresponds to the second conductivity type.

[0013] The light receiving element 100 has an area 10 (first area) and an area 12 (second area). In FIG. 1, the area 12 is indicated by crossed diagonal lines. In the XY plane, the area 10 is located at the center of the light receiving element 100. The planar shape of the area 10 is, for example, circular. In the XY plane, the area 12 is adjacent to the area 10, surrounds the area 10, and is located at the edge of the light receiving element 100. The area 10 is a part that functions as an element. The area 12 has the function of isolating the element from the outside.

[0014] An insulating film 32 is provided on the surface of the contact layer 30 opposite the light-receiving layer 24. The insulating film 32 covers the upper surface of the contact layer 30 and has an opening. An electrode 36 is provided in the opening of the insulating film 32 and is in contact with the upper surface of the contact layer 30. The electrode 36 is not provided in the center of the region 10 so that light is incident on the region 10. A portion of the electrode 36 is located above the region 10, and another portion is located above the region 12. An electrode 34 is provided on the lower surface of the substrate 20.

[0015] The substrate 20 is formed of, for example, n+ type indium phosphide ((n+)-InP). The thickness of the substrate 20 is, for example, 650 μm. The band gap energy of the substrate 20 is, for example, 1.35 eV. The substrate 20 is doped with, for example, sulfur (S). The carrier concentration of the substrate 20 is, for example, 2×10 18 cm -3 The buffer layer 22 is formed of, for example, n-type aluminum indium arsenide ((n-)-AlInAs). The thickness of the buffer layer 22 is, for example, 2000 nm. The band gap energy of the buffer layer 22 is, for example, 1.51 eV. The buffer layer 22 is doped with, for example, silicon (Si). The carrier concentration of the buffer layer 22 is lower than the carrier concentration of the substrate 20, for example, 2×10 15 cm -3 is.

[0016] The absorption layer 24 has a multi-quantum well (MQW) structure and includes multiple indium gallium arsenide (InGaAs) layers and multiple gallium arsenide antimonide (GaAsSb) layers. The InGaAs layers and GaAsSb layers are undoped semiconductor layers and are alternately stacked. The number of InGaAs layers and the number of GaAsSb layers are each, for example, 250. The thickness of the InGaAs layers and the GaAsSb layers is, for example, 5 nm.

[0017] The semiconductor layer 26 is formed of, for example, p-type indium gallium arsenide ((p-)-InGaAs). The thickness of the semiconductor layer 26 is, for example, 100 nm. The semiconductor layer 26 is doped with, for example, beryllium (Be). The carrier concentration is, for example, 2×10 16 cm -3 The semiconductor layer 28 is made of, for example, n-type InGaAs ((n-)-InGaAs). The thickness of the semiconductor layer 28 is, for example, 700 nm. The semiconductor layer 28 is undoped. The carrier concentration is, for example, 1×10 15 cm -3 The contact layer 30 is formed of, for example, p+-type InGaAs ((p+)-InGaAs). The thickness of the contact layer 30 is, for example, 200 nm. The contact layer 30 is doped with, for example, Be. The carrier concentration is, for example, 1×10 19 cm -3 The band gap energy of each of the semiconductor layer 26, the semiconductor layer 28, and the contact layer 30 is smaller than the band gap energy of the substrate 20, and is, for example, 0.75 eV. The semiconductor layers of the light-receiving element 100 may be formed of compound semiconductor layers other than those mentioned above.

[0018] The insulating film 32 is made of an insulator such as silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), etc. The electrodes 34 and 36 are made of metal.

[0019] No ions are implanted into region 10 of light-receiving element 100. The contact layer 30 and the portion of semiconductor layer 26 included in region 10 exhibit p-type conductivity. Opposite contact layer 30 of light-receiving layer 24, an n-type buffer layer 22 and substrate 20 are provided. A pin (positive-intrinsic-negative) junction is formed in region 10 in the Z-axis direction. Diameter D1 of region 10 is, for example, 500 μm or more, and may be 1000 μm or more. Diameter D1 of region 10 is the light-receiving diameter of light-receiving element 100. Because ions such as protons are implanted into region 12, a pin junction is unlikely to form.

[0020] Ions are implanted into the semiconductor layer 26, the semiconductor layer 28, and the contact layer 30 in the region 12. The implanted ions are, for example, hydrogen ions (protons, H + The width W1 of the portion of the contact layer 30 included in the region 12 is, for example, 50 μm. The width W2 of the portion of the semiconductor layer 28 and the semiconductor layer 26 included in the region 12 is smaller than the width W1 and is, for example, 40 μm.

[0021] 2 and 3 are schematic diagrams illustrating the concentration of protons. The vertical axis represents the depth from the surface of the insulating film 32. Depth 0 represents the position on the surface of the insulating film 32. The larger the depth value, the further downward in FIG. 1 it represents the position from the surface. The horizontal axis represents the concentration of implanted protons. The proton implantation depth differs between FIG. 2 and FIG. 3.

[0022] 2, the peak of the proton concentration is at a depth between 0.75 μm and 1.0 μm. The peak concentration is equal to or higher than the p-type carrier concentration in the contact layer 30, for example, 1×10 18 cm -3 That's it, 2 x 10 19 cm -3 The proton concentration decreases at a position deeper than the peak. The proton concentration at a depth of about 1.2 μm is approximately the same as the carrier concentration of the semiconductor layer 26, and is 1×10 16 cm -3 The order is:

[0023] Protons are not intentionally implanted into the light-receiving layer 24, buffer layer 22, and substrate 20 in region 12. The closer to the light-receiving layer 24 from the peak position, the lower the proton concentration. Depending on factors such as the proton implantation energy, protons may reach the light-receiving layer 24. The concentration of protons implanted into the light-receiving layer 24 is 1×10 17 cm -3 The proton concentration in the light-receiving layer 24 may be zero.

[0024] 3, the peak of the proton concentration is at a depth of about 0.5 μm. The peak concentration is approximately the same as the p-type carrier concentration of the contact layer 30, for example, 1×10 19 cm -3 That's it, 3 x 10 19 cm -3 The following is the result.

[0025] The p-type carriers of the contact layer 30 and the semiconductor layer 26 in the region 12 are compensated by protons. The p-type carrier concentration of the portion of the contact layer 30 included in the region 12 is lower than the p-type carrier concentration of the portion of the contact layer 30 included in the region 10. The p-type carrier concentration of the portion of the semiconductor layer 26 included in the region 12 is lower than the p-type carrier concentration of the portion of the semiconductor layer 26 included in the region 10. The portions of the contact layer 30 and the semiconductor layer 26 included in the region 12 may have n-type conductivity or may be highly resistive. The p-type or n-type carrier concentration of the contact layer 30 in the region 12 is 1×10 16 cm -3 The reason is as follows: Compared to region 10, it is difficult to form a pin junction in region 12.

[0026] When the photodetector 100 is in operation, a reverse bias voltage is applied to the photodetector 100. A positive voltage is input to the electrode 34, and a negative voltage is input to the electrode 36. Applying a reverse bias voltage causes a depletion layer to expand in the region 10. Light incident on the photodetector 100 from the top surface passes through the insulating film 32, contact layer 30, etc., and enters the light-receiving layer 24. The insulating film 32 also functions as an anti-reflection film, allowing light to pass through. The light-receiving layer 24 absorbs light and generates carriers (holes and electrons). The carriers drift due to the electric field applied to the depletion layer and are output as a photocurrent.

[0027] FIG. 4 is a schematic diagram illustrating the calculation results of the band structure of the light-receiving element 100, showing the band structure in region 10. The horizontal axis represents the position in the depth direction. The vertical axis represents energy. The lower line in FIG. 4 represents the energy Ev of the valence band. The upper line represents the energy Ec of the conduction band. A + symbol represents a hole. A - symbol represents an electron. FIG. 4 shows the calculation results when the temperature is 250 K and the applied voltage is -1 V. Electrons generated in the light-receiving layer 24 flow toward the substrate 20, and holes flow toward the contact layer 30. By providing a p-type semiconductor layer 26 between the light-receiving layer 24 and the semiconductor layer 28, the energy barrier between the light-receiving layer 24 and the semiconductor layer 28 in the valence band is lowered, making it easier for holes to flow. This improves the sensitivity of the light-receiving element 100.

[0028] As described above, region 10 functions as a light-detecting element. Since a pin junction is unlikely to form in region 12, it is unlikely to function as an element. Region 12 functions to isolate region 10 from the outside. In region 10, a pn junction is formed between contact layer 30 and semiconductor layer 28. A pn ​​junction is also formed between semiconductor layer 28 and semiconductor layer 26. A pn ​​junction is also formed between semiconductor layer 26 and light-receiving layer 24, but due to the presence of region 12, the pn junction does not reach both end faces of light-receiving element 100. Therefore, no leakage current occurs. If the pn junction is exposed, a leakage path is formed, which tends to increase the leakage current. As shown in Figure 1, region 12 is located outside region 10, so the pn junction is not exposed. A leakage path is unlikely to form, and the leakage current is reduced.

[0029] (Manufacturing method) 5A to 6B are cross-sectional views illustrating a method for manufacturing the light-receiving element 100. As shown in Fig. 5A, a substrate 20, a buffer layer 22, a light-receiving layer 24, a semiconductor layer 26, a semiconductor layer 28, and a contact layer 30 are epitaxially grown in this order by, for example, metal-organic chemical vapor deposition (MOCVD).

[0030] As shown in FIG. 5B, an insulating film 40 is formed on the upper surface of the contact layer 30 by, for example, plasma enhanced CVD (PECVD). The insulating film 40 is made of an insulator such as SiO2, SiN, or SiON. A photoresist 42 having a thickness of, for example, 1 μm is formed on the upper surface of the insulating film 40. The portion of the photoresist 42 above the region 12 is removed by photolithography. The region 12 is not covered by the photoresist 42. The width of the portion exposed from the photoresist 42 is W2. The region 10 is covered by the photoresist 42 and the insulating film 40.

[0031] Protons are implanted into the semiconductor layer 26 in the region 12. The proton implantation energy is, for example, 135 keV. The proton implantation dose is, for example, 1e14 / cm 2 Above, 3e14 / cm 2 2, protons are implanted deep into the semiconductor layer 26 to compensate for the p-type carriers. After the proton implantation, the insulating film 40 and the photoresist 42 are removed.

[0032] As shown in FIG. 6A, an insulating film 46 is formed on the upper surface of the contact layer 30. A photoresist 48 is formed on the upper surface of the insulating film 46. Photolithography is performed to remove the portion of the photoresist 48 above the region 12. The width of the portion exposed from the photoresist 48 is W1. The region 10 is covered with the photoresist 48 and the insulating film 46.

[0033] Protons are implanted into the contact layer 30 in the region 12. In this process, protons are implanted three times in succession. Examples of the conditions for the three implantations are shown below. Proton implantation energy: 25 keV, proton dose: 1e14 / cm 2 Proton implantation energy: 40 keV, proton dose: 1e14 / cm 2 Proton implantation energy 55 keV, proton dose 1e14 / cm 2 The above three proton implantations may be performed in any order. This step implants protons into shallow positions, as in the example of Figure 3, and compensates for the p-type carriers in the contact layer 30. After the proton implantation, the insulating film 46 and the photoresist 48 are removed.

[0034] As shown in FIG. 6B, an insulating film 32 is formed on the upper surface of the contact layer 30 by a method such as PECVD. An opening is formed in the insulating film 32 by etching or the like. The portion of the contact layer 30 included in region 10 is exposed through the opening. An electrode 36 is formed in the opening by vacuum deposition and lift-off. The electrode 36 contacts the portion of the contact layer 30 included in region 10. An electrode 34 is formed on the lower surface of the substrate 20. The electrode 34 contacts the substrate 20. Through the above steps, the light-receiving element 100 is formed.

[0035] According to the first embodiment, the light-receiving element 100 has a region 10 and a region 12. The region 12 is located outside the region 10. No ions are implanted into the region 10. The region 10 has a pin junction and detects light. Ions such as protons are implanted into the region 12. The proton implantation compensates for p-type carriers in the contact layer 30 and the portion of the semiconductor layer 26 included in the region 12. The portion of the contact layer 30 and the portion of the semiconductor layer 26 included in the region 12 becomes, for example, n-type or highly resistive. The region 10 is surrounded by the region 12 and is isolated from the outside by the region 12.

[0036] In region 10, the p+ type contact layer 30 and the n- type semiconductor layer 28 form a pn junction. The n- type semiconductor layer 28 and the p- type semiconductor layer 26 form a pn junction. According to the first embodiment, as shown in FIG. 1, region 12 is located outside region 10, so the pn junction in region 10 is not exposed. This can reduce leakage current.

[0037] 5A, a buffer layer 22, a light-receiving layer 24, a semiconductor layer 26, a semiconductor layer 28, and a contact layer 30 are epitaxially grown in this order on a substrate 20. The substrate 20 may be a large-diameter wafer, for example, 4 inches or larger. A plurality of light-receiving elements 100 can be manufactured from the wafer at low cost.

[0038] A p-type semiconductor layer 26, an n-type semiconductor layer 28, and a p+ type contact layer 30 are stacked in this order on the light-receiving layer 24. This improves the sensitivity of the light-receiving element 100. As shown in FIG. 4, the provision of the semiconductor layer 26 between the light-receiving layer 24 and the semiconductor layer 28 lowers the energy barrier between the light-receiving layer 24 and the semiconductor layer 28. Holes can flow more easily from the light-receiving layer 24 to the contact layer 30, thereby improving the sensitivity. For example, light can be detected even when the magnitude of the reverse bias voltage is 1 V or less. The p-type carrier concentration of the semiconductor layer 26 in the region 10 is, for example, 5×10 15 cm -3 That's it, 5 x 10 16 cm -3 The dark current is reduced.

[0039] The p-type carrier concentration of the contact layer 30 is higher than the p-type carrier concentration of the semiconductor layer 26. The concentration of protons to be implanted into these layers is controlled according to the carrier concentration. The concentration of protons to be implanted into the contact layer 30 is higher than the concentration of protons to be implanted into the semiconductor layer 26. The p-type carriers in the contact layer 30 and the semiconductor layer 26 can be compensated for by the proton implantation.

[0040] If the concentration of protons implanted into the contact layer 30 is too high, the n-type carrier concentration in the proton-implanted portion of the contact layer 30 will be high. A pn ​​junction will be formed between the portion of the contact layer 30 included in region 10 and the portion of the contact layer 30 included in region 12. The pn junction will be exposed on the surface, forming a leak path. If the concentration of protons implanted into the contact layer 30 is too low, the contact layer 30 will also become p-type in region 12. A pn ​​junction will be formed between the contact layer 30 and the semiconductor layer 28. The pn junction will be exposed on the side, forming a leak path.

[0041] The concentration of protons implanted into the contact layer 30 is approximately the same as the p-type carrier concentration of the contact layer 30 before the proton implantation. The protons compensate for the p-type carriers, making it difficult for leak paths to form on the surface and side surfaces. The p-type carrier concentration of the contact layer 30 is, for example, 1×10 19 cm -3 In this case, the maximum concentration of protons to be implanted into the contact layer 30 is, for example, 1×10 19 cm -3 That's it, 3 x 10 19 cm -3 The following applies.

[0042] The concentration of protons injected into the semiconductor layer 26 is approximately the same as the p-type carrier concentration of the semiconductor layer 26. The concentration of protons at a position deeper than the semiconductor layer 26 is lower than the concentrations in the semiconductor layer 26 and the contact layer 30. If protons are injected into the absorption layer 24, the quantum well structure of the absorption layer 24 may be destroyed. The concentration of protons injected into the absorption layer 24 is 1×10 17 cm -3 Protons do not have to be injected into the absorption layer 24. When the concentration of protons injected into the absorption layer 24 is low, the quantum well structure is less likely to be destroyed.

[0043] As shown in Figures 5B and 6A, protons are injected from top to bottom in the figure. The proton injection depth can be changed by controlling the injection energy. The higher the injection energy, the greater the proton injection depth. Two injections can be performed with different injection energies. For example, protons are injected into the semiconductor layer 26 by using an injection energy of 135 keV. For example, protons are injected into the contact layer 30 by using an injection energy of 45 keV.

[0044] The width W1 of the portion of the contact layer 30 into which protons have been implanted is greater than the width W2 of the portion of the semiconductor layer 26 into which protons have been implanted. The width of region 10 is narrow at the same position as the contact layer 30 and wide at the same position as the semiconductor layer 26. A depletion layer is generated in region 10. The depletion layer spreads in both the Z-axis direction and within the XY plane. Because region 10 is wide at the same position as the semiconductor layer 26, the depletion layer is less likely to reach the portion of the semiconductor layer 26 into which protons have been implanted. Dark current can be reduced.

[0045] Second Embodiment FIG. 7 is a plan view illustrating a light receiving element 200 according to the second embodiment. FIG. 8 is a cross-sectional view illustrating the light receiving element 200, showing a cross section taken along line AA in FIG. 7. Description of the same configuration as in the first embodiment will be omitted. The light receiving element 200 is a light receiving element array, and functions as, for example, an image sensor. The light receiving element 200 is a back-illuminated element, and detects light incident from below in FIG. 8.

[0046] 7, the light receiving element 200 has a central portion 50 and an outer peripheral portion 52. In the XY plane, the central portion 50 is located at the center of the light receiving element 200. The outer peripheral portion 52 is located on the outer periphery of the light receiving element 200 and surrounds the central portion 50. A recess 54 is provided between the central portion 50 and the outer peripheral portion 52. The recess 54 surrounds the central portion 50.

[0047] A plurality of regions 10 are provided in a central portion 50 and arranged in a two-dimensional grid. The regions 10 are periodically arranged in the X-axis direction and the Y-axis direction. One region 10 corresponds to one pixel. The number of pixels is, for example, 320 x 256. A region 12 is provided in the central portion 50 and is located between two adjacent regions 10, separating the regions 10.

[0048] 8, the central portion 50 and the peripheral portion 52 protrude in the Z-axis direction beyond the recess 54. In the central portion 50 and the peripheral portion 52, the buffer layer 22, the light-receiving layer 24, the semiconductor layer 26, the semiconductor layer 28, and the contact layer 30 are stacked in this order on the substrate 20. The buffer layer 22, the light-receiving layer 24, the semiconductor layer 26, the semiconductor layer 28, and the contact layer 30 are not provided in the recess 54. The substrate 20 forms the bottom surface of the recess 54. No protons are implanted into the peripheral portion 52 or the recess 54.

[0049] The width W3 of the portion of the contact layer 30 included in the region 12 is, for example, 8 μm. The width W4 of the portion of the semiconductor layer 28 and the semiconductor layer 26 included in the region 12 is smaller than the width W3 and is, for example, 4 μm.

[0050] The width W5 of the outer peripheral portion 52 is, for example, 50 μm. The width W6 of the recess 54 is, for example, 20 μm. The distance D2 from the outermost of the multiple regions 12 to the side surface of the recess 54 is, for example, 30 μm. The pitch P of the regions 10 is equal to the distance from one region 12 to the adjacent region 12, and is, for example, 30 μm.

[0051] The insulating film 32 covers the top and side surfaces of the central portion 50, the bottom surface of the recess 54, and the side and top surfaces of the peripheral portion 52. The insulating film 32 has openings at positions overlapping with the multiple regions 10 in the central portion 50, and also has openings in the recess 54. An electrode 36 is provided in each of the multiple regions 10. A bump 38 is provided on the electrode 36. The electrode 36 and the bump 38 are electrically connected to the contact layer 30 in the region 10.

[0052] Wiring 37 is provided from the portion of insulating film 32 covering outer periphery 52 to the opening of insulating film 32 inside recess 54. Electrode 36 is in contact with substrate 20 at the opening of insulating film 32. Bump 38 is provided on the portion of electrode 36 above outer periphery 52. ​​Electrode 36 provided in recess 54 and electrode 36 provided on outer periphery 52 are connected by wiring 37. Electrode 36 on outer periphery 52 and bump 38 are electrically connected to substrate 20. Insulating film 33 is provided on the surface of substrate 20 opposite buffer layer 22.

[0053] The bumps 38 are made of a metal such as indium (In). The insulating films 32 and 33 are made of an insulator such as silicon oxide. The insulating film 33 is an anti-reflection (AR) film that transmits, for example, 90% or more of incident infrared light.

[0054] (Photodetector 210) 9 is a cross-sectional view illustrating a photodetector 210. The photodetector 210 has a photodetector 200 and an IC (integrated circuit) chip 201. The IC chip 201 is equipped with a readout circuit (Read out IC). A plurality of electrodes 56 are provided on one surface of the IC chip 201. The photodetector 200 is flip-chip bonded to the IC chip 201. The surface of the photodetector 200 on which the electrodes 36 are provided faces the surface of the IC chip 201 on which the electrodes 56 are provided. The plurality of electrodes 36 are connected to the electrodes 56 by bumps 38.

[0055] The light receiving element 200 absorbs light that passes through the insulating film 33 and outputs a photocurrent. The photocurrent is read by the IC chip 201.

[0056] (Manufacturing method) 10 to 16 are cross-sectional views illustrating a method for manufacturing the light-receiving element 200. As shown in Fig. 10, a substrate 20, a buffer layer 22, a light-receiving layer 24, a semiconductor layer 26, a semiconductor layer 28, and a contact layer 30 are epitaxially grown in this order by, for example, MOCVD.

[0057] As shown in FIG. 11 , an insulating film 60 is formed on the upper surface of the contact layer 30 by, for example, PECVD. The insulating film 60 is made of an insulator such as SiO2, SiN, or SiON. A photoresist 62 having a thickness of, for example, 1 μm is formed on the upper surface of the insulating film 60. A portion of the photoresist 62 above the region 12 is removed by photolithography. The region 10 is covered with the photoresist 62 and the insulating film 60.

[0058] Protons are implanted into the semiconductor layer 26 in the region 12. The proton implantation energy is, for example, 135 keV. The proton implantation dose is, for example, 1e14 / cm 2 Above, 3e14 / cm 2 2, protons are implanted deep into the semiconductor layer 26 to compensate for the p-type carriers. After the proton implantation, the insulating film 60 and the photoresist 62 are removed.

[0059] 12, an insulating film 64 is formed on the upper surface of the contact layer 30. A photoresist 66 is formed on the upper surface of the insulating film 64. Photolithography is performed to remove the portion of the photoresist 66 above the region 12. The region 10 is covered with the photoresist 66 and the insulating film 64.

[0060] Protons are implanted into the contact layer 30 in the region 12. Proton implantation is performed three times in succession, with different implantation energies and doses. As shown in the example of FIG. 3, protons are implanted at shallow positions, compensating for p-type carriers in the contact layer 30. After the proton implantation, the insulating film 64 and photoresist 66 are removed.

[0061] As shown in FIG. 13, a layer is formed on the upper surface of the contact layer 30 by a PECVD method or the like. An insulating film 67 is formed. A photoresist 68 is formed on the upper surface of the insulating film 67. An opening is formed in the photoresist 68 by photolithography. The insulating film 67 is exposed from the opening.

[0062] 14, the contact layer 30, the semiconductor layer 28, the semiconductor layer 26, the light-receiving layer 24, and the buffer layer 22 are etched in the portions not covered with the photoresist 68 to form the recess 54. The photoresist 68 and the insulating film 67 are then removed.

[0063] As shown in FIG. 15, an insulating film 32 is formed by a PECVD method or the like. An insulating film 33 is formed on the underside of the substrate 20. As shown in FIG. 16, openings are formed in the insulating film 32 on the contact layer 30 and inside the recess 54. An electrode 36 and wiring 37 are formed by vacuum deposition and lift-off. An electrode 36 is provided on the portion of the insulating film 32 that covers the outer periphery 52, and another electrode 36 is provided inside the recess 54. These electrodes are connected by wiring 37. A bump 38 is provided on the electrode 36. Through the above steps, a light-receiving element 200 is formed. The light-receiving element 200 is flip-chip bonded to an IC chip 201, thereby manufacturing a light-detecting device 210.

[0064] According to the second embodiment, the light receiving element 200 is a light receiving element array, and has a plurality of regions 10 and a region 12. The plurality of regions 10 are arranged in a grid pattern in the central portion 50. The regions 10 function as elements that detect light. The region 12 is provided between two adjacent regions 10, and is implanted with protons. The regions 12 separate the plurality of regions 10. The region 12 is located outside the regions 10, and the pn junction in the regions 10 is not exposed. This can reduce leakage current.

[0065] The regions 10 of the light receiving element 200 may be arranged in a two-dimensional grid or a one-dimensional grid. The number of regions 10 may be 320×256 or less, or may be 320×256 or more.

[0066] Third Embodiment 17 is a cross-sectional view illustrating a light-receiving element 300 according to the third embodiment. Description of the same configuration as in the first or second embodiment will be omitted.

[0067] Light receiving element 300 does not have p-type semiconductor layer 26, but has superlattice layer 27 (fifth semiconductor layer). Superlattice layer 27 is provided between light receiving layer 24 and semiconductor layer 28. Superlattice layer 27 includes a plurality of indium gallium arsenide layers (InGaAs layers) and a plurality of gallium arsenide antimonide layers (GaAsSb layers), and has a superlattice structure. The InGaAs layers and GaAsSb layers are undoped layers and are alternately stacked.

[0068] The light-receiving element 300 has a region 10 and a region 12. The region 12 is located outside the region 10 and surrounds the region 10. The width of the region 12 is, for example, 8 μm. Protons are implanted into the portion of the contact layer 30 included in the region 12. Protons are not intentionally implanted into the semiconductor layer 28 and the superlattice layer 27. That is, in the region 12, the p-type carrier concentration of the contact layer 30 is compensated by protons, and it is sufficient if the contact layer 30 becomes n-type or highly resistive, for example. No protons are implanted into the region 10. The semiconductor layer 28 is n-type in the regions 10 and 12. The superlattice layer 27 has a superlattice structure in the regions 10 and 12.

[0069] FIG. 18 is a schematic diagram illustrating the calculation results of the band structure of the light-receiving element 300, and shows the band structure in region 10. FIG. 18 shows the calculation results when the temperature is 250 K and the applied voltage is −1 V. By providing the superlattice layer 27 having a superlattice structure between the light-receiving layer 24 and the semiconductor layer 28, the energy barrier between the light-receiving layer 24 and the semiconductor layer 28 in the valence band is lowered. Holes become more easily able to flow. The sensitivity of the light-receiving element 300 is improved.

[0070] (Manufacturing method) 19A and 19B are cross-sectional views illustrating a method for manufacturing a light-receiving element 300. As shown in Fig. 19A, on the upper surface of a substrate 20, a buffer layer 22, a light-receiving layer 24, a superlattice layer 27, a semiconductor layer 28, and a contact layer 30 are epitaxially grown.

[0071] 19B, an insulating film 70 is formed on the upper surface of the contact layer 30. A photoresist 72 is formed on the upper surface of the insulating film 70. Photolithography is performed to remove the portion of the photoresist 72 above the region 12. The region 10 is covered with the photoresist 72 and the insulating film 70.

[0072] Protons are implanted into the contact layer 30 in the region 12. The proton implantation energy is, for example, 45 keV. The proton implantation dose is, for example, 1e14 / cm 2 Above, 3e14 / cm 2 As shown in the example of FIG. 3, protons are implanted at a shallow position to compensate for the p-type carriers in the contact layer 30. After the proton implantation, the insulating film 70 and the photoresist 72 are removed. Proton implantation only needs to be performed once, and a second implantation is not required.

[0073] An insulating film 32 is formed by PECVD or the like on the upper surface of the contact layer 30. An electrode 36 and an electrode 34 are formed by vacuum deposition and lift-off. Through the above steps, a light-receiving element 300 is formed.

[0074] According to the third embodiment, protons are not implanted into region 10. Region 10 functions as an element and detects light. Protons are implanted into region 12. The implantation of protons compensates for p-type carriers in the portion of contact layer 30 included in region 12. Region 10 is surrounded by region 12 and is isolated from the outside by region 12.

[0075] In region 10, the p+ type contact layer 30 and the n- type semiconductor layer 28 form a pn junction. Since region 12 is located outside region 10, the pn junction in region 10 is not exposed. This can reduce leakage current.

[0076] A superlattice layer 27, an n-type semiconductor layer 28, and a p+-type contact layer 30 are stacked in this order on the absorption layer 24. As shown in FIG. 18, the energy barrier between the absorption layer 24 and the semiconductor layer 28 is lowered. Holes can flow more easily from the absorption layer 24 to the contact layer 30, improving sensitivity. For example, light can be detected even when the reverse bias voltage is 1 V or less.

[0077] The process is simplified because it is only necessary to implant protons into the contact layer 30 in the region 12. No intentional proton implantation is performed into the semiconductor layer 28 and the superlattice layer 27. A depletion layer is unlikely to reach the proton-implanted portion. Dark current can be reduced.

[0078] In an array-type sensor such as the light-receiving element 200, a superlattice layer 27 having a superlattice structure may be provided between the light-receiving layer 24 and the semiconductor layer 28. A light-detecting device may be manufactured by mounting the array-type sensor having the superlattice layer 27 on an IC chip 201.

[0079] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present disclosure as described in the claims. [Explanation of symbols]

[0080] 10, 12 areas 20 Substrate 22 Buffer layer 24 Light-receiving layer 26, 28 Semiconductor layer 27 superlattice layer 30 Contact layer 32, 33, 40, 46, 60, 64, 67, 70 Insulating film 34, 36, 56 electrodes 37 Wiring 38 Bump 42, 48, 62, 66, 68, 72 Photoresist 50 central part 52 Outer periphery 54 Recess 100, 200, 300 light receiving element 201 IC chip 210 Photodetector

Claims

1. A light-receiving element having a first region and a second region adjacent to each other in a plane, a first semiconductor layer having a first conductivity type; a light-receiving layer; a second semiconductor layer having a second conductivity type; the second region is located outside the first region, In the first region and the second region, the first semiconductor layer, the absorption layer, and the second semiconductor layer are stacked in this order; The light-receiving element has ions implanted into a portion of the second semiconductor layer included in the second region.

2. a plurality of the first regions arranged in a grid pattern; The light-receiving element according to claim 1 , wherein the second region is provided between two of the first regions adjacent to each other.

3. 3. The light-receiving element according to claim 1, further comprising a third semiconductor layer having the first conductivity type, the third semiconductor layer being provided between the second semiconductor layer and the light-receiving layer.

4. a fourth semiconductor layer having the second conductivity type and provided between the third semiconductor layer and the absorption layer; The light-receiving element according to claim 3 , wherein the ions are implanted into a portion of the fourth semiconductor layer that is included in the second region.

5. the carrier concentration of the second semiconductor layer is higher than the carrier concentration of the fourth semiconductor layer; 5. The light-receiving element according to claim 4, wherein a concentration of the ions implanted into a portion of the second semiconductor layer included in the second region is higher than a concentration of the ions implanted into a portion of the fourth semiconductor layer included in the second region.

6. 5. The light-receiving element according to claim 4, wherein a width of the portion of the second semiconductor layer into which the ions are implanted is greater than a width of the portion of the fourth semiconductor layer into which the ions are implanted.

7. 4. The light-receiving element according to claim 3, further comprising a fifth semiconductor layer provided between the third semiconductor layer and the light-receiving layer and having a superlattice structure.

8. the absorption layer has a multiple quantum well structure, The concentration of the ions in the absorption layer in the second region is 1×10 １７ cm －３ 3. The light-receiving element according to claim 1, wherein:

9. A method for manufacturing a light-receiving element having a first region and a second region adjacent to each other in a plane, the method comprising: a step of sequentially stacking a light absorbing layer and a second semiconductor layer having a second conductivity type on a first semiconductor layer having a first conductivity type in the first region and the second region; and implanting ions into a portion of the second semiconductor layer that is included in the second region.

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