Encoding device, decoding device, and bitstream generator

Abstract

To provide an encoding device capable of contributing to one or more of the following: i.e. improvement of coding efficiency, improvement of image quality, reduction of processing volume, reduction of circuit size, improvement of processing speed, and appropriate selection of elements or operations, etc.SOLUTION: An encoding device 100 includes a processor a1 and a memory a2. The processor a1 is configured to: calculate the forecast absolute value of a coefficient based on the absolute value of the sum of the five surrounding coefficients of the coefficient in the current block; determine rice parameter value from multiple candidates; and repeat the encoding of the multiple flags and the encoding of the remainder for each of the multiple coefficients included in the current block until the number of coded flags reaches the CABAC coding limit.SELECTED DRAWING: Figure 40

Description

[Technical Field]

[0001] The present disclosure relates to video coding, such as systems, components, and methods for encoding and decoding moving images. [Background technology]

[0002] Video coding technology has progressed from H.261 and MPEG-1 to H.264 / AVC (Advanced Video Coding), MPEG-LA, H.265 / HEVC (High Efficiency Video Coding), and H.266 / VVC (Versatile Video Codec). With this progress, there is a constant need to provide improvements and optimizations in video coding technology to handle the ever-increasing amount of digital video data in various applications.

[0003] Non-Patent Document 1 relates to an example of a conventional standard related to the above-mentioned video coding technology. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] H.265(ISO / IEC 23008-2 HEVC) / HEVC(High Efficiency Video Coding) Summary of the Invention [Problem to be solved by the invention]

[0005] With regard to the above-mentioned encoding methods, it is desirable to propose new methods to improve encoding efficiency, improve image quality, reduce the amount of processing, reduce the circuit scale, or appropriately select elements or operations such as filters, block sizes, motion vectors, reference pictures or reference blocks.

[0006] The present disclosure provides a configuration or method that can contribute to one or more of, for example, improved coding efficiency, improved image quality, reduced processing amount, reduced circuit size, improved processing speed, and appropriate selection of elements or operations, etc. Note that the present disclosure may include a configuration or method that can contribute to benefits other than those described above. [Means for solving the problem]

[0007] For example, a coding device according to one aspect of the present disclosure includes a memory and a processor connected to the memory and configured to execute CABAC (Context-Based Adaptive Binary Arithmetic Coding). In predictive residual coding of a current block, the processor uses CABAC to code each of a plurality of flags indicating a numerical property of each of a plurality of coefficients, the plurality of coefficients being quantized coefficients generated by transforming and quantizing a difference between the current block and a predictive block. The plurality of flags include a first flag indicating whether the coefficient is zero, a second flag indicating whether the coefficient is odd or even, a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number), and a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold). a base level serving as a reference value for obtaining a remainder; a predicted absolute value of the coefficient based on the absolute value of the sum of five surrounding coefficients of the coefficient in the current block; a value of a Rice parameter determined from among a plurality of candidates based on the difference between the calculated predicted absolute value and the base level; encoding the remainder of the coefficient using the Rice parameter; the remainder is calculated using the absolute value of the coefficient and the base level; if the absolute value of the coefficient is greater than zero, encoding a fifth flag indicating whether the coefficient is positive or negative; and repeating the encoding of the plurality of flags and the encoding of the remainder for each of a plurality of coefficients included in the current block until the number of encoded flags reaches the limit of the number of CABAC encodings.

[0008] For example, an encoding device according to an aspect of the present disclosure includes a memory, and a CABAC (Context-Based Adaptive Binary Arithmetic) and a processor for executing CABAC Coding, wherein in predictive residual coding of a current block, the processor encodes, by CABAC, each of a plurality of flags indicating a numerical property of each of a plurality of coefficients, which are a plurality of quantized coefficients generated by performing transformation and quantization on a difference between the current block and a predictive block, the plurality of flags including a first flag indicating whether the coefficient is zero or not, a second flag indicating whether the coefficient is odd or even, a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number), and a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold), and determines a base level serving as a reference value for obtaining a remainder comprising a numerical value further required to express the absolute value of the coefficient, and performs a predictive residual coding of the coefficient based on an absolute value of a sum of five neighboring coefficients of the coefficient in the current block. a Rice parameter value is determined from among a plurality of candidates based on a difference between the calculated predicted absolute value and the base level, where the Rice parameter is set to zero if the difference is less than a first value, set to one if the difference is equal to or greater than the first value and less than a second value, and set to two if the difference is equal to or greater than the second value; and encoding a remainder of the coefficient using the Rice parameter, where the remainder is calculated using the absolute value of the coefficient and the base level, and where, if the absolute value of the coefficient is greater than zero, encoding a fifth flag indicating whether the coefficient is a positive value or a negative value, the five surrounding coefficients include a first surrounding coefficient located to the right of the coefficient, a second surrounding coefficient located to the right of the first surrounding coefficient, a third surrounding coefficient located immediately below the coefficient, a fourth surrounding coefficient located immediately below the third surrounding coefficient, and a fifth surrounding coefficient located to the right of the third surrounding coefficient.

[0009] For example, a coding device according to one aspect of the present disclosure includes a memory and a processor connected to the memory and configured to execute CABAC (Context-Based Adaptive Binary Arithmetic Coding). In predictive residual coding of a current block, the processor uses CABAC to code each of a plurality of flags indicating a numerical property of each of a plurality of coefficients, the plurality of coefficients being quantized coefficients generated by transforming and quantizing a difference between the current block and a predictive block. The plurality of flags include a first flag indicating whether the coefficient is zero, a second flag indicating whether the coefficient is odd or even, a third flag indicating whether an absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number), and a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold). and determining a base level as a reference value for obtaining a remainder consisting of numerical values ​​further required to express the absolute value of the coefficient when the absolute value of the coefficient cannot be expressed by the plurality of flags alone, the base level being a smaller value when the number of coded flags has reached the limit on the number of CABAC coding attempts than when the limit has not been reached, calculating a predicted absolute value of the coefficient based on the absolute value of the sum of five peripheral coefficients of the coefficient in the current block, determining a value of a Rice parameter from among a plurality of candidates based on the difference between the calculated predicted absolute value and the base level, and encoding the remainder of the coefficient using the Rice parameter.

[0010] Some implementations of embodiments in the present disclosure may improve coding efficiency, simplify the encoding / decoding process, increase the encoding / decoding process speed, or efficiently select appropriate components / operations used in encoding and decoding, such as appropriate filters, block sizes, motion vectors, reference pictures, reference blocks, etc.

[0011] Further advantages and benefits of certain aspects of the present disclosure will become apparent from the specification and drawings. While such advantages and / or benefits may be obtained by several embodiments and features described in the specification and drawings, not all of them necessarily need to be provided to obtain one or more advantages and / or benefits.

[0012] These general or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, a recording medium, or any combination thereof. [Effects of the Invention]

[0013] A configuration or method according to an aspect of the present disclosure may contribute to, for example, one or more of improved coding efficiency, improved image quality, reduced processing amount, reduced circuit size, improved processing speed, and appropriate selection of elements or operations, etc. Note that a configuration or method according to an aspect of the present disclosure may also contribute to benefits other than those described above. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a block diagram showing a functional configuration of an encoding device according to an embodiment. [Figure 2] FIG. 2 is a flowchart showing an example of the overall encoding process performed by the encoding device. [Figure 3] FIG. 3 is a conceptual diagram showing an example of block division. [Figure 4A] FIG. 4A is a conceptual diagram showing an example of the configuration of a slice. [Figure 4B] FIG. 4B is a conceptual diagram showing an example of the configuration of a tile. [Figure 5A] FIG. 5A is a table showing the transform basis functions corresponding to various transform types. [Figure 5B] FIG. 5B is a conceptual diagram showing an example of SVT (Spatially Varying Transform). [Figure 6A]FIG. 6A is a conceptual diagram showing an example of the shape of a filter used in an ALF (adaptive loop filter). [Figure 6B] FIG. 6B is a conceptual diagram showing another example of the shape of the filter used in ALF. [Figure 6C] FIG. 6C is a conceptual diagram showing another example of the shape of the filter used in ALF. [Figure 7] FIG. 7 is a block diagram showing an example of a detailed configuration of a loop filter unit that functions as a DBF (deblocking filter). [Figure 8] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having symmetric filter characteristics with respect to block boundaries. [Figure 9] FIG. 9 is a conceptual diagram for explaining block boundaries where deblocking filtering is performed. [Figure 10] FIG. 10 is a conceptual diagram showing an example of the Bs value. [Figure 11] FIG. 11 is a flowchart illustrating an example of processing performed by the prediction processing unit of the encoding device. [Figure 12] FIG. 12 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device. [Figure 13] FIG. 13 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device. [Figure 14] FIG. 14 is a conceptual diagram showing an example of 67 intra prediction modes in intra prediction according to the embodiment. [Figure 15] FIG. 15 is a flowchart showing an example of the flow of basic inter prediction processing. [Figure 16] FIG. 16 is a flowchart showing an example of motion vector derivation. [Figure 17] FIG. 17 is a flowchart showing another example of motion vector derivation. [Figure 18] FIG. 18 is a flowchart showing another example of motion vector derivation. [Figure 19]FIG. 19 is a flowchart showing an example of inter prediction in normal inter mode. [Figure 20] FIG. 20 is a flowchart showing an example of inter prediction in merge mode. [Figure 21] FIG. 21 is a conceptual diagram illustrating an example of a motion vector derivation process in merge mode. [Figure 22] FIG. 22 is a flowchart showing an example of FRUC (frame rate up conversion) processing. [Figure 23] FIG. 23 is a conceptual diagram for explaining an example of pattern matching (bilateral matching) between two blocks along a motion trajectory. [Figure 24] FIG. 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. [Figure 25A] FIG. 25A is a conceptual diagram illustrating an example of derivation of a motion vector for each sub-block based on motion vectors of a plurality of adjacent blocks. [Figure 25B] FIG. 25B is a conceptual diagram for explaining an example of derivation of a motion vector in sub-block units in the affine mode having three control points. [Figure 26A] FIG. 26A is a conceptual diagram for explaining the affine merge mode. [Figure 26B] FIG. 26B is a conceptual diagram for explaining an affine merge mode having two control points. [Figure 26C] FIG. 26C is a conceptual diagram for explaining an affine merge mode having three control points. [Figure 27] FIG. 27 is a flowchart showing an example of processing in the affine merge mode. [Figure 28A] FIG. 28A is a conceptual diagram illustrating an affine inter mode having two control points. [Figure 28B]FIG. 28B is a conceptual diagram for explaining an affine inter mode having three control points. [Figure 29] FIG. 29 is a flowchart showing an example of processing in the affine inter mode. [Figure 30A] FIG. 30A is a conceptual diagram illustrating an affine inter mode in which a current block has three control points and an adjacent block has two control points. [Figure 30B] FIG. 30B is a conceptual diagram for explaining the affine inter mode in which the current block has two control points and the adjacent block has three control points. [Figure 31A] FIG. 31A is a flowchart illustrating a merge mode including decoder motion vector refinement (DMVR). [Figure 31B] FIG. 31B is a conceptual diagram for explaining an example of the DMVR process. [Figure 32] FIG. 32 is a flowchart showing an example of generation of a predicted image. [Figure 33] FIG. 33 is a flowchart showing another example of generation of a predicted image. [Figure 34] FIG. 34 is a flowchart showing another example of generation of a predicted image. [Figure 35] FIG. 35 is a flowchart illustrating an example of a predictive image correction process using OBMC (overlapped block motion compensation) processing. [Figure 36] FIG. 36 is a conceptual diagram illustrating an example of the predicted image correction process using the OBMC process. [Figure 37] FIG. 37 is a conceptual diagram for explaining generation of predicted images of two triangles. [Figure 38] FIG. 38 is a conceptual diagram for explaining a model assuming uniform linear motion. [Figure 39]FIG. 39 is a conceptual diagram for explaining an example of a predicted image generating method using luminance correction processing by LIC (local illumination compensation) processing. [Figure 40] FIG. 40 is a block diagram showing an example of implementation of an encoding device. [Figure 41] FIG. 41 is a block diagram illustrating a functional configuration of a decoding device according to an embodiment. [Figure 42] FIG. 42 is a flowchart showing an example of the overall decoding process by the decoding device. [Figure 43] FIG. 43 is a flowchart illustrating an example of processing performed by the prediction processing unit of the decoding device. [Figure 44] FIG. 44 is a flowchart showing another example of the processing performed by the prediction processing unit of the decoding device. [Figure 45] FIG. 45 is a flowchart showing an example of inter prediction in normal inter mode in the decoding device. [Figure 46] FIG. 46 is a block diagram showing an example of implementation of a decoding device. [Figure 47] FIG. 47 is a diagram for explaining an overview of DQ (Dependent Quantization). [Figure 48] FIG. 48 is a diagram illustrating an example of state transition of the quantization unit. [Figure 49] FIG. 49 is a diagram illustrating an example of state transition of the quantization unit. [Figure 50] FIG. 50 is a diagram showing an example of binarization of remainder. [Figure 51] FIG. 51 is a diagram for explaining a method for determining the Rice parameter. [Figure 52] FIG. 52 is a diagram showing the code length (i.e., the number of bits) of a binary signal obtained by Golomb-Rice coding of remainder. [Figure 53] FIG. 53 is a flowchart showing the overall processing operation of the entropy encoding unit in the first example of the first aspect. [Figure 54]FIG. 54 is a flowchart showing an example of detailed processing operations in step S110 of FIG. [Figure 55] FIG. 55 is a flowchart showing an example of detailed processing operations in step S120 of FIG. [Figure 56] FIG. 56 is a flowchart showing an example of detailed processing operations in step S130 of FIG. [Figure 57] FIG. 57 is a diagram showing syntax related to entropy coding in a first example of the first aspect. [Figure 58] FIG. 58 shows a specific example of a sub-block containing 4×4 coefficients. [Figure 59] FIG. 59 is a diagram showing a specific example in which each coefficient included in the sub-block of FIG. 58 is expressed in flag format in the first example of the first mode. [Figure 60] FIG. 60 is a flowchart showing the overall processing operation of the entropy encoding unit in the second example of the first aspect. [Figure 61] FIG. 61 is a flowchart showing an example of detailed processing operations in step S210 of FIG. [Figure 62] FIG. 62 is a flowchart showing an example of detailed processing operations in step S220 of FIG. [Figure 63] FIG. 63 is a flowchart showing an example of detailed processing operations in step S230 of FIG. [Figure 64] FIG. 64 is a diagram showing syntax related to entropy coding in the second example of the first aspect. [Figure 65] FIG. 65 is a diagram showing a specific example in which each coefficient included in the sub-block of FIG. 58 is expressed in flag format in the second example of the first mode. [Figure 66] FIG. 66 is a flowchart showing the overall processing operation of the entropy encoding unit in the second mode. [Figure 67] FIG. 67 is a flowchart showing an example of detailed processing operations in step S330 of FIG. [Figure 68] FIG. 68 is a diagram showing syntax related to entropy coding in the second aspect. [Figure 69] FIG. 69 is a diagram showing a specific example in which each coefficient included in the sub-block of FIG. 58 is expressed in flag format in the second mode. [Figure 70] FIG. 70 is a flowchart showing the overall processing operation of the entropy encoding unit in the third aspect. [Figure 71] FIG. 71 is a flowchart showing an example of detailed processing operations in step S430 of FIG. [Figure 72] FIG. 72 is a flowchart showing the processing operation of the encoding device according to the second embodiment. [Figure 73] FIG. 73 is a flowchart showing the coding of the remaining part by the coding device according to the second embodiment. [Figure 74] FIG. 74 is a flowchart showing the processing operation of the decoding device according to the second embodiment. [Figure 75] FIG. 75 is a flowchart showing decoding of the flag and the remainder by the decoding device according to the second embodiment. [Figure 76] FIG. 76 is a block diagram showing the overall configuration of a content supply system that realizes a content distribution service. [Figure 77] FIG. 77 is a conceptual diagram showing an example of a coding structure for scalable coding. [Figure 78] FIG. 78 is a conceptual diagram showing an example of a coding structure for scalable coding. [Figure 79] FIG. 79 is a conceptual diagram showing an example of a display screen of a web page. [Figure 80] FIG. 80 is a conceptual diagram showing an example of a display screen of a web page. [Figure 81] FIG. 81 is a block diagram showing an example of a smartphone. [Figure 82] FIG. 82 is a block diagram showing an example of the configuration of a smartphone. DETAILED DESCRIPTION OF THE INVENTION

[0015] A coding device according to one embodiment of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit encodes the absolute value of each of a plurality of coefficients included in a constituent unit of a transformed and quantized image in a predetermined order, encodes a sign for each of the plurality of coefficients indicating whether the coefficient is positive or negative, and in encoding the absolute value, encodes a signal indicating parity, which is the least significant bit of the absolute value, determines whether to use a flag to encode a portion of the absolute value other than the least significant bit based on a first condition and a second condition, and if it is determined that the flag should be used, encodes the flag using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probability, wherein the first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of flags used in the constituent unit.

[0016] This allows the determination of whether to use a flag to be determined based not only on the first condition based on the magnitude of the absolute value of the coefficient, but also on the second condition for limiting the number of flags, thereby making it possible to appropriately limit the number of flags.

[0017] Note that when flags are used, the amount of code required for absolute values ​​of coefficients can be reduced. However, when flags are not used, the amount of code required for absolute values ​​of coefficients, specifically, the amount of code required for remainders representing absolute values ​​of coefficients, may increase. Furthermore, CABAC, which uses adaptive, variable symbol occurrence probabilities, may be applied to encoding flags, while bypass processing of CABAC, which uses fixed symbol occurrence probabilities, may be applied to encoding remainders. Here, CABAC, which uses variable symbol occurrence probabilities, tends to impose a greater processing load than bypass processing. Therefore, a coding device according to one embodiment of the present disclosure can appropriately limit the number of flags, thereby achieving both a reduction in the amount of code required for absolute values ​​and a reduction in the processing load required for encoding the absolute values.

[0018] Furthermore, in encoding the absolute value, the circuit counts the number of the encoded flags each time the flag is encoded, and if the first condition is satisfied but the second condition is not satisfied, determines that the flag will not be used to encode a portion of the absolute value other than the least significant bit, and the second condition may be that a count corresponding to the number of the counted flags is less than a limit number.

[0019] This allows for a more appropriate limit on the number of flags, since each time a flag is coded the number of coded flags is counted.

[0020] The first condition may be that the absolute value is not a first value, or that the absolute value is greater than or equal to a second value. For example, the first value may be 0 and the second value may be 3.

[0021] This makes it possible to appropriately limit the number of flags (e.g., gt1_flag) indicating whether or not the absolute value of a coefficient is 3 or greater for a coefficient whose absolute value is not 0. Alternatively, it is possible to appropriately limit the number of flags (e.g., gt2_flag) indicating whether or not the absolute value of a coefficient is 5 or greater for a coefficient whose absolute value is 3 or greater.

[0022] The flag may also be made up of a plurality of different types of flags.

[0023] This makes it possible to appropriately limit the number of each of a plurality of types of flags such as the above-mentioned gt1_flag and gt2_flag.

[0024] Furthermore, when the flag cannot be used in encoding the absolute value or when the absolute value cannot be expressed by at least one flag alone, the circuit may derive a remainder consisting of a numerical value for expressing the absolute value, and encode the derived remainder by a CABAC bypass process.

[0025] This allows the absolute values ​​of the coefficients to be appropriately coded as flags or as a data group consisting of at least one flag and a remainder.

[0026] Furthermore, the circuit may, in deriving the remainder, determine a base level that indicates a different value depending on whether a count number corresponding to the number of the flags coded for each coefficient preceding the coefficient corresponding to the remainder has reached a limit number, derive the remainder using the determined base level, and, in encoding the remainder, select a binarization method corresponding to the remainder from a plurality of different binarization methods based on the base level used in deriving the remainder, binarize the remainder according to the selected binarization method, and arithmetically code the binarized remainder. For example, the base level determined when the count number has reached the limit number may be smaller than the base level determined when the limit number has not been reached.

[0027] This allows the remainder for the absolute value of the coefficient to be appropriately derived using the base level. Furthermore, since the binarization method used for binarizing the remainder is selected based on the base level, the amount of code for the remainder can be appropriately reduced.

[0028] Furthermore, a decoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit decodes, for each of a plurality of coefficients included in a constituent unit of an encoded image, an absolute value of the coefficient in a predetermined order, and decodes, for each of the plurality of coefficients, a code indicating whether the coefficient is positive or negative. In the constituent unit, of N (N is an integer greater than or equal to 2) coefficients each having an absolute value that satisfies a predetermined condition regarding magnitude, a flag is used to encode the absolute values ​​of M (M is an integer less than N) coefficients, and the flag is not used to encode the absolute values ​​of the remaining (NM) coefficients. In decoding the absolute values, a signal indicating parity, which is the least significant bit of the absolute value, is decoded. If the flag is used to encode a portion other than the least significant bit of the absolute value, the circuit decodes the flag using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probabilities.

[0029] This makes it possible to appropriately decode the coded image constituent units even if the number of flags used to code the image constituent units is limited.

[0030] The predetermined condition may be that the absolute value of the coefficient is not a first value, or that the absolute value of the coefficient is greater than or equal to a second value. For example, the first value may be 0 and the second value may be 3.

[0031] This makes it possible to properly decode the constituent units of the coded image even if, for example, the number of flags (e.g., gt1_flag) indicating whether or not the absolute value is 3 or greater is limited for coefficients whose absolute value is not 0. Alternatively, even if, for example, the number of flags (e.g., gt2_flag) indicating whether or not the absolute value is 5 or greater is limited for coefficients whose absolute value is 3 or greater, it is possible to properly decode the constituent units of the coded image.

[0032] The flag may also be made up of a plurality of different types of flags.

[0033] This makes it possible to appropriately decode the constituent units of the coded image, even if the number of each of the multiple types of flags such as the above-mentioned gt1_flag and gt2_flag is limited.

[0034] Furthermore, in decoding the absolute value, if a remainder consisting of a numerical value for expressing the absolute value is encoded, the circuit may further decode the remainder by CABAC bypass processing.

[0035] This allows the components of the coded image to be properly decoded even if the absolute values ​​of the coefficients are coded as flags or as a data group consisting of at least one flag and a remainder.

[0036] Furthermore, in decoding the remainder, the circuit may determine a base level that indicates a different numerical value depending on whether a count number corresponding to the number of flags decoded for each coefficient preceding the coefficient corresponding to the remainder has reached a limited number, arithmetically decode the remainder into a binary signal, select a multi-value method corresponding to the binary signal from a plurality of different multi-value methods based on the determined base level, and multi-value the binary signal in accordance with the selected multi-value method. For example, the base level determined when the count number has reached the limited number may be smaller than the base level determined when the limited number has not been reached.

[0037] As a result, the multi-value conversion method used to convert the binary signal into multi-values ​​is selected based on the base level, so that the remainder can be decoded appropriately.

[0038] Alternatively, for example, an encoding device according to one aspect of the present disclosure includes a division unit, an intra prediction unit, an inter prediction unit, a loop filter unit, a transform unit, a quantization unit, and an entropy encoding unit.

[0039] The division unit divides a picture included in an image into a plurality of blocks. The intra prediction unit predicts a block included in the picture using the picture. The inter prediction unit predicts the block using a reference picture different from the picture. The loop filter unit applies a filter to an image reconstructed from a predicted image generated by prediction by the intra prediction unit or the inter prediction unit.

[0040] The transform unit transforms a prediction error between the predicted image and the block to generate transform coefficients of the block, the quantization unit quantizes the transform coefficients, and the entropy coding unit codes the quantized transform coefficients.

[0041] Furthermore, for example, the entropy coding unit encodes the absolute value of each of a plurality of coefficients included in a constituent unit of the transformed and quantized image in a predetermined order, encodes a sign for each of the plurality of coefficients indicating whether the coefficient is positive or negative, and in encoding the absolute value, encodes a signal indicating parity, which is the least significant bit of the absolute value, determines whether to use a flag for encoding a portion of the absolute value other than the least significant bit based on a first condition and a second condition, and if it is determined that the flag should be used, encodes the flag using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probability, the first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of flags used in the constituent unit.

[0042] Alternatively, for example, a decoding device according to one aspect of the present disclosure includes an entropy decoding unit, an inverse quantization unit, an inverse transform unit, an intra prediction unit, an inter prediction unit, and a loop filter unit.

[0043] The entropy decoding unit decodes quantized transform coefficients of blocks constituting a picture included in the coded image, the inverse quantization unit inversely quantizes the quantized transform coefficients, and the inverse transform unit inversely transforms the transform coefficients to obtain prediction errors for the blocks.

[0044] The intra prediction unit predicts the block using the picture, the inter prediction unit predicts the block using a reference picture different from the picture, and the loop filter unit applies a filter to an image reconstructed from a predicted image generated by prediction by the intra prediction unit or the inter prediction unit.

[0045] Furthermore, for example, the entropy decoding unit decodes the absolute value of each of a plurality of coefficients included in a constituent unit of the encoded image in a predetermined order, and decodes a code indicating whether the coefficient is positive or negative for each of the plurality of coefficients, and in the constituent unit, of N (N is an integer equal to or greater than 2) coefficients each having an absolute value that satisfies a predetermined condition regarding magnitude, a flag is used to encode the absolute value of each of M (M is an integer less than N) coefficients, and the flag is not used to encode the absolute value of each of the remaining (NM) coefficients, and in decoding the absolute value, a signal indicating parity, which is the least significant bit of the absolute value, is decoded, and if the flag is used to encode a portion other than the least significant bit of the absolute value, the flag is decoded using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probabilities.

[0046] Furthermore, these comprehensive or specific aspects may be realized as a system, an apparatus, a method, an integrated circuit, a computer program, or a non-transitory recording medium such as a computer-readable CD-ROM, or may be realized as any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0047] Hereinafter, embodiments will be described in detail with reference to the drawings. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, the arrangement and connection of the components, steps, and the relationship and order of the steps shown in the following embodiments are merely examples and are not intended to limit the scope of the claims.

[0048] Hereinafter, embodiments of an encoding device and a decoding device will be described. The embodiments are examples of encoding devices and decoding devices to which the processes and / or configurations described in each aspect of the present disclosure can be applied. The processes and / or configurations can also be implemented in encoding devices and decoding devices different from the embodiments. For example, with regard to the processes and / or configurations applied to the embodiments, any of the following may be implemented.

[0049] (1) Any of the multiple components of the encoding device or decoding device of the embodiments described in each aspect of the present disclosure may be replaced or combined with other components described in any of the aspects of the present disclosure.

[0050] (2) In the encoding device or decoding device of the embodiment, the functions or processes performed by some of the multiple components of the encoding device or decoding device may be changed in any way, such as by adding, replacing, or deleting a function or process. For example, any function or process may be replaced with or combined with another function or process described in any of the aspects of the present disclosure.

[0051] (3) In the method implemented by the encoding device or decoding device of the embodiment, some of the processes included in the method may be arbitrarily modified, such as by addition, replacement, deletion, etc. For example, any process in the method may be replaced with or combined with another process described in any of the aspects of the present disclosure.

[0052] (4) Some of the components constituting the encoding device or decoding device of the embodiment may be combined with components described in any of the aspects of the present disclosure, or may be combined with components having some of the functions described in any of the aspects of the present disclosure, or may be combined with components that perform some of the processing performed by the components described in any of the aspects of the present disclosure.

[0053] (5) A component having part of the functionality of the encoding device or decoding device of an embodiment, or a component that performs part of the processing of the encoding device or decoding device of an embodiment, may be combined or replaced with a component described in any of the aspects of the present disclosure, a component having part of the functionality described in any of the aspects of the present disclosure, or a component that performs part of the processing described in any of the aspects of the present disclosure.

[0054] (6) In the method implemented by the encoding device or decoding device of the embodiment, any of the multiple processes included in the method may be replaced or combined with the process described in any of the aspects of the present disclosure or any similar process.

[0055] (7) Some of the processes included in the method implemented by the encoding device or decoding device of the embodiment may be combined with the processes described in any of the aspects of the present disclosure.

[0056] (8) The implementation of the processes and / or configurations described in each aspect of the present disclosure is not limited to the encoding device or decoding device of the embodiments. For example, the processes and / or configurations may be implemented in a device used for a purpose other than the video encoding or video decoding disclosed in the embodiments.

[0057] [Encoding device] First, a coding device according to an embodiment will be described. Fig. 1 is a block diagram showing the functional configuration of a coding device 100 according to an embodiment. The coding device 100 is a video coding device that codes a video on a block-by-block basis.

[0058] As shown in FIG. 1, the encoding device 100 is a device that encodes an image on a block-by-block basis, and includes a division unit 102, a subtraction unit 104, a transformation unit 106, a quantization unit 108, an entropy encoding unit 110, an inverse quantization unit 112, an inverse transformation unit 114, an addition unit 116, a block memory 118, a loop filter unit 120, a frame memory 122, an intra prediction unit 124, an inter prediction unit 126, and a prediction control unit 128.

[0059] The encoding device 100 is realized by, for example, a general-purpose processor and memory. In this case, when a software program stored in the memory is executed by the processor, the processor functions as the division unit 102, the subtraction unit 104, the transformation unit 106, the quantization unit 108, the entropy coding unit 110, the inverse quantization unit 112, the inverse transformation unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128. Alternatively, the encoding device 100 may be realized as one or more dedicated electronic circuits corresponding to the division unit 102, the subtraction unit 104, the transformation unit 106, the quantization unit 108, the entropy coding unit 110, the inverse quantization unit 112, the inverse transformation unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0060] Below, the overall processing flow of the encoding device 100 will be explained, followed by an explanation of each component included in the encoding device 100.

[0061] [Overall encoding process flow] FIG. 2 is a flowchart showing an example of the overall encoding process performed by the encoding device 100.

[0062] First, the division unit 102 of the encoding device 100 divides each picture included in an input image, which is a moving image, into a plurality of fixed-size blocks (e.g., 128×128 pixels) (step Sa_1). Then, the division unit 102 selects a division pattern (also referred to as a block shape) for the fixed-size blocks (step Sa_2). That is, the division unit 102 further divides the fixed-size blocks into a plurality of blocks constituting the selected division pattern. Then, the encoding device 100 performs the processes of steps Sa_3 to Sa_9 on each of the plurality of blocks (i.e., the block to be encoded).

[0063] That is, the prediction processing unit consisting of all or part of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 generates a prediction signal (also called a prediction block) of the block to be coded (also called a current block) (step Sa_3).

[0064] Next, the subtraction unit 104 generates a difference between the current block to be coded and the predicted block as a prediction residual (also called a difference block) (step Sa_4).

[0065] Next, the transform unit 106 and the quantization unit 108 perform transform and quantization on the difference block to generate a plurality of quantized coefficients (step Sa_5). Note that a block made up of a plurality of quantized coefficients is also called a coefficient block.

[0066] Next, the entropy coding unit 110 performs coding (specifically, entropy coding) on ​​the coefficient block and prediction parameters related to generation of the prediction signal to generate a coded signal (step Sa_6). The coded signal is also called a coded bitstream, a compressed bitstream, or a stream.

[0067] Next, the inverse quantization unit 112 and the inverse transform unit 114 perform inverse quantization and inverse transform on the coefficient block to reconstruct a plurality of prediction residuals (that is, difference blocks) (step Sa_7).

[0068] Next, the adder 116 reconstructs the current block into a reconstructed image (also referred to as a reconstructed block or a decoded image block) by adding the predicted block to the restored differential block (step Sa_8). In this way, a reconstructed image is generated.

[0069] When this reconstructed image is generated, the loop filter unit 120 performs filtering on the reconstructed image as needed (step Sa_9).

[0070] Then, the encoding device 100 determines whether or not encoding of the entire picture is complete (step Sa_10), and if it determines that encoding is not complete (No in step Sa_10), repeats the processing from step Sa_2.

[0071] In the above example, the encoding device 100 selects one division pattern for fixed-size blocks and encodes each block according to that division pattern, but it may also encode each block according to each of a plurality of division patterns. In this case, the encoding device 100 may evaluate the cost for each of the plurality of division patterns and select, for example, the coded signal obtained by coding according to the division pattern with the smallest cost as the coded signal to be output.

[0072] As shown in the figure, the processes of steps Sa_1 to Sa_10 are performed sequentially by the encoding device 100. Alternatively, some of the processes may be performed in parallel, or the order of the processes may be changed.

[0073] [Divided part] The division unit 102 divides each picture included in the input video into multiple blocks and outputs each block to the subtraction unit 104. For example, the division unit 102 first divides the picture into blocks of a fixed size (e.g., 128x128). Other fixed block sizes may be adopted. These fixed-size blocks are sometimes called coding tree units (CTUs). The division unit 102 then divides each of the fixed-size blocks into blocks of a variable size (e.g., 64x64 or less) based on, for example, recursive quadtree and / or binary tree block division. That is, the division unit 102 selects a division pattern. These variable-size blocks are sometimes called coding units (CUs), prediction units (PUs), or transform units (TUs). Note that in various processing examples, CUs, PUs, and TUs do not need to be distinguished from one another, and some or all of the blocks in a picture may serve as the processing units of CUs, PUs, and TUs.

[0074] 3 is a conceptual diagram showing an example of block division in an embodiment, in which solid lines represent block boundaries based on quadtree block division, and dashed lines represent block boundaries based on binary tree block division.

[0075] Here, the block 10 is a square block of 128x128 pixels (128x128 block). This 128x128 block 10 is first divided into four square 64x64 blocks (quadtree block division).

[0076] The top-left 64x64 block is further divided vertically into two rectangular 32x64 blocks, and the left 32x64 block is further divided vertically into two rectangular 16x64 blocks (binary tree block division). As a result, the top-left 64x64 block is divided into two 16x64 blocks 11 and 12 and a 32x64 block 13.

[0077] The top right 64x64 block is divided horizontally into two rectangular 64x32 blocks 14 and 15 (binary tree block division).

[0078] The lower-left 64x64 block is divided into four square 32x32 blocks (quadtree block decomposition). Of the four 32x32 blocks, the upper-left and lower-right blocks are further divided. The upper-left 32x32 block is divided vertically into two rectangular 16x32 blocks, and the right 16x32 block is further divided horizontally into two 16x16 blocks (binary tree block decomposition). The lower-right 32x32 block is divided horizontally into two 32x16 blocks (binary tree block decomposition). As a result, the lower-left 64x64 block is divided into 16x32 block 16, two 16x16 blocks 17 and 18, two 32x32 blocks 19 and 20, and two 32x16 blocks 21 and 22.

[0079] The bottom right 64x64 block 23 is not split.

[0080] 3, block 10 is divided into 13 variable-sized blocks 11 to 23 based on recursive quad-tree and binary tree block division. This type of division is sometimes called QTBT (quad-tree plus binary tree) division.

[0081] 3, one block is divided into four or two blocks (quadtree or binary tree block division), but the division is not limited to this. For example, one block may be divided into three blocks (ternary tree block division). Division including such ternary tree block division is sometimes called MBT (multi type tree) division.

[0082] [Picture Composition Slice / Tile] In order to decode pictures in parallel, the pictures may be organized in slice units or tile units. Pictures organized in slice units or tile units may be organized by the division unit 102.

[0083] A slice is a basic coding unit that constitutes a picture. A picture is made up of, for example, one or more slices. A slice is made up of one or more consecutive coding tree units (CTUs).

[0084] FIG. 4A is a conceptual diagram illustrating an example of a slice configuration. For example, a picture includes 11 x 8 CTUs and is divided into four slices (slices 1-4). Slice 1 consists of 16 CTUs, slice 2 consists of 21 CTUs, slice 3 consists of 29 CTUs, and slice 4 consists of 22 CTUs. Each CTU in the picture belongs to one of the slices. The shape of a slice is determined by dividing the picture horizontally. Slice boundaries do not need to be at the edges of the screen and can be anywhere within the boundaries of CTUs within the screen. The processing order (encoding order or decoding order) of CTUs within a slice is, for example, raster scan order. Each slice also includes header information and coded data. The header information may describe slice characteristics such as the address of the CTU at the beginning of the slice and the slice type.

[0085] A tile is a rectangular unit that makes up a picture. Each tile may be assigned a number called a TileId in raster scan order.

[0086] FIG. 4B is a conceptual diagram illustrating an example of a tile configuration. For example, a picture includes 11×8 CTUs and is divided into four rectangular tiles (tiles 1-4). When tiles are used, the processing order of the CTUs is changed compared to when tiles are not used. When tiles are not used, multiple CTUs in a picture are processed in raster scan order. When tiles are used, at least one CTU in each of multiple tiles is processed in raster scan order. For example, as shown in FIG. 4B, the processing order of the multiple CTUs included in tile 1 is from the left end of the first row of tile 1 to the right end of the first row of tile 1, and then from the left end of the second row of tile 1 to the right end of the second row of tile 1.

[0087] It should be noted that one tile may include one or more slices, and one slice may include one or more tiles.

[0088] [Subtraction section] The subtraction unit 104 subtracts a prediction signal (a prediction sample input from a prediction control unit 128 described below) from the original signal (original sample) input from the division unit 102, for each block divided by the division unit 102. That is, the subtraction unit 104 calculates a prediction error (also referred to as a residual) of a block to be coded (hereinafter referred to as a current block). Then, the subtraction unit 104 outputs the calculated prediction error (residual) to the conversion unit 106.

[0089] The original signal is an input signal to the encoding device 100, and is a signal representing an image of each picture constituting a moving image (for example, a luminance (luma) signal and two color difference (chroma) signals). Hereinafter, the signal representing an image may also be referred to as a sample.

[0090] [Conversion section] The transform unit 106 transforms the spatial domain prediction errors into frequency domain transform coefficients and outputs the transform coefficients to the quantization unit 108. Specifically, the transform unit 106 performs, for example, a predetermined discrete cosine transform (DCT) or discrete sine transform (DST) on the spatial domain prediction errors. The predetermined DCT or DST may be determined in advance.

[0091] The transform unit 106 may adaptively select a transform type from among a plurality of transform types and transform the prediction errors into transform coefficients using a transform basis function corresponding to the selected transform type. Such a transform is sometimes called an explicit multiple core transform (EMT) or an adaptive multiple transform (AMT).

[0092] The multiple transform types include, for example, DCT-II, DCT-V, DCT-VIII, DST-I, and DST-VII. Fig. 5A is a table showing transform basis functions corresponding to example transform types. In Fig. 5A, N represents the number of input pixels. Selection of a transform type from among these multiple transform types may depend, for example, on the type of prediction (intra prediction or inter prediction) or the intra prediction mode.

[0093] Such information indicating whether EMT or AMT is applied (e.g., referred to as an EMT flag or an AMT flag) and information indicating the selected transformation type are usually signaled at the CU level, but the signaling of this information does not need to be limited to the CU level and may be at other levels (e.g., the bit sequence level, picture level, slice level, tile level, or CTU level).

[0094] Furthermore, the transform unit 106 may retransform the transform coefficients (transform results). Such retransformation may be referred to as an adaptive secondary transform (AST) or a non-separable secondary transform (NSST). For example, the transform unit 106 performs retransformation for each sub-block (e.g., 4x4 sub-block) included in a block of transform coefficients corresponding to intra-prediction errors. Information indicating whether to apply NSST and information regarding the transform matrix used for NSST are typically signaled at the CU level. Note that signaling of this information does not need to be limited to the CU level, and may also be at other levels (e.g., the sequence level, picture level, slice level, tile level, or CTU level).

[0095] Separable transformation and non-separable transformation may be applied to the transformation unit 106. Separable transformation is a method of separating the input into directions for the number of dimensions and performing transformation multiple times, and non-separable transformation is a method of treating two or more dimensions of a multi-dimensional input as one dimension and performing transformation all at once.

[0096] For example, an example of a non-separable transformation is when the input is a 4x4 block, it is treated as a single array with 16 elements, and a 16x16 transformation matrix is ​​used to perform transformation processing on that array.

[0097] Another example of a non-separable transformation is a transformation (hypercube givens transform) that treats a 4x4 input block as a single array with 16 elements and then performs multiple Givens rotations on the array.

[0098] In the transform performed by transform unit 106, the type of basis used for transforming into the frequency domain can be switched depending on the region within the CU. One example is SVT (Spatially Varying Transform). In SVT, as shown in FIG. 5B, a CU is divided into two equal parts horizontally or vertically, and only one of the regions is transformed into the frequency domain. The type of transform basis can be set for each region, and for example, DST7 and DCT8 are used. In this example, only one of the two regions within the CU is transformed and the other is not, but both regions may also be transformed. Furthermore, the division method can be more flexible, such as not only dividing into two equal parts, but also into four equal parts, or by separately encoding information indicating the division and signaling it in the same way as the CU division. SVT is also sometimes called SBT (Sub-block Transform).

[0099] [Quantization section] The quantization unit 108 quantizes the transform coefficients output from the transform unit 106. Specifically, the quantization unit 108 scans the transform coefficients of the current block in a predetermined scanning order and quantizes the transform coefficients based on quantization parameters (QP) corresponding to the scanned transform coefficients. The quantization unit 108 then outputs the quantized transform coefficients of the current block (hereinafter referred to as quantized coefficients) to the entropy coding unit 110 and the inverse quantization unit 112. The predetermined scanning order may be determined in advance.

[0100] The predetermined scanning order is an order for quantizing / dequantizing transform coefficients. For example, the predetermined scanning order may be defined as an ascending order of frequency (from low frequency to high frequency) or a descending order of frequency (from high frequency to low frequency).

[0101] The quantization parameter (QP) is a parameter that defines the quantization step (quantization width). For example, as the value of the quantization parameter increases, the quantization step also increases. In other words, as the value of the quantization parameter increases, the quantization error also increases.

[0102] In addition, a quantization matrix may be used for quantization. For example, several types of quantization matrices may be used corresponding to frequency transform sizes such as 4x4 and 8x8, prediction modes such as intra prediction and inter prediction, and pixel components such as luma and chroma. Note that quantization refers to digitizing values ​​sampled at predetermined intervals by associating them with predetermined levels, and in this technical field, it may be referred to using other expressions such as rounding, scaling, or the like, or rounding, rounding, or scaling may be adopted. The predetermined intervals and levels may be predetermined.

[0103] There are two methods for using a quantization matrix: one is to use a quantization matrix that is directly set on the encoding device side, and the other is to use a default quantization matrix (default matrix). By directly setting a quantization matrix on the encoding device side, it is possible to set a quantization matrix that corresponds to the characteristics of the image. However, this has the disadvantage that the amount of code increases due to the encoding of the quantization matrix.

[0104] On the other hand, there is also a method that does not use a quantization matrix and quantizes the coefficients of both high-frequency components and low-frequency components in the same way. Note that this method is equivalent to using a quantization matrix in which all coefficients have the same value (a flat matrix).

[0105] Quantization matrices may be specified, for example, in an SPS (Sequence Parameter Set) or a PPS (Picture Parameter Set). An SPS contains parameters used for a sequence, and a PPS contains parameters used for a picture. SPS and PPS are sometimes simply referred to as parameter sets.

[0106] [Entropy coding section] The entropy coding unit 110 generates a coded signal (coded bitstream) based on the quantized coefficients input from the quantization unit 108. Specifically, the entropy coding unit 110, for example, binarizes the quantized coefficients, arithmetically codes the binary signal, and outputs a compressed bitstream or sequence.

[0107] [Dequantization section] The inverse quantization unit 112 inverse quantizes the quantized coefficients input from the quantization unit 108. Specifically, the inverse quantization unit 112 inverse quantizes the quantized coefficients of the current block in a predetermined scanning order. The inverse quantization unit 112 then outputs the inverse quantized transform coefficients of the current block to the inverse transform unit 114. The predetermined scanning order may be determined in advance.

[0108] [Inverse conversion section] The inverse transform unit 114 restores prediction errors (residuals) by inverse transforming the transform coefficients input from the inverse quantization unit 112. Specifically, the inverse transform unit 114 restores prediction errors of the current block by performing an inverse transform on the transform coefficients corresponding to the transform performed by the transform unit 106. Then, the inverse transform unit 114 outputs the restored prediction errors to the adder unit 116.

[0109] Note that the restored prediction error usually loses information due to quantization, and therefore does not match the prediction error calculated by the subtraction unit 104. In other words, the restored prediction error usually contains a quantization error.

[0110] [Addition section] The adder 116 reconstructs a current block by adding the prediction error input from the inverse transformer 114 and the prediction sample input from the prediction control unit 128. The adder 116 then outputs the reconstructed block to the block memory 118 and the loop filter unit 120. The reconstructed block is sometimes called a local decoded block.

[0111] [Block Memory] The block memory 118 is a storage unit for storing, for example, blocks referenced in intra prediction and in a picture to be coded (referred to as a current picture). Specifically, the block memory 118 stores the reconstructed blocks output from the adder 116.

[0112] [Frame memory] The frame memory 122 is a storage unit for storing, for example, reference pictures used in inter prediction, and is sometimes called a frame buffer. Specifically, the frame memory 122 stores the reconstructed blocks filtered by the loop filter unit 120.

[0113] [Loop filter section] The loop filter unit 120 applies a loop filter to the block reconstructed by the adder 116 and outputs the filtered reconstructed block to the frame memory 122. The loop filter is a filter (in-loop filter) used within the encoding loop, and includes, for example, a deblocking filter (DF or DBF), a sample adaptive offset (SAO), and an adaptive loop filter (ALF).

[0114] ALF applies a least squares error filter to remove coding artifacts, for example, for each 2x2 sub-block in the current block, one filter selected from multiple filters based on local gradient direction and activity.

[0115] Specifically, first, sub-blocks (e.g., 2x2 sub-blocks) are classified into a plurality of classes (e.g., 15 or 25 classes). The sub-blocks are classified based on the gradient direction and activity. For example, a classification value C (e.g., C=5D+A) is calculated using a gradient direction value D (e.g., 0 to 2 or 0 to 4) and a gradient activity value A (e.g., 0 to 4). Then, the sub-blocks are classified into a plurality of classes based on the classification value C.

[0116] The gradient direction value D is derived by, for example, comparing gradients in multiple directions (e.g., horizontal, vertical, and two diagonal directions), and the gradient activity value A is derived by, for example, adding gradients in multiple directions and quantizing the sum.

[0117] Based on the result of such classification, a filter for the sub-block is determined from among a plurality of filters.

[0118] The filter shape used in ALF is, for example, a circularly symmetric shape. FIGS. 6A to 6C are diagrams showing several examples of filter shapes used in ALF. FIG. 6A shows a 5x5 diamond-shaped filter, FIG. 6B shows a 7x7 diamond-shaped filter, and FIG. 6C shows a 9x9 diamond-shaped filter. Information indicating the filter shape is usually signaled at the picture level. Note that signaling of the information indicating the filter shape does not need to be limited to the picture level, and may be at other levels (e.g., sequence level, slice level, tile level, CTU level, or CU level).

[0119] Whether to turn on or off ALF may be determined, for example, at the picture level or the CU level. For example, whether to apply ALF for luminance may be determined at the CU level, and whether to apply ALF for chrominance may be determined at the picture level. Information indicating whether ALF is on or off is usually signaled at the picture level or the CU level. Note that signaling of information indicating whether ALF is on or off does not need to be limited to the picture level or the CU level, and may be at another level (for example, the sequence level, the slice level, the tile level, or the CTU level).

[0120] The coefficient sets of multiple selectable filters (e.g., up to 15 or 25 filters) are typically signaled at the picture level, although the signaling of coefficient sets need not be limited to the picture level and may be at other levels (e.g., sequence level, slice level, tile level, CTU level, CU level, or sub-block level).

[0121] [Loop filter section > Deblocking filter] In the deblocking filter, the loop filter unit 120 applies a filter to the block boundaries of the reconstructed image to reduce distortion at those block boundaries.

[0122] FIG. 7 is a block diagram showing an example of a detailed configuration of the loop filter unit 120 that functions as a deblocking filter.

[0123] The loop filter unit 120 includes a boundary determination unit 1201 , a filter determination unit 1203 , a filter processing unit 1205 , a processing determination unit 1208 , a filter characteristics determination unit 1207 , and switches 1202 , 1204 and 1206 .

[0124] The boundary determination unit 1201 determines whether a pixel to be deblocking filtered (i.e., a target pixel) is located near a block boundary, and outputs the determination result to the switch 1202 and the processing determination unit 1208.

[0125] If the boundary determination unit 1201 determines that the target pixel is located near a block boundary, the switch 1202 outputs the image before filtering to the switch 1204. Conversely, if the boundary determination unit 1201 determines that the target pixel is not located near a block boundary, the switch 1202 outputs the image before filtering to the switch 1206.

[0126] The filter determination unit 1203 determines whether to perform deblocking filtering on the target pixel based on the pixel value of at least one surrounding pixel around the target pixel, and outputs the determination result to the switch 1204 and the processing determination unit 1208.

[0127] When the filter determination unit 1203 determines that deblocking filtering is to be performed on the target pixel, the switch 1204 outputs the pre-filtering image acquired via the switch 1202 to the filter processing unit 1205. Conversely, when the filter determination unit 1203 determines that deblocking filtering is not to be performed on the target pixel, the switch 1204 outputs the pre-filtering image acquired via the switch 1202 to the switch 1206.

[0128] When the filter processing unit 1205 acquires an unfiltered image via the switches 1202 and 1204, it performs deblocking filtering on the target pixel using the filter characteristics determined by the filter characteristics determination unit 1207. Then, the filter processing unit 1205 outputs the filtered pixel to the switch 1206.

[0129] The switch 1206 selectively outputs pixels that have not been subjected to deblocking filtering and pixels that have been subjected to deblocking filtering by the filter processing unit 1205 under the control of the processing determination unit 1208 .

[0130] The processing determination unit 1208 controls the switch 1206 based on the respective determination results of the boundary determination unit 1201 and the filter determination unit 1203. That is, when the boundary determination unit 1201 determines that the target pixel is located near a block boundary and the filter determination unit 1203 determines that the target pixel should be subjected to deblocking filtering, the processing determination unit 1208 causes the switch 1206 to output a pixel that has been subjected to deblocking filtering. In addition, in cases other than those described above, the processing determination unit 1208 causes the switch 1206 to output a pixel that has not been subjected to deblocking filtering. By repeatedly outputting pixels in this manner, a filtered image is output from the switch 1206.

[0131] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having symmetric filter characteristics with respect to block boundaries.

[0132] In deblocking filtering, for example, pixel values ​​and quantization parameters are used to select one of two deblocking filters with different characteristics, namely, a strong filter and a weak filter. In the strong filter, when pixels p0 to p2 and pixels q0 to q2 exist on either side of a block boundary as shown in Figure 8, the pixel values ​​of pixels q0 to q2 are changed to pixel values ​​q'0 to q'2 by performing the calculation shown in the following equation, for example:

[0133] q'0=(p1+2×p0+2×q0+2×q1+q2+4) / 8 q'1=(p0+q0+q1+q2+2) / 4 q'2=(p0+q0+q1+3×q2+2×q3+4) / 8

[0134] In the above equations, p0-p2 and q0-q2 are the pixel values ​​of pixels p0-p2 and q0-q2, respectively. q3 is the pixel value of pixel q3, which is adjacent to pixel q2 on the opposite side of the block boundary. The coefficients used in the deblocking filter process on the right side of each equation above are the filter coefficients.

[0135] Furthermore, in the deblocking filter process, clipping may be performed to prevent the pixel value after calculation from exceeding a threshold. In this clipping process, the pixel value after calculation using the above formula is clipped to "the pixel value to be calculated ±2 × the threshold" using a threshold determined from the quantization parameter. This prevents excessive smoothing.

[0136] Fig. 9 is a conceptual diagram for explaining block boundaries where deblocking filtering is performed, and Fig. 10 is a conceptual diagram showing an example of a Bs value.

[0137] The block boundary where deblocking filtering is performed is, for example, the boundary of a PU (Prediction Unit) or TU (Transform Unit) of an 8x8 pixel block as shown in Figure 9. Deblocking filtering can be performed in units of four rows or four columns. First, the Boundary Strength (Bs) value is determined for block P and block Q shown in Figure 9 as shown in Figure 10.

[0138] Whether or not to perform deblocking filter processing of different strengths on block boundaries belonging to the same image is determined according to the Bs value in FIG. 10. Deblocking filter processing on the color difference signal is performed when the Bs value is 2. Deblocking filter processing on the luminance signal is performed when the Bs value is 1 or greater and a predetermined condition is satisfied. The predetermined condition may be determined in advance. Note that the conditions for determining the Bs value are not limited to those shown in FIG. 10 and may be determined based on other parameters.

[0139] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] 11 is a flowchart showing an example of processing performed in the prediction processing unit of the encoding device 100. The prediction processing unit is made up of all or some of the components of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0140] The prediction processing unit generates a predicted image of the current block (step Sb_1). This predicted image is also called a predicted signal or a predicted block. The predicted signal may be, for example, an intra-prediction signal or an inter-prediction signal. Specifically, the prediction processing unit generates the predicted image of the current block using a reconstructed image already obtained by generating a predicted block, generating a difference block, generating a coefficient block, restoring the difference block, and generating a decoded image block.

[0141] The reconstructed image may be, for example, an image of a reference picture or an image of an encoded block in a current picture, which is a picture that includes the current block. The encoded block in the current picture may be, for example, a neighboring block of the current block.

[0142] FIG. 12 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device 100.

[0143] The prediction processing unit generates a predicted image using a first method (step Sc_1a), generates a predicted image using a second method (step Sc_1b), and generates a predicted image using a third method (step Sc_1c). The first method, the second method, and the third method are different methods for generating predicted images, and may be, for example, an inter-prediction method, an intra-prediction method, or another prediction method. These prediction methods may use the reconstructed image described above.

[0144] Next, the prediction processing unit selects one of the multiple predicted images generated in steps Sc_1a, Sc_1b, and Sc_1c (step Sc_2). This predicted image selection, i.e., the selection of a method or mode for obtaining a final predicted image, may be performed by calculating a cost for each generated predicted image and based on the calculated cost. Alternatively, the predicted image selection may be performed based on parameters used in the encoding process. The encoding device 100 may signal information for identifying the selected predicted image, method, or mode in an encoding signal (also referred to as an encoded bitstream). The information may be, for example, a flag. This allows the decoding device to generate a predicted image according to the method or mode selected by the encoding device 100 based on the information. Note that in the example shown in FIG. 12, the prediction processing unit generates predicted images using each method and then selects one of the predicted images. However, before generating the predicted images, the prediction processing unit may select a method or mode based on parameters used in the encoding process and generate predicted images according to the selected method or mode.

[0145] For example, the first and second methods may be intra prediction and inter prediction, respectively, and the prediction processing unit may select a final predicted image for the current block from predicted images generated according to these prediction methods.

[0146] FIG. 13 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device 100.

[0147] First, the prediction processing unit generates a predicted image by intra prediction (step Sd_1a), and generates a predicted image by inter prediction (step Sd_1b). Note that the predicted image generated by intra prediction is also called an intra predicted image, and the predicted image generated by inter prediction is also called an inter predicted image.

[0148] Next, the prediction processing unit evaluates each of the intra-predicted image and the inter-predicted image (step Sd_2). This evaluation may use a cost. That is, the prediction processing unit calculates a cost C of each of the intra-predicted image and the inter-predicted image. This cost C can be calculated using an RD optimization model formula, for example, C=D+λ×R. In this formula, D is the coding distortion of the predicted image, and is expressed, for example, by the sum of absolute differences between pixel values ​​of the current block and pixel values ​​of the predicted image. Furthermore, R is the generated code amount of the predicted image, and specifically, the code amount required for encoding motion information and the like for generating the predicted image. Furthermore, λ is, for example, Lagrange's undetermined multiplier.

[0149] Then, the prediction processing unit selects the predicted image with the smallest calculated cost C from the intra-predicted image and the inter-predicted image as the final predicted image of the current block (step Sd_3). That is, a prediction method or mode for generating a predicted image of the current block is selected.

[0150] [Intra prediction section] The intra prediction unit 124 generates a prediction signal (intra prediction signal) by performing intra prediction (also referred to as intra-picture prediction) of the current block with reference to blocks in the current picture stored in the block memory 118. Specifically, the intra prediction unit 124 generates the intra prediction signal by performing intra prediction with reference to samples (e.g., luminance values, chrominance values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 128.

[0151] For example, the intra prediction unit 124 performs intra prediction using one of a plurality of predetermined intra prediction modes. The plurality of intra prediction modes typically includes one or more non-directional prediction modes and a plurality of directional prediction modes. The plurality of predetermined modes may be predetermined.

[0152] The one or more non-directional prediction modes include, for example, a planar prediction mode and a DC prediction mode defined in the H.265 / HEVC standard.

[0153] The multiple directional prediction modes include, for example, the 33 prediction modes defined in the H.265 / HEVC standard. Note that the multiple directional prediction modes may also include 32 prediction modes in addition to the 33 directions (a total of 65 directional prediction modes). Figure 14 is a conceptual diagram showing all 67 intra prediction modes (two non-directional prediction modes and 65 directional prediction modes) that can be used in intra prediction. Solid arrows represent the 33 directions defined in the H.265 / HEVC standard, and dashed arrows represent the additional 32 directions (the two non-directional prediction modes are not shown in Figure 14).

[0154] In various processing examples, a luminance block may be referenced in intra prediction of a chrominance block. That is, the chrominance component of the current block may be predicted based on the luminance component of the current block. Such intra prediction may be referred to as CCLM (cross-component linear model) prediction. An intra prediction mode of the chrominance block that references such a luminance block (e.g., referred to as a CCLM mode) may be added as one of the intra prediction modes of the chrominance block.

[0155] The intra prediction unit 124 may correct pixel values ​​after intra prediction based on gradients of reference pixels in the horizontal / vertical directions. Intra prediction involving such correction is sometimes called PDPC (position dependent intra prediction combination). Information indicating whether PDPC is applied (e.g., called a PDPC flag) is usually signaled at the CU level. Note that signaling of this information does not need to be limited to the CU level, and may be at other levels (e.g., sequence level, picture level, slice level, tile level, or CTU level).

[0156] [Inter prediction section] The inter prediction unit 126 generates a prediction signal (inter prediction signal) by performing inter prediction (also referred to as inter prediction) on the current block with reference to a reference picture stored in the frame memory 122 that is different from the current picture. The inter prediction is performed in units of the current block or a current sub-block (e.g., a 4x4 block) within the current block. For example, the inter prediction unit 126 performs motion estimation for the current block or current sub-block within the reference picture to find a reference block or sub-block that best matches the current block or current sub-block. The inter prediction unit 126 then obtains motion information (e.g., a motion vector) that compensates for the movement or change from the reference block or sub-block to the current block or sub-block. The inter prediction unit 126 performs motion compensation (or motion prediction) based on the motion information to generate an inter prediction signal for the current block or sub-block. The inter prediction unit 126 outputs the generated inter prediction signal to the prediction control unit 128.

[0157] The motion information used for motion compensation may be signaled as an inter prediction signal in various forms, such as a motion vector, or as a difference between a motion vector and a motion vector predictor.

[0158] [Basic flow of inter prediction] FIG. 15 is a flowchart showing an example of the basic flow of inter prediction.

[0159] The inter prediction unit 126 first generates a predicted image (steps Se_1 to Se_3). Next, the subtraction unit 104 generates a difference between the current block and the predicted image as a prediction residual (step Se_4).

[0160] Here, in generating a predicted image, the inter prediction unit 126 determines a motion vector (MV) of the current block (steps Se_1 and Se_2) and performs motion compensation (step Se_3) to generate the predicted image. In determining an MV, the inter prediction unit 126 determines the MV by selecting a candidate motion vector (candidate MV) (step Se_1) and deriving the MV (step Se_2). The selection of a candidate MV is performed, for example, by selecting at least one candidate MV from a candidate MV list. In deriving an MV, the inter prediction unit 126 may further select at least one candidate MV from the at least one candidate MV and determine the selected at least one candidate MV as the MV of the current block. Alternatively, the inter prediction unit 126 may determine the MV of the current block by searching, for each of the selected at least one candidate MV, a region of a reference picture indicated by the candidate MV. Note that searching the region of this reference picture may be referred to as motion estimation.

[0161] In the above example, steps Se_1 to Se_3 are performed by the inter prediction unit 126, but the processing of step Se_1 or step Se_2, for example, may be performed by another component included in the encoding device 100.

[0162] [Motion vector derivation flow] FIG. 16 is a flowchart showing an example of motion vector derivation.

[0163] The inter prediction unit 126 derives the MV of the current block in a mode in which motion information (e.g., MV) is coded. In this case, for example, the motion information is coded as a prediction parameter and signaled. That is, the coded motion information is included in a coded signal (also called a coded bitstream).

[0164] Alternatively, the inter prediction unit 126 derives the MV in a mode in which motion information is not coded. In this case, motion information is not included in the coded signal.

[0165] Here, MV derivation modes may include normal inter mode, merge mode, FRUC mode, and affine mode, which will be described later. Among these modes, modes that encode motion information include normal inter mode, merge mode, and affine mode (specifically, affine inter mode and affine merge mode). Note that the motion information may include not only MV but also predicted motion vector selection information, which will be described later. Also, modes that do not encode motion information include FRUC mode. The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.

[0166] FIG. 17 is a flowchart showing another example of motion vector derivation.

[0167] The inter prediction unit 126 derives the MV of the current block in a differential MV encoding mode. In this case, for example, the differential MV is encoded as a prediction parameter and signaled. That is, the encoded differential MV is included in the encoded signal. This differential MV is the difference between the MV of the current block and its predicted MV.

[0168] Alternatively, the inter prediction unit 126 derives the MV in a mode in which the differential MV is not coded. In this case, the coded differential MV is not included in the coded signal.

[0169] As described above, MV derivation modes include normal inter, merge mode, FRUC mode, and affine mode, which will be described later. Among these modes, modes that encode differential MVs include normal inter mode and affine mode (specifically, affine inter mode). Modes that do not encode differential MVs include FRUC mode, merge mode, and affine mode (specifically, affine merge mode). The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.

[0170] [Motion vector derivation flow] 18 is a flowchart showing another example of motion vector derivation. MV derivation modes, i.e., inter prediction modes, include a plurality of modes, roughly divided into a mode in which a differential MV is coded and a mode in which a differential motion vector is not coded. Modes in which a differential MV is not coded include merge mode, FRUC mode, and affine mode (specifically, affine merge mode). Details of these modes will be described later, but simply put, merge mode is a mode in which the MV of the current block is derived by selecting a motion vector from a surrounding coded block, and FRUC mode is a mode in which the MV of the current block is derived by searching between coded regions. Furthermore, affine mode is a mode in which, assuming affine transformation, the motion vector of each of a plurality of sub-blocks constituting the current block is derived as the MV of the current block.

[0171] Specifically, as shown in the figure, when the inter prediction mode information indicates 0 (0 in Sf_1), the inter prediction unit 126 derives a motion vector using merge mode (Sf_2). Also, when the inter prediction mode information indicates 1 (1 in Sf_1), the inter prediction unit 126 derives a motion vector using FRUC mode (Sf_3). Also, when the inter prediction mode information indicates 2 (2 in Sf_1), the inter prediction unit 126 derives a motion vector using affine mode (specifically, affine merge mode) (Sf_4). Also, when the inter prediction mode information indicates 3 (3 in Sf_1), the inter prediction unit 126 derives a motion vector using a mode for encoding a differential MV (for example, normal inter mode) (Sf_5).

[0172] [MV Derivation > Normal Intermode] The normal inter mode is an inter prediction mode in which the MV of the current block is derived based on a block similar to the image of the current block from the region of the reference picture indicated by the candidate MV. In addition, in this normal inter mode, the differential MV is coded.

[0173] FIG. 19 is a flowchart showing an example of inter prediction in normal inter mode.

[0174] The inter prediction unit 126 first obtains multiple candidate MVs for the current block based on information such as MVs of multiple coded blocks temporally or spatially surrounding the current block (step Sg_1). That is, the inter prediction unit 126 creates a candidate MV list.

[0175] Next, the inter prediction unit 126 extracts N candidate MVs (N is an integer equal to or greater than 2) from the plurality of candidate MVs acquired in step Sg_1 as motion vector predictor candidates (also referred to as predicted MV candidates) according to a predetermined priority order (step Sg_2). Note that the priority order may be predetermined for each of the N candidate MVs.

[0176] Next, the inter prediction unit 126 selects one motion vector predictor candidate from the N motion vector predictor candidates as a motion vector predictor (also referred to as a predicted MV) of the current block (step Sg_3). At this time, the inter prediction unit 126 encodes motion vector predictor selection information for identifying the selected motion vector predictor into a stream. Note that the stream is the above-mentioned coded signal or coded bitstream.

[0177] Next, the inter prediction unit 126 derives the motion vector (MV) of the current block by referring to the coded reference picture (step Sg_4). At this time, the inter prediction unit 126 further encodes the difference between the derived motion vector and the predicted motion vector as a differential motion vector into a stream. Note that the coded reference picture is a picture made up of multiple blocks reconstructed after coding.

[0178] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Sg_5). Note that the predicted image is the above-mentioned inter prediction signal.

[0179] Furthermore, information indicating the inter prediction mode (normal inter mode in the above example) used to generate the predicted image, which is included in the coded signal, is coded as, for example, a prediction parameter.

[0180] The candidate MV list may be used in common with lists used in other modes. Furthermore, processing related to the candidate MV list may be applied to processing related to lists used in other modes. Examples of processing related to this candidate MV list include extracting or selecting candidate MVs from the candidate MV list, sorting the candidate MVs, or deleting candidate MVs.

[0181] [MV Derivation > Merge Mode] Merge mode is an inter prediction mode in which a candidate MV is derived from a candidate MV list as the MV for the current block.

[0182] FIG. 20 is a flowchart showing an example of inter prediction in merge mode.

[0183] The inter prediction unit 126 first obtains multiple candidate MVs for the current block based on information such as MVs of multiple coded blocks temporally or spatially surrounding the current block (step Sh_1). That is, the inter prediction unit 126 creates a candidate MV list.

[0184] Next, the inter prediction unit 126 derives the MV of the current block by selecting one candidate MV from the multiple candidate MVs obtained in step Sh_1 (step Sh_2). At this time, the inter prediction unit 126 encodes MV selection information for identifying the selected candidate MV into the stream.

[0185] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Sh_3).

[0186] Furthermore, information indicating the inter prediction mode (merge mode in the above example) used to generate the predicted image, which is included in the coded signal, is coded as, for example, a prediction parameter.

[0187] FIG. 21 is a conceptual diagram illustrating an example of a motion vector derivation process for a current picture in merge mode.

[0188] First, a prediction MV list is generated in which prediction MV candidates are registered. The prediction MV candidates include spatially adjacent prediction MVs, which are MVs held by multiple coded blocks spatially located around the target block, temporally adjacent prediction MVs, which are MVs held by blocks in the vicinity of the target block projected onto the coded reference picture, joint prediction MVs, which are MVs generated by combining the MV values ​​of the spatially adjacent prediction MVs and the temporally adjacent prediction MVs, and zero prediction MVs, which are MVs with a value of zero.

[0189] Next, one predicted MV is selected from the plurality of predicted MVs registered in the predicted MV list, and is determined as the MV for the target block.

[0190] Furthermore, the variable length coding unit encodes merge_idx, which is a signal indicating which predicted MV has been selected, into the stream.

[0191] Note that the predicted MVs registered in the predicted MV list described in Figure 21 are just an example, and the number may be different from the number shown in the figure, the configuration may not include some of the types of predicted MVs shown in the figure, or the configuration may include predicted MVs other than the types of predicted MVs shown in the figure.

[0192] The final MV may be determined by performing a DMVR (decoder motion vector refinement) process, which will be described later, using the MV of the current block derived in the merge mode.

[0193] Note that the prediction MV candidates are the above-mentioned candidate MVs, and the prediction MV list is the above-mentioned candidate MV list. The candidate MV list may also be referred to as a candidate list. Furthermore, merge_idx is MV selection information.

[0194] [MV derivation > FRUC mode] The motion information may be derived on the decoding device side without being signaled from the encoding device side. As described above, the merge mode defined in the H.265 / HEVC standard may be used. Alternatively, the motion information may be derived by performing motion estimation on the decoding device side. In an embodiment, the motion estimation is performed on the decoding device side without using pixel values ​​of the current block.

[0195] Here, a mode in which motion estimation is performed on the decoding device side will be described. This mode in which motion estimation is performed on the decoding device side is sometimes called a pattern matched motion vector derivation (PMMVD) mode or a frame rate up-conversion (FRUC) mode.

[0196] FIG. 22 shows an example of the FRUC process in the form of a flowchart. First, a list of multiple candidates (i.e., a candidate MV list, which may be common to the merge list) each having a predicted motion vector (MV) is generated with reference to the motion vectors of coded blocks spatially or temporally adjacent to the current block (step Si_1). Next, a best candidate MV is selected from the multiple candidate MVs registered in the candidate MV list (step Si_2). For example, an evaluation value of each candidate MV included in the candidate MV list is calculated, and one candidate MV is selected based on the evaluation value. Then, a motion vector for the current block is derived based on the motion vector of the selected candidate (step Si_4). Specifically, for example, the motion vector of the selected candidate (best candidate MV) is derived as is as the motion vector for the current block. Alternatively, for example, the motion vector for the current block may be derived by performing pattern matching in a peripheral area of ​​a position in a reference picture corresponding to the motion vector of the selected candidate. That is, a search is performed on the area surrounding the best candidate MV using pattern matching and evaluation values ​​in the reference picture, and if an MV with a better evaluation value is found, the best candidate MV is updated to that MV and used as the final MV for the current block. It is also possible to configure the system without performing the process of updating to an MV with a better evaluation value.

[0197] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture, thereby generating a predicted image of the current block (step Si_5).

[0198] The same processing may be performed when processing is performed in units of sub-blocks.

[0199] The evaluation value may be calculated by various methods. For example, a reconstructed image of a region in a reference picture corresponding to the motion vector is compared with a reconstructed image of a predetermined region (which may be, for example, a region in another reference picture or a region of an adjacent block in the current picture, as shown below). The predetermined region may be predetermined.

[0200] Then, the difference between the pixel values ​​of the two reconstructed images may be calculated and used as an evaluation value for the motion vector. Note that the evaluation value may be calculated using other information in addition to the difference value.

[0201] Next, an example of pattern matching will be described in detail. First, one candidate MV included in a candidate MV list (e.g., a merge list) is selected as a starting point for search by pattern matching. For example, first pattern matching or second pattern matching can be used as pattern matching. The first pattern matching and the second pattern matching are sometimes called bilateral matching and template matching, respectively.

[0202] [MV derivation > FRUC > Bilateral matching] In the first pattern matching, pattern matching is performed between two blocks in two different reference pictures that are along the motion trajectory of the current block. Therefore, in the first pattern matching, an area in another reference picture that is along the motion trajectory of the current block is used as a predetermined area for calculating the evaluation value of the candidate. The predetermined area may be determined in advance.

[0203] 23 is a conceptual diagram illustrating an example of first pattern matching (bilateral matching) between two blocks in two reference pictures along a motion trajectory. As shown in FIG. 23, in the first pattern matching, two motion vectors (MV0, MV1) are derived by searching for a pair of blocks that best match among pairs of two blocks in two different reference pictures (Ref0, Ref1) along the motion trajectory of a current block (Cur block). Specifically, for the current block, a difference is derived between a reconstructed image at a specified position in a first coded reference picture (Ref0) specified by a candidate MV and a reconstructed image at a specified position in a second coded reference picture (Ref1) specified by a symmetric MV obtained by scaling the candidate MV by the display time interval, and an evaluation value is calculated using the obtained difference value. It is possible to select the candidate MV with the best evaluation value among multiple candidate MVs as the final MV, which can lead to good results.

[0204] Under the assumption of continuous motion trajectories, motion vectors (MV0, MV1) pointing to two reference blocks are proportional to the temporal distances (TD0, TD1) between a current picture (CurPic) and two reference pictures (Ref0, Ref1). For example, if the current picture is located between two reference pictures temporally and the temporal distances from the current picture to the two reference pictures are equal, the first pattern matching derives bidirectional motion vectors that are mirror-symmetric.

[0205] [MV derivation > FRUC > template matching] In the second pattern matching (template matching), pattern matching is performed between a template in the current picture (a block adjacent to the current block in the current picture (e.g., an upper and / or left adjacent block)) and a block in the reference picture. Therefore, in the second pattern matching, the block adjacent to the current block in the current picture is used as a predetermined area for calculating the evaluation value of the above-mentioned candidate.

[0206] 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. As shown in FIG. 24, in the second pattern matching, a motion vector of a current block is derived by searching a reference picture (Ref0) for a block that best matches a block adjacent to a current block (Cur block) in the current picture (Cur Pic). Specifically, a difference is derived between a reconstructed image of both or either of the coded areas adjacent to the left and / or above the current block and a reconstructed image at the same position in the coded reference picture (Ref0) specified by a candidate MV, an evaluation value is calculated using the obtained difference value, and the candidate MV with the best evaluation value among the multiple candidate MVs can be selected as the best candidate MV.

[0207] Information indicating whether such a FRUC mode is applied (e.g., referred to as an FRUC flag) may be signaled at the CU level. Also, when the FRUC mode is applied (e.g., when the FRUC flag is true), information indicating an applicable pattern matching method (first pattern matching or second pattern matching) may be signaled at the CU level. Note that signaling of this information does not need to be limited to the CU level, and may be at other levels (e.g., the sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0208] [MV Derivation > Affine Mode] Next, we will explain the affine mode, which derives a motion vector for each sub-block based on the motion vectors of multiple neighboring blocks. This mode is sometimes called an affine motion compensation prediction mode.

[0209] FIG. 25A is a conceptual diagram illustrating an example of derivation of a motion vector for each sub-block based on the motion vectors of multiple adjacent blocks. In FIG. 25A, the current block includes 16 4x4 sub-blocks. Here, a motion vector v0 of the upper left corner control point of the current block is derived based on the motion vectors of the adjacent blocks, and similarly, a motion vector v1 of the upper right corner control point of the current block is derived based on the motion vectors of the adjacent sub-blocks. Then, the two motion vectors v0 and v1 may be projected according to the following equation (1A), and the motion vectors (v x ,v y ) may be derived.

[0210]

number

[0211] Here, x and y respectively represent the horizontal and vertical positions of the sub-block, and w represents a predetermined weighting factor, which may be determined in advance.

[0212] Such information indicating the affine mode (e.g., called an affine flag) may be signaled at the CU level. Note that the signaling of the information indicating the affine mode does not need to be limited to the CU level, and may be at other levels (e.g., the sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0213] In addition, such affine modes may include several modes that differ in the method of deriving the motion vectors of the top-left and top-right corner control points. For example, the affine mode includes two modes: affine inter (also called affine normal inter) mode and affine merge mode.

[0214] [MV Derivation > Affine Mode] FIG. 25B is a conceptual diagram illustrating an example of derivation of motion vectors for each sub-block in an affine mode having three control points. In FIG. 25B, the current block includes 16 4x4 sub-blocks. Here, a motion vector v0 for the upper left corner control point of the current block is derived based on the motion vector of an adjacent block. Similarly, a motion vector v1 for the upper right corner control point of the current block is derived based on the motion vector of the adjacent block, and a motion vector v2 for the lower left corner control point of the current block is derived based on the motion vector of the adjacent block. Then, the three motion vectors v0, v1, and v2 may be projected using the following equation (1B), and the motion vectors (v x ,v y ) may be derived.

[0215]

number

[0216] Here, x and y respectively indicate the horizontal and vertical positions of the center of the sub-block, w indicates the width of the current block, and h indicates the height of the current block.

[0217] Affine modes with different numbers of control points (e.g., two and three) may be switched and signaled at the CU level. Note that information indicating the number of control points of the affine mode used at the CU level may also be signaled at other levels (e.g., sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0218] In addition, the affine mode having such three control points may include several modes that differ in the method of deriving the motion vectors of the upper-left, upper-right, and lower-left corner control points. For example, the affine mode includes two modes: affine inter (also called affine normal inter) mode and affine merge mode.

[0219] [MV Derivation > Affine Merge Mode] 26A, 26B, and 26C are conceptual diagrams for explaining the affine merge mode.

[0220] In affine merge mode, as shown in Figure 26A, for example, among the coded blocks A (left), B (top), C (top right), D (bottom left) and E (top left) adjacent to the current block, the predicted motion vectors of each control point of the current block are calculated based on a plurality of motion vectors corresponding to the blocks coded in affine mode. Specifically, these blocks are examined in the order of coded block A (left), B (top), C (top right), D (bottom left) and E (top left), and the first valid block coded in affine mode is identified. Based on a plurality of motion vectors corresponding to this identified block, the predicted motion vector of the control point of the current block is calculated.

[0221] For example, as shown in Figure 26B, when block A adjacent to the left of the current block is coded in affine mode with two control points, motion vectors v3 and v4 are derived by projecting them to the positions of the upper left and upper right corners of the coded block including block A. Then, from the derived motion vectors v3 and v4, a predicted motion vector v0 of the control point at the upper left corner of the current block and a predicted motion vector v1 of the control point at the upper right corner are calculated.

[0222] For example, as shown in Figure 26C, when the block A adjacent to the left of current block is coded in the affine mode with three control points, derive the motion vectors v3, v4 and v5 that are projected to the upper left corner, upper right corner and lower left corner positions of the coded block that includes block A.Then, from the derived motion vectors v3, v4 and v5, calculate the predicted motion vector v0 of the control point at the upper left corner of current block, the predicted motion vector v1 of the control point at the upper right corner and the predicted motion vector v2 of the control point at the lower left corner.

[0223] Note that this motion vector predictor derivation method may be used to derive motion vector predictors for the control points of the current block in step Sj_1 of FIG. 29, which will be described later.

[0224] FIG. 27 is a flowchart showing an example of the affine merge mode.

[0225] In the affine merge mode, as shown in the figure, first, the inter prediction unit 126 derives prediction MVs for each control point of the current block (step Sk_1). The control points are the upper left and upper right corners of the current block as shown in Figure 25A, or the upper left, upper right, and lower left corners of the current block as shown in Figure 25B.

[0226] That is, the inter prediction unit 126 examines the coded blocks in the order of block A (left), block B (top), block C (top right), block D (bottom left) and block E (top left), as shown in Figure 26A, and identifies the first valid block coded in affine mode.

[0227] Then, when block A is identified and has two control points, as shown in Figure 26B, the inter prediction unit 126 calculates the motion vector v0 of the control point in the upper left corner of the current block and the motion vector v1 of the control point in the upper right corner from the motion vectors v3 and v4 of the upper left corner and upper right corner of the coded block including block A. For example, the inter prediction unit 126 calculates the predicted motion vector v0 of the control point in the upper left corner of the current block and the predicted motion vector v1 of the control point in the upper right corner by projecting the motion vectors v3 and v4 of the upper left corner and upper right corner of the coded block onto the current block.

[0228] Alternatively, when block A is identified and block A has three control points, as shown in Figure 26C, the inter prediction unit 126 calculates the motion vector v0 of the control point of the upper left corner, the motion vector v1 of the control point of the upper right corner, and the motion vector v2 of the control point of the lower left corner of the current block from the motion vectors v3, v4, and v5 of the upper left corner, upper right corner, and lower left corner of the coded block including block A. For example, the inter prediction unit 126 calculates the predicted motion vector v0 of the control point of the upper left corner, the predicted motion vector v1 of the control point of the upper right corner, and the motion vector v2 of the control point of the lower left corner of the current block by projecting the motion vectors v3, v4, and v5 of the upper left corner, upper right corner, and lower left corner of the coded block onto the current block.

[0229] Next, the inter prediction unit 126 performs motion compensation on each of the multiple sub-blocks included in the current block. That is, for each of the multiple sub-blocks, the inter prediction unit 126 calculates the motion vector of the sub-block as an affine MV using two predicted motion vectors v0 and v1 and the above-mentioned formula (1A), or three predicted motion vectors v0, v1, and v2 and the above-mentioned formula (1B) (step Sk_2). Then, the inter prediction unit 126 performs motion compensation on the sub-block using the affine MVs and coded reference pictures (step Sk_3). As a result, motion compensation is performed on the current block, and a predicted image of the current block is generated.

[0230] [MV Derivation > Affine Intermode] FIG. 28A is a conceptual diagram illustrating an affine inter mode having two control points.

[0231] In this affine inter mode, as shown in Figure 28A, a motion vector selected from the motion vectors of coded blocks A, B, and C adjacent to the current block is used as the predicted motion vector v0 for the control point in the upper left corner of the current block. Similarly, a motion vector selected from the motion vectors of coded blocks D and E adjacent to the current block is used as the predicted motion vector v1 for the control point in the upper right corner of the current block.

[0232] FIG. 28B is a conceptual diagram for explaining an affine inter mode having three control points.

[0233] In this affine inter mode, as shown in Figure 28B, a motion vector selected from the motion vectors of coded blocks A, B, and C adjacent to the current block is used as the predicted motion vector v0 of the control point in the upper left corner of the current block.Similarly, a motion vector selected from the motion vectors of coded blocks D and E adjacent to the current block is used as the predicted motion vector v1 of the control point in the upper right corner of the current block.Furthermore, a motion vector selected from the motion vectors of coded blocks F and G adjacent to the current block is used as the predicted motion vector v2 of the control point in the lower left corner of the current block.

[0234] FIG. 29 is a flowchart showing an example of the affine inter mode.

[0235] As shown in the figure, in the affine inter mode, first, the inter prediction unit 126 derives predicted MVs (v0, v1) or (v0, v1, v2) of two or three control points of the current block (step Sj_1). The control points are the upper left corner, upper right corner, or lower left corner of the current block, as shown in Figure 25A or 25B.

[0236] That is, the inter prediction unit 126 derives the predicted motion vector (v0, v1) or (v0, v1, v2) of the control point of the current block by selecting the motion vector of any of the coded blocks near each control point of the current block shown in Figure 28A or 28B. At this time, the inter prediction unit 126 codes predicted motion vector selection information for identifying the two selected motion vectors into a stream.

[0237] For example, the inter prediction unit 126 may use cost evaluation or the like to determine which block's motion vector from the coded blocks adjacent to the current block to select as the predicted motion vector for the control point, and may write a flag indicating which predicted motion vector has been selected in the bitstream.

[0238] Next, the inter prediction unit 126 performs motion search (steps Sj_3 and Sj_4) while updating each predicted motion vector selected or derived in step Sj_1 (step Sj_2). That is, the inter prediction unit 126 calculates the motion vector of each sub-block corresponding to the predicted motion vector to be updated as an affine MV using the above-mentioned formula (1A) or (1B) (step Sj_3). Then, the inter prediction unit 126 performs motion compensation for each sub-block using the affine MVs and coded reference pictures (step Sj_4). As a result, the inter prediction unit 126 determines, for example, the predicted motion vector that obtains the smallest cost in the motion search loop as the motion vector of the control point (step Sj_5). At this time, the inter prediction unit 126 further encodes the difference values ​​between the determined MVs and the predicted motion vectors into a stream as differential MVs.

[0239] Finally, the inter prediction unit 126 performs motion compensation on the current block using the determined MV and the coded reference picture, thereby generating a predicted image of the current block (step Sj_6).

[0240] [MV Derivation > Affine Intermode] When affine modes with different numbers of control points (for example, two and three) are switched and signaled at the CU level, the number of control points may differ between the coded block and the current block. Figures 30A and 30B are conceptual diagrams for explaining a method of deriving a predicted vector for a control point when the number of control points differs between the coded block and the current block.

[0241] For example, as shown in Figure 30A, when current block has three control points, which are upper left corner, upper right corner and lower left corner, and the block A adjacent to the left of current block is coded in affine mode with two control points, derive motion vectors v3 and v4 that are projected to the upper left corner and upper right corner positions of the coded block including block A.Then, from the derived motion vectors v3 and v4, calculate the predicted motion vector v0 of the control point at the upper left corner of current block and the predicted motion vector v1 of the control point at the upper right corner.Furthermore, from the derived motion vectors v0 and v1, calculate the predicted motion vector v2 of the control point at the lower left corner.

[0242] For example, as shown in Figure 30B, if current block has two control points at the upper left corner and the upper right corner, and the block A adjacent to the left of current block is coded in affine mode with three control points, then derive motion vectors v3, v4 and v5 that are projected to the upper left corner, upper right corner and lower left corner positions of the coded block including block A.Then, from the derived motion vectors v3, v4 and v5, calculate the predicted motion vector v0 of the control point at the upper left corner of current block and the predicted motion vector v1 of the control point at the upper right corner.

[0243] This motion vector predictor derivation method may be used to derive the motion vector predictor for each control point of the current block in step Sj_1 of FIG.

[0244] [MV Derivation > DMVR] FIG. 31A is a flowchart showing the relationship between merge mode and DMVR.

[0245] The inter prediction unit 126 derives a motion vector for the current block in merge mode (step Sl_1). Next, the inter prediction unit 126 determines whether or not to search for a motion vector, i.e., perform motion search (step Sl_2). Here, if the inter prediction unit 126 determines not to perform motion search (No in step Sl_2), it determines the motion vector derived in step Sl_1 as the final motion vector for the current block (step Sl_4). That is, in this case, the motion vector for the current block is determined in merge mode.

[0246] On the other hand, if it is determined in step Sl_1 that a motion search is to be performed (Yes in step Sl_2), the inter prediction unit 126 derives a final motion vector for the current block by searching a peripheral area of ​​the reference picture indicated by the motion vector derived in step Sl_1 (step Sl_3). That is, in this case, the motion vector of the current block is determined by DMVR.

[0247] FIG. 31B is a conceptual diagram illustrating an example of DMVR processing for determining an MV.

[0248] First, the optimal MVP set for the current block (for example, in merge mode) is set as the candidate MV. Then, reference pixels are identified from the first reference picture (L0), which is an encoded picture in the L0 direction, according to the candidate MV (L0). Similarly, reference pixels are identified from the second reference picture (L1), which is an encoded picture in the L1 direction, according to the candidate MV (L1). A template is generated by averaging these reference pixels.

[0249] Next, the template is used to search the surrounding areas of the candidate MVs in the first reference picture (L0) and the second reference picture (L1), and the MV with the smallest cost is determined as the final MV. Note that the cost value may be calculated using, for example, the difference value between each pixel value of the template and each pixel value of the search area, the candidate MV value, etc.

[0250] Typically, the encoding device and the decoding device described below basically have the same configuration and operation for the processing described here.

[0251] Any processing may be used, not limited to the processing example described here, as long as it is a processing that can search around the candidate MVs and derive the final MV.

[0252] [Motion Compensation > BIO / OBMC] Motion compensation includes modes in which a predicted image is generated and then corrected, such as BIO and OBMC, which will be described later.

[0253] FIG. 32 is a flowchart showing an example of generation of a predicted image.

[0254] The inter prediction unit 126 generates a predicted image (step Sm_1) and corrects the predicted image using, for example, one of the modes described above (step Sm_2).

[0255] FIG. 33 is a flowchart showing another example of generation of a predicted image.

[0256] The inter prediction unit 126 determines a motion vector of the current block (step Sn_1). Next, the inter prediction unit 126 generates a predicted image (step Sn_2) and determines whether or not to perform correction processing (step Sn_3). Here, if the inter prediction unit 126 determines to perform correction processing (Yes in step Sn_3), it corrects the predicted image to generate a final predicted image (step Sn_4). On the other hand, if the inter prediction unit 126 determines not to perform correction processing (No in step Sn_3), it outputs the predicted image as the final predicted image without correcting it (step Sn_5).

[0257] Furthermore, motion compensation has a mode in which luminance is corrected when generating a predicted image, such as LIC, which will be described later.

[0258] FIG. 34 is a flowchart showing another example of generation of a predicted image.

[0259] The inter prediction unit 126 derives a motion vector of the current block (step So_1). Next, the inter prediction unit 126 determines whether or not to perform luminance correction processing (step So_2). Here, if the inter prediction unit 126 determines to perform luminance correction processing (Yes in step So_2), it generates a predicted image while performing luminance correction (step So_3). That is, the predicted image is generated by LIC. On the other hand, if the inter prediction unit 126 determines not to perform luminance correction processing (No in step So_2), it generates a predicted image by normal motion compensation without performing luminance correction (step So_4).

[0260] [Motion Compensation > OBMC] An inter-prediction signal may be generated using not only the motion information of the current block obtained by motion estimation but also the motion information of the neighboring blocks. Specifically, the inter-prediction signal may be generated for each sub-block in the current block by weighting and adding a prediction signal based on the motion information obtained by motion estimation (in the reference picture) and a prediction signal based on the motion information of the neighboring blocks (in the current picture). Such inter-prediction (motion compensation) may be called OBMC (overlapped block motion compensation).

[0261] In the OBMC mode, information indicating the size of a sub-block for OBMC (e.g., referred to as an OBMC block size) may be signaled at the sequence level. Furthermore, information indicating whether the OBMC mode is applied (e.g., referred to as an OBMC flag) may be signaled at the CU level. Note that the signaling level of this information is not limited to the sequence level and the CU level, and may be other levels (e.g., the picture level, slice level, tile level, CTU level, or sub-block level).

[0262] An example of the OBMC mode will now be described in more detail. Figures 35 and 36 are a flowchart and a conceptual diagram for explaining an outline of the predictive image correction process using the OBMC process.

[0263] First, as shown in Fig. 36, a predicted image (Pred) is obtained by normal motion compensation using a motion vector (MV) assigned to a current block to be processed. In Fig. 36, the arrow "MV" indicates a reference picture, indicating what the current block of the current picture refers to in order to obtain a predicted image.

[0264] Next, the motion vector (MV_L) already derived for the coded left adjacent block is applied (reused) to the current block to obtain a predicted image (Pred_L). The motion vector (MV_L) is indicated by an arrow "MV_L" pointing from the current block to the reference picture. The first correction of the predicted image is then performed by superimposing the two predicted images Pred and Pred_L. This has the effect of blending the boundaries between the adjacent blocks.

[0265] Similarly, a motion vector (MV_U) already derived for the coded upper adjacent block is applied (reused) to the current block to obtain a predicted image (Pred_U). The motion vector (MV_U) is indicated by an arrow "MV_U" pointing from the current block to the reference picture. The predicted image Pred_U is then superimposed on the predicted image (e.g., Pred and Pred_L) that has undergone the first correction, thereby performing a second correction of the predicted image. This has the effect of blending the boundaries between adjacent blocks. The predicted image obtained by the second correction is the final predicted image of the current block, with the boundaries with the adjacent blocks blended (smoothed).

[0266] Note that the above example is a two-pass correction method using the left-adjacent and above-adjacent blocks, but the correction method may also be a three-pass or more-pass correction method using the right-adjacent and / or below-adjacent blocks.

[0267] The area to be superimposed does not have to be the pixel area of ​​the entire block, but may be only a part of the area near the block boundary.

[0268] Here, the OBMC predicted image correction process has been described, in which additional predicted images Pred_L and Pred_U are superimposed from one reference picture to obtain one predicted image Pred. However, when a predicted image is corrected based on multiple reference pictures, the same process may be applied to each of the multiple reference pictures. In such a case, the OBMC image correction based on multiple reference pictures is performed to obtain a corrected predicted image from each reference picture, and then the obtained multiple corrected predicted images are further superimposed to obtain a final predicted image.

[0269] In OBMC, the unit of the current block may be a prediction block unit or a sub-block unit obtained by further dividing the prediction block.

[0270] As a method for determining whether to apply OBMC processing, for example, there is a method using obmc_flag, which is a signal indicating whether to apply OBMC processing. As a specific example, the encoding device may determine whether the current block belongs to an area with complex motion. If the current block belongs to an area with complex motion, the encoding device sets the value of obmc_flag to 1 and applies OBMC processing to perform encoding. If the current block does not belong to an area with complex motion, the encoding device sets the value of obmc_flag to 0 and performs encoding of the block without applying OBMC processing. Meanwhile, the decoding device decodes obmc_flag described in a stream (e.g., a compressed sequence) and switches whether to apply OBMC processing depending on the value, and performs decoding.

[0271] In the above example, the inter prediction unit 126 generates one rectangular predicted image for the rectangular current block. However, the inter prediction unit 126 may generate multiple predicted images of shapes other than a rectangle for the rectangular current block and combine the multiple predicted images to generate a final rectangular predicted image. The shape other than a rectangle may be, for example, a triangle.

[0272] FIG. 37 is a conceptual diagram for explaining generation of predicted images of two triangles.

[0273] The inter prediction unit 126 generates a triangular predicted image by performing motion compensation on a first partition of a triangle in the current block using a first MV of the first partition. Similarly, the inter prediction unit 126 generates a triangular predicted image by performing motion compensation on a second partition of a triangle in the current block using a second MV of the second partition. The inter prediction unit 126 then combines these predicted images to generate a predicted image that is the same rectangle as the current block.

[0274] In the example shown in Figure 37, the first and second partitions are each triangular, but they may also be trapezoidal, or may have different shapes. Furthermore, in the example shown in Figure 37, the current block is made up of two partitions, but it may also be made up of three or more partitions.

[0275] The first and second partitions may overlap, i.e., the first and second partitions may include the same pixel area. In this case, a predicted image for the current block may be generated using a predicted image for the first partition and a predicted image for the second partition.

[0276] Furthermore, although this example shows an example in which predicted images are generated by inter prediction for both of the two partitions, predicted images may be generated by intra prediction for at least one partition.

[0277] [Motion Compensation > BIO] Next, we will explain how to derive motion vectors. First, we will explain a mode in which motion vectors are derived based on a model that assumes uniform linear motion. This mode is sometimes called BIO (bi-directional optical flow) mode.

[0278] Figure 38 is a conceptual diagram for explaining a model assuming uniform linear motion. In Figure 38, (vx, vy) indicate a velocity vector, and τ0 and τ1 indicate the temporal distances between the current picture (Cur Pic) and two reference pictures (Ref0, Ref1), respectively. (MVx0, MVy0) indicate the motion vector corresponding to reference picture Ref0, and (MVx1, MVy1) indicate the motion vector corresponding to reference picture Ref1.

[0279] In this case, under the assumption of uniform linear motion of the velocity vector (vx, vy), (MVx0, MVy0) and (MVx1, MVy1) can be expressed as (vxτ0, vyτ0) and (-vxτ1, -vyτ1), respectively, and the following optical flow equation (2) may be adopted.

[0280]

number

[0281] Here, I(k) denotes the luminance value of reference image k (k=0, 1) after motion compensation. This optical flow equation indicates that the sum of (i) the time derivative of the luminance value, (ii) the product of the horizontal velocity and the horizontal component of the spatial gradient of the reference image, and (iii) the product of the vertical velocity and the vertical component of the spatial gradient of the reference image is equal to zero. Based on a combination of this optical flow equation and Hermite interpolation, block-based motion vectors obtained from a merge list or the like may be corrected pixel by pixel.

[0282] Note that the decoding device may derive motion vectors using a method other than that based on a model assuming constant-velocity linear motion. For example, a motion vector may be derived for each sub-block based on the motion vectors of multiple adjacent blocks.

[0283] [Motion Compensation > LIC] Next, an example of a mode for generating a predicted image (prediction) using LIC (local illumination compensation) processing will be described.

[0284] FIG. 39 is a conceptual diagram illustrating an example of a predicted image generating method using luminance correction processing by LIC processing.

[0285] First, the MV is derived from the coded reference picture to obtain the reference image corresponding to the current block.

[0286] Next, information indicating how the luminance values ​​of the current block have changed between the reference picture and the current picture is extracted. This extraction is performed based on the luminance pixel values ​​of the coded left-adjacent reference area (peripheral reference area) and the coded upper-adjacent reference area (peripheral reference area) in the current picture, and the luminance pixel values ​​at the equivalent positions in the reference picture specified by the derived MV. Then, the information indicating how the luminance values ​​have changed is used to calculate luminance correction parameters.

[0287] A predicted image for the current block is generated by performing luminance correction processing that applies the luminance correction parameters to a reference image in a reference picture specified by the MV.

[0288] The shape of the peripheral reference area in FIG. 39 is an example, and other shapes may be used.

[0289] Although the process of generating a predicted image from one reference picture has been described here, the same applies when generating a predicted image from multiple reference pictures, and a luminance correction process may be performed on the reference images obtained from each reference picture in the same manner as described above before generating a predicted image.

[0290] As a method of determining whether to apply LIC processing, for example, there is a method using lic_flag, which is a signal indicating whether to apply LIC processing. As a specific example, an encoding device determines whether the current block belongs to an area where a luminance change occurs, and if it belongs to an area where a luminance change occurs, sets the value of lic_flag to 1 and performs encoding by applying LIC processing, and if it does not belong to an area where a luminance change occurs, sets the value of lic_flag to 0 and performs encoding without applying LIC processing. On the other hand, a decoding device may decode lic_flag described in the stream and switch whether to apply LIC processing depending on the value and perform decoding.

[0291] Another method for determining whether to apply LIC processing is to determine whether LIC processing has been applied to neighboring blocks.As a specific example, when the current block is in merge mode, it is determined whether the neighboring coded blocks selected when deriving MV in merge mode processing have been coded using LIC processing.Depending on the result, whether to apply LIC processing is switched and coding is performed.In this example, the same processing is also applied to the processing on the decoding device side.

[0292] The LIC processing (luminance correction processing) has been described with reference to FIG. 39, and will be described in detail below.

[0293] First, the inter prediction unit 126 derives a motion vector for obtaining a reference image corresponding to the current block from a reference picture that is an already-encoded picture.

[0294] Next, the inter prediction unit 126 uses the luminance pixel values ​​of the coded surrounding reference areas adjacent to the left and above the current block to extract information indicating how the luminance values ​​have changed between the reference picture and the current picture to calculate luminance correction parameters, using the luminance pixel values ​​of the coded surrounding reference areas adjacent to the left and above and the luminance pixel values ​​at the equivalent positions in the reference picture specified by the motion vector. For example, the luminance pixel value of a pixel in the surrounding reference area in the current picture to be coded is set to p0, and the luminance pixel value of a pixel in the surrounding reference area in the reference picture at the equivalent position to the pixel is set to p1. The inter prediction unit 126 calculates coefficients A and B that optimize A×p1+B=p0 as luminance correction parameters for multiple pixels in the surrounding reference areas.

[0295] Next, the inter prediction unit 126 performs luminance correction processing on a reference image in a reference picture specified by the motion vector using the luminance correction parameter, thereby generating a predicted image for the block to be coded. For example, the luminance pixel value in the reference image is set to p2, and the luminance pixel value of the predicted image after the luminance correction processing is set to p3. The inter prediction unit 126 generates a predicted image after the luminance correction processing by calculating A×p2+B=p3 for each pixel in the reference image.

[0296] Note that the shape of the surrounding reference area in FIG. 39 is an example, and other shapes may be used. Also, a part of the surrounding reference area shown in FIG. 39 may be used. For example, an area including a predetermined number of pixels thinned out from each of the upper adjacent pixels and the left adjacent pixels may be used as the surrounding reference area. Also, the surrounding reference area is not limited to an area adjacent to the encoding target block, but may be an area not adjacent to the encoding target block. The predetermined number of pixels may be determined in advance.

[0297] 39, the surrounding reference areas in the reference picture are areas specified by the motion vector of the current picture from the surrounding reference areas in the current picture, but may be areas specified by another motion vector. For example, the other motion vector may be the motion vector of the surrounding reference areas in the current picture.

[0298] Although the operation of the encoding device 100 has been described above, the operation of the decoding device 200 is typically similar.

[0299] The LIC process may be applied to color differences instead of just luminance. In this case, correction parameters may be derived individually for each of Y, Cb, and Cr, or a common correction parameter may be used for any of them.

[0300] Alternatively, the LIC process may be applied to each sub-block. For example, the correction parameters may be derived using the surrounding reference regions of the current sub-block and the surrounding reference regions of the reference sub-blocks in the reference picture specified by the MV of the current sub-block.

[0301] [Predictive control unit] The prediction control unit 128 selects either an intra-prediction signal (a signal output from the intra-prediction unit 124) or an inter-prediction signal (a signal output from the inter-prediction unit 126), and outputs the selected signal as a prediction signal to the subtraction unit 104 and the addition unit 116.

[0302] As shown in FIG. 1 , in various exemplary encoding devices, the prediction control unit 128 may output prediction parameters to be input to the entropy coding unit 110. The entropy coding unit 110 may generate an encoded bitstream (or sequence) based on the prediction parameters input from the prediction control unit 128 and the quantization coefficients input from the quantization unit 108. The prediction parameters may be used by a decoding device. The decoding device may receive and decode the encoded bitstream and perform the same prediction process as that performed by the intra predictor 124, the inter predictor 126, and the prediction control unit 128. The prediction parameters may include a selected prediction signal (e.g., a motion vector, a prediction type, or a prediction mode used by the intra predictor 124 or the inter predictor 126) or any index, flag, or value based on or indicating the prediction process performed by the intra predictor 124, the inter predictor 126, and the prediction control unit 128.

[0303] [Example of an encoder implementation] 40 is a block diagram showing an implementation example of the encoding device 100. The encoding device 100 includes a processor a1 and a memory a2. For example, several components of the encoding device 100 shown in FIG. 1 are implemented by the processor a1 and the memory a2 shown in FIG.

[0304] The processor a1 is a circuit that performs information processing and is a circuit that can access the memory a2. For example, the processor a1 is a dedicated or general-purpose electronic circuit that encodes moving images. The processor a1 may be a processor such as a CPU. The processor a1 may also be a collection of multiple electronic circuits. For example, the processor a1 may fulfill the roles of multiple components among the multiple components of the encoding device 100 shown in FIG. 1 etc.

[0305] The memory a2 is a dedicated or general-purpose memory that stores information used by the processor a1 to encode moving images. The memory a2 may be an electronic circuit and may be connected to the processor a1. The memory a2 may also be included in the processor a1. The memory a2 may also be a collection of multiple electronic circuits. The memory a2 may also be a magnetic disk, an optical disk, or the like, and may also be expressed as storage, a recording medium, or the like. The memory a2 may also be a non-volatile memory or a volatile memory.

[0306] For example, the memory a2 may store a video to be encoded, or a bit string corresponding to the encoded video, or may store a program for the processor a1 to encode the video.

[0307] Furthermore, for example, the memory a2 may serve as a component for storing information among the multiple components of the encoding device 100 shown in Fig. 1 etc. For example, the memory a2 may serve as the block memory 118 and the frame memory 122 shown in Fig. 1. More specifically, the memory a2 may store reconstructed blocks, reconstructed pictures, etc.

[0308] Note that not all of the components shown in Fig. 1 etc. may be implemented, and not all of the processes described above may be performed, in the encoding device 100. Some of the components shown in Fig. 1 etc. may be included in another device, and some of the processes described above may be performed by another device.

[0309] [Decryption device] Next, a description will be given of a decoding device capable of decoding, for example, a coded signal (coded bitstream) output from the above coding device 100. Fig. 41 is a block diagram showing the functional configuration of a decoding device 200 according to an embodiment. The decoding device 200 is a video decoding device that decodes video on a block-by-block basis.

[0310] As shown in FIG. 41, the decoding device 200 includes an entropy decoding unit 202, an inverse quantization unit 204, an inverse transform unit 206, an addition unit 208, a block memory 210, a loop filter unit 212, a frame memory 214, an intra prediction unit 216, an inter prediction unit 218, and a prediction control unit 220.

[0311] The decoding device 200 is realized by, for example, a general-purpose processor and memory. In this case, when a software program stored in the memory is executed by the processor, the processor functions as the entropy decoding unit 202, the inverse quantization unit 204, the inverse transform unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220. Alternatively, the decoding device 200 may be realized as one or more dedicated electronic circuits corresponding to the entropy decoding unit 202, the inverse quantization unit 204, the inverse transform unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.

[0312] Below, the overall processing flow of the decoding device 200 will be explained, and then each component included in the decoding device 200 will be explained.

[0313] [Overall flow of decryption process] FIG. 42 is a flowchart showing an example of the overall decoding process performed by the decoding device 200.

[0314] First, the entropy decoding unit 202 of the decoding device 200 identifies a division pattern for fixed-size blocks (e.g., 128×128 pixels) (step Sp_1). This division pattern is the division pattern selected by the encoding device 100. Then, the decoding device 200 performs the processes of steps Sp_2 to Sp_6 on each of the multiple blocks that make up the division pattern.

[0315] That is, the entropy decoding unit 202 decodes (specifically, entropy decodes) the coded quantized coefficients and prediction parameters of the block to be decoded (also referred to as the current block) (step Sp_2).

[0316] Next, the inverse quantization unit 204 and the inverse transform unit 206 perform inverse quantization and inverse transform on the plurality of quantized coefficients to reconstruct a plurality of prediction residuals (that is, difference blocks) (step Sp_3).

[0317] Next, a prediction processing unit including all or part of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 generates a prediction signal (also called a prediction block) of the current block (step Sp_4).

[0318] Next, the adder 208 reconstructs the current block into a reconstructed image (also called a decoded image block) by adding the predicted block to the difference block (step Sp_5).

[0319] Then, when this reconstructed image is generated, the loop filter unit 212 performs filtering on the reconstructed image (step Sp_6).

[0320] Then, the decoding device 200 determines whether or not the decoding of the entire picture is completed (step Sp_7), and if it determines that the decoding is not completed (No in step Sp_7), it repeats the processing from step Sp_1.

[0321] As shown in the figure, the processes of steps Sp_1 to Sp_7 are performed sequentially by the decoding device 200. Alternatively, some of these processes may be performed in parallel, or the order of the processes may be changed.

[0322] [Entropy Decoding] The entropy decoding unit 202 entropy-decodes the coded bitstream. Specifically, for example, the entropy decoding unit 202 arithmetically decodes the coded bitstream into a binary signal. Then, the entropy decoding unit 202 debinarizes the binary signal. The entropy decoding unit 202 outputs quantized coefficients to the inverse quantization unit 204 on a block-by-block basis. The entropy decoding unit 202 may output prediction parameters included in the coded bitstream (see FIG. 1 ) to the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 in the embodiment. The intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 can perform the same prediction processing as the processing performed by the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 on the coding device side.

[0323] [Dequantization section] The inverse quantization unit 204 inverse quantizes the quantized coefficients of a block to be decoded (hereinafter referred to as a current block) that is input from the entropy decoding unit 202. Specifically, the inverse quantization unit 204 inverse quantizes each quantized coefficient of the current block based on a quantization parameter corresponding to the quantized coefficient. The inverse quantization unit 204 then outputs the inverse quantized coefficients (i.e., transform coefficients) of the current block to the inverse transform unit 206.

[0324] [Inverse conversion section] The inverse transform unit 206 restores the prediction error by inverse transforming the transform coefficients input from the inverse quantization unit 204 .

[0325] For example, if the information interpreted from the encoded bitstream indicates that EMT or AMT is to be applied (e.g., the AMT flag is true), the inverse transform unit 206 inverse transforms the transform coefficients of the current block based on the interpreted information indicating the transform type.

[0326] Also, for example, if the information decoded from the coded bitstream indicates that NSST is to be applied, then inverse transform unit 206 applies an inverse re-transform to the transform coefficients.

[0327] [Addition section] The adder 208 reconstructs the current block by adding the prediction error input from the inverse transformer 206 and the prediction sample input from the prediction control unit 220. The adder 208 then outputs the reconstructed block to the block memory 210 and the loop filter unit 212.

[0328] [Block Memory] The block memory 210 is a storage unit for storing blocks that are referenced in intra prediction and are in a picture to be decoded (hereinafter referred to as a current picture). Specifically, the block memory 210 stores the reconstructed blocks output from the adder 208.

[0329] [Loop filter section] The loop filter unit 212 applies a loop filter to the block reconstructed by the adder unit 208, and outputs the filtered reconstructed block to a frame memory 214, a display device, or the like.

[0330] If the information indicating ALF on / off read from the encoded bitstream indicates that ALF is on, one filter is selected from multiple filters based on the local gradient direction and activity, and the selected filter is applied to the reconstructed block.

[0331] [Frame memory] The frame memory 214 is a storage unit for storing reference pictures used in inter prediction, and is sometimes called a frame buffer. Specifically, the frame memory 214 stores the reconstructed blocks filtered by the loop filter unit 212.

[0332] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] 43 is a flowchart showing an example of processing performed in the prediction processing unit of the decoding device 200. Note that the prediction processing unit is made up of all or some of the components of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.

[0333] The prediction processing unit generates a predicted image of the current block (step Sq_1). This predicted image is also called a predicted signal or a predicted block. The predicted signal may be, for example, an intra-prediction signal or an inter-prediction signal. Specifically, the prediction processing unit generates the predicted image of the current block using a reconstructed image already obtained by generating a predicted block, generating a difference block, generating a coefficient block, restoring the difference block, and generating a decoded image block.

[0334] The reconstructed image may be, for example, an image of a reference picture or an image of a decoded block in a current picture, which is a picture that includes the current block. The decoded block in the current picture may be, for example, a neighboring block of the current block.

[0335] FIG. 44 is a flowchart showing another example of the processing performed by the prediction processing unit of the decoding device 200.

[0336] The prediction processing unit determines a method or mode for generating a predicted image (step Sr_1). For example, this method or mode may be determined based on prediction parameters, etc.

[0337] When the prediction processing unit determines that the first method is the mode for generating a predicted image, it generates the predicted image according to the first method (step Sr_2a). When the prediction processing unit determines that the second method is the mode for generating a predicted image, it generates the predicted image according to the second method (step Sr_2b). When the prediction processing unit determines that the third method is the mode for generating a predicted image, it generates the predicted image according to the third method (step Sr_2c).

[0338] The first, second, and third methods are different methods for generating a predicted image, and may be, for example, an inter-prediction method, an intra-prediction method, or other prediction methods. These prediction methods may use the reconstructed image described above.

[0339] [Intra prediction section] The intra prediction unit 216 generates a prediction signal (intra prediction signal) by performing intra prediction based on the intra prediction mode interpreted from the encoded bitstream, by referring to blocks in the current picture stored in the block memory 210. Specifically, the intra prediction unit 216 generates the intra prediction signal by performing intra prediction by referring to samples (e.g., luminance values, chrominance values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 220.

[0340] Note that, when an intra prediction mode that references a luminance block in intra prediction of a chrominance block is selected, the intra prediction unit 216 may predict the chrominance component of the current block based on the luminance component of the current block.

[0341] Furthermore, when information interpreted from the coded bitstream indicates the application of PDPC, the intra prediction unit 216 corrects pixel values ​​after intra prediction based on the gradients of reference pixels in the horizontal and vertical directions.

[0342] [Inter prediction section] The inter prediction unit 218 predicts the current block by referring to a reference picture stored in the frame memory 214. The prediction is performed in units of the current block or sub-blocks (e.g., 4x4 blocks) within the current block. For example, the inter prediction unit 218 generates an inter prediction signal of the current block or sub-block by performing motion compensation using motion information (e.g., motion vectors) interpreted from the coded bitstream (e.g., prediction parameters output from the entropy decoding unit 202), and outputs the inter prediction signal to the prediction control unit 220.

[0343] If the information interpreted from the encoded bitstream indicates that the OBMC mode is to be applied, the inter prediction unit 218 generates an inter prediction signal using not only the motion information of the current block obtained by motion estimation, but also the motion information of neighboring blocks.

[0344] Furthermore, if the information interpreted from the coded bitstream indicates that the FRUC mode is to be applied, the inter prediction unit 218 derives motion information by performing motion search according to the pattern matching method (bilateral matching or template matching) interpreted from the coded bitstream. Then, the inter prediction unit 218 performs motion compensation (prediction) using the derived motion information.

[0345] Furthermore, when the BIO mode is applied, the inter prediction unit 218 derives a motion vector based on a model assuming constant-velocity linear motion. Furthermore, when information interpreted from the coded bitstream indicates that the affine motion compensation prediction mode is to be applied, the inter prediction unit 218 derives a motion vector for each sub-block based on the motion vectors of multiple adjacent blocks.

[0346] [MV Derivation > Normal Intermode] If the information interpreted from the encoded bitstream indicates that normal inter mode is to be applied, the inter prediction unit 218 derives an MV based on the information interpreted from the encoded bitstream and performs motion compensation (prediction) using the MV.

[0347] FIG. 45 is a flowchart showing an example of inter prediction in the normal inter mode in the decoding device 200.

[0348] The inter prediction unit 218 of the decoding device 200 performs motion compensation on each block. The inter prediction unit 218 obtains multiple candidate MVs for the current block based on information such as the MVs of multiple decoded blocks temporally or spatially surrounding the current block (step Ss_1). That is, the inter prediction unit 218 creates a candidate MV list.

[0349] Next, the inter prediction unit 218 extracts N candidate MVs (N is an integer equal to or greater than 2) from the plurality of candidate MVs acquired in step Ss_1 as motion vector predictor candidates (also referred to as predicted MV candidates) according to a predetermined priority order (step Ss_2). Note that the priority order may be predetermined for each of the N predicted MV candidates.

[0350] Next, the inter prediction unit 218 decodes the predicted motion vector selection information from the input stream (i.e., the encoded bitstream), and uses the decoded predicted motion vector selection information to select one predicted MV candidate from the N predicted MV candidates as the predicted motion vector (also called predicted MV) of the current block (step Ss_3).

[0351] Next, the inter prediction unit 218 decodes the differential MV from the input stream and derives the MV of the current block by adding the differential value of the decoded differential MV to the selected predicted motion vector (step Ss_4).

[0352] Finally, the inter prediction unit 218 performs motion compensation on the current block using the derived MV and the decoded reference picture to generate a predicted image of the current block (step Ss_5).

[0353] [Predictive control unit] The prediction control unit 220 selects either the intra prediction signal or the inter prediction signal, and outputs the selected signal as a prediction signal to the adder 208. Overall, the configurations, functions, and processing of the prediction control unit 220, the intra prediction unit 216, and the inter prediction unit 218 on the decoding device side may correspond to the configurations, functions, and processing of the prediction control unit 128, the intra prediction unit 124, and the inter prediction unit 126 on the encoding device side.

[0354] [Example of implementation of a decryption device] 46 is a block diagram showing an implementation example of the decoding device 200. The decoding device 200 includes a processor b1 and a memory b2. For example, several components of the decoding device 200 shown in FIG. 41 are implemented by the processor b1 and the memory b2 shown in FIG.

[0355] The processor b1 is a circuit that performs information processing and is a circuit that can access the memory b2. For example, the processor b1 is a dedicated or general-purpose electronic circuit that decodes coded video (i.e., a coded bitstream). The processor b1 may be a processor such as a CPU. The processor b1 may also be a collection of multiple electronic circuits. For example, the processor b1 may fulfill the roles of multiple components among the multiple components of the decoding device 200 shown in FIG. 41 etc.

[0356] The memory b2 is a dedicated or general-purpose memory that stores information for the processor b1 to decode the coded bitstream. The memory b2 may be an electronic circuit and may be connected to the processor b1. The memory b2 may also be included in the processor b1. The memory b2 may also be a collection of multiple electronic circuits. The memory b2 may also be a magnetic disk, an optical disk, or the like, and may also be expressed as a storage or a recording medium. The memory b2 may also be a non-volatile memory or a volatile memory.

[0357] For example, the memory b2 may store a video or an encoded bitstream, or may store a program for the processor b1 to decode the encoded bitstream.

[0358] Furthermore, for example, memory b2 may serve as a component for storing information among the multiple components of decoding device 200 shown in Fig. 41 etc. Specifically, memory b2 may serve as the block memory 210 and frame memory 214 shown in Fig. 41. More specifically, memory b2 may store reconstructed blocks, reconstructed pictures, etc.

[0359] Note that not all of the components shown in Figure 41 etc. may be implemented, and not all of the above-described processes may be performed, in the decoding device 200. Some of the components shown in Figure 41 etc. may be included in another device, and some of the above-described processes may be executed by another device.

[0360] [Definition of each term] As an example, each term may be defined as follows:

[0361] A picture is an array of luma samples in monochrome format, or two corresponding arrays of luma samples and chroma samples in 4:2:0, 4:2:2 and 4:4:4 color formats. A picture may be a frame or a field.

[0362] A frame is a composition of a top field from which a number of sample rows 0, 2, 4, . . . occur, and a bottom field from which a number of sample rows 1, 3, 5, .

[0363] A slice is an integer number of coding tree units contained in one independent slice segment and all subsequent dependent slice segments (if any) that precede the next independent slice segment (if any) within the same access unit.

[0364] A tile is a rectangular region of multiple coding tree blocks within a particular tile column and a particular tile row in a picture. A tile may also be a rectangular region of a frame that is intended to be independently decoded and coded, although loop filters across tile edges may still be applied.

[0365] A block is an MxN (N rows and M columns) array of samples or an MxN array of transform coefficients. A block may also be a square or rectangular region of pixels consisting of one luma and two chroma matrices.

[0366] A CTU (coding tree unit) may be a coding tree block of luma samples for a picture with a three-sample arrangement, or two corresponding coding tree blocks of chroma samples, or a coding tree block of samples for either a monochrome picture or a picture coded using a syntax structure used to code three separate color planes and samples.

[0367] A superblock may comprise one or two mode information blocks, or may be a square block of 64x64 pixels that can be recursively divided into four 32x32 blocks and further divided.

[0368] (Embodiment 2) The coding device 100 in this embodiment has the same configuration as in Embodiment 1. Furthermore, the quantization unit 108, the inverse quantization unit 112, and the entropy coding unit 110 of the coding device 100 in this embodiment have additional functions or alternative functions to those in Embodiment 1. Similarly, the decoding device 200 in this embodiment has the same configuration as in Embodiment 1, and the inverse quantization unit 204 and the entropy decoding unit 202 of the decoding device 200 in this embodiment have additional functions or alternative functions to those in Embodiment 1.

[0369] For example, the quantization unit 108 in this embodiment performs DQ (Dependent Quantization), and the inverse quantization units 112 and 204 in this embodiment perform inverse quantization corresponding to DQ. Also, the entropy coding unit 110 in this embodiment arithmetically codes the quantized coefficients using flags, and the entropy decoding unit 202 arithmetically decodes the arithmetically coded quantized coefficients using flags.

[0370] The following first to third aspects are specific aspects of the processing performed by the encoding device 100 and the decoding device 200 according to this embodiment.

[0371] [First aspect] <Coefficient coding overview> The entropy coding unit 110 of the coding device 100 in this embodiment converts the above-mentioned quantized coefficients into a format using at least one flag (hereinafter referred to as flag format) and performs arithmetic coding on the quantized coefficients in that format. Note that the quantized coefficients are values ​​obtained by converting and quantizing prediction residuals generated by inter prediction or intra prediction. The quantized coefficients are also referred to as residual coefficients. In the following description, the quantized coefficients are also simply referred to as coefficients.

[0372] The entropy coding unit 110 converts the coefficients into a flag format using at least one of significant_flag (hereinafter referred to as sig_flag), parity_flag, greater1_flag (hereinafter referred to as gt1_flag), greater2_flag (hereinafter referred to as gt2_flag), and remainder.

[0373] sig_flag is a flag indicating whether or not the coefficient is 0. For example, if the coefficient is 0, sig_flag indicates 0, and if the coefficient is not 0, sig_flag indicates 1.

[0374] Parity_flag is a flag used when a coefficient is not 0, and indicates whether the coefficient is even or odd. In other words, parity_flag is a flag that indicates whether the first bit (e.g., the least significant bit) of a coefficient is 0 or 1. For example, if the coefficient is even, parity_flag indicates 1, and if the coefficient is odd, parity_flag indicates 0. Furthermore, parity_flag is used together with sig_flag, and together with sig_flag, they indicate a value between 1 and 2.

[0375] gt1_flag is a flag used when a coefficient is not 0, and indicates whether the absolute value of the coefficient is, for example, greater than or equal to 3. For example, if the absolute value of the coefficient is greater than or equal to 3, gt1_flag indicates 1, and if the absolute value of the coefficient is not greater than or equal to 3, gt1_flag indicates 0.

[0376] gt2_flag is a flag used when the absolute value of a coefficient is 3 or more (i.e., when gt1_flag=1), and indicates whether the absolute value of the coefficient is, for example, 5 or more. For example, if the absolute value of the coefficient is 5 or more, gt2_flag indicates 1, and if the absolute value of the coefficient is not 5 or more, gt2_flag indicates 0.

[0377] The remainder is a value indicated by, for example, (AbsLevel-5) / 2, which is used for coefficients with gt2_flag=1. Note that AbsLevel is the absolute value of the coefficient. Also, the decimal point of (AbsLevel-5) / 2 may be truncated.

[0378] Therefore, the entropy decoding unit 202 calculates AbsLevel by "AbsLevel=sig_flag+parity_flag+2*gt1_flag+2*gt2_flag+2*remainder".

[0379] In the H.265 / HEVC standard, parity_flag is not used. Therefore, in entropy decoding, AbsLevel is calculated as "AbsLevel=sig_flag+gt1_flag+gt2_flag+remainder".

[0380] Here, the parity_flag may be used for the above-mentioned DQ, for example.

[0381] FIG. 47 is a diagram for explaining an overview of DQ (Dependent Quantization).

[0382] The quantization unit 108 of the encoding device 100 switches between two different quantizers. Note that these two quantizers use two different quantization methods, respectively, and therefore it can be said that the quantization unit 108 switches between two different quantization methods.

[0383] As shown in FIG. 47, the two quantizers are a first quantizer Q0 and a second quantizer Q1. The first quantizer Q0 uses equally spaced quantization widths determined by a quantization parameter, while the second quantizer Q1 uses at least two different quantization widths. In a specific example, as shown in FIG. 47, the quantization widths used by the second quantizer Q1 for the range between the value "0" and the value "1" and the range between the value "0" and the value "-1" are half the quantization widths used outside these ranges. For example, when using the first quantizer Q0, the inverse quantization units 112 and 204 inverse quantize the values ​​"1," "2," and "3" included in the bitstream to "12," "24," and "36," respectively. On the other hand, when the second quantizer Q1 is used, the inverse quantization units 112 and 204 inverse quantize the numerical values ​​"1," "2," and "3" contained in the bitstream to "6," "18," and "30," respectively.

[0384] Figures 48 and 49 are diagrams showing an example of state transitions in quantization section 108. Specifically, Figure 48 is a diagram visually showing the state transitions. Figure 49 is a diagram showing the state transitions in a two-dimensional table format, showing the state before the transition and the state after the transition determined by the quantization coefficient.

[0385] The quantization unit 108 can take four states. The four states are state=0, 1, 2, and 3. When state=0 or 1, the quantization unit 108 performs quantization using the first quantizer Q0, and when state=2 or 3, the quantization unit 108 performs quantization using the second quantizer Q1.

[0386] In the initial state, for example, state=0. At this time, the quantization unit 108 quantizes the first pre-quantization coefficient in scan order using the first quantizer Q0 to obtain a quantized coefficient k. The pre-quantization coefficient is a coefficient before quantization, which is the above-mentioned transform coefficient. As a result, if the first bit of the quantized coefficient k is 0, the quantization unit 108 transitions to state=0, and if the first bit of the quantized coefficient k is 1, the quantization unit 108 transitions to state=2. Therefore, the quantization unit 108 quantizes the next pre-quantization coefficient in scan order using the quantizer corresponding to the state after the transition to obtain a new quantized coefficient k. In this way, every time the quantization unit 108 obtains a new quantized coefficient k, the quantization unit 108 performs a state transition depending on whether the first bit of the quantized coefficient k is 0 or 1.

[0387] Although quantization section 108 uses two quantizers in DQ, it may use three or more quantizers and may perform state transitions different from those in FIGS.

[0388] Furthermore, the above-mentioned parity_flag indicates whether the first bit of the quantization coefficient k is 0 or 1. Therefore, in DQ, the quantization unit 108 may determine the quantizer to be used for the next pre-quantization coefficient according to the parity_flag.

[0389] Similarly to the quantization unit 108, the inverse quantization units 112 and 204 also perform state transitions using multiple quantizers in DQ.

[0390] FIG. 50 is a diagram showing an example of binarization of remainder.

[0391] The entropy coding unit 110 encodes the remainder using Golomb-Rice coding. The entropy coding unit 110 also switches the encoding method for the remainder, for example, based on a rice parameter. For example, the rice parameter can take three values, such as g=0, 1, and 2. Note that g is a variable indicating the rice parameter. Therefore, the entropy coding unit 110 selects an encoding method from the three encoding methods according to the value indicated by the rice parameter, and encodes the remainder using that encoding method. Note that this encoding method can also be considered a binarization method.

[0392] Furthermore, the entropy coding unit 110 binarizes the remainder using a prefix and a suffix in Golomb-Rice coding. Rice coding is used for the prefix, and unary coding and exponential-Golomb coding are used for the suffix.

[0393] For example, as shown in Fig. 50, when the Rice parameter g = 0, the entropy coding unit 110 binarizes the remainder using a prefix without using a suffix. On the other hand, when the Rice parameter g = 1 or 2, the entropy coding unit 110 binarizes the remainder using a prefix and a suffix.

[0394] Also, in the example shown in Fig. 50, the smaller the value of remainder, the fewer bits the encoding method with g=0 can binarize the remainder into than other encoding methods. Conversely, the larger the value of remainder, the fewer bits the encoding method with g=2 can binarize the remainder into than other encoding methods. Also, if the value of remainder is neither small nor large, the encoding method with g=1 can binarize the remainder into fewer bits than other encoding methods.

[0395] 50, the rice parameter can take three values, but it may take four or more values. In this case, the entropy coding unit 110 selects an encoding method according to the rice parameter from four or more encoding methods (i.e., binarization methods), and encodes the remainder using the selected encoding method.

[0396] Note that, similarly to the entropy coding unit 110, the entropy decoding unit 202 may also switch the decoding method (specifically, the multi-value coding method) depending on the Rice parameter.

[0397] Fig. 51 is a diagram for explaining a method for determining the Rice parameter. Specifically, Fig. 51 shows, among the coefficients included in a block (e.g., a transform unit), a coefficient to be coded (a black rectangle in Fig. 51) and five coefficients surrounding the coefficient to be coded (hatched rectangles in Fig. 51).

[0398] For example, when encoding a coefficient to be encoded, the entropy encoding unit 110 determines a Rice parameter for the coefficient to be encoded using five coefficients surrounding the coefficient (hereinafter referred to as "peripheral coefficients"). The five peripheral coefficients include two coefficients arranged horizontally to the right of the coefficient to be encoded, two coefficients arranged vertically below the coefficient to be encoded, and one coefficient located to the lower right of the coefficient to be encoded. Note that, during encoding, these five peripheral coefficients are coded before the coefficient to be encoded, and during decoding, these five peripheral coefficients are decoded before the coefficient to be decoded (the same coefficient as the coefficient to be encoded).

[0399] To determine the Rice parameter, the entropy coding unit 110 calculates sum_minus1 by sum_minus1=sum_abs-num_sig. sum_abs is the absolute value of the sum of the five peripheral coefficients. num_sig is the number of non-zero coefficients among the five peripheral coefficients. Note that the method of deriving sum_minus1 described here is just an example, and other methods may be used for deriving sum_minus1. For example, sum_minus1 may be derived by sum_minus1=sum_abs without using num_sig, or by using another offset value instead of num_sig and deriving sum_minus1 by sum_minus1=sum_abs-offset value.

[0400] Based on this calculation, the entropy coding unit 110 determines the Rice parameter to be g=0 when sum_minus1<12. Furthermore, the entropy coding unit 110 determines the Rice parameter to be g=1 when 12≦sum_minus1<25. Furthermore, the entropy coding unit 110 determines the Rice parameter to be g=2 when 25≦sum_minus1. The entropy coding unit 110 selects an encoding method corresponding to the Rice parameter determined in this way, and uses the selected encoding method to Golomb-Rice encode the remainder, i.e., (AbsLevel−5) / 2.

[0401] FIG. 52 is a diagram showing the code length (i.e., the number of bits) of a binary signal obtained by Golomb-Rice coding of remainder.

[0402] For example, the code length of a binary signal obtained by Golomb-Rice coding with remainder=0 is 1 when the Rice parameter is g=0, 2 when the Rice parameter is g=1, and 3 when the Rice parameter is g=2. The code length of a binary signal obtained by Golomb-Rice coding with remainder=1 is 2 when the Rice parameter is g=0, 2 when the Rice parameter is g=1, and 3 when the Rice parameter is g=2. The code length of a binary signal obtained by Golomb-Rice coding with remainder=6 is 7 when the Rice parameter is g=0, 5 when the Rice parameter is g=1, and 4 when the Rice parameter is g=2.

[0403] Here, when sum_minus1<12, the five surrounding coefficients are considered to have an average value of approximately 3 to 4 or less. As a result, the coefficient to be coded is likely to be close to the five surrounding coefficients and larger than them, and is predicted to be 5 or 6. Therefore, since the flag format of the coefficient to be coded uses gt1_flag and gt2_flag, the remainder of the coefficient is predicted to be remainder=0. For example, in the example shown in FIG. 52, when remainder=0, the entropy coding unit 110 selects g=0 as the Rice parameter to minimize the code length of the binary signal.

[0404] Furthermore, when 12≦sum_minus1<25, the five surrounding coefficients are considered to have an average value of approximately 3 to 5. As a result, the coefficient to be coded is likely to be close to the five surrounding coefficients and larger than them, and is therefore predicted to be 7 or 8. Therefore, since the flag format of the coefficient to be coded uses gt1_flag and gt2_flag, the remainder of the coefficient is predicted to be remainder=1. For example, in the example shown in FIG. 52, when remainder=1, the entropy coding unit 110 selects g=1 as the Rice parameter to minimize the code length of the binary signal.

[0405] Furthermore, when 25≦sum_minus1, the five surrounding coefficients are considered to have values ​​of approximately 7 or greater. As a result, the coefficient to be coded is likely to be close to and greater than the five surrounding coefficients, and is therefore predicted to be 9 or greater. Therefore, since the flag format of the coefficient to be coded uses gt1_flag and gt2_flag, the remainder of the coefficient is predicted to be remainder≧2. For example, in the example shown in FIG. 52, when remainder≧2, the entropy coding unit 110 selects g=2 as the Rice parameter to minimize the code length of the binary signal.

[0406] Note that, like the entropy coding unit 110, the entropy decoding unit 202 can also determine the Rice parameter.

[0407] <First Example of First Aspect> Fig. 53 is a flowchart showing the overall processing operation of the entropy coding unit 110 in the first example of the first aspect. Note that the flowchart in Fig. 53 shows the processing operation of the entropy coding unit 110 when, for example, the above-mentioned DQ is used.

[0408] Entropy coding unit 110 repeats the processes of steps S110 to S140 for each sub-block so that each coefficient in that sub-block is coded. A sub-block is, for example, a block consisting of 4x4 pixels obtained by further dividing the transform unit described above.

[0409] Specifically, first, for each coefficient in a sub-block, the entropy coding unit 110 codes the sig_flag of that coefficient, and if the sig_flag is 1, codes the parity_flag of that coefficient. Furthermore, if the sig_flag is 1, the entropy coding unit 110 codes the gt1_flag of that coefficient based on whether the AbsLevel of that coefficient is 3 or greater (step S110).

[0410] Next, for each coefficient in the sub-block, if the coefficient is 3 or greater, the entropy coding unit 110 codes the gt2_flag of the coefficient based on whether the AbsLevel of the coefficient is 5 or greater (Step S120).

[0411] Next, for each coefficient in the sub-block, the entropy coding unit 110 codes remainder=(AbsLevel-5) / 2 of the coefficient based on whether the AbsLevel of the coefficient is 5 or more (Step S130).

[0412] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140). Note that the sign may be coded as sign_flag.

[0413] After performing the processes of steps S110 to S140 on the sub-block, entropy encoding section 110 performs the processes of steps S110 to S140 on the other sub-blocks in the same manner.

[0414] FIG. 54 is a flowchart showing an example of detailed processing operations in step S110 of FIG.

[0415] The entropy coding unit 110 repeats the processes of steps S111 to S117 for each coefficient in the sub-block.

[0416] First, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is AbsLevel≠0 (step S111). If the entropy coding unit 110 determines that AbsLevel≠0 is not true (No in step S111), it codes sig_flag=0 for the coefficient (step S112b). On the other hand, if the entropy coding unit 110 determines that AbsLevel≠0 is true (Yes in step S111), it codes sig_flag=1 for the coefficient (step S112a).

[0417] Next, the entropy coding unit 110 determines whether the first bit (least significant bit) of AbsLevel of the coefficient to be coded is 1 (step S113). If the entropy coding unit 110 determines that the first bit is 1 (Yes in step S113), it codes parity_flag=0 for the coefficient (step S114a). On the other hand, if the entropy coding unit 110 determines that the first bit is not 1 (No in step S113), it codes parity_flag=1 for the coefficient (step S114b).

[0418] Next, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is 3 or greater (step S115). If the entropy coding unit 110 determines that the AbsLevel is 3 or greater (Yes in step S115), it codes gt1_flag=1 for the coefficient (step S116a). On the other hand, if the entropy coding unit 110 determines that the AbsLevel is not 3 or greater (No in step S115), it codes gt1_flag=0 for the coefficient (step S116b).

[0419] Then, the entropy coding unit 110 causes the quantization unit 108 and the inverse quantization unit 112 to update the DQ state according to the coefficient to be coded, that is, according to parity_flag (step S117).

[0420] After performing the processes of steps S111 to S117 on the coefficients included in a sub-block, entropy coding unit 110 similarly performs the processes of steps S111 to S117 on the next coefficient included in that sub-block, thereby encoding at least one flag corresponding to the coefficient from among sig_flag, parity_flag, and gt1_flag for each coefficient included in the sub-block.

[0421] FIG. 55 is a flowchart showing an example of detailed processing operations in step S120 of FIG.

[0422] The entropy coding unit 110 repeats the processes of steps S121 to S123b for each coefficient in the sub-block.

[0423] First, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is 3 or greater (step S121). If the entropy coding unit 110 determines that the AbsLevel is not 3 or greater (No in step S121), it does not code gt2_flag for that coefficient. On the other hand, if the entropy coding unit 110 determines that the AbsLevel is 3 or greater (Yes in step S121), it further determines whether the AbsLevel is 5 or greater (step S122). If the entropy coding unit 110 determines that the AbsLevel is 5 or greater (Yes in step S122), it codes gt2_flag=1 for that coefficient (step S123a). On the other hand, if the entropy coding unit 110 determines that the AbsLevel is not 5 or greater (No in step S122), it codes gt2_flag=0 for that coefficient (step S123b).

[0424] After performing the processes of steps S121 to S123b on the coefficients included in a sub-block, entropy coding unit 110 similarly performs the processes of steps S121 to S123b on the next coefficient included in that sub-block, thereby encoding gt2_flag for each coefficient included in the sub-block as necessary.

[0425] FIG. 56 is a flowchart showing an example of detailed processing operations in step S130 of FIG.

[0426] The entropy coding unit 110 repeats the processes of steps S131 and S132 for each coefficient in the sub-block.

[0427] First, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is 5 or greater (step S131). If the entropy coding unit 110 determines that the AbsLevel is not 5 or greater (No in step S131), it does not code the remainder for that coefficient. On the other hand, if the entropy coding unit 110 determines that the AbsLevel is 5 or greater (Yes in step S131), it codes the remainder for that coefficient (step S132). That is, the entropy coding unit 110 codes (AbsLevel-5) / 2 (step S132).

[0428] After performing the processes of steps S131 to S132 on the coefficients included in a sub-block, the entropy coding unit 110 similarly performs the processes of steps S131 to S132 on the next coefficient included in that sub-block, thereby encoding the remainder for each coefficient included in the sub-block as necessary.

[0429] Fig. 57 is a diagram showing syntax related to entropy coding in the first example of the first aspect. Specifically, Fig. 57 shows the syntax configuration of a stream generated by the processing shown in the flowcharts of Figs. 53 to 56.

[0430] The entropy coding unit 110 codes each coefficient included in each of a plurality of sub-blocks according to the syntax shown in Fig. 57. Note that sig_flag[n] and parity_flag[n] in Fig. 57 are sig_flag and parity_flag of the n-th coefficient included in the sub-block. Also, abs_gt1_flag[n] and abs_gt2_flag[n] in Fig. 57 are gt1_flag and gt2_flag of the n-th coefficient included in the sub-block. Also, abs_remainder[n] and sign_flag[n] in Fig. 57 are remainder and sign_flag of the n-th coefficient included in the sub-block.

[0431] Figure 58 is a diagram showing a specific example of a sub-block including 4x4 coefficients. Figure 59 is a diagram showing a specific example in which each coefficient included in the sub-block of Figure 58 is represented in flag format in the first example of the first aspect. In Figure 59, each coefficient is arranged from left to right in scan order.

[0432] The entropy coding unit 110 scans the sub-blocks shown in FIG. 58. That is, the entropy coding unit 110 acquires each coefficient included in the sub-block in a predetermined order (i.e., scan order). For example, the entropy coding unit 110 acquires each coefficient in a diagonal order from the coefficient at the bottom right of the sub-block to the coefficient at the top left. In the example shown in FIG. 58, the entropy coding unit 110 acquires each coefficient in the order 1, 1, 0, 2, 3, 4, 7, 5, 4, 5, 3, 6, 10, 8, 10, 20 as shown in FIG. Then, the entropy coding unit 110 converts each coefficient into a flag format in the acquired order.

[0433] Specifically, if a coefficient is "1", the entropy coding unit 110 codes sig_flag=1, parity_flag=0, and gt1_flag=0 for that coefficient because AbsLevel is "1".

[0434] Furthermore, if a coefficient is "0", the entropy coding unit 110 codes sig_flag=0 for that coefficient. Furthermore, if a coefficient is "4", the AbsLevel is "4", so the entropy coding unit 110 codes sig_flag=1, parity_flag=1, gt1_flag=1, and gt2_flag=0 for that coefficient. Furthermore, if a coefficient is "7", the AbsLevel is "7", so the entropy coding unit 110 codes sig_flag=1, parity_flag=0, gt1_flag=1, gt2_flag=1, and remainder=1 for that coefficient.

[0435] The entropy coding unit 110 also arithmetically codes sig_flag, parity_flag, gt1_flag, gt2_flag, and remainder. For the arithmetic coding, for example, CABAC (Context-Based Adaptive Binary Arithmetic Coding) is used. An adaptive variable symbol occurrence probability may be used for sig_flag, parity_flag, gt1_flag, and gt2_flag, while a fixed symbol occurrence probability may be used for remainder. That is, the entropy coding unit 110 arithmetically codes sig_flag, parity_flag, gt1_flag, and gt2_flag while updating the symbol occurrence probability using CABAC. Meanwhile, for remainder, the entropy coding unit 110 determines the above-described Rice parameter for the remainder and binarizes the remainder using a binarization method according to the Rice parameter. Then, the entropy coding unit 110 performs arithmetic coding on the binarized remainder using a fixed symbol occurrence probability by bypassing the CABAC process.

[0436] Furthermore, the entropy decoding unit 202 in the first example of the first aspect sequentially decodes the flag and remainder of each coded coefficient configured by the syntax shown in Fig. 57. Then, the entropy decoding unit 202 decodes the coded coefficient by calculating the AbsLevel for each coded coefficient as described above using the decoded flag, remainder, etc.

[0437] <Effects of the first example of the first aspect> In the first example of the first aspect, the amount of code for remainder can be reduced by using flags such as gt1_flag and gt2_flag in coding the coefficients.

[0438] Generally, in a coding unit or a transform unit, the lower the sub-block is located (i.e., the upper left side), the more non-zero coefficients there are in that sub-block. In the example shown in Figure 59, gt1_flag and gt2_flag are used for many coefficients included in the sub-block. In addition, when there are many coefficients with values ​​of 3 or more in a sub-block, the code amount of that sub-block may be increased by gt1_flag and gt2_flag.

[0439] Furthermore, when each flag is arithmetically coded while updating the symbol occurrence probability by CABAC, the processing load is greater than when arithmetically coded using bypass processing. Therefore, when each flag is arithmetically coded while updating the symbol occurrence probability by CABAC, the processing load increases as the number of flags increases. Therefore, the number of flags may be limited.

[0440] <Second Example of First Aspect> FIG. 60 is a flowchart showing the overall processing operation of the entropy encoding unit 110 in the second example of the first aspect.

[0441] In a second example of the first aspect, unlike the first example, the number of gt1_flag and gt2_flag used in a sub-block is limited. For example, the number of gt1_flag is limited to n_1, and the number of gt2_flag is limited to n_2. For example, n_1 is an integer that satisfies 1≦n_1≦16, and n_2 is an integer that satisfies 1≦n_2≦16.

[0442] For example, as shown in FIG. 60, the entropy coding unit 110 repeats the processes of steps S210 to S230 and S140 for each sub-block so that each coefficient in the sub-block is coded.

[0443] Specifically, first, the entropy coding unit 110 codes the sig_flag of each coefficient in the sub-block, and if the sig_flag is 1, codes the parity_flag of the coefficient. Furthermore, if the coefficient is one of the n_1 non-zero coefficients, the entropy coding unit 110 codes the gt1_flag of the coefficient based on whether the AbsLevel of the coefficient is 3 or greater (step S210). The n_1 non-zero coefficients are those that are within the n_1 position in scan order among the non-zero coefficients in the sub-block.

[0444] Next, for each coefficient in the sub-block, if the coefficient is within the n_2th coefficient having an AbsLevel of 3 or greater, entropy coding unit 110 encodes the gt2_flag of the coefficient based on whether the AbsLevel of the coefficient is 5 or greater (step S220). The n_2th coefficient having an AbsLevel of 3 or greater is the n_2th coefficient in scan order among the coefficients in the sub-block having an AbsLevel of 3 or greater.

[0445] Next, for each coefficient in the sub-block, if the AbsLevel of that coefficient is equal to or greater than the baseLevel, the entropy coding unit 110 codes the coefficient's remainder=(AbsLevel-baseLevel) / 2 (step S230). The baseLevel has a value that varies depending on the number of times gt1_flag and gt2_flag are used. For example, the initial value of baseLevel is 5. Furthermore, when n_2 gt2_flag are used, the baseLevel is updated from its initial value of 5 to 3, and thereafter, when n_1 gt1_flag are used (for example, n_1>n_2), the baseLevel is updated from 3 to 1.

[0446] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140).

[0447] After performing the processes of steps S210 to S230 and S140 on the sub-block, entropy encoding section 110 similarly performs the processes of steps S210 to S230 and S140 on the other sub-blocks.

[0448] Fig. 61 is a flowchart showing an example of detailed processing operations in step S210 of Fig. 60. The flowchart shown in Fig. 61 includes steps S111 to S117 of the flowchart shown in Fig. 54, and further includes step S211.

[0449] That is, the entropy coding unit 110 repeats the processes of steps S111 to S117 and S211 for each coefficient in the sub-block.

[0450] Specifically, the entropy coding unit 110 executes the processes of steps S111 to S114b, as in the first example described above. Thereafter, the entropy coding unit 110 determines whether the coefficient a to be coded is one of the n_1-th coefficients that is not 0 (step S211). Here, if the entropy coding unit 110 determines that the coefficient a to be coded is one of the n_1-th coefficients that is not 0 (Yes in step S211), it executes the processes of steps S115 to S117, as in the first example described above. On the other hand, if the entropy coding unit 110 determines that the coefficient a to be coded is not one of the n_1-th coefficients that is not 0 (No in step S211), it executes the process of step S117 without executing the processes of steps S115 to S116b. That is, in the first example, the entropy coding unit 110 uses gt1_flag for all non-zero coefficients in the sub-block. However, in the second example, after using gt1_flag n_1 times, the entropy coding unit 110 does not use gt1_flag for any coefficient that is not 0 when coding that coefficient thereafter.

[0451] Fig. 62 is a flowchart showing an example of detailed processing operations in step S220 of Fig. 60. The flowchart shown in Fig. 62 includes steps S122 to S123b of the flowchart shown in Fig. 55, and includes step S221 instead of step S121.

[0452] That is, the entropy coding unit 110 repeats the processes of steps S221 and S122 to S123b for each coefficient in the sub-block.

[0453] Specifically, the entropy coding unit 110 determines whether the coefficient a to be coded is within the n_2-th coefficient that satisfies AbsLevel≧3 (step S221). If the entropy coding unit 110 determines that the coefficient a is not within the n_2-th coefficient that satisfies AbsLevel≧3 (No in step S221), the entropy coding unit 110 does not code gt2_flag for the coefficient a. On the other hand, if the entropy coding unit 110 determines that the coefficient a is within the n_2-th coefficient that satisfies AbsLevel≧3 (Yes in step S221), the entropy coding unit 110 further determines whether the AbsLevel is 5 or greater (step S122). If the entropy coding unit 110 determines that the AbsLevel is 5 or greater (Yes in step S122), the entropy coding unit 110 codes gt2_flag=1 for the coefficient (step S123a). On the other hand, if the entropy coding unit 110 determines that the AbsLevel is not 5 or more (No in step S122), it codes gt2_flag=0 for the coefficient (step S123b).

[0454] After performing the processes of steps S221 and S122 to S123b on the coefficients included in a sub-block, entropy coding unit 110 similarly performs the processes of steps S221 and S122 to S123b on the next coefficient included in that sub-block, thereby encoding gt2_flag for each coefficient included in the sub-block as necessary.

[0455] FIG. 63 is a flowchart showing an example of detailed processing operations in step S230 of FIG.

[0456] The entropy coding unit 110 first sets baseLevel to 5 (step S231). Then, the entropy coding unit 110 repeats the processes of steps S232 to S236 for each coefficient in the sub-block.

[0457] Specifically, the entropy coding unit 110 determines whether or not n_1 gt1_flag flags are used for each coefficient preceding the coding target coefficient a in the scan order within the sub-block (step S232). If the entropy coding unit 110 determines that n_1 gt1_flag flags are used (Yes in step S232), it updates baseLevel to 1 (step S233).

[0458] On the other hand, if the entropy coding unit 110 determines that the gt1_flag is not used n_1 times (No in step S232), it further determines the number of gt2_flag. That is, the entropy coding unit 110 determines whether or not the gt2_flag is used n_2 times for each coefficient that precedes the coding target coefficient a in the scan order in the sub-block (step S234). Here, if the entropy coding unit 110 determines that the gt2_flag is used n_2 times (Yes in step S234), it updates baseLevel to 3 (step S235).

[0459] On the other hand, if the entropy coding unit 110 determines that the gt1_flag has not been used n_2 times (No in step S234), it codes "remainder" for the coefficient a (step S236). After the processes of steps S233 and S235 have been performed, the entropy coding unit 110 also codes "remainder" for the coefficient a (step S236). That is, the entropy coding unit 110 codes (AbsLevel-baseLevel) / 2. Note that "remainder" is coded when AbsLevel≧baseLevel is satisfied. Note that, if neither the process of step S233 nor S235 has been performed, baseLevel is 5. Note that, if the process of step S233 has been performed, baseLevel is 1, and if the process of step S235 has been performed, baseLevel is 3. Note that, in the flowchart shown in FIG. 63, n_1 may be greater than n_2.

[0460] After performing the processes of steps S232 to S236 on the coefficients included in a sub-block, the entropy coding unit 110 similarly performs the processes of steps S232 to S236 on the next coefficient included in that sub-block, thereby encoding the remainder for each coefficient included in the sub-block as necessary.

[0461] Fig. 64 is a diagram showing syntax related to entropy coding in the second example of the first aspect. Specifically, Fig. 64 shows the syntax configuration of a stream generated by the processing shown in the flowcharts of Figs. 60 to 63.

[0462] The entropy coding unit 110 codes each coefficient included in each of the multiple sub-blocks according to the syntax shown in FIG.

[0463] Here, the syntax shown in FIG. 64 further includes setting or updating of two counters and setting or updating of baseLevel, compared to the syntax shown in FIG. 57. The two counters are numNonZero and numUpper3. numNonZero is initialized to 0, and if sig_flag[n] is 1, it is incremented. Then, if sig_flag[n] is 1 and numNonZero is less than or equal to n_1, abs_gt1_flag[n] is encoded. numUpper3 is initialized to 0. Then, if abs_gt1_flag[n] is 1 and numUpper3 is less than or equal to n_2, abs_gt2_flag[n] is encoded, and numUpper3 is incremented.

[0464] In encoding remainder, first, numNonZero and numUpper3 are initialized to 0, and baseLevel is initialized to 5. Then, if absLevel[n] is not 0, numNonZero is incremented, and further, if absLevel[n] is 3 or greater, numUpper3 is incremented. Note that absLevel[n] is the AbsLevel of the n-th coefficient. Then, if absLevel[n] is baseLevel or greater, (AbsLevel-baseLevel) / 2 of the n-th coefficient is encoded as abs_remainder[n]. Then, if numNonZero is n_1 or greater, baseLevel is updated to 1. Furthermore, if baseLevel is 5 and numUpper3 is n_2 or greater, its baseLevel is updated to 3.

[0465] Fig. 65 is a diagram showing a specific example in which each coefficient included in the sub-block of Fig. 58 is expressed in flag format in the second example of the first aspect. In Fig. 65, each coefficient is arranged from left to right in scan order.

[0466] In the example shown in FIG. 65, n_1=8 and n_2=1. Therefore, gt2_flag is used for the first coefficient in scan order with AbsLevel≧3, and is not used for other coefficients after that coefficient. Also, gt1_flag is used for the first eight coefficients in scan order that are not 0, and is not used for any coefficients after that. Furthermore, baseLevel is initially set to 5, but is updated to 3 when gt2_flag can no longer be used, and is updated to 1 when gt1_flag can no longer be used. Then, using the baseLevel updated in this way, remainder is calculated and coded by (AbsLevel−baseLevel) / 2.

[0467] Furthermore, the entropy decoding unit 202 in the second example of the first aspect sequentially decodes the flag and remainder of each coded coefficient configured by the syntax shown in Fig. 64. Then, the entropy decoding unit 202 decodes the coded coefficient by calculating the AbsLevel for each coded coefficient as described above using the decoded flag, remainder, etc.

[0468] <Effects of the second example of the first aspect> In this second example, the number of flags (for example, gt1_flag or gt2_flag) used for coefficients in a sub-block is limited, which makes it possible to reduce the amount of code required for the flags.

[0469] Specifically, in the example shown in FIG. 65, the numbers of gt1_flag and gt2_flag are limited to 8 and 1, respectively. Therefore, after 8 gt1_flag are used, gt1_flag is not used for a coefficient even if the coefficient is not 0. Similarly, after 1 gt2_flag is used, gt2_flag is not used for that coefficient even if the AbsLevel of the coefficient is 3 or more. Therefore, in the second example, compared to the first example (e.g., the example shown in FIG. 59), the number of occurrences of each of gt1_flag and gt2_flag can be reduced, thereby reducing the amount of coding of these flags. Furthermore, when CABAC with variable symbol occurrence probability is used to code gt1_flag and gt2_flag, the processing load of the coding can be reduced. In other words, CABAC with variable symbol occurrence probability imposes a greater processing load than CABAC bypass processing. However, in the second example, the number of flags to which CABAC with variable symbol occurrence probabilities is applied can be reduced, so the processing load can be reduced more than in the first example. In other words, in the second example, it is possible to reduce both the amount of coding of coefficients and the processing load required for coding the coefficients.

[0470] In this second example, in FIG. 65, the maximum number for which gt1_flag is used is n_1=8, and the maximum number for which gt2_flag is used is n_2=1. However, the maximum numbers are not limited to these and may be other values. Furthermore, the maximum numbers n_1 and n_2 may be predetermined fixed values, or may be set or updated as appropriate. That is, the entropy encoding unit 110 may adaptively determine the maximum numbers n_1 and n_2, respectively.

[0471] For example, as described above, when coding each coefficient in a sub-block, a specific flag for the coefficient, i.e., a specific type of flag other than gt1_flag and gt2_flag, is coded first. The specific type of flag may be, for example, at least one of sig_flag and parity_flag. After the specific type of flag, gt1_flag for each coefficient is coded, followed by gt2_flag for each coefficient. In this case, the entropy coding unit 110 may determine the maximum number n_1 as a value that depends on the total number M of flags of the specific type. Alternatively, the entropy coding unit 110 may determine the maximum number n_1 as a value that depends on the total number Ma of flags of the specific type that indicate a specific value, such as 0 or 1. The entropy coding unit 110 may also determine the maximum number n_2 as a value that depends on the total number N of at least one flag of the specific type and gt1_flag. Alternatively, the entropy encoding unit 110 may determine the maximum number n_2 as a value that depends on the total number Na of flags that indicate a specific value, such as 0 or 1, among at least one flag of the specific type and gt1_flag. Note that the total numbers M, Ma, N, and Na of flags described above may all be the total number of flags that have already been encoded.

[0472] In the second example, a method for not encoding the flags gt1_flag and gt2_flag when the maximum number of the flags is reached has been described, but the present disclosure is not limited to these flags. For example, a flag other than gt1_flag and gt2_flag may be coded using a similar method as long as the flag is related to coding of the absolute value of the coefficient and is coded using CABAC, which involves updating the symbol occurrence probability.

[0473] [Second mode] In the second example of the first aspect, the number of gt1_flag used is limited to a maximum number n_1 or less, and the number of gt2_flag used is limited to a maximum number n_2 or less. In this second aspect, n_2=0. That is, in the second aspect, gt2_flag is not used.

[0474] FIG. 66 is a flowchart showing the overall processing operation of the entropy encoding unit 110 in the second mode.

[0475] The entropy coding unit 110 repeats the processes of steps S210, S330, and S140 for each sub-block so that each coefficient in the sub-block is coded.

[0476] Specifically, first, for each coefficient in the sub-block, the entropy coding unit 110 codes the sig_flag of that coefficient, and if the sig_flag is 1, codes the parity_flag of that coefficient. Furthermore, if the coefficient is one of the n_1 non-zero coefficients, the entropy coding unit 110 codes the gt1_flag of that coefficient based on whether the AbsLevel of that coefficient is 3 or greater (step S210).

[0477] Next, for each coefficient in the sub-block, if the AbsLevel of that coefficient is equal to or greater than the baseLevel, the entropy coding unit 110 codes the coefficient's remainder=(AbsLevel-baseLevel) / 2 (step S330). In this second mode, the baseLevel has a value that varies depending on the number of times gt1_flag is used. For example, the initial value of baseLevel is 3. Furthermore, when n_1 times gt1_flag is used, the baseLevel is updated from 3 to 1.

[0478] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140).

[0479] After performing the processes of steps S210, S330, and S140 for a sub-block, entropy encoding unit 110 similarly performs the processes of steps S210, S330, and S140 for other sub-blocks. Note that the process of step S210 is performed according to the flowchart shown in FIG.

[0480] FIG. 67 is a flowchart showing an example of detailed processing operations in step S330 of FIG.

[0481] The entropy encoding unit 110 first sets baseLevel to 3 (step S235). Then, the entropy encoding unit 110 repeats the processes of steps S232, S233, and S236 for each coefficient in the sub-block.

[0482] Specifically, the entropy coding unit 110 determines whether or not n_1 gt1_flag flags are used for each coefficient preceding the coding target coefficient a in the scan order within the sub-block (step S232). If the entropy coding unit 110 determines that n_1 gt1_flag flags are used (Yes in step S232), it updates baseLevel to 1 (step S233).

[0483] On the other hand, if the entropy coding unit 110 determines that the gt1_flag has not been used n_1 times (No in step S232), it codes "remainder" for the coefficient a (step S236). Furthermore, even after the processing of step S233 has been performed, the entropy coding unit 110 codes "remainder" for the coefficient a (step S236). That is, the entropy coding unit 110 codes (AbsLevel-baseLevel) / 2. Note that the coding of "remainder" is performed when AbsLevel≧baseLevel is satisfied. Furthermore, baseLevel is 3 if the processing of step S233 has not been performed, and is 1 if the processing of step S233 has been performed.

[0484] After performing the processes of steps S232, S233, and S236 on the coefficients included in the sub-block, the entropy coding unit 110 similarly performs the processes of steps S232, S233, and S236 on the next coefficient included in the sub-block, thereby encoding the remainder for each coefficient included in the sub-block as necessary.

[0485] Figure 68 is a diagram showing syntax related to entropy coding in the second aspect. Specifically, Figure 68 shows the syntax configuration of a stream generated by the processing shown in the flowcharts of Figures 61, 66, and 67.

[0486] The entropy coding unit 110 codes each coefficient included in each of the multiple sub-blocks according to the syntax shown in FIG.

[0487] Here, the syntax shown in Fig. 68 does not include setting or updating of numUpper3 and encoding of gt2_flag, unlike the syntax shown in Fig. 64. Also, in encoding of remainder, baseLevel is initialized to 3, unlike the syntax shown in Fig. 64.

[0488] Figure 69 is a diagram showing a specific example in which each coefficient included in the sub-block of Figure 58 is represented in flag format in the second aspect. In Figure 69, each coefficient is arranged from left to right in scan order.

[0489] In the example shown in FIG. 69, n_1=16. Therefore, gt1_flag is used for the first 16 coefficients in scan order that are not 0, and is not used for subsequent coefficients. Furthermore, baseLevel is initially set to 3, but is updated to 1 when gt1_flag can no longer be used. Then, using baseLevel updated in this way, remainder is calculated and coded by (AbsLevel-baseLevel) / 2.

[0490] Furthermore, the entropy decoding unit 202 in the second aspect sequentially decodes the flag and remainder of each coded coefficient configured by the syntax shown in Fig. 68. Then, the entropy decoding unit 202 calculates the AbsLevel for each coded coefficient as described above using the decoded flag, remainder, etc., thereby decoding the coded coefficient.

[0491] <Effects in the second mode> In this second aspect, gt2_flag is not used. This reduces the amount of code for the flag and the processing load. Also, as in the second example of the first aspect, the number of gt1_flag is limited to n_1 or less, which further reduces the processing load.

[0492] Specifically, in the example shown in FIG. 69, gt2_flag is not used, and the number of gt1_flag is limited to 16 or less. Therefore, after 16 gt1_flag are used, gt1_flag is not used for a coefficient even if the coefficient is not 0. Furthermore, as in the second example of the first aspect, the number of gt1_flag may be limited to 8 or less, or may be limited to any number other than 16 or 8. Therefore, in the second aspect, the amount of coding of flags can be further reduced compared to the second example of the first aspect (e.g., the example shown in FIG. 65). Furthermore, when CABAC with variable symbol occurrence probability is used to code gt1_flag and gt2_flag, the processing load of the coding can be reduced. In other words, CABAC with variable symbol occurrence probability imposes a greater processing load than CABAC bypass processing. However, in this second aspect, the number of flags to which CABAC with variable symbol occurrence probabilities is applied can be further reduced, so the processing load can be further reduced compared to the second example of the first aspect.

[0493] [Third aspect] In the first and second aspects, the rice parameter is determined by sum_minus1, and remainder is encoded using an encoding method according to the rice parameter. Specifically, the rice parameter is determined by comparing sum_minus1 with a threshold value (e.g., 12 or 25).

[0494] In the third embodiment, as in the second embodiment, the number of gt1_flag and gt2_flag is limited, and the baseLevel is updated according to the number of times these flags are used. Furthermore, in the third embodiment, the threshold value compared with sum_minus1 to determine the Rice parameter is changed according to the baseLevel.

[0495] 70 is a flowchart showing the overall processing operation of the entropy encoding unit 110 in the third aspect. Note that the flowchart shown in Fig. 70 includes step S430 instead of step S230 included in the flowchart in Fig. 60.

[0496] In the third aspect, similarly to the second example of the first aspect, the number of gt1_flag and gt2_flag used in a sub-block is limited. For example, the number of gt1_flag is limited to n_1, and the number of gt2_flag is limited to n_2. For example, n_1 is an integer that satisfies 1≦n_1≦16, and n_2 is an integer that satisfies 1≦n_2≦16.

[0497] For example, as shown in FIG. 70, the entropy coding unit 110 repeats the processes of steps S210, S220, S430, and S140 for each sub-block so that each coefficient in the sub-block is coded.

[0498] Specifically, the entropy coding unit 110 performs the processes of steps S210 and S220, similar to the second example of the first aspect. That is, the entropy coding unit 110 first encodes the sig_flag of each coefficient in the sub-block, and if the sig_flag is 1, encodes the parity_flag of the coefficient. Furthermore, if the coefficient is one of the n_1 or smaller coefficients that is not 0, the entropy coding unit 110 encodes the gt1_flag of the coefficient based on whether the AbsLevel of the coefficient is 3 or greater (step S210). Then, if the coefficient is one of the n_2 or smaller coefficients in the sub-block that has an AbsLevel of 3 or greater, the entropy coding unit 110 encodes the gt2_flag of the coefficient based on whether the AbsLevel of the coefficient is 5 or greater (step S220).

[0499] Next, for each coefficient in the sub-block, if the AbsLevel of that coefficient is equal to or greater than the baseLevel, the entropy coding unit 110 encodes the coefficient's remainder=(AbsLevel-baseLevel) / 2 (step S430). At this time, in the third mode, the entropy coding unit 110 determines a different rice parameter depending on the baseLevel, and encodes the remainder using an encoding method according to the rice parameter.

[0500] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140).

[0501] After performing the processes of steps S210, S220, S430, and S140 on a sub-block, entropy encoding section 110 similarly performs the processes of steps S210, S220, S430, and S140 on other sub-blocks.

[0502] Fig. 71 is a flowchart showing an example of detailed processing operations in step S430 of Fig. 70. Note that the flowchart shown in Fig. 71 includes step S431 instead of step S236 included in the flowchart of Fig. 63.

[0503] As in the second example of the first aspect, the entropy coding unit 110 first sets baseLevel to 5 (step S231). Then, the entropy coding unit 110 repeats the processes of steps S232 to S235 and S431 for each coefficient in the sub-block.

[0504] Specifically, the entropy encoding unit 110 performs the processes of steps S232 to S235 on the coefficient a to be encoded, similarly to the second example of the first aspect.

[0505] Then, when the entropy coding unit 110 determines that n_2 gt2_flags are not used for the coefficients preceding the coding target coefficient a in the scanning order within the sub-block (No in step S234), it codes "remainder" for the coefficient a (step S431). After the processes of steps S233 and S235 are performed, the entropy coding unit 110 also codes "remainder" for the coefficient a (step S236). That is, the entropy coding unit 110 codes (AbsLevel-baseLevel) / 2. Note that the coding of "remainder" is performed when AbsLevel≧baseLevel is satisfied.

[0506] After performing the processes of steps S232 to S235 and S431 on the coefficients included in a sub-block, the entropy coding unit 110 similarly performs the processes of steps S232 to S235 and S431 on the next coefficient included in that sub-block, thereby encoding the remainder for each coefficient included in the sub-block as necessary.

[0507] Here, in step S431, if neither the process of step S233 nor the process of step S235 has been performed, baseLevel is 5. Furthermore, if the process of step S233 has been performed, baseLevel is 1, and if the process of step S235 has been performed, baseLevel is 3. In this third aspect, the entropy encoding unit 110 determines a different rice parameter depending on the baseLevel, and encodes the remainder using an encoding method depending on the rice parameter. The encoding method depending on the rice parameter is, for example, one of the three encoding methods shown in FIG. 50.

[0508] Specifically, in the third aspect, the threshold for determining the rice parameter is changed according to the value of baseLevel.

[0509] That is, when baseLevel = 5, as in the first and second aspects, 12 and 25 are used as the thresholds. Therefore, when sum_minus1 < 12, the entropy encoding unit 110 determines the Rice parameter g = 0. Also, when 12 ≤ sum_minus1 < 25, the entropy encoding unit 110 determines the Rice parameter g = 1. Further, when 25 ≤ sum_minus1, the entropy encoding unit 110 determines the Rice parameter g = 2. The entropy encoding unit 110 selects an encoding method corresponding to the thus determined Rice parameter, and uses that encoding method to Golomb-Rice encode the remainder, that is, (AbsLevel - baseLevel) / 2.

[0510] Also, when baseLevel = 3, as the thresholds, thres_1 which is a value smaller than 12 and thres_2 which is a value smaller than 25 are used. Note that thres_1 and thres_2 satisfy the relationship thres_1 < thres_2. Therefore, when sum_minus1 < thres_1, the entropy encoding unit 110 determines the Rice parameter g = 0. Also, when thres_1 ≤ sum_minus1 < thres_2, the entropy encoding unit 110 determines the Rice parameter g = 1. Further, when thres_2 ≤ sum_minus1, the entropy encoding unit 110 determines the Rice parameter g = 2. The entropy encoding unit 110 selects an encoding method corresponding to the thus determined Rice parameter, and uses that encoding method to Golomb-Rice encode the remainder, that is, (AbsLevel - baseLevel) / 2.

[0511] Also, when baseLevel = 1, as the threshold values, thres_3 which is smaller than thres_1 and thres_4 which is smaller than thres_2 are used. Note that thres_3 and thres_4 satisfy the relationship thres_3 < thres_4. Therefore, when sum_minus1 < thres_3, the entropy encoding unit 110 determines the Rice parameter as g = 0. Also, when thres_3 ≤ sum_minus1 < thres_4, the entropy encoding unit 110 determines the Rice parameter as g = 1. Also, when thres_4 ≤ sum_minus1, the entropy encoding unit 110 determines the Rice parameter as g = 2. The entropy encoding unit 110 selects an encoding method corresponding to the Rice parameter determined in this way, and uses that encoding method to perform Golomb-Rice encoding on the remainder, that is, (AbsLevel - baseLevel) / 2.

[0512] As a more specific example, the above four threshold values are thres_1 = 2, thres_2 = 12, thres_3 = 1, and thres_4 = 2.

[0513] In such an example, when baseLevel = 3, the Rice parameter is determined as follows.

[0514] When sum_minus1 < 2, the Rice parameter is determined as g = 0. This is because when g = 0, the code length of the remainder can be made the shortest. That is, when sum_minus1 < 2, for example, as shown in FIG. 51, the five peripheral coefficients around the coefficient to be encoded are on average 1 or 2. Therefore, the coefficient to be encoded is predicted to be 3 or 4, and the remainder of the coefficient to be encoded is predicted to be 0. Thereby, as shown in FIG. 52, when the Rice parameter is g = 0, the code length of the remainder can be made the shortest.

[0515] When 2≦sum_minus1<12, the Rice parameter is determined to be g=1. This is because, when g=1, the code length of remainder can be made the shortest. In other words, when 2≦sum_minus1<12, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 3 or 4 on average. Therefore, the coefficient to be coded is predicted to be 5 or 6, and the remainder of the coefficient to be coded is predicted to be 1. As a result, when the Rice parameter is g=1, the code length of the remainder can be made the shortest, as shown in FIG. 52.

[0516] When 12≦sum_minus1, the Rice parameter is determined to be g=2. This is because, when g=2, the code length of remainder can be made the shortest. In other words, when 12≦sum_minus1, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 5 or more on average. Therefore, the coefficient to be coded is predicted to be 7 or more, and the remainder of the coefficient to be coded is predicted to be 2 or more. As a result, when the Rice parameter is g=2, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0517] Also, when baseLevel=1, the rice parameter is determined as follows:

[0518] When sum_minus1=0, the Rice parameter is determined to be g=0. This is because, when g=0, the code length of the remainder can be made the shortest. In other words, when sum_minus1=0, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 0 or 1 on average. Therefore, the coefficient to be coded is predicted to be 1 or 2, and the remainder of the coefficient to be coded is predicted to be 0. As a result, when the Rice parameter is g=0, the code length of the remainder can be made the shortest, as shown in FIG. 52.

[0519] When 1≦sum_minus1<2, the Rice parameter is determined to be g=1. This is because, when g=1, the code length of remainder can be made the shortest. In other words, when 1≦sum_minus1<2, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 1 or 2 on average. Therefore, the coefficient to be coded is predicted to be 3 or 4, and the remainder of the coefficient to be coded is predicted to be 1. As a result, when the Rice parameter is g=1, the code length of the remainder can be made the shortest, as shown in FIG. 52.

[0520] When 2≦sum_minus1, the Rice parameter is determined to be g=2. This is because when g=2, the code length of remainder can be made the shortest. In other words, when 2≦sum_minus1, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 3 or more on average. Therefore, the coefficient to be coded is predicted to be 5 or more, and the remainder of the coefficient to be coded is predicted to be 2 or more. As a result, when the Rice parameter is g=2, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0521] <Effects in the third mode> In this third aspect, compared to the second example of the first aspect, a more appropriate rice parameter is determined, which may reduce the amount of code for remainder. Note that in this third aspect, the rice parameter is switched depending on the baseLevel, but it is not limited to the baseLevel, and the rice parameter may also be switched depending on whether the number of times a flag (e.g., gt1_flag or gt2_flag) used when encoding a coefficient has reached the above-mentioned maximum number. Note that when encoding remainder, the binarization method for remainder may be switched depending on the baseLevel without using the rice parameter.

[0522] In the third aspect, the threshold for determining the rice parameter is changed depending on the value of baseLevel. However, the rice parameter may be determined based on the difference between the baseLevel and the predicted value of the absolute value of the coefficient to be coded, without changing the threshold. That is, in the third aspect, by changing the threshold depending on baseLevel, different rice parameters may be determined for the same numerical value (for example, the same sum_minus1) compared with the threshold. However, by changing the numerical value (for example, the above-mentioned difference) compared with the threshold depending on baseLevel without changing the threshold, different rice parameters may be determined. Even in this case, the same effect as in the third aspect can be achieved.

[0523] <Summary of the second embodiment> As described above, in this embodiment, flags are used to encode coefficients, and the number of flags can be appropriately limited.

[0524] Fig. 72 is a flowchart showing the processing operations of the encoding device 100 according to this embodiment. Note that the flowchart shown in Fig. 72 shows the processing operations of the second example of the first aspect or the third aspect.

[0525] The encoding device 100 according to this embodiment includes a circuit and a memory connected to the circuit, and the circuit performs the processes of steps S10 and S20 in operation.

[0526] That is, the circuit encodes the absolute value of each of the multiple coefficients included in the constituent unit of the transformed and quantized image in a predetermined order (step S10). Next, the circuit encodes a sign indicating whether the multiple coefficient is positive or negative for each of the multiple coefficients (step S20). Here, in encoding the absolute value (step S10), the circuit encodes a signal indicating parity, which is the least significant bit of the absolute value (step S11a). Next, the circuit determines whether to use a flag to encode the portion of the absolute value other than the least significant bit based on a first condition and a second condition (step S12a). Then, if it determines to use a flag, the circuit encodes the flag using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with symbol occurrence probability updates (step S13a). The first condition is based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of flags used in the constituent unit. For example, the signal indicating parity is parity_flag.

[0527] This allows the determination of whether to use a flag to be determined based not only on the first condition based on the magnitude of the absolute value of the coefficient, but also on the second condition for limiting the number of flags, thereby making it possible to appropriately limit the number of flags.

[0528] Note that when flags are used, the amount of code required for absolute values ​​of coefficients can be reduced. However, when flags are not used, the amount of code required for absolute values ​​of coefficients, specifically, the amount of code required for remainders representing absolute values ​​of coefficients, may increase. Furthermore, CABAC, which uses adaptive, variable symbol occurrence probabilities, may be applied to encoding flags, while bypass processing of CABAC, which uses fixed symbol occurrence probabilities, may be applied to encoding remainders. Here, CABAC, which uses variable symbol occurrence probabilities, tends to impose a greater processing load than bypass processing. Therefore, a coding device according to one embodiment of the present disclosure can appropriately limit the number of flags, thereby achieving both a reduction in the amount of code required for absolute values ​​and a reduction in the processing load required for encoding the absolute values.

[0529] Furthermore, in encoding the absolute value (step S10), the circuit may count the number of encoded flags each time a flag is encoded, and if the first condition is satisfied but the second condition is not satisfied, determine that no flag is used to encode parts of the absolute value other than the least significant bit. Here, the second condition is that the count corresponding to the number of counted flags is less than a limit number. The limit number is, for example, the above-mentioned maximum number, and a specific example of this is the above-mentioned n_1 or n_2.

[0530] For example, in the process of step S211 in Fig. 61, the number of coded gt1_flag is counted. Then, if the second condition that the count number is less than the limit number is satisfied, the processes of steps S115 to S116b are performed. On the other hand, if the second condition is not satisfied, the processes of steps S115 to S116b are not performed even if the condition AbsLevel ≠ 0 (i.e., the first condition) is satisfied. In other words, it is determined that gt1_flag will not be used to code the absolute value.

[0531] Furthermore, in the process of step S221 in Fig. 62, the number of coded gt2_flag is counted. Then, if the second condition that the count number is less than the limit number is satisfied, the processes of steps S122 to S123b are performed. On the other hand, if the second condition is not satisfied, the processes of steps S122 to S123b are not performed even if the condition AbsLevel≧3 (i.e., the first condition) is satisfied. In other words, it is determined that gt2_flag will not be used to code the absolute value.

[0532] This allows for a more appropriate limit on the number of flags, since each time a flag is coded the number of coded flags is counted.

[0533] The first condition may be that the absolute value is not equal to a first value, or that the absolute value is equal to or greater than a second value. For example, the first value may be 0 and the second value may be 3.

[0534] This makes it possible to appropriately limit the number of flags (e.g., gt1_flag) indicating whether or not the absolute value of a coefficient is 3 or greater for a coefficient whose absolute value is not 0. Alternatively, it is possible to appropriately limit the number of flags (e.g., gt2_flag) indicating whether or not the absolute value of a coefficient is 5 or greater for a coefficient whose absolute value is 3 or greater.

[0535] The flag may also consist of a plurality of different flags.

[0536] This makes it possible to appropriately limit the number of each of the multiple types of flags, such as the above-mentioned gt1_flag and gt2_flag. The multiple types of flags may also include sig_flag and parity_flag.

[0537] Furthermore, in encoding the absolute value (step S10), if a flag cannot be used or if the absolute value cannot be expressed by at least one flag alone, the circuit may derive a remainder consisting of a numerical value for expressing the absolute value, and may encode the derived remainder by CABAC bypass processing.

[0538] This allows the absolute values ​​of the coefficients to be appropriately coded as flags or as a data group consisting of at least one flag and a remainder.

[0539] 73 is a flowchart showing the coding of the remaining part by the coding device 100 in this embodiment. The flowchart shown in FIG. 73 shows the processing operation of the third aspect.

[0540] In deriving the remainder, the circuit determines a base level (i.e., the above-mentioned baseLevel) that indicates a different value depending on whether a count corresponding to the number of flags coded for each coefficient preceding the coefficient corresponding to the remainder has reached a limit (step S11b). Next, the circuit derives the remainder using the determined base level (step S12b). Furthermore, in encoding the remainder, the circuit selects a binarization method corresponding to the remainder from a plurality of different binarization methods based on the base level used in deriving the remainder (step S13b). Next, the circuit binarizes the remainder according to the selected binarization method (step S14b) and arithmetically codes the binarized remainder (step S15b).

[0541] For example, step S11b corresponds to the processing of steps S231, S233, and S235 shown in Fig. 71. In other words, the base level determined when the count number has reached the limit is, for example, 1 or 3, which is smaller than the base level (for example, 5) determined when the limit has not been reached. Furthermore, steps S12b to S15b correspond to the processing of step S431 shown in Fig. 71.

[0542] This allows the remainder for the absolute value of the coefficient to be appropriately derived using the base level. Furthermore, since the binarization method used for binarizing the remainder is selected based on the base level, the amount of code for the remainder can be appropriately reduced.

[0543] Fig. 74 is a flowchart showing the processing operations of the decoding device 200 according to this embodiment. Note that the flowchart shown in Fig. 74 shows the decoding processing operations corresponding to the encoding according to the second example of the first aspect or the third aspect.

[0544] The decoding device 200 in this embodiment includes a circuit and a memory connected to the circuit, and the circuit performs the processes of steps S30 and S40 in operation.

[0545] That is, the circuit decodes the absolute value of each of the multiple coefficients included in the constituent unit of the encoded image in a predetermined order (step S30). Next, the circuit decodes a code indicating whether the multiple coefficient is positive or negative for each of the multiple coefficients (step S40). Here, in the constituent unit, of N (N is an integer equal to or greater than 2) coefficients each having an absolute value that satisfies a predetermined magnitude condition, flags are used to encode the absolute values ​​of M (M is an integer less than N) coefficients, and flags are not used to encode the absolute values ​​of the remaining (NM) coefficients. In decoding the absolute values ​​(step S30), the circuit also decodes a signal indicating parity, which is the least significant bit of the absolute value (step S31a). Then, if a flag is used to encode a portion of the absolute value other than the least significant bit, the circuit decodes the flag using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with symbol occurrence probability updates (step S32a). For example, the signal indicating the above-mentioned parity is parity_flag.

[0546] This makes it possible to appropriately decode the coded image constituent units even if the number of flags used to code the image constituent units is limited.

[0547] The predetermined condition may be that the absolute value of the coefficient is not a first value, or that the absolute value of the coefficient is greater than or equal to a second value. For example, the first value may be 0 and the second value may be 3.

[0548] This makes it possible to properly decode the constituent units of the coded image even if, for example, the number of flags (e.g., gt1_flag) indicating whether or not the absolute value is 3 or greater is limited for coefficients whose absolute value is not 0. Alternatively, even if, for example, the number of flags (e.g., gt2_flag) indicating whether or not the absolute value is 5 or greater is limited for coefficients whose absolute value is 3 or greater, it is possible to properly decode the constituent units of the coded image.

[0549] The flag may also consist of a plurality of different flags.

[0550] This allows the constituent units of the coded image to be decoded appropriately even if the number of each of the multiple flags, such as the above-mentioned gt1_flag and gt2_flag, is limited. The multiple flags may also include sig_flag and parity_flag.

[0551] Furthermore, in decoding the absolute value (step S30), if a remainder consisting of a numerical value for expressing the absolute value is encoded, the circuit may further decode the remainder by CABAC bypass processing.

[0552] This allows the components of the coded image to be properly decoded even if the absolute values ​​of the coefficients are coded as flags or as a data group consisting of at least one flag and a remainder.

[0553] Fig. 75 is a flowchart showing the decoding of the remaining part by the decoding device 200 in this embodiment. Note that the flowchart shown in Fig. 74 shows the decoding processing operation corresponding to the encoding in the third mode described above.

[0554] In decoding the remainder, the circuit first determines a base level (i.e., the above-mentioned baseLevel) that indicates a different value depending on whether a count corresponding to the number of decoded flags for each coefficient preceding the coefficient corresponding to the remainder has reached a limit (step S31b). Next, the circuit arithmetically decodes the remainder into a binary signal (step S32b). Next, the circuit selects a multi-value conversion method corresponding to the binary signal from a plurality of different multi-value conversion methods based on the determined base level (step S33b). Then, the circuit converts the binary signal into multi-values ​​according to the selected multi-value conversion method (step S34b).

[0555] For example, step S31b corresponds to the processing of steps S231, S233, and S235 shown in Fig. 71. In other words, the base level determined when the count number reaches the limit is, for example, 1 or 3, which is smaller than the base level (for example, 5) determined when the limit has not been reached.

[0556] As a result, the multi-value conversion method used to convert the binary signal into multi-values ​​is selected based on the base level, so that the remainder can be decoded appropriately.

[0557] In this embodiment, a sub-block is used as an example of a structural unit of an image, but the structural unit is not limited to a sub-block and may be any unit. Also, in this embodiment, a block consisting of 4x4 pixels included in a transform unit is used as a specific example of a sub-block. However, the sub-block is not limited to this specific example and may be any block.

[0558] Furthermore, in this embodiment, when sequentially encoding the absolute values ​​of each of a plurality of coefficients, the number of flags that have already been encoded is counted, and if the counted number of flags is less than a limit number or a maximum number, it is determined that a flag will be used to encode the absolute value of the next coefficient. However, without being limited to the number of flags, it may be determined that a flag will be used if the count number including the number of flags is less than the limit number, and it may be determined that no flag will be used if the count number is not less than the limit number. The count number may be a numerical value that increases as the number of already encoded flags increases, and the count number may include the number of other flags.

[0559] Furthermore, in this embodiment, the number of gt1_flag and gt2_flag is limited, but the definition of the flags whose number is limited in this way may be any. For example, gt1_flag is used for a coefficient whose absolute value is not 0 and indicates whether or not the absolute value is 3 or more, but may also indicate whether or not the absolute value is a numerical value other than 3. Furthermore, gt2_flag is used for a coefficient whose absolute value is 3 or more and indicates whether or not the absolute value is 5 or more, but may also be used for a coefficient whose absolute value is a numerical value other than 3 and indicates whether or not the absolute value is a numerical value other than 5.

[0560] [Other examples] The encoding device 100 and the decoding device 200 in each of the above-described examples may be used as an image encoding device and an image decoding device, or as a video encoding device and a video decoding device, respectively.

[0561] Alternatively, the encoding device 100 and the decoding device 200 may be used as an entropy encoding device and an entropy decoding device, respectively. That is, the encoding device 100 and the decoding device 200 may correspond only to the entropy encoding unit 110 and the entropy decoding unit 202. The other components may be included in other devices.

[0562] Furthermore, at least some of the above examples may be used as an encoding method, a decoding method, an entropy encoding method, an entropy decoding method, or other methods.

[0563] Each component may be implemented by dedicated hardware or by executing a software program suitable for that component. Each component may be implemented by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0564] Specifically, each of the encoding device 100 and the decoding device 200 may include a processing circuitry and a storage device electrically connected to and accessible from the processing circuitry. For example, the processing circuitry corresponds to the processor a1 or b1, and the storage device corresponds to the memory a2 or b2.

[0565] The processing circuit includes at least one of dedicated hardware and a program execution unit, and executes processing using a storage device. If the processing circuit includes a program execution unit, the storage device stores a software program to be executed by the program execution unit.

[0566] Here, the software for realizing the encoding device 100 or the decoding device 200 described above is the following program.

[0567] For example, this program causes a computer to execute the processing of the following encoding method. In the encoding method, for each of a plurality of coefficients included in a constituent unit of a transformed and quantized image, the absolute value of the coefficient is encoded according to a predetermined order, for each of the plurality of coefficients, a sign indicating whether the coefficient is positive or negative is encoded, in the encoding of the absolute value, a signal indicating the parity that is the least significant bit of the absolute value is encoded, it is determined based on a first condition and a second condition whether to use a flag for encoding a portion other than the least significant bit of the absolute value, when it is determined to use the flag, the flag is encoded by CABAC involving an update of symbol generation probability, the first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of the flags used for the constituent unit.

[0568] Also, for example, this program causes a computer to execute the processing of the following decoding method. In the decoding method, for each of a plurality of coefficients included in a constituent unit of an encoded image, the absolute value of the coefficient is decoded according to a predetermined order, for each of the plurality of coefficients, a sign indicating whether the coefficient is positive or negative is decoded, in the constituent unit, among N coefficients (N is an integer of 2 or more) each having an absolute value satisfying a predetermined condition regarding magnitude, for each of M coefficients (M is an integer less than N), a flag is used for encoding the absolute value, and the flag is not used for encoding the absolute value of each of the remaining (N - M) coefficients, in the decoding of the absolute value, a signal indicating the parity that is the least significant bit of the absolute value is decoded, and when the flag is used for encoding a portion other than the least significant bit of the absolute value, the flag is decoded by CABAC involving an update of symbol generation probability.\

[0569] Also, as described above, each component may be a circuit. These circuits may form one circuit as a whole, or may be separate circuits respectively. Further, each component may be realized by a general-purpose processor or may be realized by a dedicated processor.

[0570] In addition, another component may execute the processes executed by a specific component. Also, the order in which the processes are executed may be changed, or a plurality of processes may be executed in parallel. Further, the encoding / decoding apparatus may include the encoding apparatus 100 and the decoding apparatus 200.

[0571] Also, ordinal numbers such as the first and second used in the description may be appropriately re-assigned. Also, ordinal numbers may be newly assigned to or removed from components and the like.

[0572] As described above, the aspects of the encoding apparatus 100 and the decoding apparatus 200 have been described based on a plurality of examples. However, the aspects of the encoding apparatus 100 and the decoding apparatus 200 are not limited to these examples. Without departing from the spirit of the present disclosure, forms obtained by applying various modifications conceived by those skilled in the art to each example, or forms constructed by combining components in different examples may also be included within the scope of the aspects of the encoding apparatus 100 and the decoding apparatus 200.

[0573] One or more aspects disclosed herein may be implemented in combination with at least a part of other aspects in the present disclosure. Also, a part of the processes described in the flowchart of one or more aspects disclosed herein, a part of the configuration of the apparatus, a part of the syntax, etc. may be implemented in combination with other aspects.

[0574] [Implementation and Application] In each of the above embodiments, each of the functional or operative blocks can usually be realized by an MPU (micro processing unit), a memory, and the like. Also, the processing by each of the functional blocks may be realized as a program execution unit such as a processor that reads and executes software (program) recorded on a recording medium such as a ROM. The software may be distributed. The software may be recorded on various recording media such as a semiconductor memory. Note that it is also possible to realize each functional block by hardware (a dedicated circuit). Various combinations of hardware and software can be adopted.

[0575] In each embodiment, the processing described may be realized by centralized processing using a single device (system), or may be realized by distributed processing using a plurality of devices. Also, the processor that executes the above program may be singular or plural. That is, centralized processing may be performed, or distributed processing may be performed.

[0576] Aspects of the present disclosure are not limited to the above embodiments, and various modifications are possible, and these are also included within the scope of the aspects of the present disclosure.

[0577] Furthermore, here, application examples of the moving image encoding method (image encoding method) or the moving image decoding method (image decoding method) shown in each of the above embodiments, and various systems for implementing such application examples will be described. Such a system may be characterized by having an image encoding device using an image encoding method, an image decoding device using an image decoding method, or an image encoding / decoding device having both. Regarding other configurations of such a system, appropriate changes can be made as appropriate.

[0578] [Usage Example] FIG. 76 is a diagram showing the overall configuration of a suitable content supply system ex100 for realizing a content distribution service. The communication service providing area is divided into a desired size, and in each cell, base stations ex106, ex107, ex108, ex109, ex110, which are fixed radio stations in the illustrated example, are installed.

[0579] In this content supply system ex100, devices such as computer ex111, game console ex112, camera ex113, home appliance ex114, and smartphone ex115 are connected to the Internet ex101 via an Internet service provider ex102 or a communication network ex104, and base stations ex106 to ex110. The content supply system ex100 may be connected by combining any of the above devices. In various implementations, the devices may be directly or indirectly connected to each other via a telephone network or short-range wireless, etc., without passing through base stations ex106 to ex110. Further, the streaming server ex103 may be connected to devices such as computer ex111, game console ex112, camera ex113, home appliance ex114, and smartphone ex115 via the Internet ex101 or the like. Also, the streaming server ex103 may be connected to terminals within a hotspot in an airplane ex117 via a satellite ex116.

[0580] Note that a wireless access point or a hotspot, etc. may be used instead of base stations ex106 to ex110. Also, the streaming server ex103 may be directly connected to the communication network ex104 without passing through the Internet ex101 or the Internet service provider ex102, or may be directly connected to the airplane ex117 without passing through the satellite ex116.

[0581] The camera ex113 is a device capable of taking still images and videos such as a digital camera. Also, the smartphone ex115 is a smartphone device, mobile phone, or PHS (Personal Handy-phone System), etc. that supports the mobile communication system methods called 2G, 3G, 3.9G, 4G, and in the future, 5G.

[0582] The home appliance ex114 is a refrigerator or a device included in a household fuel cell cogeneration system, etc.

[0583] In the content supply system ex100, a terminal having a photographing function is connected to a streaming server ex103 through a base station ex106 or the like, enabling live distribution and the like. In live distribution, the terminal (such as a computer ex111, a game machine ex112, a camera ex113, a household appliance ex114, a smartphone ex115, and a terminal in an airplane ex117) may perform the encoding process described in each of the above embodiments on the still image or moving image content photographed by the user using the terminal. The video data obtained by encoding and the audio data obtained by encoding the audio corresponding to the video may be multiplexed, and the obtained data may be transmitted to the streaming server ex103. That is, each terminal functions as an image encoding device according to one aspect of the present disclosure.

[0584] On the other hand, the streaming server ex103 stream-distributes the content data transmitted to the requested client. The client is a computer ex111, a game machine ex112, a camera ex113, a household appliance ex114, a smartphone ex115, or a terminal in an airplane ex117 that can decode the encoded data. Each device that has received the distributed data may decode and reproduce the received data. That is, each device may function as an image decoding device according to one aspect of the present disclosure.

[0585] [Distributed processing] In addition, the streaming server ex103 may be a plurality of servers or a plurality of computers, which may distribute, process, record, or deliver data. For example, the streaming server ex103 may be implemented by a CDN (Content Delivery Network), and content delivery may be realized by a network connecting a large number of edge servers distributed around the world and between edge servers. In a CDN, a physically closer edge server can be dynamically assigned according to the client. Then, by caching and delivering the content to the edge server, the delay can be reduced. Also, when several types of errors occur or the communication state changes due to an increase in traffic, etc., the processing can be distributed among multiple edge servers, the delivery entity can be switched to another edge server, or the part of the network with a failure can be bypassed to continue the delivery, so high-speed and stable delivery can be realized.

[0586] In addition to just the distributed processing of the delivery itself, the encoding process of the captured data may be performed on each terminal, on the server side, or shared between them. As an example, generally in the encoding process, the processing loop is performed twice. In the first loop, the complexity of the image in units of frames or scenes, or the amount of codes is detected. Also, in the second loop, a process to improve the encoding efficiency while maintaining the image quality is performed. For example, by having the terminal perform the first encoding process and the server side that receives the content perform the second encoding process, it is possible to reduce the processing load on each terminal while improving the quality and efficiency of the content. In this case, if there is a requirement to receive and decode in almost real time, the already encoded data from the first encoding performed by the terminal can also be received and played back by other terminals, so more flexible real-time delivery becomes possible.

[0587] As another example, cameras such as ex113 extract feature amounts (amounts of features or characteristics) from images, compress data related to the feature amounts as metadata, and transmit the data to a server. The server performs compression according to the meaning (or importance of content) of the image, such as judging the importance of an object from the feature amounts and switching the quantization accuracy. The feature amount data is particularly effective in improving the accuracy and efficiency of motion vector prediction during re-compression on the server. Also, simple encoding such as VLC (Variable Length Coding) may be performed on the terminal, and encoding with a large processing load such as CABAC (Context Adaptive Binary Arithmetic Coding) may be performed on the server.

[0588] As yet another example, in a stadium, a shopping mall, a factory, etc., there may be a plurality of video data in which substantially the same scene is captured by a plurality of terminals. In this case, using the plurality of terminals that have performed shooting, and other terminals and a server that have not performed shooting as necessary, encoding processes are respectively assigned in units such as GOP (Group of Picture) units, picture units, or tile units obtained by dividing a picture, and distributed processing is performed. Thereby, delay can be reduced and more real-time performance can be realized.

[0589] Since the plurality of video data are of substantially the same scene, the server may manage and / or give instructions so that the video data captured by each terminal can be referenced to each other. Also, the server may receive the encoded data from each terminal, change the reference relationship between the plurality of data, or correct or replace the picture itself and re-encode it. Thereby, a stream with improved quality and efficiency of each piece of data can be generated.

[0590] Furthermore, the server may perform transcoding to change the encoding method of the video data and then distribute the video data. For example, the server may convert an MPEG-based encoding method to a VP-based (e.g., VP9) method, or convert H.264 to H.265, etc.

[0591] Thus, the encoding process can be performed by a terminal or one or more servers. Therefore, hereinafter, descriptions such as "server" or "terminal" will be used as the entity performing the process. However, part or all of the processes performed by the server may be performed by the terminal, or part or all of the processes performed by the terminal may be performed by the server. Also, regarding these, the same applies to the decoding process.

[0592] [3D, Multi-angle] There is an increasing trend to integrate and utilize different scenes photographed by a plurality of cameras ex113 and / or terminals such as smartphones ex115 that are substantially synchronized with each other, or images or videos obtained by photographing the same scene from different angles. The videos photographed by each terminal can be integrated based on the relative positional relationship between the terminals obtained separately or the area where the feature points included in the videos match.

[0593] The server may not only encode a two-dimensional moving image, but also automatically based on scene analysis of the moving image or at a time specified by the user, encode a still image and transmit it to the receiving terminal. If the server can further obtain the relative positional relationship between the photographing terminals, based on not only two-dimensional moving images but also videos of the same scene photographed from different angles, it can generate the three-dimensional shape of the scene. The server may separately encode the three-dimensional data generated by a point cloud or the like, or based on the results of recognizing or tracking a person or an object using the three-dimensional data, select or reconstruct the video to be transmitted to the receiving terminal from the videos photographed by a plurality of terminals.

[0594] In this way, the user can arbitrarily select each video corresponding to each photographing terminal and enjoy the scene, or can also enjoy the content obtained by cutting out the video of the selected viewpoint from the three-dimensional data reconstructed using a plurality of images or videos. Furthermore, the sound is also collected from a plurality of different angles together with the video, and the server may multiplex the sound from a specific angle or space with the corresponding video and transmit the multiplexed video and sound.

[0595] In recent years, content that associates the real world with the virtual world, such as Virtual Reality (VR) and Augmented Reality (AR), has also become widespread. In the case of VR images, the server may create right-eye and left-eye viewpoint images respectively and perform encoding that allows reference between each viewpoint video by means of Multi-View Coding (MVC) or the like, or may perform encoding as separate streams without mutual reference. At the time of decoding the separate streams, it is advisable to synchronize and play them so that a virtual three-dimensional space is reproduced according to the user's viewpoint.

[0596] In the case of AR images, the server may superimpose virtual object information in the virtual space on the camera information of the real space based on the three-dimensional position or the movement of the user's viewpoint. The decoding device may acquire or hold the virtual object information and three-dimensional data, generate a two-dimensional image according to the movement of the user's viewpoint, and create superimposed data by smoothly connecting them. Alternatively, the decoding device may transmit the movement of the user's viewpoint to the server in addition to the request for virtual object information. The server may create superimposed data according to the movement of the viewpoint received from the three-dimensional data held by the server, encode the superimposed data, and distribute it to the decoding device. Note that the superimposed data typically has an α value indicating transparency in addition to RGB, and the server may set the α value of the portion other than the object created from the three-dimensional data to 0 or the like and perform encoding in a state where the portion is transparent. Or, the server may set the RGB value of a predetermined value like chroma key as the background and generate data with the portion other than the object as the background color. The RGB value of the predetermined value may be determined in advance.

[0597] The decryption process of the data delivered in the same way may be performed on the client side (for example, a terminal), on the server side, or may be shared between them. As an example, a certain terminal may once send a reception request to the server, and the content corresponding to the request may be received by another terminal and decrypted, and the decrypted signal may be transmitted to a device having a display. By dispersing the processing regardless of the performance of the communicable terminals themselves and selecting appropriate content, it is possible to reproduce data with good image quality. As another example, while receiving large-size image data on a TV or the like, only a part of the area such as a tile in which a picture is divided may be decrypted and displayed on the personal terminal of the viewer. Thereby, while sharing the overall image, it is possible to check at hand the area of one's own field of responsibility or the area to be confirmed in more detail.

[0598] In a situation where multiple short-range, medium-range, or long-range wireless communications inside and outside the house can be used, it may be possible to receive content seamlessly using a delivery system standard such as MPEG-DASH. The user may freely select a decoding device or a display device such as the user's terminal or a display arranged inside and outside the house and switch in real time. Also, using the user's own location information or the like, it is possible to perform decoding while switching the terminal to be decoded and the terminal to be displayed. Thereby, while the user is moving to the destination, it becomes possible to map and display information on a part of the wall surface or the ground of the adjacent building in which a displayable device is embedded. Also, it is possible to switch the bit rate of the received data based on the ease of access to the encoded data on the network, such as the encoded data being cached in a server that can be accessed from the receiving terminal in a short time or being copied to an edge server in a content delivery service.

[0599] [Scalable Encoding] Regarding content switching, an explanation will be given using a scalable stream compressed and encoded by applying the moving image encoding method shown in each of the above embodiments, as shown in FIG. 77. The server may have a plurality of streams with the same content but different qualities as individual streams, but as shown in the figure, by encoding in layers, it is possible to utilize the characteristics of a temporally / spatially scalable stream, and the configuration may be such that content is switched. That is, by determining which layer to decode according to internal factors such as performance and external factors such as the state of the communication bandwidth on the decoding side, the decoding side can freely switch between low-resolution content and high-resolution content for decoding. For example, when a user wants to watch the continuation of a video that was being viewed on a smartphone ex115 while moving, on a device such as an Internet TV after returning home, for example, the device only needs to decode the same stream to a different layer, thus reducing the burden on the server side.

[0600] Furthermore, as described above, pictures are encoded for each layer. In addition to the configuration where scalability is realized in the enhancement layer above the base layer, the enhancement layer may include meta information based on statistical information of images or the like. The decoding side may generate high-quality content by super-resolving the picture of the base layer based on the meta information. Super-resolution may improve the signal-to-noise ratio while maintaining and / or enlarging the resolution. The meta information includes information for specifying linear or non-linear filter coefficients for use in super-resolution processing, or information for specifying parameter values in filter processing, machine learning, or least squares operations used in super-resolution processing.

[0601] Alternatively, a configuration may be provided in which a picture is divided into tiles or the like according to the meaning of an object or the like in the image. The decoding side decodes only a part of the area by selecting the tile to be decoded. Further, by storing the attributes of the object (such as a person, a car, a ball, etc.) and the position in the video (such as the coordinate position in the same image) as meta information, the decoding side can specify the position of a desired object based on the meta information and determine the tile including the object. For example, as shown in FIG. 78, the meta information may be stored using a data storage structure different from pixel data, such as an SEI (supplemental enhancement information) message in HEVC. This meta information indicates, for example, the position, size, or color of the main object.

[0602] The meta information may be stored in a unit composed of a plurality of pictures, such as a stream, a sequence, or a random access unit. The decoding side can obtain the time when a specific person appears in the video, etc., and by combining the picture unit information and the time information, can specify the picture in which the object exists and determine the position of the object in the picture.

[0603] [Optimization of Web Page] FIG. 79 is a diagram showing an example of a display screen of a web page on a computer ex111 or the like. FIG. 80 is a diagram showing an example of a display screen of a web page on a smartphone ex115 or the like. As shown in FIGS. 79 and 80, a web page may include a plurality of link images that are links to image contents, and their appearances may be different depending on the device for viewing. When a plurality of link images are visible on the screen, until the user explicitly selects a link image, or until the link image approaches the vicinity of the center of the screen or the entire link image enters the screen, the display device (decoding device) may display a still image or an I picture that each content has as a link image, or may display a video like a gif animation with a plurality of still images or I pictures, etc., or may receive only the base layer, decode and display the video.

[0604] When a link image is selected by a user, the display device performs decoding, for example, giving top priority to the base layer. Note that if the HTML constituting the web page contains information indicating that the content is scalable, the display device may also decode up to the enhancement layer. Furthermore, to ensure real-time performance, before selection or when the communication bandwidth is very limited, the display device decodes and displays only forward-referenced pictures (I pictures, P pictures, and forward-reference-only B pictures), thereby reducing the delay between the decoding time of the first picture and the display time (the delay from the start of content decoding to the start of display). Furthermore, the display device may intentionally ignore the picture reference relationships and roughly decode all B and P pictures using forward reference, and then perform normal decoding as the number of received pictures increases over time.

[0605] [Autonomous driving] Furthermore, when transmitting and receiving still image or video data such as 2D or 3D map information for automatic driving or driving assistance of a vehicle, the receiving terminal may receive weather or construction information as meta information in addition to image data belonging to one or more layers, and may associate and decode these. Note that the meta information may belong to a layer, or may simply be multiplexed with the image data.

[0606] In this case, since a vehicle, drone, or airplane including a receiving terminal is moving, the receiving terminal can transmit location information of the receiving terminal, thereby realizing seamless reception and decoding while switching between base stations ex106 to ex110. Furthermore, the receiving terminal can dynamically switch how much meta information to receive or how much to update map information depending on the user's selection, the user's situation, and / or the state of the communication bandwidth.

[0607] In the content supply system ex100, the client can receive, decode, and play back encoded information sent by a user in real time.

[0608] [Distribution of personal content] Furthermore, the content supply system ex100 allows not only high-quality, long-duration content from video distribution companies, but also low-quality, short-duration content from individuals via unicast or multicast. It is expected that such personal content will continue to increase in the future. To improve the quality of personal content, the server may perform editing before encoding. This can be achieved, for example, using the following configuration.

[0609] During shooting, either in real time or after accumulating and shooting, the server performs recognition processing such as detecting shooting errors, scene search, semantic analysis, and object detection from the original image data or encoded data. Based on the recognition results, the server manually or automatically corrects out-of-focus or camera shake, deletes less important scenes such as scenes with lower brightness or out-of-focus compared to other pictures, emphasizes object edges, changes color, and performs other editing. The server then encodes the edited data based on the editing results. It is also known that viewing rates decrease if the shooting time is too long. Therefore, the server may automatically clip not only less important scenes as described above but also scenes with little movement, based on the image processing results, so that the content falls within a specific time range depending on the shooting time. Alternatively, the server may generate and encode a digest based on the results of the semantic analysis of the scenes.

[0610] Personal content may contain content that, if left as is, violates copyright, moral rights, or portrait rights, and may cause the scope of sharing to exceed the intended scope, resulting in inconvenience to individuals. Therefore, for example, the server may intentionally defocus images of people's faces on the periphery of the screen or the interior of a house before encoding. Furthermore, the server may recognize whether the image to be encoded contains the face of a person other than a pre-registered person, and if so, perform processing such as blurring the face. Alternatively, as pre- or post-processing before encoding, the user may specify a person or background area they wish to modify in the image for copyright or other reasons. The server may replace the specified area with another image or blur the focus. If the image contains a person, the server may track the person in the video and replace the image of the person's face.

[0611] Because viewing personal content with small data volumes requires real-time performance, the decoding device may first receive the base layer as a top priority and decode and play it back, depending on the bandwidth. The decoding device may also receive the enhancement layer during this time, and if the content is played back more than once, such as when playback is looped, play back high-quality video including the enhancement layer. A stream that has undergone scalable encoding in this way can provide an experience in which the video appears rough when not selected or when viewing begins, but gradually becomes smoother and the image quality improves. In addition to scalable encoding, a similar experience can also be provided by configuring a single stream consisting of a rough stream played the first time and a second stream that is encoded with reference to the first video.

[0612] [Other application examples] Furthermore, these encoding or decoding processes are generally performed by an LSI ex500 possessed by each terminal. The LSI (large scale integration circuitry) ex500 (see FIG. 76) may be a single chip or may be configured with multiple chips. It is also possible to incorporate video encoding or decoding software into some kind of recording medium (such as a CD-ROM, flexible disk, or hard disk) that can be read by a computer ex111 or the like, and perform the encoding or decoding process using that software. Furthermore, if the smartphone ex115 is equipped with a camera, video data captured by the camera may be transmitted. This video data may be data encoded by the LSI ex500 possessed by the smartphone ex115.

[0613] The LSIex500 may be configured to download and activate application software. In this case, the terminal first determines whether it supports the content encoding method or has the capability to execute a specific service. If the terminal does not support the content encoding method or does not have the capability to execute a specific service, the terminal may download a codec or application software and then acquire and play the content.

[0614] Furthermore, at least one of the video encoding device (image encoding device) or video decoding device (image decoding device) of each of the above embodiments can be incorporated into a digital broadcasting system, not limited to the content supply system ex100 via the Internet ex101. Since multiplexed data in which video and audio are multiplexed is transmitted and received over broadcast radio waves using a satellite or the like, the content supply system ex100 is more suited to multicast than the unicast configuration of the content supply system ex100, but similar applications are possible with regard to the encoding and decoding processes.

[0615] [Hardware configuration] FIG. 81 is a diagram illustrating further details of the smartphone ex115 illustrated in FIG. 76. FIG. 82 is a diagram illustrating an example configuration of the smartphone ex115. The smartphone ex115 includes an antenna ex450 for transmitting and receiving radio waves to and from the base station ex110, a camera unit ex465 capable of capturing video and still images, and a display unit ex458 for displaying video captured by the camera unit ex465 and decoded data of the video and other images received by the antenna ex450. The smartphone ex115 further includes an operation unit ex466 such as a touch panel, an audio output unit ex457 such as a speaker for outputting voice or sound, an audio input unit ex456 such as a microphone for inputting voice, a memory unit ex467 capable of storing encoded data or decoded data such as captured video or still images, recorded voice, received video or still images, and email, and a slot unit ex464 that serves as an interface with a SIM ex468 for identifying users and authenticating access to various data, including networks. In addition, an external memory may be used instead of the memory unit ex467.

[0616] A main control unit ex460 that can comprehensively control the display unit ex458 and operation unit ex466, etc., is connected to a power supply circuit unit ex461, an operation input control unit ex462, a video signal processing unit ex455, a camera interface unit ex463, a display control unit ex459, a modulation / demodulation unit ex452, a multiplexing / separation unit ex453, an audio signal processing unit ex454, a slot unit ex464, and a memory unit ex467 via a synchronization bus ex470.

[0617] When the power key is turned on by a user, the power supply circuit unit ex461 starts up the smartphone ex115 into an operational state and supplies power to each unit from the battery pack.

[0618] The smartphone ex115 processes calls, data communications, and other communications under the control of a main control unit ex460, which includes a CPU, ROM, RAM, and other components. During a call, the audio signal collected by the audio input unit ex456 is converted to a digital audio signal by the audio signal processing unit ex454, which then performs spectrum spread processing on the modulation / demodulation unit ex452. The resulting signal is then transmitted via the antenna ex450. The received data is then amplified, subjected to frequency conversion and analog-to-digital conversion, subjected to spectrum despreading processing on the modulation / demodulation unit ex452, and converted to an analog audio signal by the audio signal processing unit ex454, which then outputs the resulting signal from the audio output unit ex457. During data communications, text, still images, or video data can be transmitted via the operation input control unit ex462 under the control of the main control unit ex460, based on the operation of the main unit's operation unit ex466, etc. Similar transmission and reception processing is performed. When transmitting video, still images, or video and audio in data communication mode, the video signal processing unit ex455 compresses and encodes the video signal stored in the memory unit ex467 or the video signal input from the camera unit ex465 using the video encoding method described in each of the above embodiments, and sends the encoded video data to the multiplexing / demultiplexing unit ex453. The audio signal processing unit ex454 encodes the audio signal collected by the audio input unit ex456 while the video or still image is being captured by the camera unit ex465, and sends the encoded audio data to the multiplexing / demultiplexing unit ex453. The multiplexing / demultiplexing unit ex453 multiplexes the encoded video data and encoded audio data using a predetermined method, and modulates and converts the multiplexed video data and audio data in the modulation / demodulation unit (modulation / demodulation circuit unit) ex452 and the transmission / reception unit ex451, before transmitting the multiplexed video data and audio data via the antenna ex450. The predetermined method may be determined in advance.

[0619] In the case of receiving video attached to an e-mail or chat, or video linked to a web page, for example, the multiplexed data received via the antenna ex450 is decoded by the multiplexing / demultiplexing unit ex453, which separates the multiplexed data into a video data bitstream and an audio data bitstream. The multiplexing / demultiplexing unit ex453 then demultiplexes the multiplexed data, and supplies the encoded video data to the video signal processing unit ex455 and the encoded audio data to the audio signal processing unit ex454 via the synchronization bus ex470. The video signal processing unit ex455 decodes the video signal using a video decoding method corresponding to the video encoding method described in each of the above embodiments, and displays the video or still images contained in the linked video file on the display unit ex458 via the display control unit ex459. The audio signal processing unit ex454 decodes the audio signal, and audio is output from the audio output unit ex457. As real-time streaming becomes increasingly common, audio playback may be socially inappropriate depending on the user's circumstances. Therefore, it is preferable that the initial setting be a configuration in which only the video data is played without playing the audio signal, and audio may be played in sync only when the user performs an operation such as clicking on the video data.

[0620] Although the smartphone ex115 has been used as an example, other implementations of the terminal are possible, such as a transmitting / receiving terminal having both an encoder and a decoder, a transmitting terminal having only an encoder, and a receiving terminal having only a decoder. In the digital broadcasting system, multiplexed data in which audio data is multiplexed onto video data is received or transmitted. However, in addition to audio data, text data related to the video may also be multiplexed into the multiplexed data. Furthermore, the video data itself may be received or transmitted instead of the multiplexed data.

[0621] While the main control unit ex460, which includes a CPU, has been described as controlling the encoding and decoding processes, various terminals often include a GPU. Therefore, a configuration in which a memory shared by the CPU and GPU, or a memory with addresses managed for common use, is also possible, leveraging the GPU's performance to process a large area at once. This shortens encoding time, ensures real-time performance, and achieves low latency. It is particularly efficient to perform motion estimation, deblocking filtering, SAO (Sample Adaptive Offset), and transformation and quantization processes at a picture level or other unit in the GPU rather than the CPU. [Industrial Applicability]

[0622] The present disclosure is applicable to, for example, television receivers, digital video recorders, car navigation systems, mobile phones, digital cameras, digital video cameras, video conference systems, electronic mirrors, and the like. [Explanation of symbols]

[0623] 100 Encoding device 102 Division 104 Subtraction section 106 Conversion unit 108 Quantization section 110 Entropy coding unit 112, 204 Inverse quantization section 114, 206 Inverse conversion unit 116, 208 Addition section 118, 210 block memory 120, 212 Loop filter section 122, 214 frame memory 124, 216 Intra prediction section 126, 218 Inter prediction section 128, 220 Predictive control unit 200 Decryption Device 202 Entropy Decoding Unit 1201 Boundary determination section 1202, 1204, and 1206 switches 1203 Filter decision unit 1205 Filter processing section 1207 Filter characteristic determination section 1208 Processing decision unit a1, b1 processor a2, b2 memory

Claims

1. Memory and a processor coupled to the memory and configured to perform Context-Based Adaptive Binary Arithmetic Coding (CABAC); In predictive residual coding of a current block, the processor For each of a plurality of coefficients, which are a plurality of quantized coefficients generated by transforming and quantizing the difference between the current block and the predicted block, encoding each of a plurality of flags indicating the numerical properties of the coefficients by CABAC; The plurality of flags are: a first flag indicating whether the coefficient is zero; a second flag indicating whether the coefficient is odd or even; a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number); a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold value (the second threshold value being a natural number greater than the first threshold value); Including, determining a base level that serves as a reference value for obtaining a remainder consisting of further numerical values ​​required to express the absolute value of the coefficient; Calculating a predicted absolute value of the coefficient based on the absolute value of the sum of five surrounding coefficients of the coefficient in the current block; determining a value of the Rice parameter from among a plurality of candidates based on the calculated difference between the predicted absolute value and the base level; encoding a remainder of the coefficient using the Rice parameter, the remainder being calculated using the absolute value of the coefficient and the base level; if the absolute value of the coefficient is greater than zero, encoding a fifth flag indicating whether the coefficient is positive or negative; repeating the encoding of the plurality of flags and the encoding of the remainder for each of the plurality of coefficients included in the current block until the number of encoded flags reaches a limit on the number of CABAC encodings; Encoding device.

2. Memory and a processor coupled to the memory and configured to perform CABAC (Context-Based Adaptive Binary Arithmetic Coding) decoding; In predictive residual decoding of the current block, the processor: For each of a plurality of coefficients, which are a plurality of quantized coefficients generated by transforming and quantizing the difference between the current block and the predicted block, Decoding each of a plurality of flags that respectively indicate the properties of the numerical values ​​of the coefficients by CABAC decoding; The plurality of flags are: a first flag indicating whether the coefficient is zero; a second flag indicating whether the coefficient is odd or even; a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number); a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold value (the second threshold value being a natural number greater than the first threshold value); Including, determining a base level that serves as a reference value for obtaining a remainder consisting of further numerical values ​​required to express the absolute value of the coefficient; Calculating a predicted absolute value of the coefficient based on the absolute value of the sum of five surrounding coefficients of the coefficient in the current block; determining a value of the Rice parameter from among a plurality of candidates based on the calculated difference between the predicted absolute value and the base level; Decoding the remainder of the coefficients using the Rice parameters; If the absolute value of the coefficient is greater than zero, decoding a fifth flag indicating whether the coefficient is a positive or negative value; repeating the decoding of the plurality of flags and the decoding of the remaining part for each of the plurality of coefficients included in the current block until the number of decoded flags reaches a limit on the number of CABAC decoding attempts; Decryption device.

3. Memory and a processor coupled to the memory, The processor, in operation, generating a bitstream to be decoded by a decoding device that performs prediction residual decoding of the current block; a plurality of flags each indicating a characteristic of a numerical value of a coefficient included in the current block are included in the bitstream by CABAC (Context-Based Adaptive Binary Arithmetic Coding); The plurality of flags are: a first flag indicating whether the coefficient is zero; a second flag indicating whether the coefficient is odd or even; a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number); a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold value (the second threshold value being a natural number greater than the first threshold value); a remainder consisting of a value further required to express the absolute value of the coefficient when the absolute value of the coefficient cannot be expressed by the plurality of flags alone, the remainder being calculated using the absolute value of the coefficient and a base level of the coefficient and coded using a Rice parameter; a fifth flag that indicates whether the coefficient has a positive value or a negative value when the absolute value of the coefficient is greater than zero, the fifth flag being coded by the CABAC coding; Including, the predicted absolute value of the coefficient is calculated based on the absolute value of the sum of five surrounding coefficients of the coefficient in the current block; the Rice parameter is determined from a plurality of candidates based on a difference between the predicted absolute value of the coefficient and the base level; repeating the encoding of the plurality of flags and the encoding of the remainder for each of the plurality of coefficients included in the current block until the number of encoded flags reaches a limit on the number of CABAC encodings; Bitstream generator.

Images