METHOD FOR PRODUCING SiGe SUBSTRATE AND SiGe SUBSTRATE

Abstract

To provide a method for manufacturing an SiGe substrate in which defects on the surface of an SiGe layer, in particular cross-hatch-like defects, are suppressed; and an SiGe substrate.SOLUTION: The present invention is a method for manufacturing an SiGe substrate provided with an SiGe layer on the main surface of a silicon substrate, the method being characterized in that the SiGe layer is grown on the main surface of the silicon substrate by using, as the silicon substrate, a silicon substrate having an off angle of 0.1° to 0.7° on the main surface thereof.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a SiGe substrate and a SiGe substrate. [Background technology]

[0002] SiGe is a material that is widely used in various devices, including electronic, optical, and RF devices. Recently, instead of the fin structure currently used in logic ICs, GAA (Gate All Around) and CFET (Complementary Field Effect Transistor), which stacks NMOS and CMOS, have been proposed for next-generation semiconductors, and SiGe plays an important role in the manufacturing process of these devices (Non-Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-210697 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-210698 [Non-patent literature]

[0004] [Non-Patent Document 1] The 1st Workshop of the Industry-Academia Collaboration Committee on Crystal Growth, Processing, and Evaluation of Semiconductors of the Japan Society of Applied Physics: "Crystal Technology Supporting the Revival of Semiconductors" [Non-patent document 2] Yonenaga, "Growth of high-quality SiGe crystals and elucidation of their fundamental properties," Material, 47(1), 3(2008) [Non-patent document 3] Sato, "Fundamentals and Challenges of Heteroepitaxy: 1st Workshop on 3C-SiC Technology for IoT in Harsh Environments" (2019) [Non-patent document 4] Wong, LH “Strain relaxation in SiGe / Si heteroepitaxy.” Doctoral thesis, Nanyang Technological University, Singapore, (2007). [Non-Patent Document 5] EAFitgerald, et.al., “Totally relaxed GexSi1-x layers with low threading dislocation densities grows on Si substrares”, App. Phys. Lett., 59, 811 (1991). [Non-patent document 6] FKLeGeues, et.al., “Mechanism and conditions for anomalous strain relaxation in graded thin films and superlattices”, App.Phys.Lett., 71, 4230 (1992). [Non-Patent Document 7] T.Taniguchi,et.al.,Abst.of SAP Spring Meeting.,17a-F102-9(2018). [Non-patent document 8] T.Taniguchi,et.al.,Abst.of JSAP Autumn Meeting.,20p-234-10(2018). Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the equilibrium phase diagram, the liquidus and solidus of SiGe are far apart, and the distribution coefficient is 2 to 5, which is greater than 1, making it known that it is prone to polycrystallization. Even if single crystals can be grown, the growth rate is slow and it is difficult to grow them consistently (Non-Patent Document 2).

[0006] Therefore, for semiconductor devices, SiGe is grown on Si substrates, sometimes referred to as virtual SiGe substrates. In this SiGe growth (heteroepitaxial), the key issue is how to mitigate the difference in lattice constants between Si and Ge. The lattice constant of Si crystals is 0.5431 nm, while that of Ge crystals is 0.56754 nm, resulting in a difference of approximately 4.5%. To mitigate this difference in lattice constants, SiGe uses a SiGe alloy. If the Ge composition ratio is x, the lattice constant of the SiGe alloy is 0.5431 nm + x × 0.02 nm + x squared × 0.0027 nm. For example, if x is 0.3, the lattice constant is 0.5493 ​​nm, resulting in a minimal lattice mismatch of 0.14%. This lattice mismatch can cause dislocations and defects to develop in the subsequently grown epitaxial layer, resulting in degradation of quality. However, it is believed that there is a critical thickness, and even if there is lattice mismatch, defects will not occur unless the critical thickness is exceeded (Non-Patent Document 3).

[0007] Therefore, various intermediate layers have been proposed that utilize this critical thickness to form a buffer layer. For example, there is a method in which the Ge concentration is varied from the silicon substrate to a SiGe layer with a predetermined Ge concentration, which is called a graded buffer layer (Non-Patent Documents 4, 5, 6). Another method has been proposed, which involves stacking multiple layers with thicknesses below the critical thickness, called a superlattice buffer layer (Non-Patent Documents 6, 7, 8).

[0008] In addition to these methods, Patent Document 1 also describes a strained Si (silicon) wafer in which an Si layer is further grown on an SiGe layer, and which has a structure of an epitaxial layer (compositionally graded SiGe layer) with lattice mismatch and a strained Si layer on a single crystal silicon substrate, and the crystal surface of the silicon substrate is changed from the plane orientation (100) plane to the crystal orientation <100> The paper describes a strained silicon wafer that uses an off-cut surface inclined by 0.2° to 1° with respect to the <0-10> direction and the <0-10> direction, thereby further reducing the threading dislocation density in the strained silicon layer.

[0009] Patent Document 2 describes a structure in which a lattice-mismatched epitaxial layer (compositionally graded SiGe layer) and a strained Si layer are formed on a single crystal silicon substrate, and the crystal surface of the silicon substrate is tilted from the (100) plane to the crystal orientation <100> The paper describes a strained silicon wafer that uses an off-cut surface inclined by 0.01° to 0.05° with respect to the <0-10> direction and the <0-10> direction, thereby further reducing the threading dislocation density in the strained silicon layer.

[0010] The strained silicon wafers in Patent Documents 1 and 2 have a structure in which a Si layer is provided on the outermost surface and strain is introduced into the Si layer, but there is no mention of the state of the SiGe layer.

[0011] Although various methods have been investigated, none of them have mentioned the relationship between defects on the SiGe layer surface or crosshatch defects and the off-angle of the silicon substrate. If we understand that epitaxial growth depends on the relationship between the energy of the source gas (growth temperature) and the surface potential of the substrate, we arrive at the conclusion that the surface energy of the silicon substrate, i.e., the off-angle, or so-called terrace width, has a major influence.

[0012] The present invention has been made to solve the above problems, and aims to provide a method for manufacturing a SiGe substrate and a SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed. [Means for solving the problem]

[0013] The present invention has been made to achieve the above-mentioned object, and provides a method for producing a SiGe substrate having a SiGe layer on a main surface of a silicon substrate, the method comprising using a silicon substrate having a main surface with an off-angle of 0.1° or more and 0.7° or less, and growing a SiGe layer on the main surface of the silicon substrate.

[0014] According to this method for producing a SiGe substrate, it is possible to produce a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed.

[0015] In this case, the off angle can be set to 0.25° or more and 0.67° or less.

[0016] This makes it possible to fabricate a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are further suppressed.

[0017] The present invention has also been made to achieve the above-mentioned object, and provides a SiGe substrate having a SiGe layer on a main surface of a silicon substrate, wherein the off-angle of the main surface of the silicon substrate is 0.1° or more and 0.7° or less.

[0018] Such a SiGe substrate provides a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed.

[0019] In this case, the off angle can be set to be equal to or greater than 0.25° and equal to or less than 0.67°.

[0020] This results in a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are further suppressed. [Effects of the Invention]

[0021] As described above, the method for producing a SiGe substrate of the present invention makes it possible to produce a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed. Furthermore, the SiGe substrate of the present invention provides a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed. [Brief explanation of the drawings]

[0022] [Figure 1] 1 shows a schematic diagram of a SiGe substrate according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0023] The present invention will be described in detail below, but the present invention is not limited thereto.

[0024] As described above, there has been a demand for a method for producing a SiGe substrate and a SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed.

[0025] As a result of extensive research into the above-mentioned problems, the inventors have discovered that a method for producing a SiGe substrate having a SiGe layer on a main surface of a silicon substrate, which method comprises using a silicon substrate having an off-angle of 0.1° or more and 0.7° or less on its main surface and growing a SiGe layer on the main surface of the silicon substrate, can produce a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed, and have completed the present invention.

[0026] As a result of extensive research into the above-mentioned problems, the present inventors have discovered that a SiGe substrate having a SiGe layer on a main surface of a silicon substrate, characterized in that the silicon substrate has an off-angle of the main surface of 0.1° or more and 0.7° or less, can provide a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed, and have completed the present invention.

[0027] [SiGe substrate manufacturing method] As mentioned above, the growth conditions for epitaxial growth depend on the relationship between the energy of the source gas (growth temperature) and the surface potential of the substrate. In other words, the surface energy of the silicon substrate, i.e., the off-angle, or so-called step-terrace width (hereinafter simply referred to as "terrace width"), has a significant effect on epitaxial growth.

[0028] Here, the surface energy corresponds to the terrace width formed by the off-angle of the silicon substrate, and the smaller the terrace width, the larger the surface energy.

[0029] The width of the silicon terrace can be controlled by the off-angle when the silicon substrate is sliced ​​into wafers. The inventors sliced ​​wafers from a silicon ingot at different off-angles in the range of 0.05 to 1° to change the surface energy of the silicon substrate, i.e., to change the terrace width. After growing a SiGe layer using a general CVD apparatus, they evaluated the defect density on the surface and found that the defect density could be suppressed if the off-angle was 0.1° or greater.

[0030] Here, if the off-angle of the silicon substrate is greater than 0.7°, the main surface changes, which changes the optimal growth conditions. As a result, conditions below 0.7° cannot be applied, and if they are applied as is, defects resulting from the growth conditions will be generated.

[0031] Therefore, in the method for producing a SiGe substrate according to the present invention, a silicon substrate having a principal surface with an off-angle of 0.1° to 0.7° is used, and a SiGe layer is grown on the principal surface of the silicon substrate. The composition of the SiGe layer is not particularly limited, but can be 10 to 35 atomic % of Ge.

[0032] By epitaxially growing the SiGe layer while controlling the off-angle of the principal surface of the silicon substrate within this range, it becomes possible to reduce the defect density on the surface of the SiGe substrate.

[0033] The off angle can be in the range of 0.25° or more and 0.67° or less. This allows the fabrication of high-quality SiGe substrates with reduced surface defects, especially crosshatch defects, in the SiGe layer. Specifically, the defect density on the SiGe substrate surface can be reduced by two orders of magnitude compared to when using a Si substrate with an off-axis angle of less than 0.1°.

[0034] [SiGe substrate] 1 is a schematic diagram of a SiGe substrate according to the present invention. The SiGe substrate 1 according to the present invention comprises a SiGe layer 3 on the main surface of a silicon single crystal substrate 2, the silicon substrate 2 having an off-angle of 0.1° or more and 0.7° or less. Such a SiGe substrate 1, in which the SiGe layer 3 is formed on the silicon single crystal substrate 2, is sometimes called a virtual SiGe substrate.

[0035] Such a SiGe substrate provides a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are suppressed.

[0036] In this case, the off angle can be set to be equal to or greater than 0.25° and equal to or less than 0.67°.

[0037] This results in a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer are further suppressed. [Example]

[0038] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0039] (Example) A boron-doped single-crystal silicon ingot with a (110) crystal plane orientation, a diameter of 300 mm, and a resistivity of 10 Ω·cm was prepared. The silicon substrates were then cut into wafers with off-angles of 0.1°, 0.2°, 0.25°, 0.3°, 0.67°, and 0.7°.

[0040] Each silicon substrate was placed in the epitaxial growth reactor of the CVD equipment, and SiH2Cl2 gas and GeH4 gas were introduced into the reactor at 1000 sccm each as raw materials, which had been depressurized to 1333 Pa (10 Torr). Film formation was carried out for 60 minutes at a growth temperature (substrate temperature) of 610°C to grow a SiGe layer (Ge concentration = 30 atomic %).

[0041] Thereafter, the surface was etched with a mixed solution of fluorine and nitric acid, and the defect density on the surface was evaluated using an optical microscope. The results are shown in Table 1.

[0042] (Comparative Example) The SiGe layer was deposited and its surface was evaluated under the same conditions as in the example, except that the wafers were cut from the single crystal silicon ingot so that the off-angle of the main surface was 0.05° or 1.0°. The evaluation results are shown in Table 1.

[0043] [Table 1]

[0044] As shown in Table 1, the defect density on the substrate surface was suppressed when the off-angle of the main surface of the silicon substrate was 0.1° or more, and was further suppressed when the off-angle was 0.25° or more and 0.67° or less. Crosshatch defects were also reduced.

[0045] As described above, according to the examples of the present invention, it was possible to fabricate a high-quality SiGe substrate in which defects, particularly crosshatch defects, on the surface of the SiGe layer were suppressed.

[0046] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0047] 1...SiGe substrate (virtual SiGe substrate), 2...silicon single crystal substrate, 3...SiGe layer.

Claims

1. A method for manufacturing a SiGe substrate having a SiGe layer on a main surface of a silicon substrate, comprising: The method for producing a SiGe substrate comprises using a silicon substrate having a main surface with an off-angle of 0.1° or more and 0.7° or less, and growing a SiGe layer on the main surface of the silicon substrate.

2. 2. The method for producing a SiGe substrate according to claim 1, wherein the off-angle is set to be 0.25° or more and 0.67° or less.

3. A SiGe substrate having a SiGe layer on a main surface of a silicon substrate, The SiGe substrate is characterized in that the silicon substrate has a principal surface with an off-angle of 0.1° or more and 0.7° or less.

4. 4. The SiGe substrate according to claim 3, wherein the off-angle is 0.25° or more and 0.67° or less.

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