Semiconductor device

Abstract

To suppress occurrence of tree breakdown in a protective film without disposing an insulator film in a pad part.SOLUTION: A capacitor C is configured with a wiring part which is positioned on the side of a substrate 10 as a first electrode 412 and with a wiring part which is positioned on an opposite side of the side of the substrate 10 while interposing the first electrode 412 therebetween as a second electrode 452 in two wiring parts which are opposed in a lamination direction of the substrate 10 and a wiring layer 20 in a plurality of wiring parts 41-45, and comprises a pad part 61 which is connected with the second electrode 452 disposed on one surface 300a on the opposite side of the side of the substrate 10 in the wiring layer 20 and a protective film 70 in which an opening part 71 which exposes the pad part 61 is formed and which is in contact with the pad part 61 and consists of a resin of which the field breakdown strength is lower than that of an insulator film. An insulator film of the wiring layer 20 is disposed between the second electrode 452 and the protective film 70, and regarding the pad part 61 and the second electrode 452, the pad 61 is disposed inside of the second electrode 452 in the lamination direction.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] Conventionally, semiconductor devices have been proposed in which a wiring layer having a capacitor is arranged on a wiring substrate (see, for example, Patent Document 1). Specifically, the wiring layer in this semiconductor device has a portion where wiring portions and insulating films are alternately stacked. The capacitor is formed by a portion where two wiring portions face each other in the stacking direction of the wiring portions and insulating films. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6342788 Summary of the Invention [Problem to be solved by the invention]

[0004] The present inventors have been studying a semiconductor device in which a pad connected to an external circuit serves as an upper electrode of a capacitor, a wiring portion facing the upper electrode serves as a lower electrode of the capacitor, and a protective film made of resin with an opening formed therein to expose the upper electrode. However, in such a semiconductor device, it has been confirmed that when a high voltage is applied to the capacitor, an electric field concentrates on the upper electrode, causing tree breakdown in the protective film in contact with the upper electrode.

[0005] For this reason, the inventors have investigated a configuration for such a semiconductor device in which an insulating film, such as an oxide film, having a higher electric field breakdown strength than the protective film is disposed between the upper electrode and the protective film. However, in such a semiconductor device, the upper electrode, which also functions as a pad portion, tends to be thick, so that disposing an insulating film between the upper electrode and the protective film would result in the formation of a thick insulating film. Therefore, such a configuration may result in a complex configuration, lengthening the manufacturing process, and increasing costs.

[0006] An object of the present disclosure is to provide a semiconductor device that can suppress tree breakdown in a protective film without providing an insulating film on a pad portion. [Means for solving the problem]

[0007] According to one aspect of the present disclosure, a semiconductor device includes a substrate (10) having one surface (10a), and a wiring layer (20) disposed on the one surface and having a capacitor (C), the wiring layer having a portion in which a plurality of insulating films (31-37) and a plurality of wiring portions (41-45) are alternately stacked, and the capacitor has two wiring portions of the plurality of wiring portions that face each other in a stacking direction of the substrate and the wiring layer, the wiring portion located on the substrate side being a first electrode (412) and the wiring portion located on the opposite side of the first electrode to the substrate side being a second electrode (452). ), and has a pad portion (61) connected to a second electrode arranged on one surface (300a) of the wiring layer opposite the substrate side, and a protective film (70) arranged on the one surface of the wiring layer opposite the substrate side, having an opening (71) for exposing the pad portion and in contact with the pad portion, and made of a resin having a lower electric field breakdown strength than the insulating film, and an insulating film of the wiring layer is arranged between the second electrode and the protective film, and the pad portion and the second electrode are arranged such that the pad portion is arranged inside the second electrode in the stacking direction.

[0008] According to this, an insulating film is disposed between the second electrode of the capacitor and the protective film. Therefore, even if electric field concentration occurs in the second electrode, the protective film will not come into contact with the electric field concentration portion, and tree breakdown can be suppressed from occurring in the protective film. Furthermore, the pad portion and the second electrode are disposed inside the second electrode in the stacking direction. Therefore, it is possible to suppress an increase in the electric field at the interface with the pad portion, which is likely to be the starting point of tree breakdown in the protective film, and to suppress tree breakdown from occurring in the protective film.

[0009] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Figure 2] FIG. 10 is a diagram showing the relationship between the thickness of an insulating film between an upper electrode and a first pad portion and the electric field strength. [Figure 3] FIG. 10 is a diagram showing the relationship between length and electric field intensity. [Figure 4A] 1A to 1C are diagrams illustrating a manufacturing process around the upper electrode. [Figure 4B] FIG. 4B is a diagram showing a manufacturing step subsequent to FIG. 4A. [Figure 4C] FIG. 4C is a diagram showing a manufacturing step subsequent to FIG. 4B. [Figure 4D] FIG. 4D is a diagram showing a manufacturing step subsequent to FIG. 4C. [Figure 4E] FIG. 4B is a diagram showing a manufacturing step subsequent to FIG. 4D. [Figure 5] FIG. 10 is a cross-sectional view of a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following embodiments, identical or equivalent parts will be denoted by the same reference numerals.

[0012] (First embodiment) A first embodiment will be described with reference to the drawings. The semiconductor device of this embodiment is suitable for use, for example, in a vehicle to drive various electronic components mounted on the vehicle.

[0013] 1, the semiconductor device includes a substrate 10 made of a silicon substrate or the like. Although not shown, semiconductor elements such as diodes and transistors are formed on the substrate 10. A wiring layer 20 having a portion where insulating films 31-37 and wiring portions 41-45 are alternately stacked and having a capacitor C therein is disposed on one surface 10a of the substrate 10.

[0014] Specifically, a first insulating film 31 is formed on one surface 10a of the substrate 10. The first insulating film 31 is made of, for example, a silicon oxide film (SiO2), a carbon-doped silicon oxide film (SiOC), a fluorine-doped silicon oxide film (SiOF), a tetraethoxysilane film (TEOS), etc. Note that second to sixth insulating films 31 to 36, which will be described later, have the same configuration as the first insulating film 31.

[0015] A first wiring section 41 is formed on the first insulating film 31. In this embodiment, the first wiring section 41 is formed to include a first connection wiring 411 and a lower electrode 412 of the capacitor C. The first connection wiring 411 is connected to a semiconductor element formed on the substrate 10 through a first through via electrode 311 formed in the first insulating film 31. The first wiring section 41 is composed of aluminum wiring or a laminated wiring in which aluminum is disposed between titanium nitride layers. The first through via electrode 311 is formed by disposing a tungsten plug or the like in a via hole. A second through via electrode 321, a third through via electrode 331, and a fourth through via electrode 341, which will be described later, have the same configuration as the first through via electrode 311. In this embodiment, the lower electrode 412 corresponds to the first electrode.

[0016] A second insulating film 32 is formed on the first insulating film 31 so as to cover the first wiring portion 41. A second wiring portion 42 is formed on the second insulating film 32. In this embodiment, the second wiring portion 42 is formed so as to include a second connection wiring 421 having a portion facing the first connection wiring 411. The second connection wiring 421 is connected to the first connection wiring 411 through a second through via electrode 321 formed in the second insulating film 32.

[0017] A third insulating film 33 is formed on the second insulating film 32 so as to cover the second wiring portion 42. A third wiring portion 43 is formed on the third insulating film 33. In this embodiment, the third wiring portion 43 is formed so as to include a third connection wiring 431 having a portion facing the second connection wiring 421. The third connection wiring 431 is connected to the second connection wiring 421 through a third through via electrode 331 formed in the third insulating film 33.

[0018] A fourth insulating film 34 is formed on the third insulating film 33 so as to cover the third wiring portion 43. A fourth wiring portion 44 is formed on the fourth insulating film 34. In this embodiment, the fourth wiring portion 44 is formed so as to include a fourth connection wiring 441 having a portion facing the third connection wiring 431. The fourth connection wiring 441 is connected to the third connection wiring 431 through a fourth through via electrode 341 formed in the fourth insulating film 34. Note that although FIG. 1 shows two fourth connection wirings 441 arranged separately, the two fourth connection wirings 441 are connected at a cross section different from that shown in FIG. 1.

[0019] A fifth insulating film 35 is formed on the fourth insulating film 34 so as to cover the fourth wiring portion 43. A fifth wiring portion 45 is formed on the fifth insulating film 35. In this embodiment, the fifth wiring portion 44 is formed to include an upper electrode 452 facing the lower electrode 412. Note that, in this embodiment, the upper electrode 452 corresponds to the second electrode. In this manner, in this embodiment, a capacitor C is configured with the lower electrode 412, the upper electrode 452, and the second to fifth insulating films 32 to 35 located between the lower electrode 412 and the upper electrode 452 as capacitance layers. In other words, the capacitor C of this embodiment is configured such that two or more insulating films are disposed between the lower electrode 412 and the upper electrode 452. The capacitor C of this embodiment is a high-voltage capacitor having a withstand voltage of 1000 V or more.

[0020] The fifth wiring portion 44 is formed to include a frame-shaped electric field relaxation layer 453 formed to surround the upper electrode 452. The electric field relaxation layer 453 is disposed on the fourth insulating film 34 together with the upper electrode 452, and is thereby disposed on the same plane as the upper electrode 452, and is insulated from the upper electrode 452 and the like, and is in a floating state.

[0021] A first upper electrode insulating film 501 and a second upper electrode insulating film 502 are disposed on the upper electrode 452 and the electric field relaxation layer 453 in this order from the upper electrode 452 and electric field relaxation layer 453 side. In this embodiment, the first upper electrode insulating film 501 is made of a nitride film or the like with low moisture permeability so as to prevent the upper electrode 452 from being oxidized. When the first upper electrode insulating film 501 is made of a nitride film and is made of a different material from the sixth insulating film 36, the first upper electrode insulating film 501 also functions as an etching stopper when forming a first contact hole 51, which will be described later. The second upper electrode insulating film 502 is made of an oxide film or the like for adjusting the distance to a first pad portion 61, which will be described later.

[0022] A sixth insulating film 36 is formed on the fifth insulating film 35 so as to cover the fifth wiring portion 45. A seventh insulating film 37 is disposed on the sixth insulating film 37. The seventh insulating film 37 is made of a nitride film or the like that has low moisture permeability and higher adhesion to a first pad portion 61 (described later) than the sixth insulating film 36. Hereinafter, the first to seventh insulating films 31 to 37 will also be referred to as a wiring portion insulating film 300. In this embodiment, one surface 300a of the wiring portion insulating film 300 is made of the seventh insulating film 37, and a portion facing the upper electrode 452 is raised higher than other portions. More specifically, in the stacking direction of the substrate 10 and the wiring layer 20 (hereinafter simply referred to as the stacking direction), a step portion 301 is formed on the one surface 300a of the wiring portion insulating film 300 in a portion outside the electric field relaxation layer 453, and the step portion 301 is raised toward the inner edge portion. In this embodiment, the surface 300a of the wiring insulating film 300 corresponds to the surface of the wiring layer 20 opposite to the substrate side. In other words, "in the stacking direction" can be defined as the direction normal to the surface of the surface 10a of the substrate 10, or as viewed from the direction normal to the surface of the surface 10a of the substrate 10. In FIG. 1, the vertical direction of the paper surface is the stacking direction.

[0023] A first contact hole 51 exposing the upper electrode 452 is formed in the seventh insulating film 37, the sixth insulating film 36, the second upper electrode insulating film 502, and the first upper electrode insulating film 501. A second contact hole 52 exposing the fourth connection wiring 441 is formed in the seventh insulating film 37, the sixth insulating film 36, and the fifth insulating film 35.

[0024] A first pad portion 61 connected to the upper electrode 452 through the first contact hole 51 is formed on the wiring portion insulating film 300. A second pad portion 62 connected to the fourth connection wiring 441 through the second contact hole 52 is formed on the wiring portion insulating film 300. Pad portions, connection wiring, through via electrodes, etc. are also formed appropriately in a cross section different from that in FIG. 1, and the lower electrode 412 is connected to the pad portion via the connection wiring and through via electrodes formed in a cross section different from that in FIG.

[0025] Here, the first pad portion 61 and the upper electrode 452 of this embodiment are formed in the stacking direction so that the first pad portion 61 is located within the upper electrode 452. In other words, the upper electrode 452 is formed so that the entire outer edge thereof protrudes beyond the first pad portion 61 in the stacking direction.

[0026] A protective film 70 is disposed on the wiring portion insulating film 300 so as to be in contact with the first pad portion 61. The protective film 70 is made of a resin having a lower electric field breakdown strength than the first to seventh insulating films 31 to 37, and is made of, for example, a polyimide film such as PIQ (registered trademark: Polyimideisoindoloquinazolinedione). In other words, the first to seventh insulating films 31 to 37 are made of a material having a higher electric field breakdown strength than the protective film 70. Note that the electric field breakdown strength can also be referred to as dielectric breakdown strength.

[0027] An opening 71 exposing the first pad 61 is formed in the protective film 70, and a plating film 80 is disposed on the portion of the first pad 61 exposed from the opening. The plating film 80 is formed, for example, by laminating a nickel plating film 81 and a gold plating film 82 in this order from the first pad 61 side. A bonding wire 91 is connected to the first pad 61 via the plating film 80. Note that the plating film 80 improves connectivity with the bonding wire 91, and therefore may not be provided depending on the materials of the first pad 61 and the bonding wire 91. For example, if the first pad 61 is made of aluminum and the bonding wire 91 is made of gold, sufficient connectivity is ensured and therefore the plating film 80 may not be provided.

[0028] 1, an opening is formed in the protective film 70 to expose the second pad portion 62, and a plating film is disposed on the portion of the second pad portion 62 exposed from the opening. A bonding wire is connected to the second pad portion 62 via the plating film in a cross section different from that of FIG.

[0029] The above is the configuration of the semiconductor device in this embodiment. Below, a more detailed configuration will be described while explaining the effects of the semiconductor device in this embodiment. Note that, in the following description, the length between a first virtual line K1 that passes through the outer edge of the upper electrode 452 in the stacking direction and a second virtual line K2 that passes through the outer edge of the first pad portion 61 in the stacking direction will be referred to as length d. In this embodiment, as described above, the planar sizes of the first pad portion 61 and the upper electrode 452 are adjusted in the stacking direction so that the first pad portion 61 is located within the upper electrode 452, and therefore the length d is a value greater than 0.

[0030] In a semiconductor device such as that of this embodiment, when a high electric field is applied to the capacitor C, electric field concentration occurs at the outer edge of the upper electrode 452. In this case, in this embodiment, the seventh insulating film 37, the sixth insulating film 36, the second upper electrode insulating film 502, and the first upper electrode insulating film 501 are arranged between the upper electrode 452 and the protective film 70, so that the protective film 70 does not come into direct contact with the upper electrode 452, which is the electric field concentration portion. Therefore, tree breakdown can be suppressed from occurring in the protective film 70.

[0031] In this embodiment, the first pad portion 61 and the upper electrode 452 are formed such that the first pad portion 61 is located inside the upper electrode 452 in the stacking direction. This makes it possible to prevent the electric field at the interface with the first pad portion 61, which is likely to be the starting point of tree breakdown in the protective film 70, from increasing, and further prevents tree breakdown from occurring in the protective film 70.

[0032] An electric field is applied to the protective film 70 from the upper electrode 452 via the seventh insulating film 37, the sixth insulating film 36, the second upper electrode insulating film 502, and the first upper electrode insulating film 501, which are arranged between the upper electrode 452 and the protective film 70. Therefore, as shown in FIG. 2, the electric field applied to the protective film 70 decreases as the insulating film arranged between the upper electrode 452 and the protective film 70 becomes thicker. For example, if the electric field strength is y and the thickness of the insulating film arranged between the upper electrode 452 and the protective film 70 is x, then the relationship is y = -1.143x + 4.454. The insulating film thickness in FIG. 2 is the sum of the thicknesses of the seventh insulating film 37, the sixth insulating film 36, the second upper electrode insulating film 502, and the first upper electrode insulating film 501, which are arranged between the upper electrode 452 and the protective film 70. 2 indicates the electric field intensity at a position facing the outer edge of the upper electrode 452 on the interface of the protective film 70 in contact with the seventh insulating film 37.

[0033] In this case, the thickness of the insulating film between the upper electrode 452 and the protective film 70 can be easily adjusted by, for example, adjusting the thickness of the second upper electrode insulating film 502. Furthermore, in this embodiment, the first contact hole 51 exposing the upper electrode 452 is formed in the seventh insulating film 37, the sixth insulating film 36, the second upper electrode insulating film 502, and the first upper electrode insulating film 501, and the second contact hole 52 exposing the fourth connection wiring 441 is formed in the seventh insulating film 37, the sixth insulating film 36, and the fifth insulating film 35. Therefore, the depths of the first contact hole 51 and the second contact hole 52 are likely to differ, and the second contact hole 52 is likely to be deeper than the first contact hole 51. Therefore, for example, if the first contact hole 51 and the second contact hole 52 are to be formed by dry etching, the different depths of the first contact hole 51 and the second contact hole 52 may make it difficult to form them in the same process. Therefore, by adjusting the thickness of the insulating film 502 for the second upper electrode and making the depth of the first contact hole 51 closer to the depth of the second contact hole 52, it is possible to easily form the first contact hole 51 and the second contact hole 52 simultaneously.

[0034] The inventors then conducted extensive research into the length d and obtained the results shown in Fig. 3. The electric field intensity in Fig. 3 is the electric field intensity at the outer edge of the first pad portion 61 of the protective film 70, which is in contact with the portion opposite the substrate 10, i.e., the electric field intensity at the portion indicated by arrow A in Fig. 1. Fig. 3 also shows the results of a screening test in which 2.25 kVrms was applied to the capacitor C.

[0035] As shown in FIG. 3, it has been confirmed that the electric field strength decreases sharply as the length d increases when the length d is less than 15 μm. On the other hand, it has been confirmed that the electric field strength decreases gradually as the length d increases when the length d is 15 μm or more. For this reason, it is preferable that the length d be 15 μm or more. However, increasing the length d leads to an increase in the size of the semiconductor device. For this reason, it is preferable that the length d be 15 μm or more, and that the length be adjusted appropriately depending on the application.

[0036] In the semiconductor device of this embodiment, as described above, the electric field relaxation layer 453 is disposed on the same surface as the upper electrode 452. Therefore, in the semiconductor device of this embodiment, the step portion 301 on the one surface 300a of the wiring insulating film 300 is positioned farther from the upper electrode 452 than in a case where the electric field relaxation layer 453 is not formed. This shortens the length between the step portion 301 and the outer edge of the upper electrode 452, thereby preventing a large electric field from being applied to the protective film 70 located near the step portion 301. Furthermore, by providing the electric field relaxation layer 453, the electric field at the outer edge of the upper electrode 452 is more likely to be spread in the planar direction of the upper electrode 452. This further prevents a large electric field from being applied to the protective film 70 located near the step portion 301.

[0037] Next, a method for manufacturing the semiconductor device according to this embodiment will be described with reference to Figures 4A to 4E. The following mainly describes a method for manufacturing the portion around the upper electrode 452. Also, Figures 4A to 4E omit the substrate 10 and the portion of the wiring layer 20 that is closer to the substrate 10 than the fourth insulating film 34.

[0038] 4A, a substrate 10 having a semiconductor element formed thereon is prepared, and first to fifth insulating films 31 to 35 are formed by, for example, a CVD (short for Chemical Vapor Deposition) method, and first to fourth wiring portions 41 to 44 are formed by patterning using a sputtering method or dry etching. Then, a fifth wiring portion 45, a first upper electrode insulating film 501, and a second upper electrode insulating film 502 are formed in this order on the fifth insulating film 35 by a CVD method or a sputtering method, and a resist 100 is placed on the second upper electrode insulating film 502 and patterned.

[0039] 4B, dry etching or the like is performed using the resist 100 as a mask to simultaneously pattern the fifth wiring portion 45, the first upper electrode insulating film 501, and the second upper electrode insulating film 502. Specifically, the fifth wiring portion 45 is patterned so as to form an upper electrode 452 and an electric field relaxation layer 453.

[0040] 4C, the sixth insulating film 36 and the seventh insulating film 37 are formed in this order by a CVD method or the like. At this time, in this embodiment, since the first upper electrode insulating film 501 and the second upper electrode insulating film 502 are disposed on the upper electrode 452, a step portion 301 is formed on one surface 300a of the wiring portion insulating film 300 outside the electric field relaxation layer 453 in the stacking direction, and the portion disposed on the upper electrode 452 is raised.

[0041] 4D, a resist (not shown) is disposed and patterned, and the resist is used as a mask to form a first contact hole 51 that reaches the upper electrode 452. Next, as shown in FIG. 4E, plating and patterning processes are appropriately performed to form a first pad portion 61 that is connected to the upper electrode 452 through the first contact hole 51. After that, although not particularly shown, a protective film 70 and a bonding wire 91 are disposed in this order, thereby manufacturing the semiconductor device shown in FIG. 1 above.

[0042] According to the present embodiment described above, the seventh insulating film 37, the sixth insulating film 36, the second upper electrode insulating film 502, and the first upper electrode insulating film 501 are disposed between the upper electrode 452 of the capacitor C and the protective film 70. Therefore, even if electric field concentration occurs in the upper electrode 452, the protective film 70 will not come into contact with the electric field concentration portion, and tree breakdown in the protective film 70 can be suppressed.

[0043] In this embodiment, the first pad portion 61 and the upper electrode 452 are formed such that the first pad portion 61 is located inside the upper electrode 452 in the stacking direction. This prevents the electric field at the interface with the first pad portion 61, which is likely to be the starting point of tree breakdown in the protective film 70, from increasing, and prevents tree breakdown from occurring in the protective film 70.

[0044] (1) In this embodiment, the capacitor C is configured by disposing two or more insulating films between the lower electrode 412 and the upper electrode 452. This makes it easy to configure the capacitor C with a high breakdown voltage of 1000 V or more.

[0045] (2) In this embodiment, the surface 300a of the wiring insulating film 300 has a portion facing the upper electrode 452 that is raised higher than other portions. Therefore, compared to when the surface 300a of the wiring insulating film 300 is flat, the thickness of the insulating film located between the upper electrode 452 and the protective film 70 tends to be thicker, and application of a large electric field to the protective film 70 can be suppressed.

[0046] (3) In this embodiment, by setting the length d to 15 μm or more, the electric field applied to the interface between the protective film 70 and the first pad portion 61 can be prevented from becoming too strong.

[0047] (4) In this embodiment, the electric field relaxation layer 453 is disposed on the same plane as the upper electrode 452. Therefore, in the semiconductor device of this embodiment, the step portion 301 on the one surface 300a of the wiring insulating film 300 is positioned farther from the upper electrode 452 than in a case where the electric field relaxation layer 453 is not formed. This shortens the distance between the step portion 301 and the outer edge of the upper electrode 452, thereby preventing a large electric field from being applied to the protective film 70 located near the step portion 301. Furthermore, by providing the electric field relaxation layer 453, the electric field at the outer edge of the upper electrode 452 is more likely to be spread in the plane direction of the upper electrode 452. This further prevents a large electric field from being applied to the protective film 70 located near the step portion 301.

[0048] (Second embodiment) A second embodiment will be described. This embodiment differs from the first embodiment in that the location of the lower electrode 412 is changed. As the rest of the configuration is the same as the first embodiment, a description thereof will be omitted here.

[0049] 5, in the semiconductor device of this embodiment, the upper electrode 452 extends in one direction in the planar direction from a portion facing the first pad portion 61 so as to have a portion different from the portion facing the first pad portion 61. The lower electrode 412 is formed below a portion of the upper electrode 452 that extends from the portion facing the first pad portion 61. In other words, the lower electrode 412 is formed so as not to face the first pad portion 61.

[0050] As in the present embodiment described above, even if the location of the lower electrode 412 is changed, the same effects as in the first embodiment can be obtained.

[0051] (Other embodiments) Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

[0052] For example, in each of the above embodiments, when the first pad portion 61 and the second pad portion 62 are made of aluminum or the like, the adhesion to the sixth insulating film 36 is higher than when the first pad portion 61 and the second pad portion 62 are made of copper or the like, so the seventh insulating film 37 does not need to be provided.

[0053] Furthermore, in the above-described embodiments, an example has been described in which the upper electrode 452 is disposed on the fifth insulating film 35, but the upper electrode 452 may be disposed on any of the second to fourth insulating films 31 to 34. However, when incorporating the capacitor C of each of the above-described embodiments into an already existing wiring layer 20, disposing the upper electrode 452 on any of the second to fourth insulating films 31 to 34 may require design changes to other wiring portions. Therefore, for example, in the case in which the uppermost layer of the connection wiring is formed by the fourth wiring portion 44 as in the above-described embodiments, disposing the upper electrode 452 on the fifth insulating film 35 can prevent the need for design changes to other wiring portions.

[0054] Furthermore, in each of the above embodiments, the length d may be less than 15 μm. Furthermore, in each of the above embodiments, the electric field relaxation layer 453 may not be provided, and the first upper electrode insulating film 501 and the second upper electrode insulating film 502 may not be provided.

[0055] [Disclosure of the Invention] The present disclosure described above can be understood from the following viewpoints, for example. [First viewpoint] A semiconductor device, a substrate (10) having one surface (10a); a wiring layer (20) disposed on the one surface and having a capacitor (C), the wiring layer has a portion in which a plurality of insulating films (31 to 37) and a plurality of wiring portions (41 to 45) are alternately stacked, The capacitor is configured such that, of the plurality of wiring portions, two of the wiring portions that face each other in the stacking direction of the substrate and the wiring layer are arranged such that the wiring portion located on the substrate side is a first electrode (412), and the wiring portion located on the opposite side of the substrate side across the first electrode is arranged as a second electrode (452), a pad portion (61) connected to the second electrode, the pad portion (61) being arranged on one surface (300a) of the wiring layer opposite to the substrate side; a protective film (70) that is disposed on one surface of the wiring layer opposite to the substrate side, has an opening (71) that exposes the pad portion, is formed, and is in contact with the pad portion, and is made of a resin that has a lower electric field breakdown strength than the insulating film; an insulating film of the wiring layer is disposed between the second electrode and the protective film; The semiconductor device is such that the pad portion and the second electrode are arranged inside the second electrode in the stacking direction. [Second viewpoint] The semiconductor device according to a first aspect, wherein the capacitor has two or more layers of the insulating film disposed between the first electrode and the second electrode. [Third Perspective] The semiconductor device according to the first or second aspect, wherein a portion of the insulating film located on the second electrode is raised higher than a portion other than the portion located on the second electrode. [Fourth viewpoint] The semiconductor device according to any one of the first to third aspects, wherein the length (d) between the outer edge of the second electrode and the outer edge of the pad portion in the stacking direction is 15 μm or more. [Fifth viewpoint] The semiconductor device according to any one of the first to fourth aspects, further comprising an electric field relaxation layer (453) that is arranged on the same plane as the second electrode, has a frame shape surrounding the second electrode, and is in a floating state. [Sixth viewpoint] The semiconductor device according to any one of the first to fifth aspects, wherein the capacitor has a breakdown voltage of 1000V or more. [Explanation of symbols]

[0056] 10 Substrate 10a one side 20 wiring layer 31~37 Insulating film 41~45 Wiring section 61 Pad section 70 Protective film 70a opening 300a one side 412 1st electrode 452 2nd electrode 8

Claims

1. A semiconductor device, a substrate (10) having one surface (10a); a wiring layer (20) disposed on the one surface and having a capacitor (C); the wiring layer has a portion in which a plurality of insulating films (31 to 37) and a plurality of wiring portions (41 to 45) are alternately stacked, The capacitor is configured such that, of the plurality of wiring portions, two of the wiring portions that face each other in the stacking direction of the substrate and the wiring layer are arranged such that the wiring portion located on the substrate side is a first electrode (412), and the wiring portion located on the opposite side of the substrate side across the first electrode is a second electrode (452), a pad portion (61) connected to the second electrode, the pad portion being arranged on one surface (300a) of the wiring layer opposite to the substrate side; a protective film (70) that is disposed on one surface of the wiring layer opposite to the substrate side, has an opening (71) that exposes the pad portion, is formed, and is in contact with the pad portion, and is made of a resin that has a lower electric field breakdown strength than the insulating film; an insulating film of the wiring layer is disposed between the second electrode and the protective film; The semiconductor device is such that the pad portion and the second electrode are arranged inside the second electrode in the stacking direction.

2. 2. The semiconductor device according to claim 1, wherein the capacitor has two or more layers of the insulating film disposed between the first electrode and the second electrode.

3. 2. The semiconductor device according to claim 1, wherein a portion of the insulating film located above the second electrode is higher than a portion other than the portion located above the second electrode.

4. 2. The semiconductor device according to claim 1, wherein a length (d) between an outer edge of the second electrode and an outer edge of the pad portion in the stacking direction is 15 [mu]m or more.

5. 2. The semiconductor device according to claim 1, further comprising an electric field relaxation layer (453) that is arranged on the same plane as the second electrode, has a frame shape surrounding the second electrode, and is in a floating state.

6. 6. The semiconductor device according to claim 1, wherein the capacitor has a breakdown voltage of 1000 V or more.

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