Semiconductor device and method for manufacturing the same

Abstract

To provide a semiconductor device and a method for manufacturing the semiconductor device.SOLUTION: The semiconductor device includes a substrate, a first lower electrode, a first storage capacitor, a first upper electrode, a second lower electrode, a second storage capacitor, and a second upper electrode. The first lower electrode is installed on the substrate. The first storage capacitor is installed on the first lower electrode. The first upper electrode is installed on the first storage capacitor. The second lower electrode is installed on the first upper electrode and is electrically coupled to the first upper electrode. The second storage capacitor is installed on the second lower electrode and vertically overlaps the first storage capacitor. The second upper electrode is installed on the second storage capacitor.SELECTED DRAWING: Figure 1C

Description

[Technical Field]

[0001] The present invention relates to semiconductor manufacturing, and more particularly to semiconductor devices and methods for manufacturing the same. [Background technology]

[0002] Semiconductor devices are widely used in various electronic devices such as personal computers, mobile phones, digital cameras, and other electronic devices. While electronic components such as transistors and resistors have become increasingly miniaturized, capacitors still occupy a large amount of space compared to other electronic components due to their physical characteristics. This is a disadvantage in miniaturizing semiconductor devices. Therefore, further improvements in semiconductor devices are needed. Summary of the Invention [Problem to be solved by the invention]

[0003] An object of the present invention is to provide a semiconductor device. [Means for solving the problem]

[0004] The present invention provides a semiconductor device. The semiconductor device includes a substrate, a first lower electrode, a first storage capacitor, a first upper electrode, a second lower electrode, a second storage capacitor, and a second upper electrode. The first lower electrode is disposed on the substrate. The first storage capacitor is disposed on the first lower electrode. The first upper electrode is disposed on the first storage capacitor. The second lower electrode is disposed on the first upper electrode. The second lower electrode is electrically coupled to the first storage capacitor. The second storage capacitor is disposed on the second lower electrode. The second storage capacitor vertically overlaps the first storage capacitor. The second upper electrode is disposed on the second storage capacitor.

[0005] The semiconductor device includes a substrate, a first lower electrode, a first storage capacitor, a first upper electrode, a second lower electrode, a second storage capacitor, and a second upper electrode. The first lower electrode is disposed on the substrate. The first storage capacitor is disposed on the first lower electrode. The first upper electrode is disposed on the first storage capacitor. The second lower electrode is disposed on the first upper electrode and electrically coupled to the first lower electrode. The second storage capacitor is disposed on the second lower electrode and vertically overlaps the first storage capacitor. The second upper electrode is disposed on the second storage capacitor and electrically coupled to the first upper electrode.

[0006] A method for manufacturing a semiconductor device includes forming a first capacitor structure on a substrate, the steps including forming a first bottom electrode, forming a first storage capacitor on the first bottom electrode, and forming a first top electrode on the first storage capacitor. The method further includes forming a first dielectric layer to cover the first capacitor structure. The method further includes forming a plurality of conductive vias in the first dielectric layer. The method further includes forming a second capacitor structure on the first dielectric layer, the steps including forming a second bottom electrode, forming a second storage capacitor on the second bottom electrode, and forming a second top electrode on the second storage capacitor. The second capacitor structure vertically overlaps the first capacitor structure and is electrically coupled to the first capacitor structure through the conductive vias. [Effects of the Invention]

[0007] The semiconductor device provided by the present invention vertically stacks multiple capacitor structures, thereby increasing breakdown voltage and capacitance without increasing the occupied area. [Brief explanation of the drawings]

[0008] [Figure 1A]1A-1D are cross-sectional views illustrating various stages in fabricating a semiconductor device according to some embodiments. [Figure 1B] 1A-1D are cross-sectional views illustrating various stages in fabricating a semiconductor device according to some embodiments. [Figure 1C] 1A-1D are cross-sectional views illustrating various stages in fabricating a semiconductor device according to some embodiments. [Figure 2] 1 is a cross-sectional view of a semiconductor device according to some embodiments. [Figure 3] 1 is a cross-sectional view of a semiconductor device according to some embodiments. [Figure 4] 1 is a top view of a semiconductor device according to some embodiments. [Figure 5] FIG. 1 is a circuit diagram of a semiconductor device according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0009] 1A, semiconductor device 100 includes a substrate 102. Substrate 102 can be formed of any substrate material suitable for semiconductor devices and can be a bulk semiconductor substrate or can include a composite substrate formed of different materials.

[0010] A first bottom electrode 104 is formed on the substrate 102. The first bottom electrode 104 is formed of a metal material (e.g., tungsten or any other suitable material). An insulating layer 106 is formed on the first bottom electrode 104. The insulating layer 106 covers the top surface and sidewalls of the first bottom electrode 104 and the top surface of the substrate 102. The insulating layer 106 is formed of a dielectric material (e.g., silicon nitride or any other suitable material).

[0011] A first storage capacitor 108 is formed on a portion of the first bottom electrode 104. The first storage capacitor 108 includes a plurality of cylindrical capacitors. The first storage capacitor 108 is disposed within a first conductive material 110. The first conductive material 110 may be formed of a doped semiconductor material, including a boron-doped silicon germanium layer (BSiGe), doped polycrystalline silicon, etc., or a combination thereof.

[0012] A first upper electrode 112 is formed on the first conductive material 110. The first upper electrode 112 is formed of a metal material (e.g., tungsten, or any suitable material, etc.). A mask layer 114 is formed on the first upper electrode 112. The mask layer 114 is formed of a dielectric material (e.g., silicon oxide, etc.). For example, the mask layer 114 is formed of tetraethoxysilane (TEOS).

[0013] A patterning process, including one or more lithography and etching processes, is then performed so that the sidewalls of the first conductive material 110, the first top electrode 112 and the mask layer 114 are substantially coplanar with one another.

[0014] After the patterning process, a sidewall of the first upper electrode 112 may extend beyond a sidewall of the first lower electrode 104, and another sidewall of the first upper electrode 112 may be located on the upper surface of the first lower electrode 104. The first lower electrode 104, the first storage capacitor 108, the first conductive material 110, the first upper electrode 112, and the mask layer 114 then form a first capacitor structure C1.

[0015] 1B, a dielectric layer 116 is formed to cover the first capacitor structure C1. The dielectric layer 116 is formed of a dielectric material (e.g., silicon oxide, etc.). A plurality of openings are etched in the dielectric layer 116, and a plurality of conductive vias 118 and 120 are formed in the openings. The conductive vias 118 and 120 are formed of a metal material (e.g., tungsten, or any suitable material, etc.). The conductive via 118 is electrically coupled to the first bottom electrode 104, and the conductive via 120 is electrically coupled to the first top electrode 112.

[0016] 1C, a second bottom electrode 124 is formed on the dielectric layer 116. During the formation of the second bottom electrode 124, a metal layer 122 is formed. The material of the metal layer 122 includes the material of the second bottom electrode 124 (e.g., tungsten, etc.). After the formation of the metal layer 122 and the second bottom electrode 124, an insulating layer 126 is formed.

[0017] Next, a second storage capacitor 128, a second conductive material 130, a second upper electrode 132, and a mask layer 134 are formed on the second lower electrode 124 to form a second capacitor structure C2, which may be similar to the formation of the first capacitor structure C1, and therefore will not be described again here. The second capacitor structure C2 vertically overlaps the first capacitor structure C1 (i.e., overlaps in a direction perpendicular to the top surface of the substrate 102). In particular, the second storage capacitor 128 vertically overlaps the first storage capacitor 108. The opposite side wall of the second upper electrode 132 may extend beyond the opposite side wall of the first lower electrode 104.

[0018] Thereafter, a dielectric layer 136 is formed to cover the second capacitor structure C2, and a plurality of conductive vias 138 and 140 are formed in the dielectric layer 136. Next, metal layers 142, 144 and an insulating layer 146 are formed on the dielectric layer 136. The metal layer 142 is electrically coupled to the second bottom electrode 122 through the conductive via 138 and to the first bottom electrode 104 through the conductive via 188. The metal layer 144 is electrically coupled to the second top electrode 132 through the conductive via 140. The second bottom electrode 124 is electrically coupled to the first top electrode 112 through the conductive via 120. Thus, the semiconductor device 100 has the first capacitor structure C1 and the second capacitor structure C2 connected in series. The second capacitor structure C2 vertically overlaps the first capacitor structure C1, thereby providing a high breakdown voltage for the same area.

[0019] It should be understood that additional capacitor structures can be formed on the second capacitor structure C2 such that the semiconductor device 100 has more capacitor structures and thus provides a higher breakdown voltage.

[0020] FIG. 2 is a cross-sectional view of a semiconductor device. Additional features are added to the semiconductor device 200. Some features described below can be substituted or omitted in different embodiments. Note that the semiconductor device 200 has the same or similar elements as the semiconductor device 100 of FIGS. 1A-1C, and for brevity, those elements will not be described again here. Compared to the semiconductor device 100 of FIGS. 1A-1C, which has a series-connected capacitor structure, in the embodiment of FIG. 2, the semiconductor device 200 has a parallel-connected capacitor structure.

[0021] 2, the semiconductor device 200 has a first capacitor structure C1 and a second capacitor structure C2 that are vertically stacked on a substrate 202. The formation of the first capacitor structure C1 and the second capacitor structure C2 of the semiconductor device 200 can refer to the formation of the first capacitor structure C1 and the second capacitor structure C2 of the semiconductor device 100 of FIGS. 1A to 1C, and the description will not be repeated.

[0022] The first capacitor structure C1 includes a first lower electrode 204, a first storage capacitor 208, a first conductive material 210, a first upper electrode 212, and a mask layer 214. The first upper electrode 212 has a tail portion 212t on one side that extends beyond the sidewall of the first lower electrode 204, and the other side of the first upper electrode 212 is located on the upper surface of the first lower electrode 204. The semiconductor device 200 includes an insulating layer 206 covering the first lower electrode 204, a dielectric layer 216 covering the first capacitor structure C1, and conductive vias 218, 220 passing through (penetrating) the dielectric layer 216.

[0023] The second capacitor structure C2 is disposed on the dielectric layer 216 and includes a second lower electrode 222, a second storage capacitor 228, a second conductive material 230, a second upper electrode 232, and a mask layer 234. The semiconductor device 200 also includes a metal layer 224 disposed on the dielectric layer 216, an insulating layer 226 covering the second lower electrode 222 and the metal layer 224, a dielectric layer 236 covering the second capacitor structure C2, and conductive vias 238, 240, and 242 passing through the dielectric layer 236. The second upper electrode 232 has a tail 232t on one side thereof that extends beyond the sidewall of the second lower electrode 222 and covers a portion of the metal layer 224. The length of the tail 212t of the first upper electrode 212 is longer than the length of the tail 232t of the second upper electrode 232.

[0024] The semiconductor device 200 includes metal layers 244 and 246 and an insulating layer 248 disposed on a dielectric layer 236. The metal layer 244 is electrically coupled to the second lower electrode 222 through a conductive via 238 and to the first lower electrode 204 through a conductive via 218. The metal layer 246 is electrically coupled to the tail portion 232t of the second upper electrode 232 through a conductive via 240, to the metal layer 224 through a conductive via 242, and to the tail portion 212t of the first upper electrode 212 through a conductive via 220. Thus, the semiconductor device 200 includes a first capacitor structure C1 and a second capacitor structure C2 connected in parallel. The second capacitor structure C2 overlaps the first capacitor structure C1 in a direction perpendicular to the substrate 202, thereby providing a higher capacitance for the same area.

[0025] It should be understood that other capacitor structures can be formed on the second capacitor structure C2 such that the semiconductor device 200 has more capacitor structures to provide even higher capacitance.

[0026] FIG. 3 is a cross-sectional view of semiconductor device 300. Additional features are added to semiconductor device 300. Some features described below can be substituted or omitted in different embodiments. Note that semiconductor device 300 has elements that are the same as or similar to semiconductor device 100 of FIGS. 1A-1C, and for brevity, those elements will not be described again here. In the embodiment of FIG. 3, semiconductor device 300 has a series and parallel connected capacitor structure.

[0027] 3, semiconductor device 300 includes vertically stacked and parallel-connected capacitor sets A and B on substrate 302. Capacitor set A includes series-connected capacitor structures CA1 and CA2. Capacitor set B includes series-connected capacitor structures CB1 and CB2. Capacitor structure CA1 includes a bottom electrode 304, a storage capacitor 308, a conductive material 310, a top electrode 312, and a mask layer 314. Semiconductor device 300 includes an insulating layer 306 covering bottom electrode 304, a dielectric layer 316 covering capacitor structure CA1, and conductive vias 318 and 320 passing through dielectric layer 316.

[0028] The capacitor structure CA2 is disposed on the dielectric layer 316 and includes a bottom electrode 324, a storage capacitor 328, a conductive material 330, a top electrode 332, and a mask layer 334. The top electrode 332 has a tail 332t on one side that extends beyond the sidewall of the bottom electrode 324. The semiconductor device 300 includes a metal layer 322 disposed on the dielectric layer 316, an insulating layer 326 covering the metal layer 322 and the bottom electrode 324, a dielectric layer 336 covering the capacitor structure CA2, and conductive vias 338, 340 passing through the dielectric layer 336.

[0029] The capacitor structure CB1 is disposed on the dielectric layer 336 and includes a bottom electrode 342, a storage capacitor 348, a conductive material 350, a top electrode 352, and a mask layer 354. The semiconductor device 300 includes a metal layer 344 disposed on the dielectric layer 336, an insulating layer 346 covering the bottom electrode 342 and the metal layer 344, a dielectric layer 356 covering the capacitor structure CB1, and conductive vias 358, 360, and 362 passing through the dielectric layer 356.

[0030] Capacitor structure CB2 is disposed on dielectric layer 356 and includes a bottom electrode 366, a storage capacitor 372, a conductive material 374, a top electrode 376, and a mask layer 378. Top electrode 376 has a tail 376t on one side. Semiconductor device 300 includes metal layers 364, 368 on both sides of bottom electrode 366, an insulating layer 370 covering metal layers 364, 368 and bottom electrode 366, a dielectric layer 380 covering capacitor structure CB2, and conductive vias 382, ​​384, and 386 passing through dielectric layer 380.

[0031] Semiconductor device 300 includes metal layers 388 and 390 and an insulating layer 392 disposed on dielectric layer 380. Metal layer 388 is electrically coupled to metal layer 364 through conductive via 382, ​​to bottom electrode 342 through conductive via 358, to metal layer 322 through conductive via 338, and to bottom electrode 304 through conductive via 318. Metal layer 390 is electrically coupled to tail portion 376t of top electrode 376 through conductive via 384, to metal layer 368 through conductive via 386, to metal layer 344 through conductive via 362, and to tail portion 332t of top electrode 332 through conductive via 340.

[0032] In addition, bottom electrode 366 of capacitor structure CB2 is electrically coupled to top electrode 352 of capacitor structure CB1 through conductive via 360. Bottom electrode 324 of capacitor structure CA2 is electrically coupled to top electrode 312 of capacitor CA1 through conductive via 320. Thus, semiconductor device 300 has series-connected capacitor structures CA1 and CA2, series-connected capacitor structures CB1 and CB2, and parallel-connected capacitor sets A and B. Capacitor structure CB2 overlaps capacitor structures CA1, CA2, and CB1 in a direction perpendicular to substrate 302, thereby providing a high breakdown voltage and high capacitance for the same area.

[0033] 4 is a top view illustrating each capacitor structure of the semiconductor device 300. For simplicity of illustration, only a portion of the semiconductor device 300 is shown. As shown in FIG. 4, the length L2 of the upper electrode 332 of the capacitor structure CA2 is longer than the length L1 of the upper electrode 312 of the capacitor CA1, the length L4 of the upper electrode 376 of the capacitor structure CB2 is longer than the length L3 of the upper electrode 352 of the capacitor structure CB1, and the length L2 of the upper electrode 332 of the capacitor structure CA2 is longer than the length L4 of the upper electrode 376 of the capacitor structure CB2.

[0034] 5, it should be understood that additional capacitor structures may be formed on capacitor structures CA2 and / or CB2, allowing semiconductor device 300 to have even more capacitor structures. For example, additional capacitor structures (CA3-CAn and CB3-CBn) and capacitor sets (C-Z, each having capacitor structures CC1-CCn...CZ1-CZn) may be formed on capacitor structures CA2 and CB2 to provide even higher breakdown voltages and even higher capacitances.

[0035] In summary, the semiconductor device provided by the embodiments of the present invention vertically stacks multiple capacitor structures, thereby increasing breakdown voltage and capacitance without increasing the occupied area.

[0036] The foregoing outlines features of several embodiments so that those skilled in the art may better understand aspects of the present disclosure. Those skilled in the art should appreciate that this disclosure may readily serve as a basis for designing or modifying other processes and structures which carry out the same purposes and / or achieve the same advantages as the embodiments presented herein. Those skilled in the art should also appreciate that such equivalent structures may be subject to various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure. [Explanation of symbols]

[0037] 100...Semiconductor device 102... Circuit board 104...First lower electrode 106, 126, 146...insulating layer 108...First storage capacitor 110...First conductive material 112...First top electrode 114, 134...Mask layer 116, 136...Dielectric layer 118, 120, 138, 140...Conductive vias 122, 142, 144...metal layer 124...Second lower electrode 128...Second storage capacitor 130...Second conductive material 132…Second upper electrode C1...First capacitor structure C2: Second capacitor structure

Claims

1. A semiconductor device, A substrate; a first lower electrode disposed on the substrate; a first storage capacitor disposed on the first lower electrode; a first upper electrode disposed on the first storage capacitor; a second lower electrode disposed on the first upper electrode and electrically coupled to the first upper electrode; a second storage capacitor disposed on the second lower electrode and vertically overlapping the first storage capacitor; a second upper electrode disposed on the second storage capacitor; A semiconductor device comprising:

2. 2. The semiconductor device according to claim 1, further comprising a mask covering said second upper electrode, wherein a sidewall of said mask layer is aligned with a sidewall of said second upper electrode.

3. a third lower electrode disposed on the second upper electrode and electrically coupled to the first lower electrode; a third storage capacitor disposed on the third lower electrode and vertically overlapping the first storage capacitor and the second storage capacitor; a third upper electrode disposed on the third storage capacitor; 3. The semiconductor device according to claim 1, further comprising:

4. A semiconductor device, A substrate; a first lower electrode disposed on the substrate; a first storage capacitor disposed on the first lower electrode; a first upper electrode disposed on the first storage capacitor; a second lower electrode disposed on the first upper electrode and electrically coupled to the first lower electrode; a second storage capacitor disposed on the second lower electrode and vertically overlapping the first storage capacitor; a second upper electrode disposed on the second storage capacitor and electrically coupled to the first upper electrode; A semiconductor device comprising:

5. a first conductive via electrically coupling the first bottom electrode to the second bottom electrode; a metal layer adjacent to the second bottom electrode; a second conductive via electrically coupling the metal layer to the first upper electrode; 5. The semiconductor device according to claim 4, further comprising:

6. the first upper electrode has a first tail, and the second upper electrode has a second tail electrically coupled to the first tail; 6. The semiconductor device according to claim 4, wherein the length of the first tail is longer than the length of the second tail.

7. A method for manufacturing a semiconductor device, comprising: forming a first capacitor structure on a substrate, the first capacitor structure comprising: forming a first bottom electrode; forming a first storage capacitor on the first bottom electrode; and forming a first top electrode on the first storage capacitor; forming a first dielectric layer overlying the first capacitor structure; forming a plurality of conductive vias in the first dielectric layer; forming a second capacitor structure in the first dielectric layer, the second capacitor structure comprising: forming a second bottom electrode; forming a second storage capacitor on the second bottom electrode; and forming a second top electrode on the second storage capacitor; The second capacitor structure vertically overlaps the first capacitor structure and is electrically coupled to the first capacitor structure through the conductive via.

8. forming a second dielectric layer overlying the second capacitor structure; forming a third capacitor structure in the second dielectric layer, the third capacitor structure comprising: forming a third bottom electrode; forming a third storage capacitor on the third bottom electrode; and forming a third top electrode on the third storage capacitor; forming a third dielectric layer overlying the third capacitor structure; forming a fourth capacitor structure on the third dielectric layer, the fourth capacitor structure comprising: forming a fourth bottom electrode; forming a fourth storage capacitor on the fourth bottom electrode; and forming a fourth bottom electrode on the fourth storage capacitor; 8. The method of claim 7, wherein the fourth capacitor structure vertically overlaps and is electrically coupled to the first capacitor structure, the second capacitor structure, and the third capacitor structure.

9. the first bottom electrode is electrically coupled to the third bottom electrode; the first upper electrode is electrically coupled to the second lower electrode; the second top electrode is electrically coupled to the fourth top electrode; 9. The method for manufacturing a semiconductor device according to claim 8, wherein the third upper electrode is electrically coupled to the fourth lower electrode.

10. forming a first metal layer during the formation of the second bottom electrode; forming a second metal layer during the formation of the third bottom electrode; forming a third metal layer and the fourth metal layer during the formation of the fourth bottom electrode; 10. The method for manufacturing a semiconductor device according to claim 8, wherein the first metal layer is electrically coupled to the third metal layer, and the second metal layer is electrically coupled to the fourth metal layer.

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