Power supply control device

Abstract

To accommodate cases in which an output voltage of a certain channel is required and cases in which it is unnecessary.SOLUTION: An output stage circuit (MM[i]) includes an output transistor (MH[i]) provided between an input terminal and a switch terminal, and a rectifying element (ML[i]) provided between the switch terminal and ground. When an output stage circuit, an output coil, and an output capacitor are provided, a control driving circuit (11[i]) generates an output voltage (VOUT[i]) by switching driving in accordance with a feedback voltage (VFB[i]). A feedback voltage is applied to a feedback terminal (VO[i]). A controller (20) controls whether or not to cause the control driving circuit to perform switching driving thereafter, on the basis of respective voltages (VSW[i], VFB[i]) of the switch terminal and the feedback terminal at a determination timing at which switching driving is made non-executed.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present disclosure relates to a power supply control device. [Background technology]

[0002] Power supply control devices are widely used as devices for controlling the operation of power supply devices (see Patent Document 1). The operation of generating an output voltage from an input voltage is controlled using a power supply control device. In a switching regulator (a switching-type power supply device), an output voltage is generated from an input voltage through switching drive of an output stage circuit. Many systems require output voltages for multiple channels. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2021 / 054027

[0004] [overview] Depending on the system in which the power supply control device is installed, there may be cases where the output voltage of a certain channel is required, and cases where it is not required. It is necessary to deal with these cases appropriately.

[0005] A power supply control device according to one aspect of the present disclosure comprises an input terminal, a switch terminal, an output stage circuit having an output transistor provided between the input terminal and the switch terminal and a rectifying element provided between the switch terminal and ground, a control drive circuit configured to be able to perform switching drive of the output stage circuit in accordance with a feedback voltage when an input voltage is supplied to the input terminal, an output coil is provided between the switch terminal and an output node, and an output capacitor is provided between the output node and ground, and to generate an output voltage at the output node based on the input voltage by the switching drive, a feedback terminal configured to receive the feedback voltage in accordance with the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground, and a controller configured to control whether or not to cause the control drive circuit to perform the switching drive thereafter, based on the voltages of the switch terminal and the feedback terminal at a determination timing at which the switching drive is not performed. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic configuration block diagram of a power supply device according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is an external perspective view of a power supply control device according to an embodiment of the present disclosure. [Figure 3] FIG. 3 is a diagram showing a state in which a regulator with multiple channels is provided in a power supply device according to an embodiment of the present disclosure. [Figure 4] FIG. 4 is a diagram showing a state in which a regulator with multiple channels is provided in a power supply device according to an embodiment of the present disclosure. [Figure 5] FIG. 5 is a block diagram of a control block related to two channels according to an embodiment of the present disclosure. [Figure 6] FIG. 6 is a diagram illustrating an example of the internal configuration of a discharge circuit according to an embodiment of the present disclosure. [Figure 7]FIG. 7 is a diagram illustrating an example of the internal configuration of a voltage monitoring circuit according to an embodiment of the present disclosure. [Figure 8] FIG. 8 is a partial configuration diagram of a power supply device according to a first example of an embodiment of the present disclosure. [Figure 9] FIG. 9 is a timing chart showing the start-up of the regulator in the first channel according to a first example of the embodiment of the present disclosure. [Figure 10] FIG. 10 is a partial configuration diagram of a power supply device according to a second example of an embodiment of the present disclosure. [Figure 11] FIG. 11 is a timing chart relating to the first channel according to a second example of the embodiment of the present disclosure. [Figure 12] FIG. 12 is a partial configuration diagram of a power supply device according to a fifth example of an embodiment of the present disclosure. [Figure 13] FIG. 13 is a timing chart relating to the first channel according to a fifth example of the embodiment of the present disclosure.

[0007] [Detailed explanation] Hereinafter, examples of embodiments of the present disclosure will be described in detail with reference to the drawings. In each of the drawings, identical parts are designated by the same reference numerals, and redundant descriptions of identical parts will be omitted as a general rule. For the sake of simplicity, this specification may use symbols or signs referring to information, signals, physical quantities, functional units, circuits, elements, or components, and may omit or abbreviate the names of the information, signals, physical quantities, functional units, circuits, elements, or components corresponding to the symbols or signs. For example, the enable signal referred to by "EN[1]" (see FIG. 5) described below may be written as enable signal EN[1] or abbreviated as signal EN[1], but they all refer to the same thing.

[0008] First, some terms used in the description of the embodiments of the present disclosure will be explained. "Ground" refers to a reference conductor having a reference potential of 0V (zero volts) as a reference or the 0V potential itself. The reference conductor may be formed using a conductor such as metal. The potential of 0V may also be referred to as the ground potential. In the embodiments of the present disclosure, a voltage shown without particularly setting a reference represents the potential viewed from the ground. "Level" refers to the level of potential, and for any signal or voltage of interest, the high level has a higher potential than the low level.

[0009] Regarding any transistor configured as a FET (field-effect transistor) exemplified by a MOSFET, the on-state refers to a state where the drain and source of the transistor are conducting, and the off-state refers to a state where the drain and source of the transistor are non-conducting (blocked state). The same applies to transistors not classified as FETs. Unless otherwise specified, a MOSFET is understood to be an enhancement-type MOSFET. MOSFET is an abbreviation for "metal-oxide-semiconductor field-effect transistor". Also, unless otherwise specified, in any MOSFET, the back gate may be considered to be short-circuited to the source. Hereinafter, regarding any transistor, the on-state and off-state may also be simply expressed as on and off.

[0010] Regarding the connection between a plurality of parts forming a circuit, such as any circuit element, wiring, node, etc., unless otherwise specified, it may be understood to refer to an electrical connection.

[0011] When any two voltages to be compared are v1 and v2, "v1>v2" represents that voltage v1 is higher than voltage v2, "v1<v2" represents that voltage v1 is lower than voltage v2, and "v1=v2" represents that the value of voltage v1 is the same as the value of voltage v2. The same applies to other expressions including physical quantities other than voltage.

[0012] 1 is a schematic block diagram of a power supply device 1 according to an embodiment of the present disclosure. The power supply device 1 includes a power supply control device 2 and a discrete component group 3 made up of a plurality of discrete components externally connected to the power supply control device 2. The power supply control device 2 may be an electronic component classified as a PMIC (Power Management IC). Note that wiring provided inside the power supply control device 2 is sometimes specifically referred to as internal wiring, and wiring provided outside the power supply control device 2 is sometimes specifically referred to as external wiring.

[0013] Figure 2 shows an external perspective view of the power supply control device 2. The power supply control device 2 is an electronic component that includes a semiconductor chip having a semiconductor integrated circuit formed on a semiconductor substrate, a housing CS (package) that houses the semiconductor chip, and a plurality of external terminals that are exposed from the housing CS to the outside of the power supply control device 2. The power supply control device 2 is formed by sealing the semiconductor chip in a housing CS made of resin. Note that the number of external terminals of the power supply control device 2 and the type of housing CS of the power supply control device 2 shown in Figure 2 are merely examples, and can be designed as desired.

[0014] Referring to FIG. 3, the power supply device 1 is provided with a maximum of n channels of regulators 4, i.e., a maximum of n regulators 4. n represents any integer equal to or greater than 2. The n channels of regulators 4 can also be expressed as an n-channel power supply device, in which case the power supply device 1 can also be referred to as a composite power supply device having n channels of power supplies (4). Depending on the system in which the power supply device 1 is incorporated, the number of channels of regulators 4 provided in the power supply device 1 and actually operating may be less than n. However, here we will first explain the configuration and operation of the power supply device 1 when the number of channels of the regulators 4 is n.

[0015] Each regulator 4 is provided with a control block 10. The n channels are made up of first to n-th channels. Each regulator 4 receives an input voltage V IN is supplied, and the input voltage V IN is converted into power to produce an output voltage V OUT The input voltage VIN and output voltage V OUT are different DC voltages. The input voltage V IN or output voltage V OUT can be a negative DC voltage, but in the following, the input voltage V IN and output voltage V OUT is a positive DC voltage.

[0016] The regulators 4 of one or more of the first to n-th channels may be switching regulators. IN By stepping down the input voltage V IN Lower output voltage V OUT A step-down switching regulator that generates an input voltage V IN By boosting the input voltage V IN Higher output voltage V OUT The total of n regulators 4 in the first to n-th channels may all be switching regulators, or the total of n regulators 4 in the first to n-th channels may include a mixture of one or more switching regulators and one or more linear regulators. However, in this embodiment, one or more regulators 4 among the regulators 4 in the first to n-th channels may be configured as a step-down switching regulator.

[0017] A total of n output voltages V for the first to nth channels OUT are different DC voltages. A Output voltage V at the channel OUT and the value of the i B Output voltage V at the channel OUT There may be cases where the value of i A and i B represents any different natural numbers less than or equal to n.

[0018] A total of n input voltages V for the first to nth channels INmay be the same DC voltage. That is, the common DC voltage is the input voltage V IN It can be used as both. A Input voltage V at the channel IN is the i B Input voltage V at the channel IN The input voltage V of any one of the first to nth channels may be the same as or different from IN may be the power supply voltage of the power supply control device 2 (power supply voltage VCC, described later).

[0019] A total of n control blocks 10 for the first to n-th channels are provided in the power supply control device 2. In each channel, a regulator 4 is formed by the control block 10 and discrete components connected to the control block 10. As shown in FIG. 4, the regulator 4, the control block 10, and the input voltage V IN , output voltage V OUT , respectively, in particular the regulator 4[i], the control block 10[i], and the input voltage V IN [i], output voltage V OUT It is written as [i], where i represents any integer (e.g., any natural number less than or equal to n).

[0020] Power supply 1 has an input voltage V IN to output voltage V OUT The power supply control device 2 controls the operation (power conversion) of the power supply device 1. That is, the power supply control device 2 controls the operation (power conversion) of the regulator 4 for each channel. In detail, the operation (power conversion) of the regulator 4 for the i-th channel is controlled by the control block 10[i].

[0021] Among the regulators 4 of the first to n-th channels, the total number of step-down switching regulators may be one, but below it is assumed that the power supply control device 2 is configured so that each regulator 4 of the first and second channels can function as a step-down switching regulator. Figure 5 shows a partial block diagram of the power supply control device 2, including an internal configuration diagram of control blocks 10[1] and 10[2], which are the control blocks 10 of the first and second channels. In addition to the control blocks 10 for n channels, including control blocks 10[1] and 10[2], the power supply control device 2 includes a controller 20 and an internal power supply circuit 30.

[0022] The power supply control device 2 is provided with a power supply terminal IN and a ground terminal GND as part of the above-mentioned plurality of external terminals. The ground terminal GND is connected to the ground. A power supply voltage VCC having a positive DC voltage value is supplied to the power supply terminal IN through an external wiring from a voltage source (not shown) provided outside the power supply device 1. The internal power supply circuit 30 generates an internal power supply voltage V REG Generates the internal power supply voltage V REG has a predetermined positive DC voltage value. Each circuit in the power supply control device 2 is connected to the internal power supply voltage V REG Alternatively, it can be driven based on the power supply voltage VCC.

[0023] The control block 10, which causes the regulator 4 to function as a step-down switching regulator, includes an output stage circuit MM consisting of transistors MH and ML, a control drive circuit 11, a voltage monitoring circuit 12, a determination circuit 13, a discharge circuit 14, an input terminal VS, a switch terminal SW, and a feedback terminal VO. The input terminal VS, switch terminal SW, and feedback terminal VO are some of the multiple external terminals provided in the power supply control device 2. The transistor MH is an output transistor and is composed of a P-channel MOSFET. The transistor ML is a synchronous rectification transistor and is composed of an N-channel MOSFET.

[0024] The output stage circuit MM, control drive circuit 11, voltage monitoring circuit 12, decision circuit 13, discharge circuit 14, input terminal VS, switch terminal SW, and feedback terminal VO in the control block 10[i] are particularly referred to as the output stage circuit MM[i], control drive circuit 11[i], voltage monitoring circuit 12[i], decision circuit 13[i], discharge circuit 14[i], input terminal VS[i], switch terminal SW[i], and feedback terminal VO[i], respectively. The transistors MH and ML in the output stage circuit MM are particularly referred to as the transistors MH[i] and ML[i], respectively. The voltage at the switch terminal SW is symbolized "V SW ” and the voltage V at the switch terminal SW[i] SW Specifically, the voltage V SW The voltage at the feedback terminal VO is represented by the symbol "V FB ” and the voltage V at the feedback terminal VO[i] FB Specifically, the voltage V FB It is written as [i].

[0025] For each channel, the controller 20 outputs an enable signal EN to the control drive circuit 11, outputs a discharge command signal DIS to the discharge circuit 14, receives a monitoring result signal DET output from the voltage monitoring circuit 12, and receives a judgment signal X output from the judgment circuit 13. The enable signal EN, discharge command signal DIS, monitoring result signal DET, and judgment signal X for the i-th channel are particularly referred to as the enable signal EN[i], discharge command signal DIS[i], monitoring result signal DET[i], and judgment signal X[i], respectively. Each voltage monitoring circuit 12 outputs a judgment signal Y to the controller 20 separately from the monitoring result signal DET. The judgment signal Y for the i-th channel is particularly referred to as the judgment signal Y[i].

[0026] The source of the transistor MH[1] is connected to the input terminal VS[1]. The drains of the transistors MH[1] and ML[1] are commonly connected to the switch terminal SW[1]. The source of the transistor ML[1] is connected to ground. The control drive circuit 11[1] is connected to the gates of the transistors MH[1] and ML[1] and is also connected to the feedback terminal VO[1]. The voltage monitoring circuit 12[1] and the discharge circuit 14[1] are also connected to the feedback terminal VO[1]. The judgment circuit 13[1] is connected to the switch terminal SW[1].

[0027] When the power supply control device 2 includes multiple control blocks 10 for causing the regulator 4 to function as a step-down switching regulator, the internal configurations of the multiple control blocks 10 are the same. Therefore, the internal configurations of the control block 10[1] and the control block 10[2] are the same. Therefore, the source of the transistor MH[2] is connected to the input terminal VS[2]. The drains of the transistors MH[2] and ML[2] are commonly connected to the switch terminal SW[2]. The source of the transistor ML[2] is connected to ground. The control drive circuit 11[2] is connected to the gates of the transistors MH[2] and ML[2] and is also connected to the feedback terminal VO[2]. The voltage monitoring circuit 12[2] and the discharge circuit 14[2] are also connected to the feedback terminal VO[2]. The determination circuit 13[2] is connected to the switch terminal SW[2].

[0028] In the i-th channel, the voltage monitoring circuit 12[i] monitors the voltage V FB A voltage monitoring operation can be performed to monitor whether [i] falls within a predetermined normal voltage range, and when the voltage monitoring operation is performed, a monitoring result signal DET[i] indicating the monitoring result is output to the controller 20. Furthermore, in the i-th channel, the voltage monitoring circuit 12[i] generates a determination signal Y[i] and outputs it to the controller 20, and the determination circuit 13[i] generates a determination signal X[i] and outputs it to the controller 20. The determination signals X[i] and Y[i] are used to determine whether switching driving should be performed in the i-th channel (details will be described later).

[0029] In the i-th channel, the discharge circuit 14[i] can perform a discharge operation to discharge the accumulated charge between the feedback terminal VO[i] and ground in accordance with the discharge command signal DIS[i]. The enable signal EN[i] is a signal that commands the control drive circuit 11[i] to perform or prohibit switching drive. The signals EN[i], DIS[i], X[i], and Y[i] are binary signals having a value of "0" or "1." The monitoring result signal DET[i] may be a binary signal having a value of "0" or "1," or may have a digital value of two or more bits.

[0030] FIG. 6 shows an example of the internal configuration of the discharge circuit 14[i]. The discharge circuit 14[i] in FIG. 6 includes a series circuit of a resistor 14a and a transistor 14b. The transistor 14b is an N-channel MOSFET. In the discharge circuit 14[i], a first terminal of the resistor 14a is connected to the feedback terminal VO[i], a second terminal of the resistor 14a is connected to the drain of the transistor 14b, and a source of the transistor 14b is connected to ground. A discharge command signal DIS[i] is input to the gate of the transistor 14b. The discharge command signal DIS[i] has a low level or a high level, and a high level corresponds to "1" in the discharge command signal DIS[i], and a low level corresponds to "0." The high level voltage of the discharge command signal DIS[i] is higher than the gate threshold voltage of the transistor 14b. Therefore, when the discharge command signal DIS[i] has a value of "1," the transistor 14b is turned on, and a discharge operation is performed (i.e., the accumulated charge between the feedback terminal VO[i] and ground is discharged). The low-level voltage of the discharge command signal DIS[i] coincides with the ground potential, and therefore when the discharge command signal DIS[i] has a value of "0", the transistor 14b is turned off and the discharge operation is not performed.

[0031] 7 shows an example of a circuit that generates the monitoring result signal DET[i] within the internal configuration of the voltage monitoring circuit 12[i]. The voltage monitoring circuit 12[i] in FIG. 7 has resistors 12a and 12b and comparators 12c and 12d. In the voltage monitoring circuit 12[i], a first terminal of the resistor 12a is connected to the feedback terminal VO[i], a second terminal of the resistor 12a is connected to a first terminal of the resistor 12b at a node 12e, and a second terminal of the resistor 12b is connected to ground. A voltage V FB The voltage at node 12e of voltage monitoring circuit 12[i] is denoted by the symbol “V CMP [i]” in the first and second channels of the power supply device 1 of FIG. CMP [i] is the output voltage V OUT The voltage monitor circuit 12[i] may be input to the control drive circuit 11[i] as feedback information for the voltage monitor circuit 12[i]. The voltage divider circuit consisting of resistors 12a and 12b may be considered to be a circuit provided separately from the voltage monitor circuit 12[i].

[0032] The voltage V at node 12e is CMP [i] is input to the inverting input terminal of the comparator 12c. REFH is input, and the non-inverting input terminal of the comparator 12d is supplied with the reference voltage V REFL is input. Reference voltage V REFH and V REFL is "V REFH >V REFL In the voltage monitoring circuit 12[i], the comparator 12c has a positive DC voltage value that satisfies the condition "V CMP [i] and V REFH The signal OVD[i] indicates the relationship between the CMP [i]>V REFH When "V CMP [i]≦V REFH When the condition "is met," the comparator 12c outputs a low-level signal OVD[i]. In practice, a hysteresis characteristic may be added to the output of the comparator 12c. In the voltage monitoring circuit 12[i], the comparator 12d monitors the voltage V CMP [i] and VREFL The signal LVD[i] indicates the relationship between the CMP [i] <V REFL When "V CMP [i] ≥ V REFL When the condition "is met," the comparator 12d outputs a low-level signal LVD[i]. In practice, a hysteresis characteristic may be imparted to the output of the comparator 12d.

[0033] The voltage monitoring operation by the voltage monitoring circuit 12[i] is an operation of generating and outputting the signals OVD[i] and LVD[i] as described above. The monitoring result signal DET[i] includes the signals OVD[i] and LVD[i].

[0034] As described above, in the voltage monitoring operation, the voltage monitoring circuit 12[i] monitors the voltage V FB When both the signals OVD[i] and LVD[i] are at a low level, the monitoring result signal DET[i] is the voltage V FB When the signal OVD[i] or LVD[i] has a high level, the monitoring result signal DET[i] indicates that the voltage V FB [i] is outside the normal voltage range. FB [i] exceeds the upper limit of the normal voltage range, and a high-level signal LVD[i] indicates that the voltage V FB [i] indicates that the voltage is below the lower limit of the normal voltage range.

[0035] Below, several specific operational examples, application techniques, modified techniques, etc. related to the power supply device 1 will be described in multiple embodiments. The matters described above in this embodiment apply to each of the following embodiments unless otherwise specified and unless contradicted. If there are any matters in each embodiment that contradict the matters described above, the description in that embodiment may take precedence. Furthermore, unless contradicted, matters described in any of the multiple embodiments described below can also be applied to any other embodiment (i.e., any two or more of the multiple embodiments can be combined).

[0036] <<First Example>> A first embodiment will now be described. Fig. 8 shows a partial configuration diagram of a power supply 1A, which is the power supply 1 according to the first embodiment. In the power supply 1A, the regulators 4 of the first and second channels actually function as step-down switching regulators. When "n ≥ 3", the regulator 4 of the i-th channel, which satisfies "3 ≤ i ≤ n", may be any of a step-down switching regulator, a step-up switching regulator, and a linear regulator.

[0037] The configuration and operation of the first channel regulator 4 in the power supply device 1A will be described. The power supply device 1A is provided with an output coil L[1] and an output capacitor C[1] as components of the first channel regulator 4. In the power supply device 1A, the output stage circuit MM[1], control drive circuit 11[1], output coil L[1], and output capacitor C[1] form a step-down switching regulator. The output coil L[1] and output capacitor C[1] are components of the discrete component group 3 (see Figure 1).

[0038] An input voltage V having a positive DC voltage value is input from a voltage source (not shown) provided outside the power supply device 1A. IN [1] is supplied to the input terminal VS[1] through external wiring. In the power supply device 1A, the source of the transistor MH[1] is connected to the input terminal VS[1], and the input voltage V IN [1]. The drains of the transistors MH[1] and ML[1] are commonly connected to a switch terminal SW[1]. In the power supply device 1A, the switch terminal SW[1] is connected to a first end of the output coil L[1], and the second end of the output coil L[1] is connected to an output node OUT[1]. The source of the transistor ML[1] is connected to ground. In the power supply device 1A, an output capacitor C[1] is provided between the output node OUT[1] and ground. That is, the first end of the output capacitor C[1] is connected to the output node OUT[1], and the second end of the output capacitor C[1] is connected to ground. In the power supply device 1A, an output voltage V is applied to the output node OUT[1].OUT [1] occurs.

[0039] In the power supply device 1A, the output voltage V OUT In FIG. 8, the feedback terminal VO[1] is connected to the output node OUT[1] through external wiring and to the control drive circuit 11[1] through internal wiring (i.e., the output node OUT[1] is connected to the control drive circuit 11[1] via the feedback terminal VO[1]), thereby outputting the output voltage V OUT [1] Itself is the output voltage V OUT [1] is input to the control drive circuit 11[1] as feedback information. However, the output voltage V OUT The feedback information in [1] is the output voltage V OUT It may also be the partial pressure of [1].

[0040] The control drive circuit 11[1] is connected to the gates of the transistors MH[1] and ML[1]. In the power supply device 1A, the control drive circuit 11[1] controls the gate potential of the transistors MH[1] and ML[1] to individually turn the transistors MH[1] and ML[1] on or off. The control drive circuit 11[1] in the power supply device 1A controls the output voltage V OUT Based on the feedback information in [1], the output voltage V OUT [1] is the predetermined target voltage V TG [1], the transistors MH[1] and ML[1] are alternately switched on and off by switching drive (switching control). This switching drive applies a square wave voltage (approximately 0V and the input voltage V IN The output coil L[1] and the output capacitor C[1] rectify and smooth the square wave voltage, and the output voltage V is generated at the output node OUT[1]. OUT [1] is generated. It is also possible to use a modification in which the transistor MH[1] is configured as an N-channel MOSFET. In this case, a well-known boost circuit is added to increase the input voltage V IN[1] A higher boost voltage than that of the transistor MH[1] may be generated and used to turn on the transistor MH[1].

[0041] The configuration and operation of the regulator 4 of the second channel in the power supply device 1A will be described. The power supply device 1A is provided with an output coil L[2] and an output capacitor C[2] as components of the regulator 4 of the second channel. In the power supply device 1A, a step-down switching regulator is formed by the output stage circuit MM[2], control drive circuit 11[2], output coil L[2], and output capacitor C[2]. The output coil L[2] and output capacitor C[2] are components of the discrete component group 3 (see Figure 1). In the power supply device 1A, the configuration and operation of the regulator 4 of the second channel are similar to the configuration and operation of the regulator 4 of the first channel.

[0042] That is, an input voltage V having a positive DC voltage value is input from a voltage source (not shown) provided outside the power supply device 1A. IN [2] is supplied to the input terminal VS[2] through external wiring. In the power supply device 1A, the source of the transistor MH[2] is connected to the input terminal VS[2], and the input voltage V IN [2]. The drains of the transistors MH[2] and ML[2] are commonly connected to a switch terminal SW[2]. In the power supply device 1A, the switch terminal SW[2] is connected to a first terminal of the output coil L[2], and the second terminal of the output coil L[2] is connected to an output node OUT[2]. The source of the transistor ML[2] is connected to ground. In the power supply device 1A, an output capacitor C[2] is provided between the output node OUT[2] and ground. That is, the first terminal of the output capacitor C[2] is connected to the output node OUT[2], and the second terminal of the output capacitor C[2] is connected to ground. In the power supply device 1A, an output voltage V is applied to the output node OUT[2]. OUT [2] occurs.

[0043] In the power supply device 1A, the output voltage V OUTIn FIG. 8, the feedback terminal VO[2] is connected to the output node OUT[2] through external wiring and to the control drive circuit 11[2] through internal wiring (i.e., the output node OUT[2] is connected to the control drive circuit 11[2] via the feedback terminal VO[2]), thereby outputting the output voltage V OUT [2] Itself is the output voltage V OUT [2] is input to the control drive circuit 11[2] as feedback information. However, the output voltage V OUT The feedback information in [2] is the output voltage V OUT It may also be the partial pressure of [2].

[0044] The control drive circuit 11[2] is connected to the gates of the transistors MH[2] and ML[2]. In the power supply device 1A, the control drive circuit 11[2] controls the gate potential of the transistors MH[2] and ML[2] to individually turn the transistors MH[2] and ML[2] on or off. The control drive circuit 11[2] in the power supply device 1A controls the output voltage V OUT Based on the feedback information in [2], the output voltage V OUT [2] is the predetermined target voltage V TG [2], the transistors MH[2] and ML[2] are alternately switched on and off by switching drive (switching control). This switching drive applies a square wave voltage (approximately 0V and the input voltage V IN The output coil L[2] and the output capacitor C[2] rectify and smooth the square wave voltage, and the output voltage V is generated at the output node OUT[2]. OUT [2] is generated. It is also possible to use a modification in which the transistor MH[2] is configured as an N-channel MOSFET. In this case, a well-known boost circuit is added to increase the input voltage V IN [2] A higher boost voltage than that of the transistor MH[2] may be generated and used to turn on the transistor MH[2].

[0045] FIG. 9 shows a timing chart of the start-up of the regulator 4 in the first channel of the power supply device 1A. A1 , t A2 , t A3 , t A4 , t A5 , t A6 The controller 20 is started up in response to the start of supply of the power supply voltage VCC to the power supply terminal IN, and a predetermined initial sequence operation is performed in the controller 20. Then, at time t A1 This leads to:

[0046] time t A1 Immediately before time t, the discharge command signal DIS[1] is "0", so the discharge circuit 14[1] does not perform the discharge operation. A1 The discharge circuit 14[1] may perform a discharge operation before time t A1 The enable signal EN[1] has a value of "0" immediately before time t. The enable signal EN[1] of "0" is a signal that commands the control drive circuit 11[1] to prohibit the execution of switching drive, and when the enable signal EN[1] has a value of "0", the control drive circuit 11[1] stops the switching drive. When the switching drive is stopped by the control drive circuit 11[1], the control drive circuit 11[1] keeps both the transistors MH[1] and ML[1] in the off state. In FIG. 9, at time t A1 It is assumed that the switching drive by the control drive circuit 11[1] is stopped for a sufficiently long time before reaching time t and the voltage of the output node OUT[1] is substantially reduced to 0V due to the influence of the resistance component connected to the output node OUT[1]. A1 Just before the voltage V SW [1] and V FB [1] is substantially 0V. The judgment signals X[1] and Y[1] are A4 It has no significant value up to .

[0047] The controller 20 A1The discharge command signal DIS[1] is set to "1" for a predetermined discharge time from time t A1 The time t when the discharge time has elapsed A2 At time t A1 Even if a charge is stored in the output capacitor C[1] at time t A2 So the voltage V SW [1] and V FB [1] drops to virtually 0V.

[0048] time t A2 A small time later than time t A3 In this case, the decision circuit 13[1] detects the voltage V SW [1] and threshold voltage V THSW and generates a judgment signal X[1] indicating the level relationship between them, while the voltage monitoring circuit 12[1] detects the voltage V FB [1] and threshold voltage V THFB and generates a decision signal Y[1] indicating the level relationship between the threshold voltage V THSW and V THFB Each has a predetermined positive voltage value. THSW and V THFB may have the same voltage value or may have different voltage values. A3 A small time later than time t A4 The values ​​of the judgment signals X[1] and Y[1] are determined.

[0049] The decision circuit 13[1] detects the time t A3 "V" SW [1] <V THSW " is true at time t A4 and thereafter, a decision signal X[1] having a value of "0" is output, and at time t A3 "V" SW [1] ≥ V THSW " is true at time t A4 The voltage monitoring circuit 12[1] outputs a determination signal X[1] having a value of "1" from time t A3 "V"FB [1] <V THFB " is true at time t A4 and thereafter, a judgment signal Y[1] having a value of "0" is output, and at time t A3 "V" FB [1] ≥ V THFB " is true at time t A4 In the power supply device 1A, at time t A2 Voltage V SW [1] and V FB [1] has essentially dropped to 0V, so at time t A3 "V" SW [1] <V THSW " and "V FB [1] <V THFB " holds, and therefore, at time t A4 After that, the determination signals X[1] and Y[1] having a value of "0" are output.

[0050] The voltage monitoring circuit 12[1] includes a first circuit block including resistors 12a and 12b and comparators 12c and 12d shown in FIG. FB [1] and threshold voltage V THFB The voltage monitoring circuit 12[1] may have a second circuit block that compares the voltage and voltage detected by the voltage monitoring circuit 12[1] to generate the judgment signal X[1] (in this case, the second circuit block may be considered as a second judgment circuit provided separately from the voltage monitoring circuit 12[1]). Alternatively, the voltage monitoring circuit 12[1] may have a first circuit block that generates the judgment signal X[1]. In this case, at time t A3 The voltage temporarily input to the inverting input terminal of the comparator 12c is set to the threshold voltage V THFB (During the period when the voltage monitoring operation is performed, the reference voltage V REFH is input). Threshold voltage V THFB The voltage corresponding to this is the threshold voltage V THFB and the resistance value ratio between resistors 12a and 12b.

[0051] The controller 20 A4Based on the values ​​of the judgment signals X[1] and Y[1] at time t, the controller 20 determines whether to cause the control drive circuit 11[1] to perform switching drive. Only when both the judgment signals X[1] and Y[1] have the value of "0", the controller 20 determines to cause the control drive circuit 11[1] to perform switching drive, and at time t A4 Time t after a smaller time has elapsed A5 The value of the enable signal EN[1] is switched from "0" to "1". The enable signal EN[1] of "1" is a signal that commands the control drive circuit 11[1] to perform switching drive, and when the enable signal EN[1] has a value of "1", the control drive circuit 11[1] performs switching drive. Therefore, at time t A5 Thereafter, the control drive circuit 11[1] performs switching drive. When the control drive circuit 11[1] performs switching drive, the voltage V FB [1] is the output voltage V OUT The control drive circuit 11[1] functions as a feedback voltage according to the feedback voltage, and generates an output voltage V OUT [1] is the target voltage V TG To stabilize at [1], the transistors MH[1] and ML[1] are alternately switched on and off using pulse width modulation or the like.

[0052] time t A5 From the specified mask time ΔT MASK The time after is time t A6 At time t A6 Until time t, the voltage monitoring operation by the voltage monitoring circuit 12[1] is stopped, and the monitoring result signal DET[1] is invalid. A6 After this, the voltage monitoring operation by the voltage monitoring circuit 12[1] is performed effectively, and the monitoring result signal DET[1] becomes valid. A6 The output voltage V OUT [1] is the target voltage V TG [1] or target voltage V TG [1] is expected to reach approximately [1]. OUT [1] is the target voltage V TG[1] or target voltage V TG [1] Mask time ΔT based on the time required to reach the vicinity MASK is set in advance.

[0053] time t A6 After that, the controller 20 controls the output voltage V based on the signals OVD[1] and LVD[1]. OUT [1] Determine whether there is an abnormality at time t A6 After this, when signals OVD[1] and LVD[1] both have a low level, the controller 20 controls the output voltage V OUT [1] is judged to be normal. At time t A6 After this, if there is no abnormality, the output voltage V OUT [1] falls within the normal voltage range described above, and the signals OVD[1] and LVD[1] that form the monitoring result signal DET[1] are both maintained at a low level. TG [1] is within the normal voltage range.

[0054] time t A6 After that, when the level of the signal OVD[1] switches from low to high, the controller 20 controls the output voltage V OUT It is determined that a high-side abnormality occurred at [1]. Or, at time t A6 After that, when the level of the signal OVD[1] changes from low to high and the state in which the signal OVD[1] is at high level continues for a predetermined time or more, the controller 20 OUT It is determined that a high-side abnormality has occurred at [1]. Although not shown, for example, at time t A6 If an abnormality occurs later in which the output node OUT[1] is shorted to the input terminal VS[1] or the power supply terminal IN (short to power), it is determined that a high-side abnormality has occurred.

[0055] time t A6 After that, when the level of the signal LVD[1] switches from low to high, the controller 20 controls the output voltage V OUT [1] It is determined that a low-side abnormality has occurred. Or, at time t A6After that, when the level of the signal LVD[1] switches from low to high and the state in which the signal LVD[1] is at high level continues for a predetermined time or more, the controller 20 OUT It is determined that a low-side abnormality has occurred at [1]. Although not shown, for example, at time t A6 If an abnormality occurs later in which the output node OUT[1] is shorted to ground (ground fault), it is determined that a low-side abnormality has occurred.

[0056] The controller 20 outputs the output voltage V OUT When it determines that a high-side or low-side abnormality has occurred in [1], it will take the specified abnormality response action. OUT In the abnormality response operation related to [1], the controller 20 switches the value of the enable signal EN[1] from “1” to “0” to stop the switching drive by the control drive circuit 11[1] and outputs a predetermined error signal from the power good terminal (not shown). The power good terminal is one of the external terminals of the power supply control device 2.

[0057] In this way, the controller 20 determines the voltage V of the switch terminal SW[1] at the determination timing when the switching drive by the control drive circuit 11[1] is not executed. SW [1] and the voltage V of the feedback terminal VO[1] FB Based on [1], the control circuit 11 controls whether to subsequently perform switching drive. A3 This corresponds to the determination timing. At the determination timing, the transistors MH[1] and ML[1] are off, so the current through the switch terminal SW[1] is cut off (there is no current input / output between the output stage circuit MM[1] and the switch terminal SW[1]). Therefore, in the case of the power supply device 1A having the configuration of FIG. 8, the voltage V SW [1] is the threshold voltage V THSW Furthermore, a resistor (corresponding to a series circuit of resistors 12a and 12b; see FIG. 7) is provided between the feedback terminal VO[1] and ground. Therefore, in the case of the power supply device 1A having the configuration of FIG. 8, the voltage V FB[1] is the threshold voltage V THFB At the timing of the decision, the voltage V SW [1] is the threshold voltage V THSW Lower and voltage V FB [1] is the threshold voltage V THFB If it is lower, the controller 20 causes the control drive circuit 11[1] to perform switching drive after the determination timing.

[0058] The operation of the regulator 4 in the first channel of the power supply device 1A at startup has been described with reference to FIG. 9, but the operation of the regulator 4 in the second channel of the power supply device 1A at startup is the same as the operation of the regulator 4 in the first channel. In the power supply device 1A, if the symbol "[1]" in the description of the operation of the first channel is replaced with the symbol "[2]", the description of the operation of the first channel will be replaced with the description of the operation of the second channel. However, at time t A1 ~t A6 and time t for the second channel A1 ~t A6 and may be offset from each other.

[0059] <<Second Example>> A second embodiment will now be described. FIG. 10 shows a partial configuration diagram of a power supply 1B, which is a power supply 1 according to the second embodiment. In the power supply 1B, the regulator 4 of the second channel actually functions as a step-down switching regulator. However, in the power supply 1B, the regulator 4 of the first channel does not function as a step-down switching regulator. In the power supply 1B, some components (MM[1] and 11[1]) of a step-down switching regulator are provided in the power supply control device 2 for the first channel, but the remaining components of a step-down switching regulator, that is, an output coil and an output capacitor (corresponding to L[1] and C[1] in FIG. 8), are not provided. In other words, the regulator 4 of the first channel is essentially not present in the power supply 1B. In the power supply 1B, if "n≧3," the regulator 4 of the i-th channel, which satisfies "3≦i≦n," may be a step-down switching regulator, a step-up switching regulator, or a linear regulator.

[0060] Although the external configuration of the power supply control device 2 differs between the first and second embodiments, the power supply control device 2 according to the second embodiment is the same as the power supply control device 2 according to the first embodiment. Therefore, for matters relating to the operation of the power supply control device 2 that are not specifically mentioned in the second embodiment, the matters mentioned in the first embodiment also apply to the second embodiment unless there is a particular contradiction.

[0061] In the power supply device 1B, the input terminal VS[1] is open. However, in the power supply device 1B, a predetermined voltage may be applied to the input terminal VS[1] via external wiring. In the power supply device 1B, the feedback terminal VO[1] is open. However, in the power supply device 1B, the feedback terminal VO[1] may be connected to ground. In the power supply device 1B, the switch terminal SW[1] is connected to the application terminal of the positive voltage VH (the terminal to which the voltage VH is applied) via external wiring. The voltage VH is the threshold voltage V THSW or more, and the threshold voltage V THSW Preferably, the voltage VH is sufficiently higher than the power supply voltage VCC. Typically, the voltage VH may be the power supply voltage VCC. In the power supply device 1B, the feedback terminal VO[1] and the switch terminal SW[1] are not connected.

[0062] FIG. 11 shows a timing chart for the first channel of the power supply device 1B. As time progresses, at time t B1 , t B2 , t B3 , t B4 The controller 20 is started up in response to the start of supply of the power supply voltage VCC to the power supply terminal IN, and a predetermined initial sequence operation is performed in the controller 20. Then, at time t B1 This leads to:

[0063] time t B1 Immediately before time t, the discharge command signal DIS[1] is "0", so the discharge operation is not performed in the discharge circuit 14[1]. B1The enable signal EN[1] has a value of "0" immediately before time t. The enable signal EN[1] of "0" is a signal that commands the control drive circuit 11[1] to prohibit the execution of switching drive, and when the enable signal EN[1] has a value of "0", the control drive circuit 11[1] stops the switching drive. When the switching drive is stopped by the control drive circuit 11[1], the control drive circuit 11[1] keeps both the transistors MH[1] and ML[1] in the off state. In the power supply device 1B, the voltage VH is always applied to the switch terminal SW[1], so that at time t B1 Just before the voltage V SW [1] corresponds to the voltage VH, and thereafter the voltage V SW [1] is equal to the voltage VH. The determination signals X[1] and Y[1] are generated at time t B4 It has no significant value up to .

[0064] The controller 20 B1 The discharge command signal DIS[1] is set to "1" for a predetermined discharge time from time t B1 The time t when the discharge time has elapsed B2 At time t B2 Voltage at V FB [1] is effectively 0V.

[0065] time t B2 A small time later than time t B3 In this case, the decision circuit 13[1] detects the voltage V SW [1] and threshold voltage V THSW and generates a judgment signal X[1] indicating the level relationship between them, while the voltage monitoring circuit 12[1] detects the voltage V FB [1] and threshold voltage V THFB and generates a decision signal Y[1] indicating the level relationship between the threshold voltage V THSW and V THFB is as described in the first embodiment. B3 A small time later than time t B4The values ​​of the judgment signals X[1] and Y[1] are determined.

[0066] The decision circuit 13[1] detects the time t B3 "V" SW [1] <V THSW " is true at time t B4 and thereafter, a decision signal X[1] having a value of "0" is output, and at time t B3 "V" SW [1] ≥ V THSW " is true at time t B4 The voltage monitoring circuit 12[1] outputs a determination signal X[1] having a value of "1" from time t B3 "V" FB [1] <V THFB " is true at time t B4 and thereafter, a judgment signal Y[1] having a value of "0" is output, and at time t B3 "V" FB [1] ≥ V THFB " is true at time t B4 In the power supply device 1B, the voltage VH is always applied to the switch terminal SW[1], and therefore, from time t B3 "V" SW [1] ≥ V THSW On the other hand, in the power supply device 1B, at time t B2 Voltage V FB [1] has essentially dropped to 0V, so at time t B3 "V" FB [1] <V THFB " is established. Therefore, at time t B4 After this, a determination signal X[1] having a value of "1" and a determination signal Y[1] having a value of "0" are output.

[0067] The controller 20 B4Based on the values ​​of the judgment signals X[1] and Y[1] at time t, the controller 20 determines whether or not to cause the control drive circuit 11[1] to perform switching drive. As described in the first embodiment, only when the judgment signals X[1] and Y[1] both have the value "0", the controller 20 determines to cause the control drive circuit 11[1] to perform switching drive. In the power supply device 1B, at time t B4 Since the determination signals X[1] and Y[1] at time t satisfy "(X[1], Y[1])=(1, 0)", the controller 20 determines not to cause the control drive circuit 11[1] to perform switching drive. B4 The case where the determination signals X[1] and Y[1] satisfy "(X[1], Y[1])=(1, 0)" at time t B3 At voltage V SW [1] is the threshold voltage V THSW or more and the voltage V FB [1] is the threshold voltage V THFB In the channel unused case, the controller 20 B4 Even after this, the value of the enable signal EN[1] remains at "0", and therefore the control drive circuit 11[1] keeps the transistors MH[1] and ML[1] in the off state.

[0068] In the case where a channel is not used, the voltage monitoring operation of the voltage monitoring circuit 12[1] is not performed, and the monitoring result signal DET[1] is invalid. Therefore, in the case where a channel is not used, the controller 20 determines the output voltage V OUT [1] does not check for abnormality (in the first place, the output voltage V OUT In the case where the channel is not in use, the error signal based on the signals OVD[1] and LVD[1] is not transmitted.

[0069] In this way, the controller 20 determines the voltage V of the switch terminal SW[1] at the determination timing when the switching drive by the control drive circuit 11[1] is not executed. SW [1] and the voltage V of the feedback terminal VO[1] FB Based on [1], the control circuit 11 controls whether to subsequently perform switching drive. B3 This corresponds to the determination timing. At the determination timing, the transistors MH[1] and ML[1] are off, so the current through the switch terminal SW[1] is cut off (there is no current input / output between the output stage circuit MM[1] and the switch terminal SW[1]). Therefore, in the case of the power supply device 1B having the configuration of FIG. 10, the voltage V SW [1] is the threshold voltage V THSW That's all. In addition, a resistor (corresponding to a series circuit of resistors 12a and 12b; see FIG. 7) is provided between the feedback terminal VO[1] and ground. Therefore, in the case of the power supply device 1B having the configuration of FIG. 10, the voltage V FB [1] is the threshold voltage V THFB At the timing of the decision, the voltage V SW [1] is the threshold voltage V THSW or more and the voltage V FB [1] is the threshold voltage V THFB The lower case is the channel unused case.

[0070] In the channel unused case, the controller 20 inhibits the switching drive by the control drive circuit 11[1] after the determination timing (controls the control drive circuit 11[1] so that the transistors MH[1] and ML[1] are maintained off). In the channel unused case, the voltage monitoring operation by the voltage monitoring circuit 12[1] is inhibited (deactivated). Therefore, in the channel unused case, the controller 20 inhibits the voltage V of the feedback terminal VO[1]. FB Prevents the execution of abnormality response actions based on [1] (voltage V FB [1] and the normal voltage range, regardless of the voltage V FB (The system does not perform the anomaly response actions based on [1]).

[0071] The configuration and operation of the regulator 4 of the second channel in the power supply device 1B are the same as the configuration and operation of the regulator 4 of the second channel in the power supply device 1A. Note that in the power supply device 1B, the configuration of the second channel can also be the same as the configuration of the first channel, in which case the switching drive and voltage monitoring operations are not performed in the second channel either.

[0072] Using the power supply control device 2, the output voltage V OUT However, in some systems, the output voltage V OUT In some cases, the number of channels required may be less than (n-1). To deal with this, it is conceivable to manufacture a power supply control device for n channels and a power supply control device for (n-1) channels as separate electronic components, but this method increases the burden of product development, manufacturing, and inventory management. The same applies when a power supply control device for (n-2) channels is manufactured separately. According to this embodiment, the output voltage V OUT This can be used when the number of required channels is n or (n-1) (similarly when the number is (n-2) or less). This reduces the burden of manufacturing and inventory management, and common parts (2) can be used for a variety of applications.

[0073] One possible reference method involves preparing a power supply control device capable of generating output voltages for up to n channels and simply opening the terminals of unused channels. However, in this reference method, the output voltage of the unused channels is determined to be abnormal and an abnormality response operation is performed. For example, in this reference method, an error signal is output from the power supply control device to a higher-level system, which then determines that some abnormality has occurred in the power supply control device. The power supply control device 2 of this embodiment does not suffer from such inconvenience.

[0074] <<Third Example>> A third embodiment will be described. In the power supply device 1A of FIG. 8, at time t A1There may also be a case where the output node OUT[1] or the switch terminal SW[1] is shorted to the input terminal VS[1] or the power supply terminal IN (hereinafter referred to as a power short-circuit case at startup). A4 In the power supply device 1A, the determination signals X[1] and Y[1] at time t A4 When the determination signals X[1] and Y[1] in the figure satisfy "(X[1], Y[1])=(1,1)", the controller 20 can thereafter hold the value of the enable signal EN[1] at "0" to prevent switching drive by the control drive circuit 11[1], and the output voltage V OUT It is advisable to take the same abnormality response action as when it is determined that an abnormality has occurred on the high side in [1].

[0075] In the power supply device 1A of FIG. A1 There may also be a case where the output node OUT[1] or the switch terminal SW[1] is shorted to ground (hereinafter referred to as a start-up ground fault case). In the start-up ground fault case, A4 The determination signals X[1] and Y[1] in the figure satisfy "(X[1], Y[1]) = (0, 0)". Therefore, in the case of a ground fault at startup, the control drive circuit 11[1] starts switching drive, but after the start of switching drive, the voltage monitoring operation is performed and the above-mentioned low-side abnormality is detected, and as a result, the switching drive is safely stopped by the abnormality response operation.

[0076] In the power supply device 1A of FIG. 8, the switch terminal SW[1] and the feedback terminal VO[1] are short-circuited in a DC manner through the output coil L[1], so that at time t A4 The decision signals X[1] and Y[1] in the above equation never satisfy "(X[1], Y[1])=(1,0)" or "(X[1], Y[1])=(0,1)".

[0077] <<Fourth Example>> A fourth embodiment will be described. The controller 20 according to the fourth embodiment controls whether or not the control drive circuit 11[1] will subsequently perform switching drive based on only the determination signal X[1] of the determination signals X[1] and Y[1]. In the fourth embodiment, the generation and output of the determination signal Y[1] by the voltage monitoring circuit 12[1] may be omitted.

[0078] Therefore, the controller 20 according to the fourth embodiment determines the voltage V of the switch terminal SW[1] at the determination timing when the switching drive by the control drive circuit 11[1] is not executed. SW Based on [1], the controller 20 controls whether or not to cause the control drive circuit 11 [1] to perform switching drive thereafter. In detail, the controller 20 according to the fourth embodiment determines whether or not the voltage V SW Regarding [1], “V SW [1] <V THSW In case CS4a where " is satisfied, it is determined that the control drive circuit 11 [1] will then perform the switching drive, and "V SW [1] ≥ V THSW " is satisfied, it is decided that the control drive circuit 11[1] will not perform switching drive thereafter (it is decided that switching drive by the control drive circuit 11[1] will be inhibited). In case CS4a, after switching drive by the control drive circuit 11[1] starts, a voltage monitoring operation is performed by the voltage monitoring circuit 12[1], and therefore an abnormality response operation based on the signals OVD[1] and LVD[1] can be performed. In case CS4b, switching drive by the control drive circuit 11[1] is not performed, so the voltage monitoring operation by the voltage monitoring circuit 12[1] is not performed, and therefore an abnormality response operation based on the signals OVD[1] and LVD[1] is not performed either.

[0079] When the power supply device 1 is the power supply device 1A of FIG. 8, time t A3 corresponds to the judgment timing, and the voltage V SW [1] is “V SW [1] <V THSW" is satisfied. In other words, in the fourth embodiment, the case in which the power supply device 1 is the power supply device 1A corresponds to case CS4a. The timing chart of the power supply control device 2 in case CS4a is the same as that in Figure 9, and in case CS4a, the same operation as in the first embodiment is performed by the power supply device 1A and the power supply control device 2. However, the operation related to the judgment signal Y[1] shown in the first embodiment is ignored in the fourth embodiment. Alternatively, it can be considered that "Y[1]=0" always holds in case CS4a, and the operation of the first embodiment is realized.

[0080] When the power supply device 1 is the power supply device 1B of FIG. 10, time t B3 corresponds to the judgment timing, and the voltage V SW [1] is “V SW [1] ≥ V THSW " is satisfied. In other words, in the fourth embodiment, the case in which power supply device 1 is power supply device 1B corresponds to case CS4b. The timing chart of power supply control device 2 in case CS4b is the same as that in Figure 11, and in case CS4b, the same operation as in the second embodiment is performed by power supply device 1B and power supply control device 2. However, the operation related to determination signal Y[1] shown in the second embodiment is ignored in the fourth embodiment. Alternatively, it can be considered that "Y[1]=0" always holds in case CS4b, and the operation of the second embodiment is realized.

[0081] <<Fifth Example>> A fifth embodiment will be described. The controller 20 according to the fifth embodiment controls whether or not the control drive circuit 11[1] will subsequently perform switching drive, based only on the determination signal Y[1] of the determination signals X[1] and Y[1]. In the fifth embodiment, the generation and output of the determination signal X[1] by the determination circuit 13[1] may be omitted.

[0082] Therefore, the controller 20 according to the fifth embodiment determines the voltage V of the feedback terminal VO[1] at the determination timing when the switching drive by the control drive circuit 11[1] is not executed. FBBased on [1], the controller 20 controls whether or not to cause the control drive circuit 11 [1] to perform switching drive thereafter. In detail, the controller 20 according to the fifth embodiment determines whether or not the voltage V FB Regarding [1], “V FB [1] <V THFB In case CS5a where " is satisfied, it is determined that the control drive circuit 11 [1] will then perform the switching drive, and "V FB [1] ≥ V THFB " is satisfied, it is decided that the control drive circuit 11[1] will not perform switching drive thereafter (it is decided that switching drive by the control drive circuit 11[1] will be inhibited). In case CS5a, after switching drive by the control drive circuit 11[1] starts, a voltage monitoring operation is performed by the voltage monitoring circuit 12[1], and therefore an abnormality response operation based on the signals OVD[1] and LVD[1] can be performed. In case CS5b, switching drive by the control drive circuit 11[1] is not performed, so the voltage monitoring operation by the voltage monitoring circuit 12[1] is not performed, and therefore an abnormality response operation based on the signals OVD[1] and LVD[1] is not performed either.

[0083] When the power supply device 1 is the power supply device 1A of FIG. 8, time t A3 corresponds to the judgment timing, and the voltage V FB [1] is “V FB [1] <V THFB " is satisfied. In other words, in the fifth embodiment, the case in which the power supply device 1 is the power supply device 1A corresponds to case CS5a. The timing chart of the power supply control device 2 in case CS5a is the same as that in Figure 9, and in case CS5a, the same operation as in the first embodiment is performed by the power supply device 1A and the power supply control device 2. However, the operation related to the judgment signal X[1] shown in the first embodiment is ignored in the fifth embodiment. Alternatively, it can be considered that "X[1]=0" always holds in case CS5a, and the operation of the first embodiment is realized.

[0084] In the fifth embodiment, when the first channel is not used, the power supply 1C of FIG. 12 is formed as the power supply 1. Using the power supply 1B of FIG. 10 as a reference, the connection destination of the application terminal of the voltage VH is changed from the switch terminal SW[1] to the feedback terminal VO[1], and the power supply 1C of FIG. 12 is obtained. Apart from this change, the power supply 1C has the same configuration as the power supply 1B. The voltage VH is equal to the threshold voltage V THFB or more, and the threshold voltage V THFB Typically, the voltage VH may be the power supply voltage VCC.

[0085] When power supply unit 1 is power supply unit 1C, time t B3 corresponds to the judgment timing, and the voltage V FB [1] is “V FB [1] ≥ V THFB " is satisfied. In other words, in the fifth embodiment, the case where the power supply device 1 is the power supply device 1C corresponds to case CS5b. A timing chart of the power supply control device 2 in case CS5b is shown in FIG. 13, and in case CS5b, the same operations as in the second embodiment are performed by the power supply device 1C and the power supply control device 2. However, the operations related to the determination signal X[1] shown in the second embodiment are ignored in the fifth embodiment. Alternatively, it may be considered that "X[1]=0" always holds in case CS5b, and the operation of the second embodiment is realized. FIG. 13 is a partial modification of FIG. 11. In the timing chart of FIG. 13, FB [1] ≥ V THFB " is satisfied, so at time t B4 And thereafter, "Y[1]=1". In the power supply device 1C of FIG. 12, when a discharge operation is performed on the first channel, a current flows from the application terminal of the voltage VH through the discharge circuit 14[1], but this does not cause a problem because a resistor (14[1]; see FIG. 6) for limiting the current is provided in the discharge circuit 14[1].

[0086] <<Sixth Example>> A sixth embodiment will be described.

[0087] When a step-down switching regulator is configured in the i-th channel, the discharge operation of the discharge circuit 14[i] can start switching driving from a state in which the voltage of the output node OUT[i] is 0 V. However, in the technology according to the present disclosure, the discharge circuit 14[i] can also be omitted.

[0088] The transistor ML[i] in the i-th channel is a rectifying element. A diode rectification method may be adopted in the step-down switching regulator included in the power supply device 1. In this case, instead of the transistor ML[i], a rectifying diode having an anode connected to ground and a cathode connected to the switch terminal SW[i] is provided in the output stage circuit MM[i] as the rectifying element. In this case, only the transistor MH[i] is turned on and off during the switching operation of the output stage circuit MM[i]. In any case, when a step-down switching regulator is configured in the i-th channel, the output voltage V is changed based on the current flowing through the output coil L[i] by switching the transistor MH[i] between on and off during the switching operation of the output stage circuit MM[i]. OUT [i] is generated.

[0089] With respect to any signal or voltage, the relationship between the high level and the low level thereof may be reversed without prejudice to the above-mentioned gist.

[0090] The channel types of the FETs (field effect transistors) shown in the above embodiments are merely examples, and the channel type of any FET may be changed between P-channel and N-channel types without departing from the spirit of the above.

[0091] Any of the transistors described above may be any type of transistor, provided that no disadvantages arise. For example, any of the transistors described above as MOSFETs may be replaced with junction field effect transistors (FETs), insulated gate bipolar transistors (IGBTs), or bipolar transistors, provided that no disadvantages arise. Any of the transistors has a first electrode, a second electrode, and a control electrode. In an FET, one of the first and second electrodes is the drain, the other is the source, and the control electrode is the gate. In an IGBT, one of the first and second electrodes is the collector, the other is the emitter, and the control electrode is the gate. In a bipolar transistor that is not an IGBT, one of the first and second electrodes is the collector, the other is the emitter, and the control electrode is the base.

[0092] The embodiments of the present disclosure can be modified in various ways as appropriate within the scope of the technical ideas set forth in the claims. The above-described embodiments are merely examples of the present disclosure, and the meanings of the terms of the present disclosure and each constituent element are not limited to those described in the above-described embodiments. The specific numerical values ​​shown in the above description are merely examples, and as a matter of course, they can be changed to various numerical values.

[0093] <<Additional Notes>> A supplementary note will be provided for the present disclosure, the specific configuration examples of which have been shown in the above-described embodiments.

[0094] A power supply control device (2) according to one aspect of the present disclosure includes an input terminal (VS[1]), a switch terminal (SW[1]), an output stage circuit (MM[1]) having an output transistor (MH[1]) provided between the input terminal and the switch terminal, and a rectifier element (ML[1]) provided between the switch terminal and ground, and an input voltage (V IN When a feedback voltage (V FB[1]) and the output voltage (V OUT A control drive circuit (11[1]) configured to generate a feedback voltage corresponding to the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground, and a feedback terminal (VO[1]) configured to receive the feedback voltage corresponding to the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground, and each voltage (V SW [1], V FB and a controller (20) configured to subsequently control whether or not to cause the control drive circuit to perform the switching drive based on the control drive circuit's instruction [1] (first configuration).

[0095] This allows the execution or non-execution of switching drive to be achieved as desired by determining the states of the switch terminal and feedback terminal.

[0096] In the power supply control device according to the first configuration, the current through the switch terminal is cut off at the determination timing, a resistor (12a, 12b) is provided between the feedback terminal and ground, and the controller determines whether the voltage of the switch terminal at the determination timing is equal to or lower than a first threshold voltage (V THSW ) and the voltage of the feedback terminal at the determination timing is less than a second threshold voltage (V THFB ), the control drive circuit is caused to perform the switching drive after the judgment timing, and in a second case where the voltage of the switch terminal at the judgment timing is equal to or greater than the first threshold voltage and the voltage of the feedback terminal at the judgment timing is less than the second threshold voltage, the control drive circuit is prevented from performing the switching drive after the judgment timing (second configuration).

[0097] This allows the execution or non-execution of switching drive to be achieved as desired by determining the states of the switch terminal and feedback terminal.

[0098] In the power supply control device according to the second configuration, a voltage monitoring circuit (12[1]) configured to perform a voltage monitoring operation to detect an abnormality in the output voltage based on the voltage of the feedback terminal after the switching drive is started may be provided, and the voltage monitoring operation by the voltage monitoring circuit may be inhibited in the second case (third configuration).

[0099] In the power supply control device of the third configuration, the voltage monitoring circuit may monitor whether the voltage of the feedback terminal falls within a predetermined normal voltage range during the voltage monitoring operation, and output the monitoring result (DET[1]) to the controller, and the controller may be configured to execute a predetermined abnormality response operation when the voltage of the feedback terminal deviates from the normal voltage range in the first case, and to prevent the execution of the abnormality response operation based on the voltage of the feedback terminal in the second case (fourth configuration).

[0100] In the second case where switching driving is not performed, it is not appropriate to perform a voltage monitoring operation and an abnormality response operation. By configuring as described above, inappropriate abnormality response operations are prevented.

[0101] With respect to the power supply control device according to any of the second to fourth configurations, in the first case, a step-down switching regulator may be formed by the output stage circuit, the control drive circuit, the output coil, and the output capacitor, and in the second case, the switch terminal may be connected to an application terminal for a voltage (VH) equal to or higher than the first threshold voltage (fifth configuration).

[0102] The power supply control device according to the fifth configuration is configured to control the operation of a power supply device (1) having a multi-channel regulator, and may be configured (sixth configuration) in the first case in which the step-down switching regulator is formed as one of the multi-channel regulators.

[0103] With regard to the power supply control device according to the sixth configuration, in the first case, power conversion for converting a DC voltage into another DC voltage is performed in each of the n-channel regulators including the step-down switching regulator, and the output voltage is generated from the input voltage by the power conversion by the step-down switching regulator, where n represents an integer of 2 or more; and in the second case, the step-down switching regulator is not formed, and the power conversion may be performed in each of one or more regulators that are less than the n channels (seventh configuration).

[0104] This allows certain channels to be used or not used as desired.

[0105] In the power supply control device according to any of the above first to seventh configurations, the rectifying element may be a synchronous rectifying transistor, and the output transistor and the synchronous rectifying transistor may be maintained off at the determination timing (eighth configuration).

[0106] A power supply control device according to another aspect of the present disclosure includes a power supply control device (2) including an input terminal (VS[1]), a switch terminal (SW[1]), an output stage circuit (MM[1]) having an output transistor (MH[1]) provided between the input terminal and the switch terminal, and a rectifier element (ML[1]) provided between the switch terminal and ground; and an input voltage (V IN When a feedback voltage (V FB[1]) and the output voltage (V OUT A control drive circuit (11[1]) configured to generate a feedback voltage corresponding to the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground. A feedback terminal (VO[1]) configured to receive the feedback voltage corresponding to the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground. SW [1]) or the voltage of the feedback terminal (V FB and a controller (20) configured to subsequently control whether or not to cause the control drive circuit to perform the switching drive based on the control drive circuit's instruction [1] (ninth configuration).

[0107] This allows the execution or non-execution of switching drive to be achieved as desired by determining the state of the switch terminal or feedback terminal.

[0108] In the power supply control device according to the ninth configuration, the current through the switch terminal is cut off at the determination timing, and a resistor (12a, 12b) is provided between the feedback terminal and ground, and the controller determines whether the voltage of the switch terminal or the voltage of the feedback terminal at the determination timing is equal to or lower than a threshold voltage (V THSW , V THFB ), the control drive circuit is caused to perform the switching drive after the judgment timing, and in a second case where the voltage of the switch terminal or the voltage of the feedback terminal at the judgment timing is equal to or greater than the threshold voltage, the control drive circuit is prevented from performing the switching drive after the judgment timing (tenth configuration).

[0109] This allows the execution or non-execution of switching drive to be achieved as desired by determining the state of the switch terminal or feedback terminal.

[0110] The power supply control device according to the tenth configuration may be provided with a voltage monitoring circuit (12[1]) configured to perform a voltage monitoring operation to detect an abnormality in the output voltage based on the voltage of the feedback terminal after the switching drive is started, and may be configured (eleventh configuration) in which the voltage monitoring operation by the voltage monitoring circuit is inhibited in the second case.

[0111] In the power supply control device of the 11th configuration, the voltage monitoring circuit may monitor whether the voltage of the feedback terminal falls within a predetermined normal voltage range during the voltage monitoring operation, and output the monitoring result (DET[1]) to the controller, and the controller may be configured to execute a predetermined abnormality response operation when the voltage of the feedback terminal deviates from the normal voltage range in the first case, and to prevent the execution of the abnormality response operation based on the voltage of the feedback terminal in the second case (12th configuration).

[0112] In the second case where switching driving is not performed, it is not appropriate to perform a voltage monitoring operation and an abnormality response operation. By configuring as described above, inappropriate abnormality response operations are prevented.

[0113] With respect to the power supply control device of any of the above tenth to twelfth configurations, in the first case, a step-down switching regulator is formed by the output stage circuit, the control drive circuit, the output coil, and the output capacitor, and whether or not to subsequently cause the control drive circuit to perform the switching drive is controlled based on the voltage of the switch terminal at the judgment timing, in the second case, the switch terminal is connected to an application terminal for a voltage (VH) equal to or greater than the threshold voltage, and in the second case, when it is controlled based on the voltage of the feedback terminal at the judgment timing, the feedback terminal in the second case may be connected to the application terminal for a voltage (VH) equal to or greater than the threshold voltage (thirteenth configuration).

[0114] The power supply control device according to the thirteenth configuration is configured to control the operation of a power supply device having a multi-channel regulator, and in the first case, the step-down switching regulator may be formed as one of the multi-channel regulators (fourteenth configuration).

[0115] With regard to the power supply control device according to the above-mentioned 14th configuration, in the first case, power conversion for converting a DC voltage into another DC voltage is performed in each of the n-channel regulators including the step-down switching regulator, and the output voltage is generated from the input voltage by the power conversion by the step-down switching regulator, where n represents an integer of 2 or more; and in the second case, the step-down switching regulator is not formed, and the power conversion is performed in each of one or more regulators that are less than the n channels (15th configuration).

[0116] This allows certain channels to be used or not used as desired.

[0117] In the power supply control device according to any of the above ninth to fifteenth configurations, the rectifying element may be a synchronous rectifying transistor, and the output transistor and the synchronous rectifying transistor may be maintained off at the determination timing (sixteenth configuration). [Explanation of symbols]

[0118] 1, 1A, 1B, 1C power supplies 2 Power supply control device 3 Disc lead parts group 4, 4[1]~4[n] Regulators 5 External device 10, 10[1]~10[n] control block V IN , V IN [1]~V IN [n] Input voltage V OUT , V OUT [1]~V OUT[n] Output voltage 11[1], 11[2] Control drive circuit 12[1], 12[2] Voltage monitoring circuit 13[1], 13[2] Judgment circuit 14[1], 14[2] Discharge circuit 20 Controller 30 Internal power circuit MM[1], MM[2] output stage circuit MH[1], MH[2] transistors (output transistors) ML[1], ML[2] transistors (synchronous rectification transistors) IN power supply terminal GND Ground terminal VS[1], VS[2] input terminals SW[1], SW[2] Switch terminals VO[1], VO[2] Feedback terminals EN[1], EN[2] Enable signals DIS[1], DIS[2] Discharge command signal DET[1], DET[2] Monitoring result signal X[1], X[2], Y[1], Y[2] decision signal 12a, 12b, 14a resistors 12c, 12d Comparators 14b transistor

Claims

1. An input terminal, The switch terminal and an output stage circuit having an output transistor provided between the input terminal and the switch terminal and a rectifying element provided between the switch terminal and ground; a control drive circuit configured to perform switching drive of the output stage circuit in response to a feedback voltage when an input voltage is supplied to the input terminal, an output coil is provided between the switch terminal and an output node, and an output capacitor is provided between the output node and ground, and to generate an output voltage at the output node based on the input voltage by the switching drive; a feedback terminal configured to receive the feedback voltage corresponding to the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground; a controller configured to control whether or not to cause the control drive circuit to perform the switching drive thereafter, based on the voltages of the switch terminal and the feedback terminal at a determination timing when the switching drive is not performed. , power control device.

2. At the determination timing, the current through the switch terminal is cut off, a resistor is provided between the feedback terminal and ground; The controller in a first case in which the voltage of the switch terminal at the determination timing is less than a first threshold voltage and the voltage of the feedback terminal at the determination timing is less than a second threshold voltage, causing the control drive circuit to perform the switching drive after the determination timing; In a second case where the voltage of the switch terminal at the determination timing is equal to or greater than the first threshold voltage and the voltage of the feedback terminal at the determination timing is less than the second threshold voltage, the switching drive by the control drive circuit after the determination timing is inhibited. The power supply control device according to claim 1 .

3. a voltage monitoring circuit configured to perform a voltage monitoring operation for detecting an abnormality in the output voltage based on a voltage of the feedback terminal after the start of the switching drive; In the second case, the voltage monitoring operation by the voltage monitoring circuit is inhibited. The power supply control device according to claim 2 .

4. the voltage monitoring circuit monitors whether the voltage of the feedback terminal falls within a predetermined normal voltage range during the voltage monitoring operation, and outputs the monitoring result to the controller; The controller executes a predetermined abnormality response operation when the voltage of the feedback terminal deviates from the normal voltage range in the first case, and inhibits execution of the abnormality response operation based on the voltage of the feedback terminal in the second case. The power supply control device according to claim 3 .

5. In the first case, the output stage circuit, the control drive circuit, the output coil, and the output capacitor form a step-down switching regulator, In the second case, the switch terminal is connected to an application terminal to which a voltage equal to or higher than the first threshold voltage is applied.

5. The power supply control device according to claim 2.

6. The power supply control device is configured to control the operation of a power supply device having a plurality of channels of regulators; In the first case, the step-down switching regulator is formed as one of the multiple channel regulators. The power supply control device according to claim 5 .

7. In the first case, power conversion is performed in each of n-channel regulators including the step-down switching regulator to convert a DC voltage into another DC voltage, and the output voltage is generated from the input voltage by the power conversion by the step-down switching regulator, where n is an integer equal to or greater than 2; In the second case, the step-down switching regulator is not formed, and the power conversion is performed in each of one or more regulators having less than n channels. The power supply control device according to claim 6 .

8. The rectifying element is a synchronous rectifying transistor, and the output transistor and the synchronous rectifying transistor are maintained off at the determination timing.

5. The power supply control device according to claim 1.

9. An input terminal, The switch terminal and an output stage circuit having an output transistor provided between the input terminal and the switch terminal and a rectifying element provided between the switch terminal and ground; a control drive circuit configured to perform switching drive of the output stage circuit in response to a feedback voltage when an input voltage is supplied to the input terminal, an output coil is provided between the switch terminal and an output node, and an output capacitor is provided between the output node and ground, and to generate an output voltage at the output node based on the input voltage by the switching drive; a feedback terminal configured to receive the feedback voltage corresponding to the output voltage when the input voltage is supplied to the input terminal, the output coil is provided between the switch terminal and the output node, and the output capacitor is provided between the output node and ground; a controller configured to control whether or not to cause the control drive circuit to perform the switching drive thereafter based on the voltage of the switch terminal or the voltage of the feedback terminal at a determination timing when the switching drive is not performed. , power control device.

10. At the determination timing, the current through the switch terminal is cut off, a resistor is provided between the feedback terminal and ground; The controller in a first case in which the voltage of the switch terminal or the voltage of the feedback terminal at the determination timing is less than a threshold voltage, the control drive circuit is caused to perform the switching drive after the determination timing; In a second case where the voltage of the switch terminal or the voltage of the feedback terminal at the determination timing is equal to or higher than the threshold voltage, the switching drive by the control drive circuit after the determination timing is inhibited. The power supply control device according to claim 9 .

11. a voltage monitoring circuit configured to perform a voltage monitoring operation for detecting an abnormality in the output voltage based on a voltage of the feedback terminal after the start of the switching drive; In the second case, the voltage monitoring operation by the voltage monitoring circuit is inhibited. The power supply control device according to claim 10.

12. the voltage monitoring circuit monitors whether the voltage of the feedback terminal falls within a predetermined normal voltage range during the voltage monitoring operation, and outputs the monitoring result to the controller; The controller executes a predetermined abnormality response operation when the voltage of the feedback terminal deviates from the normal voltage range in the first case, and inhibits execution of the abnormality response operation based on the voltage of the feedback terminal in the second case. The power supply control device according to claim 11 .

13. In the first case, the output stage circuit, the control drive circuit, the output coil, and the output capacitor form a step-down switching regulator, When it is controlled based on the voltage of the switch terminal at the determination timing whether or not to cause the control drive circuit to perform the switching drive thereafter, the switch terminal in the second case is connected to an application terminal to which a voltage equal to or higher than the threshold voltage is applied, When it is determined whether or not the control drive circuit will subsequently perform the switching drive based on the voltage of the feedback terminal at the determination timing, the feedback terminal in the second case is connected to the application terminal of a voltage equal to or higher than the threshold voltage. The power supply control device according to any one of claims 10 to 12.

14. The power supply control device is configured to control the operation of a power supply device having a plurality of channels of regulators; In the first case, the step-down switching regulator is formed as one of the multiple channel regulators. The power supply control device according to claim 13 .

15. In the first case, power conversion is performed in each of n-channel regulators including the step-down switching regulator to convert a DC voltage into another DC voltage, and the output voltage is generated from the input voltage by the power conversion by the step-down switching regulator, where n is an integer equal to or greater than 2; In the second case, the step-down switching regulator is not formed, and the power conversion is performed in each of one or more regulators having less than n channels. The power supply control device according to claim 14 .

16. The rectifying element is a synchronous rectifying transistor, and the output transistor and the synchronous rectifying transistor are maintained off at the determination timing.

13. The power supply control device according to claim 9.

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