Atomic layer etching of molybdenum

Abstract

To provide atomic layer etching of molybdenum that is used in a variety of applications in semiconductor processing, such as word line isolation in 3D NAND fabrication, etch molybdenum in a highly controllable manner by performing one or more etching cycles.SOLUTION: In a molybdenum etching method, each etching cycle includes exposing a substrate having a molybdenum layer to an oxygen-containing reactant to form molybdenum oxide, followed by treatment with boron trichloride to convert the molybdenum oxide to a volatile molybdic oxychloride, and then treating the substrate with a fluorine-containing reactant to remove the boron oxide formed in the previous reaction from the substrate surface. In some embodiments, the method is performed in the absence of a plasma to obtain a substantially isotropic etch.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] [Incorporated by reference] A PCT application is being filed concurrently herewith as part of this application, and each application identified in that concurrently filed PCT application to which this application claims benefit or priority is incorporated herein by reference in its entirety for all purposes.

[0002] The present invention relates to methods and apparatus for semiconductor device manufacturing. More particularly, embodiments of the present invention relate to methods and apparatus for controlled etching of molybdenum in semiconductor processing. [Background technology]

[0003] In semiconductor device fabrication, deposition and etching techniques are used to pattern materials, such as forming metal lines embedded in dielectric layers. Deposition techniques include atomic layer deposition (ALD), chemical vapor deposition (CVD), and physical vapor deposition (PVD). Etching techniques include wet etching methods and dry etching, such as reactive ion etching (RIE).

[0004] Etching methods can be isotropic or anisotropic. Isotropic etching is characterized by etching in multiple directions (both vertical and horizontal) on the substrate, with the etching rate in the different directions being substantially the same. Isotropic etching is required, for example, for horizontal etching. Anisotropic etching is characterized by etching primarily in one direction, such as the vertical direction, and is often used to form recessed features (e.g., vias) in the substrate. Anisotropic etching is also known as "directional etching."

[0005] The background description provided herein is intended to present the contents of the present disclosure generally. Work by the presently named inventors within the scope of what is described in this Background section, as well as aspects of the description that may not otherwise be considered prior art at the time of filing, are not admitted, expressly or impliedly, as prior art against the present disclosure. Summary of the Invention

[0006] Methods and apparatus for controllable molybdenum etching are provided. In some embodiments, the methods enable controlled removal of only a few atomic layers of molybdenum (e.g., approximately 10 Å) per etch cycle. By repeating the etch cycle multiple times, removal of larger amounts of molybdenum (e.g., 2-2000 nm) is achieved with atomic precision. The provided methods can be used for isotropic etching of molybdenum, including, but not limited to, etching molybdenum in 3D NAND node isolation. The provided methods can also be used for directional etching, provided that process conditions (e.g., plasma conditions) are tuned to favor directional etching.

[0007] In one aspect, a method for etching a molybdenum layer on a semiconductor substrate is provided. The method includes: (a) exposing the semiconductor substrate to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide; (b) after the formation of the molybdenum oxide, exposing the semiconductor substrate to boron trichloride to form boron oxide on the semiconductor substrate and convert the molybdenum oxide to a volatile molybdic oxychloride; and (c) exposing the semiconductor substrate to a fluorine-containing reactant to remove the boron oxide from the semiconductor substrate. These steps (a) through (c) constitute one etching cycle, which may be repeated as many times as necessary to etch the desired amount of molybdenum. For example, between about 2 and 50 etching cycles may be performed. In some embodiments, one etching cycle includes steps (a) through (c), and the single etching cycle controllably removes between about 8 and 15 Å of the molybdenum layer. In some embodiments, these steps are performed in the absence of a plasma. In some embodiments, the etching of the molybdenum layer is isotropic. These steps (a)-(c) can be performed in one process chamber, and in some embodiments, the process chamber is purged after each step of the etching cycle.

[0008] In some implementations, the oxygen-containing reactant is O, O, or a mixture thereof, and the oxygen-containing reactant (e.g., O) is optionally activated in a plasma. For example, oxygen radicals formed using oxygen ions from a remote plasma source or in situ (direct) oxygen plasma can be used. In some embodiments, the fluorine-containing reactant used to remove boron oxide is HF.

[0009] In some embodiments, the etching cycle is carried out at a temperature between about 100 and 400°C, for example, between about 150 and 250°C.

[0010] In one application, the provided method is used to etch molybdenum from the sidewalls of recessed features on a semiconductor substrate. For example, during word line isolation in the fabrication of 3D NAND structures, the molybdenum layer can be etched (preferably isotropically).

[0011] In another aspect, an apparatus for processing a substrate is provided. The apparatus includes a controller having program instructions configured to perform the methods described herein. In one embodiment, the apparatus includes a process chamber configured to accommodate a substrate, the process chamber including a substrate holder configured to hold the substrate, an inlet configured to introduce one or more reactants into the process chamber, and a controller having program instructions configured to: (i) expose the substrate having a molybdenum layer to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide; (ii) expose the substrate to boron trichloride to form boron oxide on the semiconductor substrate and convert the molybdenum oxide to a volatile molybdenum oxychloride; and (iii) expose the substrate to a fluorine-containing reactant to remove the boron oxide from the substrate, thereby etching the molybdenum layer on the semiconductor substrate. The controller may also include instructions configured to repeat steps (i)-(iii), optionally purging after each step.

[0012] In some embodiments, the apparatus further includes a heater, and the program instructions include program instructions configured to maintain a temperature between about 100 and 400° C. during etching of the molybdenum layer.

[0013] In some embodiments, the apparatus is further configured to deposit a material on the semiconductor substrate (eg, deposit molybdenum prior to etching the molybdenum).

[0014] In some embodiments, the apparatus is configured to activate the oxygen-containing reactant in a plasma.

[0015] In another aspect, a non-transitory computer-readable medium including program instructions for controlling an apparatus configured for processing semiconductor substrates is provided, the program instructions including code configured to: (i) expose a substrate having a molybdenum layer to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide; (ii) expose the substrate to boron trichloride to form boron oxide on the semiconductor substrate and convert the molybdenum oxide to volatile molybdenum oxychloride; and (iii) expose the substrate to a fluorine-containing reactant to remove the boron oxide from the semiconductor substrate, thereby etching the molybdenum layer.

[0016] The provided methods and apparatus can be used in combination with methods and systems used for photolithographic patterning. In one aspect, a system is provided that includes the apparatus and stepper described herein. In some embodiments, the provided methods further include applying a photoresist to a semiconductor substrate, exposing the photoresist to light, patterning the photoresist to transfer the resulting pattern to the semiconductor substrate, and selectively removing the photoresist from the semiconductor substrate.

[0017] These and other embodiments of the subject matter described herein are illustrated in the accompanying drawings and description that follow. [Brief explanation of the drawings]

[0018] [Figure 1] FIG. 1 is a process flow diagram of a molybdenum etching method according to embodiments provided herein.

[0019] [Figure 2] FIG. 2 is a process flow diagram of the use of a molybdenum etching method in the fabrication of a 3D NAND structure according to embodiments provided herein.

[0020] [Figure 3A]FIG. 3A is a schematic cross-sectional view of a semiconductor device before molybdenum etching in the fabrication of a 3D NAND structure according to embodiments provided herein. [Figure 3B] FIG. 3B is a schematic cross-sectional view of a semiconductor device after molybdenum etching in the fabrication of a 3D NAND structure according to embodiments provided herein.

[0021] [Figure 3C] FIG. 3C illustrates a different view of a semiconductor device before molybdenum etching in the fabrication of a 3D NAND structure according to embodiments provided herein. [Figure 3D] FIG. 3D illustrates a different view of a semiconductor device after molybdenum etching in the fabrication of a 3D NAND structure according to embodiments provided herein.

[0022] [Figure 4] FIG. 4 is a schematic diagram of an apparatus suitable for etching molybdenum, according to embodiments provided herein.

[0023] [Figure 5] FIG. 5 is a diagram illustrating a semiconductor process cluster architecture according to embodiments provided herein.

[0024] [Figure 6] FIG. 6 is an experimental plot showing the amount of molybdenum etched per cycle as a function of process temperature. DETAILED DESCRIPTION OF THE INVENTION

[0025] Methods and apparatus for molybdenum etching are provided. The provided methods can be used in a variety of applications, but are particularly useful for isotropic or weakly directional etching of molybdenum in semiconductor device fabrication. In some embodiments, the provided methods are used to substantially isotropically etch molybdenum from the sidewalls of recessed features on semiconductor substrates. For example, the provided methods can be used during node isolation (word line isolation) in 3D NAND device fabrication. The described methods can controllably remove as few as 1-3 atomic layers of molybdenum in each etching cycle, allowing for atomic-level control of the amount of etched material. This controlled etching, called atomic layer etching (ALE), is suitable for etching molybdenum layers of various thicknesses.

[0026] As used herein, the term "molybdenum" refers to metallic molybdenum (i.e., molybdenum that is not oxidized at all). In some embodiments, the molybdenum has a purity (molybdenum content) of at least about 90% by weight, such as at least about 95% purity. The provided methods can be used, for example, for etching CVD-deposited molybdenum, ALD-deposited molybdenum, and PVD-deposited molybdenum.

[0027] As used herein, the term "semiconductor substrate" refers to a semiconductor at any stage of semiconductor device fabrication that contains semiconductor material somewhere within its structure. It is understood that the semiconductor material in a semiconductor substrate need not be exposed. An example of a semiconductor substrate is a semiconductor wafer having multiple layers of other materials (e.g., dielectric materials) covering the semiconductor material. The following detailed description assumes that the disclosed embodiments are practiced on semiconductor wafers, such as 200 mm, 300 mm, or 450 mm. However, the disclosed embodiments are not so limited. Semiconductor wafers may be of various shapes, sizes, and materials. In addition to semiconductor wafers, the disclosed embodiments may be advantageously utilized in other types of workpieces, including various articles such as printed circuit boards.

[0028] When used in connection with a numerical value, unless otherwise specified, the term "about" includes a range of plus or minus 10% of the stated numerical value.

[0029] FIG. 1 is a process flow diagram of a molybdenum etching method according to one embodiment provided herein. The process begins in step 101 with the placement of a semiconductor substrate having a molybdenum layer. Generally, this method is used to etch one or more molybdenum layers on a wide variety of substrates. For example, the molybdenum layer may be on the sidewalls of a recessed feature in the substrate. In another example, the molybdenum layer may be a horizontal molybdenum surface layer overlying a dielectric layer. In yet another example, the molybdenum layer may fill at least a portion of a recessed feature in the substrate. The molybdenum layer on the placed substrate is contactably exposed to a gaseous reactant. The substrate can be processed in any suitable apparatus having a process chamber with a substrate holder (e.g., a pedestal) and an inlet for the introduction of the reactant; the apparatus may optionally be configured to generate a plasma directly in the process chamber or to generate a plasma remotely.

[0030] In step 103, the substrate is exposed to an oxygen-containing reactant to undergo molybdenum oxidation (i.e., convert at least a portion of the molybdenum layer to molybdenum oxide). As used herein, "molybdenum oxide" refers to a MO containing molybdenum and oxygen. x O yThe formula (x, y) refers to the compound, where x and y indicate that the stoichiometry can vary. Examples of oxygen-containing reactants suitable for molybdenum oxidation include ozone (O2) and oxygen (O3). In some embodiments, the oxidation reaction is carried out in the absence of plasma (thermal). In one embodiment, molybdenum is converted to molybdenum oxide by treating the substrate with ozone in the absence of plasma. In another embodiment, molybdenum oxide is formed by treating the substrate with plasma-activated O2. In some embodiments, the plasma is generated directly in the process chamber containing the substrate. In other embodiments, the plasma is generated remotely, away from the substrate (e.g., outside the process chamber containing the substrate), and delivered to the process chamber containing the substrate. At higher temperatures, thermal oxidation with O2 is also possible.

[0031] (Plasma-free) thermal oxidation is preferred in applications where isotropic etching is desired. Plasma-assisted oxidation can also be used to achieve isotropic or weakly anisotropic etching if a remote plasma is used and / or if there is a low or no bias at the substrate pedestal during oxidation. For example, in some embodiments, remote plasma (e.g., oxygen radicals are formed away from the substrate) or thermal oxidation is used to achieve isotropic etching of molybdenum.

[0032] The molybdenum oxide formation step 103 is used to control the amount of molybdenum etched in a single etching cycle. The exposure time of the substrate to the oxygen-containing reactant can be used as a controlling factor for the amount of molybdenum converted to molybdenum oxide. In some embodiments, the exposure time is controlled to convert about 1 to 5, e.g., about 3 atomic layers of molybdenum to molybdenum oxide. Note that subsequent reactions in a single etching cycle are limited by the amount of molybdenum oxide formed in the initial reaction. In some embodiments, the exposure time to the oxygen-containing reactant is selected to be between about 10 seconds and 3 minutes.

[0033] After the formation of molybdenum oxide is complete, the oxygen-containing reactant may optionally be removed from the process chamber by purging and / or evacuating. In some embodiments, the process chamber is purged with an inert gas such as helium, argon, or N.

[0034] Next, in step 105, the substrate is exposed to boron trichloride (BCl) to convert the molybdenum oxide to volatile molybdenum oxychloride, which is MoO x Cl y The molybdenum oxychloride is generally removed as formed from the substrate surface, leaving non-volatile boron oxide on the substrate surface. The reaction between boron trichloride and molybdenum oxide is carried out such that any molybdenum oxide formed in the previous reaction is converted to molybdenum oxychloride. The molybdenum oxychloride is then optionally removed from the process chamber by purging and / or evacuation, followed by the next etching cycle.

[0035] In the next step 107, the substrate is exposed to a fluorine-containing reactant to remove any boron oxide previously left on the substrate surface. The fluorine-containing reactant reacts with the boron oxide, converting it to volatile boron trifluoride, which is removed from the substrate surface (e.g., during the course of the reaction). In some embodiments, the fluorine-containing reactant is gaseous hydrogen fluoride (HF). After the reaction, the process chamber is optionally purged and / or evacuated to remove the hydrogen fluoride and boron trifluoride.

[0036] Next, in step 109, the etching cycle including steps 103-107 is optionally repeated to etch more molybdenum, if desired. In some embodiments, the cycle (steps 103-107) is performed only once, while in many other embodiments, about 2-100 etching cycles are performed, such as about 5-50 etching cycles. Each cycle includes oxidizing molybdenum 103, forming molybdenum oxychloride 105, and removing boron oxide 107. In one embodiment, each etching cycle removes between about 5-15 Å, such as about 1 nm, of molybdenum. The described method can be used to remove various amounts of molybdenum with high precision. For example, about 1-2,000 nm, such as about 1-20 nm, of molybdenum can be etched at the atomic level, isotropically if desired.

[0037] All steps of the etching cycle are preferably performed in one process chamber at one temperature, although the temperature can be varied between steps if desired. The temperature and pressure are selected to ensure that the reactants and volatile products (e.g., molybdate chloride) remain gaseous and to achieve a high reaction rate. For example, temperatures between about 100°C and 400°C can be used. If an oxygen plasma is used during the oxidation step, the etching cycle can be performed at a temperature between about 150°C and 250°C. If oxygen is used in the absence of a plasma, higher temperatures are preferred in some embodiments, such as temperatures between about 400°C and 600°C (e.g., about 400°C). In some embodiments, the pressure is in the range of about 30 mTorr to 5 Torr, such as about 20 to 500 mTorr. The reactants are introduced into the process chamber in gaseous form. In some embodiments, the reactants are introduced with a carrier gas, such as helium or argon. However, in some embodiments, it is preferred to introduce the reactants without the addition of a carrier gas to maximize the reaction rate. Thus, in some embodiments, the process gas introduced into the process chamber during each step of the etching cycle consists essentially of the reactants (e.g., O2 and / or O3 in the first step, BCl3 in the second step, and HF in the third step). In some implementations, the process chamber is pre-coated with silicon tetrachloride (SiCl4) prior to the etching cycle to prevent corrosion of the chamber walls by BCl3 and HF.

[0038] The described etching method can be used in a variety of semiconductor processing applications, but is particularly useful in applications where substantially isotropic removal of molybdenum is desired with a high level of control over the thickness of the removed layer. The provided method is particularly useful for etching a desired amount of molybdenum on a substrate, rather than completely removing the entire exposed molybdenum layer. One example of such an application is node isolation in the fabrication of 3D NAND structures.

[0039] FIG. 2 is a process flow diagram illustrating the use of the provided molybdenum etching method in 3D NAND fabrication. The process begins in step 201 with providing a substrate having a recessed feature and a molybdenum layer exposed on the sidewalls of the recessed feature. The molybdenum layer is electrically connected to a conductive layer of the 3D NAND structure. An example of such a partially fabricated 3D NAND structure is shown in FIG. 3A, which illustrates a schematic cross-sectional view of the structure. The substrate includes a bottom layer 301, which may be silicon, a stack of layers formed on the bottom layer 301, and a recessed feature 303 formed in the stack of layers. It is understood that 3D NAND structures typically have significantly more layers in the stack than are shown in the simplified FIG. 3A. For example, a typical 3D NAND structure has approximately 5-100 conductive and dielectric layers (combined) in the stack. A molybdenum layer 305 covers the sidewalls and bottom of the recessed feature 303 and the top (field region) of the stack. The stack of layers is formed from alternating layers of dielectric material 307 (e.g., silicon oxide) and conductive material 309 (e.g., tungsten), where the layers of conductive material 309 are the word lines of the 3D NAND structure. It can be seen that the molybdenum layer 305 in the structure shown in FIG. 3A is electrically connected to the conductive layer 309 through portions 311 of the sidewalls of the recessed features 303. To electrically isolate the conductive layers 309 from each other, the molybdenum layer 305 needs to be removed from the sidewalls of the recessed features 303, but in a controlled manner without forming large recesses in the molybdenum portions 305 of the word lines. This process is known as node isolation of the 3D NAND structure.

[0040] Referring to the process diagram of FIG. 2, the process continues in step 203 by controllably etching a desired amount of molybdenum from the sidewalls using the provided method. Etching continues until node isolation is achieved, as shown in step 205, separating the conductive layer 309 of the 3D NAND structure. The resulting structure is shown in FIG. 3B. The molybdenum etch in this case removed a sufficient amount of molybdenum from the sidewalls to separate the conductive layer 309 without completely removing the molybdenum 305 at the edges of the conductive layer 309. Generally, in this application, the provided etching method can be used to remove approximately 1 to 20 nm of molybdenum. The etch in this case also removed molybdenum from the field region at the top of the stack and at the bottom of the recessed feature 303. Schematic diagrams of another partially fabricated 3D NAND structure before and after etching are shown in FIGS. 3C and 3D, respectively, which are different views of the structure and show a larger number of stack layers than FIGS. 3A and 3B.

[0041] The provided ALE method offers significantly better process control, making it comparable to wet etching methods. The amount of etched molybdenum can be reliably controlled by controlling the exposure time to the oxygen-containing reactant during the molybdenum oxidation step and the number of etching cycles. Furthermore, the thermal ALE method has excellent uniformity and does not exhibit the significant aspect-ratio dependent etching (ARDE) encountered in RIE. Aspect-ratio dependent etching occurs when the concentration of etching species differs at the top and bottom of a recessed feature in a substrate, resulting in non-uniform etching at the top and bottom. For this reason, the provided ALE method is particularly suitable for etching molybdenum in high-aspect-ratio features, such as features with aspect ratios of at least about 20:1, at least 50:1, and at least 100:1. Because recessed features in 3D NAND structures often have aspect ratios greater than about 5:1 and depths greater than about 5 nm, the provided ALE method is particularly useful in this application. Device

[0042] The etching methods described herein can be performed in a variety of apparatus. Suitable apparatus include a process chamber, a substrate holder within the process chamber configured to hold the substrate in place during etching, an inlet to the process chamber for introducing one or more reactants, and optionally, a plasma generating mechanism configured to generate a plasma in the process gas (either directly near the substrate or remotely). Because the provided methods can be performed thermally in the absence of a plasma, in some embodiments, the apparatus does not include any mechanism for generating a plasma.

[0043] Examples of suitable apparatus include, but are not limited to, inductively coupled plasma (ICP) reactors, which in certain embodiments are also suitable for cyclic deposition and activation processes, including atomic layer deposition (ALD) operations. In some embodiments, the apparatus comprises a process chamber used for both depositing and etching materials using the methods provided herein. For example, in some embodiments, the apparatus is configured to deposit molybdenum (e.g., by ALD) and etch the molybdenum in the same process chamber. In some embodiments, etching is performed in a Striker® reactor manufactured by Lam Research, Inc. (Fremont, California). While ICP reactors are described in detail herein, it should be understood that capacitively coupled plasma reactors and reactants without a plasma generator can also be used.

[0044] FIG. 4 is a schematic cross-sectional view of a capacitively coupled plasma integrated etch and deposition apparatus 400 suitable for implementing the etching methods described herein, such as the Kiyo® reactor manufactured by Lam Research, Inc. (Fremont, California). The capacitively coupled plasma apparatus 400 includes an overall process chamber 424 structurally defined by a chamber wall 401 and a window 411. The chamber wall 401 may be made of stainless steel or aluminum. The window 411 may be made of quartz or other dielectric materials. An optional internal plasma grid 450 divides the overall process chamber into an upper subchamber 402 and a lower subchamber 403. In most embodiments, the plasma grid 450 is removable, allowing the chamber space consisting of the subchambers 402 and 403 to be used. A chuck 417 is positioned within the lower subchamber 403 near the bottom interior surface. The chuck 417 is configured to receive and hold a semiconductor wafer 419 on which the etching and deposition processes are performed. The chuck 417 may be an electrostatic chuck for supporting the wafer 419, if present. In some embodiments, an edge ring (not shown) surrounds the chuck 417, with the edge ring having a top surface that is substantially coplanar with the top surface of the wafer 419, if present on the chuck 417. The chuck 417 also includes an electrostatic electrode for chucking and dechucking the wafer 419. A filter and DC clamp power supply (not shown) may be provided for this purpose. Other control systems for lifting the wafer 419 from the chuck 417 may also be provided. The chuck 417 may be charged using an RF power supply 423. The RF power supply 423 is connected to a matching circuit 421 through connection 427. The matching circuit 421 is connected to the chuck 417 through connection 425. In this manner, the RF power supply 423 is connected to the chuck 417. In various embodiments, the bias voltage of the electrostatic chuck may be set to about 50 Vb, or may be set to a different bias voltage depending on the process being performed in accordance with the disclosed embodiments.For example, the bias voltage may be between about 20 Vb and about 100 Vb, or between about 30 Vb and about 150 Vb.

[0045] The plasma generation element includes a coil 433 disposed above the window 411. In some embodiments, a coil is not used in the disclosed embodiments. The coil 433 is made of a conductive material and includes at least one complete rotation. The example coil 433 shown in FIG. 4 includes three rotations. A cross-section of the coil 433 is shown with symbols, where the coil with an X rotates into the page and the coil with a ● rotates out of the page. The plasma generation element also includes an RF power source 441 configured to supply RF power to the coil 433. Generally, the RF power source 441 is connected to a matching network 439 through connection 445. The matching network 439 is connected to the coil 433 through connection 443. In this manner, the RF power source 441 is connected to the coil 433. An optional Faraday shield 449a is disposed between the coil 433 and the window 411. The Faraday shield 449a may be maintained in a spaced relationship from the coil 433. In some embodiments, the Faraday shield 449a is positioned immediately above the window 411. In some embodiments, the Faraday shield 449b is between the window 411 and the chuck 417. In some embodiments, the Faraday shield 449b is not maintained in a spaced relationship with the coil 433. For example, the Faraday shield 449b may be positioned directly below the window 411 without any gap. The coil 433, the Faraday shield 449a, and the window 411 may each be configured to be approximately parallel to one another. The Faraday shield 449a may prevent metals or other species from depositing on the window 411 of the process chamber 424.

[0046] Process gas (e.g., O) may flow into the process chamber through one or more main gas flow inlets 460 and / or one or more side gas flow inlets 470 located in the upper subchamber 402. Similarly, although not explicitly shown, similar gas flow inlets may be used to supply process gas to the capacitively coupled plasma processing chamber. A vacuum pump, such as a one- or two-stage mechanical dry pump and / or turbomolecular pump 440, may be used to draw process gas from the process chamber 424 and maintain the pressure therein. For example, the vacuum pump may be used to evacuate the lower subchamber 403 during a purge operation. A valve-controlled conduit may be used to fluidly connect the vacuum pump to the process chamber 424 to selectively control the application of the vacuum environment provided by the vacuum pump, thereby controlling the process pressure within 402 and 403. This may be accomplished using a closed-loop controlled flow-restricting device, such as a throttle valve (not shown) or a pendulum valve (not shown), during plasma processing operations. Similarly, a vacuum pump and valves with controlled fluid connections to the capacitively coupled plasma processing chamber may also be used.

[0047] During operation of the apparatus 400, one or more process gases, such as an O2-containing gas, may be supplied through the gas flow inlets 460 and / or 470. In certain embodiments, process gases may be supplied only through the main gas flow inlet 460 or only through the side gas flow inlet 470. In some cases, the illustrated gas flow inlets may be replaced with more complex gas flow inlets, such as one or more showerheads. The Faraday shield 449a and / or the optional grid 450 may include internal channels and holes for delivering process gases to the process chamber 424. Either or both of the Faraday shield 449a and the optional grid 450 may function as showerheads for process gas delivery. In some embodiments, a liquid vaporization and delivery system may be located upstream of the process chamber 424 so that liquid reactants or precursors are vaporized and the vaporized reactants or precursors are introduced into the process chamber 424 via the gas flow inlets 460 and / or 470.

[0048] Radio frequency power is supplied from an RF power source 441 to the coil 433, causing an RF current to flow through the coil 433. The RF current flowing through the coil 433 creates an electromagnetic field around the coil 433. The electromagnetic field generates an induced current within the upper subchamber 402. The physical and chemical interaction of the various ions and radicals generated with the wafer 419 etches features and selectively deposits layers on the wafer 419.

[0049] When both an upper subchamber 402 and a lower subchamber 403 are present and a plasma grid 450 is used, induced currents act on the gas present in the upper subchamber 402 to generate an electron-ion plasma within the upper subchamber 402. The optional internal plasma grid 450 limits the amount of hot electrons within the lower subchamber 403. In some embodiments, the apparatus 400 is designed and operated such that the plasma present in the lower subchamber 403 is an ion-ion plasma.

[0050] While ion-ion plasmas have a high ratio of anions to cations, both the upper electron-ion plasma and the lower ion-ion plasma can contain positive and negative ions. Volatile etching and / or deposition byproducts can be removed from the lower subchamber 403 through port 422. For example, molybdenum oxychloride produced during etching of molybdenum oxide using BCl3 can be removed through port 422 during purging and / or evacuation. The chuck 417 disclosed herein can operate at temperatures between about 10°C and about 400°C. The temperature depends on the process operation and the specific recipe. In some embodiments, the apparatus is controlled to etch at temperatures between about 100°C and 400°C.

[0051] The apparatus 400 can be coupled to equipment (not shown) when installed in a clean room or manufacturing facility. The equipment includes plumbing to provide process gases, vacuum, temperature control, and environmental particle control. These equipment will be coupled to the apparatus 400 when installed in the target manufacturing facility. Additionally, the apparatus 400 can be coupled to a transfer chamber that allows a robot to transfer semiconductor wafers in and out of the apparatus 400 using standard automation techniques.

[0052] In some embodiments, a system controller 430 (which may include one or more physical or logical controllers) controls some or all operation of the process chamber 424. The system controller 430 may include one or more memory devices and one or more processors. In some embodiments, the apparatus 400 includes a switching system for controlling the flow rates of process gases. In some embodiments, the controller includes program instructions for performing the steps of any of the methods described herein.

[0053] In some implementations, the system controller 430 is part of a system that may be part of the examples described above. Such a system may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a wafer pedestal, a gas flow system, etc.). These systems may incorporate electronics for controlling pre-, during-, and post-processing operations of semiconductor wafers or substrates. This electronics may be integrated into the system controller 430 and may control various components or subcomponents of one or more systems. Depending on the processing parameters and / or type of system, this system controller may be programmed to control any of the processes disclosed herein, including process gas delivery, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer to and from tools and other transfer tools and / or load locks connected or interfaced with the particular system.

[0054] Broadly speaking, the system controller 430 may be defined as electronic equipment having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, and enable endpoint measurements. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers (e.g., software) that execute the program instructions. The program instructions may be instructions communicated to the controller in the form of various personalizations (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for the system. In some embodiments, the operational parameters may be part of a recipe defined by a process engineer to accomplish one or more processing steps during the fabrication or removal of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer die.

[0055] In some embodiments, the system controller 430 may be part of, coupled to, or a combination of a computer integrated with or otherwise networked to the system. For example, the controller may be in the “cloud” or all or part of a fab host computer system. This allows for remote access to wafer processing. The computer may provide remote access to the system to monitor the current progress of a fabrication operation, review the history of past fabrication operations, review trends or performance criteria from multiple fabrication operations, modify parameters of a current process, set processing steps following a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to the system over a network. Such a network may include a local network or the Internet. The remote computer may include a user interface that allows entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the system controller 430 receives instructions in the form of data. Such data identifies parameters for each of the processing steps performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool the controller is configured to interface with or control. Thus, as described above, the system controller 430 may be distributed, for example, by comprising one or more individual controllers networked together and cooperating toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would include one or more integrated circuits on the chamber that are located remotely (e.g., at the platform level or as part of a remote computer) and communicate with one or more integrated circuits that couple to control the process on the chamber.

[0056] Exemplary systems may include, but are not limited to, a plasma etch chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an ALD chamber or module, an ALE chamber or module, an ion implantation chamber or module, a tracking chamber or module, and any other semiconductor processing system that may be associated with or used in the fabrication and / or manufacturing of semiconductor wafers.

[0057] As described above, depending on the process step or steps being performed by the tool, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or one or more of tools used in material transport to and from tool locations and / or load ports within a semiconductor fabrication factory to transport wafer containers.

[0058] FIG. 5 illustrates a semiconductor process cluster architecture with various modules interfacing with a vacuum transfer module 538 (VTM). The arrangement of various modules for "transporting" wafers among multiple storage and processing modules is sometimes referred to as a "cluster tool architecture" system. An airlock 530, also known as a load lock or transfer module, interfaces with the VTM 538, which in turn interfaces with four processing modules 520a-520d, which may be individually optimized to perform various fabrication processes. Illustratively, the processing modules 520a-520d may be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering, and / or other semiconductor processes. In some embodiments, tin oxide deposition and tin oxide etching are performed in the same module. In some embodiments, tin oxide deposition and tin oxide etching are performed in different modules within the same tool. One or more substrate etch processing modules (any of 520a-520d) may be implemented as disclosed herein, for example, for conformal film deposition, selective tin oxide etching, air gap formation, and other suitable functions according to disclosed embodiments. The airlock 530 and processing modules 520a-520d may be referred to as "stations." Each station has a facet 536 that interfaces the station to a VTM 538. Sensors 1-18 are used within each facet to detect the wafer 526 as it moves between the respective stations.

[0059] A robot 522 transfers wafers 526 between stations. In one embodiment, the robot 522 has one arm, and in another embodiment, the robot 522 has two arms, each with an end effector 524 that picks a wafer, such as wafer 526, for transfer. A front-end robot 532 in an atmospheric transfer module (ATM) 540 is used to transfer wafers 526 from cassettes or front-opening unified pods (FOUPs) 534 in a load port module (LPM) 542 to the airlock 530. A module center 528 within the process modules 520a-520d is one location for placing wafers 526. An aligner 544 in the ATM 540 is used to align the wafers.

[0060] In an exemplary processing method, a wafer is placed into one of the FOUPs 534 within the LPM 542. The front-end robot 532 transfers the wafer from the FOUP 534 to the aligner 544, ensuring that the wafer 526 is properly centered before being etched or processed. After alignment, the front-end robot 532 moves the wafer 526 into the airlock 530. The airlock 530 is capable of matching the environments of the ATM 540 and the VTM 538, allowing the wafer 526 to move between the two pressure environments without damage. The robot 522 moves the wafer 526 from the airlock 530 through the VTM 538 to one of the processing modules 520a-520d. To accomplish this wafer movement, the robot 522 uses end effectors 524 on each arm. After wafer 526 has been processed, robot 522 moves wafer 526 from processing module 520a-520d to airlock 530. From here, wafer 526 may be moved by front-end robot 532 to one of FOUPs 534 or to aligner 544.

[0061] It should be noted that the computer controlling the wafer movement may be local to the cluster architecture, may be located outside the cluster architecture on the manufacturing floor, or may be at a remote location and connected to the cluster architecture via a network. The controller described above with respect to Figure 11 may be implemented with the tool of Figure 12. A machine-readable medium containing instructions for controlling process operations in accordance with the present invention may be coupled to the system controller.

[0062] In some embodiments, an apparatus is provided that includes a process chamber having a substrate holder configured to hold a semiconductor substrate during etching, an inlet configured to introduce one or more reactants into the process chamber, optionally a plasma generator configured to generate a plasma in the process gas, and a controller, wherein the controller includes program instructions for performing any of the methods described herein.

[0063] In another aspect, a non-transitory computer machine readable medium is provided that includes code for performing any of the methods described herein. Experimental results

[0064] The effect of process temperature on etch rate was experimentally investigated. Molybdenum on a substrate was etched at various temperatures, and the amount of material etched per etching cycle was measured at each temperature. Each cycle included the following steps: (1) exposing the substrate to O2 plasma; (2) purging the process chamber with helium; (3) exposing the substrate to BCl3 in the absence of plasma; (4) purging the process chamber with helium; (5) exposing the substrate to gaseous HF; and

[0065] (6) Purge the process chamber with helium.

[0066] Twenty ALE cycles were performed. All cycles were performed under a pressure of 60 mTorr and at a constant temperature for each test temperature. O2 plasma treatment was performed using a direct (in-situ) plasma generated with a power of 600 W and a frequency of 13.56 MHz. Oxygen was flowed into the process chamber at a flow rate of 500 sccm. No external bias was used.

[0067] Figure 6 is a plot showing the cycle-by-cycle etching obtained using the process conditions described above at various temperatures ranging from 150 to 250°C. It can be seen that etch rates of 8 to 12 Å / cycle were obtained over this temperature range.

[0068] Other experiments demonstrated the feasibility of using a remotely generated plasma during the oxidation process. Using a remote plasma, the plasma was generated using a power of 3,000 W, an O2 flow rate of 1,000 sccm, and a pressure of 500 mTorr. Further embodiments

[0069] The apparatus and processes described herein can be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacturing of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, although not necessarily, such apparatus and processes are used or performed in a conventional fabrication facility. Lithographic patterning of a film generally includes some or all of the following steps, each of which can be performed by a number of possible tools: (1) applying a photoresist onto a workpiece, i.e., substrate, using, for example, a spin-on or spray-on tool; (2) curing the photoresist using a hotplate, furnace, or UV curing tool; (3) exposing the photoresist to visible, UV, or X-ray light using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist, followed by patterning using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

Claims

1. 1. A method for etching a molybdenum layer on a semiconductor substrate, comprising: (a) exposing the semiconductor substrate to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide; (b) after forming the molybdenum oxide, exposing the semiconductor substrate to boron trichloride to form boron oxide on the semiconductor substrate and convert the molybdenum oxide to a volatile molybdic oxychloride; (c) exposing the semiconductor substrate to a fluorine-containing reactant to remove the boron oxide from the semiconductor substrate; A method comprising:

2. 10. The method of claim 1, further comprising repeating steps (a) through (c).

3. 10. The method of claim 1, wherein steps (a) to (c) are performed in the absence of a plasma.

4. 2. The method of claim 1, wherein said etching of the molybdenum layer by steps (a)-(c) is isotropic.

5. 2. The method of claim 1, wherein a single etching cycle comprises steps (a) through (c), and wherein the single etching cycle controllably removes between about 8 and 15 Å of the molybdenum layer.

6. 10. The method of claim 1, wherein the oxygen-containing reactant is O 2 , O 3 and mixtures thereof; 2 When is used, O 2 is O activated by remote plasma to form oxygen radicals. 2 , activated by direct plasma to form oxygen ions 2 , and O in a plasma-free environment 2 The method is selected from the group consisting of:

7. 10. The method of claim 1, wherein the fluorine-containing reactant is HF.

8. 10. The method of claim 1, wherein steps (a)-(c) are carried out at a temperature between about 100-400°C.

9. 10. The method of claim 1, wherein steps (a)-(c) are carried out at a temperature between about 150-250°C.

10. 10. The method of claim 1, wherein the oxygen-containing reactant is O activated in a plasma. 2 That's the method.

11. 10. The method of claim 1, wherein the molybdenum layer is etched from sidewalls of recessed features on the semiconductor substrate.

12. 10. The method of claim 1, wherein the molybdenum layer is etched during word line isolation in the fabrication of a 3D NAND structure.

13. 10. The method of claim 1, wherein the method comprises performing about 2 to 50 etching cycles, each etching cycle comprising steps (a) to (c).

14. 10. The method of claim 1, wherein steps (a) through (c) are performed in a single process chamber.

15. 10. The method of claim 1, wherein steps (a) to (c) are performed in a single process chamber, and further comprising purging the process chamber after each of steps (a) to (c).

16. An apparatus for processing a substrate, comprising: (a) a process chamber configured to accommodate the substrate, the process chamber including a substrate holder configured to hold the substrate and an inlet configured to introduce one or more reactants into the process chamber; and (b) a controller having program instructions configured to etch a molybdenum layer on the substrate, (i) exposing the substrate having the molybdenum layer to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide; (ii) exposing the substrate to boron trichloride to form boron oxide on the substrate and convert the molybdenum oxide to volatile molybdenum oxychloride; (iii) exposing the substrate to a fluorine-containing reactant to remove the boron oxide from the substrate; a controller having program instructions configured to etch a molybdenum layer on the substrate by:

17. 17. The apparatus of claim 16, further comprising a heater, wherein the program instructions include instructions configured to maintain a temperature between about 100 and 400° C. during etching of the molybdenum layer.

18. 17. The apparatus of claim 16, further configured to perform deposition of material on the substrate.

19. 17. The apparatus of claim 16, wherein the program instructions include instructions configured to repeat steps (i) through (iii).

20. 17. The apparatus of claim 16 configured to activate the oxygen-containing reactant in a plasma.

21. 1. A non-transitory computer machine readable medium containing program instructions for controlling an apparatus configured for processing a substrate, the program instructions comprising: (i) exposing the substrate having the molybdenum layer to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide; (ii) exposing the substrate to boron trichloride to form boron oxide on the semiconductor substrate and convert the molybdenum oxide to volatile molybdenum oxychloride; (iii) exposing the substrate to a fluorine-containing reactant to remove the boron oxide from the semiconductor substrate; 1. A non-transitory computer machine readable medium comprising code configured to:

22. 10. The method of claim 1, applying a photoresist to the semiconductor substrate; exposing the photoresist to light; patterning the photoresist and transferring the pattern to the semiconductor substrate; selectively removing the photoresist from the semiconductor substrate; The method further comprises:

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